Various clean-ups:
  1. Trange sysctl's belong to the temp sensors, not to the fan controllers
  2. Trange really describes a slope on many chips, so modify the description
  3. Most of the sysctl's are read/write even if the chip's config is
    locked;  reflect that in the CTLFLAGs
  4. Apply correct 'nominal' values for voltage sensors/limits, specify
    them in microVolts, and calculate once rather than each time needed
  5. Be more consistent in register names - for example, use VCC instead of
    SUPPLY_VOLTAGE, to match VCC_LOWLIM & VCC_HIGHLIM
  6. Type of dbcool_islocked() should be bool, not int
  7. Reduce some unnecessary code indentation
  8. Define Vtt and Imon, and add ADT7490 support (excluding PECI sensors)
  9. Split the huge (250+ lines) dbcool_setup() function into a few smaller
    routines for better readability
10. Update sensor tables for ADT7476 and ADT7468 - these chips have five
    voltage sensors, not two
11. Adjust flags for ADT7463 and ADM1027 - these chips can monitor CPU
    VID data bits
12. Update man page

(pgoyette)