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MAIN commitmail json YAML
src/sys/dev/mii/igphy.c@1.20
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diff
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nxr@1.20
src/sys/dev/pci/if_wm.c@1.183 / diff / nxr@1.183
src/sys/dev/pci/if_wmvar.h@1.4 / diff / nxr@1.4
src/sys/dev/pci/if_wm.c@1.183 / diff / nxr@1.183
src/sys/dev/pci/if_wmvar.h@1.4 / diff / nxr@1.4
Sync with Intel's original em driver:
- Add dspcode for igp3 and use it when the EEPROM isn't available.
- Add some delays.
- Stop the PHY transmitter before patching the DSP code and restart it after wrote.
- Save and restore register 0x2f5b.
- Add dspcode for igp3 and use it when the EEPROM isn't available.
- Add some delays.
- Stop the PHY transmitter before patching the DSP code and restart it after wrote.
- Save and restore register 0x2f5b.