---
- branch: MAIN
  date: Mon Aug  1 11:08:03 UTC 2011
  files:
  - new: '1.7'
    old: '1.6'
    path: src/sys/arch/x86/include/pci_machdep_common.h
    pathrev: src/sys/arch/x86/include/pci_machdep_common.h@1.7
    type: modified
  - new: '1.20'
    old: '1.19'
    path: src/sys/arch/x86/pci/pci_intr_machdep.c
    pathrev: src/sys/arch/x86/pci/pci_intr_machdep.c@1.20
    type: modified
  id: 20110801T110803Z.7f4a3dcfcaf43b487a1833d1d62520490e47c275
  log: |
    add an experimental implementation of PCI MSIs (Message Signaled
    Interrupts). Successfully tested with hdaudio and "wpi" wireless
    ethernet.
    notes:
    -There seem to be buggy chips around which announce MSI support
     but don't correctly implement it. Thus the final word whether MSIs
     can be used should be by the driver.
    -Only a single vector is supported. For multiple vectors, the IDT
     allocation code would have to be changed. (And we would possibly
     run into problems due to the limited number of vectors supported
     by the current code.)
    -The code is "#if NIOAPIC > 0" because it uses the ioapic_edge
     interrupt stubs. These actually don't touch any ioapic, so this
     is somewhat a misnomer.
    -MSIs can't be identified by a "pin" but only by a cpu/vector
     pair. Common intr code soesn't deal well with this yet.
    -Drivers need to take care of saving/restoring MSI data in the device's
     config space on suspend/resume.
  module: src
  subject: 'CVS commit: src/sys/arch/x86'
  unixtime: '1312196883'
  user: drochner