Now
MAIN commitmail json YAML
src/sys/arch/arm/omap/omap3_sdhc.c@1.6
/
diff
/
nxr@1.6
src/sys/dev/sdmmc/sdhc.c@1.35 / diff / nxr@1.35
src/sys/dev/sdmmc/sdhcvar.h@1.11 / diff / nxr@1.11
src/sys/dev/sdmmc/sdhc.c@1.35 / diff / nxr@1.35
src/sys/dev/sdmmc/sdhcvar.h@1.11 / diff / nxr@1.11
Implement TI AM335x's SDHC reset quirk. Beaglebone SDHC works now!
On the AM335x, we first must wait for the controller to acknowledge
the reset; then we can wait for the reset to complete.
I believe this quirk also applies to the OMAP4 ES, but I don't have
one of those to test and we don't seem to have an obvious conditional
for it anyway.
This quirk may work for controllers that don't require it too, but I
am nervous about doing it by default because if we miss the reset
acknowledgement, then we'll just time out even though everything is
really hunky-dory.
Also, for all sdhc, don't bother writing 0 in sdhc_soft_reset while
waiting for the reset to complete; there is no need.
ok matt
On the AM335x, we first must wait for the controller to acknowledge
the reset; then we can wait for the reset to complete.
I believe this quirk also applies to the OMAP4 ES, but I don't have
one of those to test and we don't seem to have an obvious conditional
for it anyway.
This quirk may work for controllers that don't require it too, but I
am nervous about doing it by default because if we miss the reset
acknowledgement, then we'll just time out even though everything is
really hunky-dory.
Also, for all sdhc, don't bother writing 0 in sdhc_soft_reset while
waiting for the reset to complete; there is no need.
ok matt