---
- branch: MAIN
  date: Mon Dec  2 08:33:52 UTC 2019
  files:
  - new: '1.42'
    old: '1.41'
    path: src/sys/arch/x86/x86/bus_space.c
    pathrev: src/sys/arch/x86/x86/bus_space.c@1.42
    type: modified
  id: 20191202T083352Z.8f765b7a84204760edb3b6fc632e2f9ff935a9b2
  log: |
    Use LFENCE/SFENCE/MFENCE in x86 bus_space_barrier.

    These are needed for BUS_SPACE_MAP_PREFETCHABLE mappings.  On x86,
    these are WC-type memory regions, which means -- unlike normal
    WB-type memory regions -- loads can be reordered with loads,
    requiring LFENCE, and stores can be reordered with stores, requiring
    SFENCE.

    Reference: AMD64 Architecture Programmer's Manual, Volume 2: System
    Programming, Sec. 7.4.1 `Memory Barrier Interaction with Memory
    Types', Table 7-3 `Memory Access Ordering Rules'.
  module: src
  subject: 'CVS commit: src/sys/arch/x86/x86'
  unixtime: '1575275632'
  user: riastradh