---
- branch: MAIN
  date: Wed Sep  2 01:33:27 UTC 2020
  files:
  - new: '1.300'
    old: '1.299'
    path: src/sys/arch/mips/mips/mips_machdep.c
    pathrev: src/sys/arch/mips/mips/mips_machdep.c@1.300
    type: modified
  id: 20200902T013327Z.9dd8b4e621a31fea9fae646819f84e946119f69b
  log: |
    Octeon CN70XX CPUs have a COP0 config5 register.
    XXX: The presense of these are defined by the MIPS architecture, should probe.
  module: src
  subject: 'CVS commit: src/sys/arch/mips/mips'
  unixtime: '1599010407'
  user: simonb