---
- branch: MAIN
  date: Sat Jul 24 15:52:16 UTC 2021
  files:
  - new: '1.67'
    old: '1.66'
    path: src/sys/dev/eisa/ahb.c
    pathrev: src/sys/dev/eisa/ahb.c@1.67
    type: modified
  id: 20210724T155216Z.6d1dd6528159887001aa9abd3535b41ee5e1c2f1
  log: |
    Don't blindly establish our interrupt handler as IST_LEVEL.  If the INTDEF
    register has the INTHIGH bit set, the controller is going to keep the
    line low when *not* asserting an interrupt, and since EISA level-tiggered
    interrupts are active-low, this would result in a forever-interrupt-storm.

    So, if INTHIGH is set in INTDEF, establish our interrupt handler as
    IST_EDGE, which will program the EISA PIC to detect the interrupt on
    the rising edge of the IRQ line.
  module: src
  subject: 'CVS commit: src/sys/dev/eisa'
  unixtime: '1627141936'
  user: thorpej