Now
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src/sys/arch/hppa/hppa/intr.c@1.6
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diff
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nxr@1.6
src/sys/arch/hppa/include/intr.h@1.2 / diff / nxr@1.2
src/sys/arch/hppa/include/intr.h@1.2 / diff / nxr@1.2
unmask interrupt bits leading to other interrupt registers
now hardware interrupts actually fire instead of being found pending by the
timer interrupt
with this SCSI throughput on my c360 is what you'd expect from an UW esiop
now hardware interrupts actually fire instead of being found pending by the
timer interrupt
with this SCSI throughput on my c360 is what you'd expect from an UW esiop