---
- branch: MAIN
  date: Tue Nov  8 13:34:18 UTC 2022
  files:
  - new: '1.15'
    old: '1.14'
    path: src/sys/arch/riscv/include/types.h
    pathrev: src/sys/arch/riscv/include/types.h@1.15
    type: modified
  id: 20221108T133418Z.ba234cdd252f1c4d21a943e003594769676e3410
  log: |
    Add a #define for XLEN, the RISC-V native base integer ISA width.
  module: src
  subject: 'CVS commit: src/sys/arch/riscv/include'
  unixtime: '1667914458'
  user: simonb