---
- branch: MAIN
  date: Thu Nov 17 13:10:43 UTC 2022
  files:
  - new: '1.26'
    old: '1.25'
    path: src/sys/arch/riscv/include/sysreg.h
    pathrev: src/sys/arch/riscv/include/sysreg.h@1.26
    type: modified
  id: 20221117T131043Z.c50d5c47730267bc0e28da93b7d1e0551300ee74
  log: |
    Document lots of bits.
    Remove bits no longer in the RISC-V supervisor spec.
    Update defines for the user-mode sstatus value.
  module: src
  subject: 'CVS commit: src/sys/arch/riscv/include'
  unixtime: '1668690643'
  user: simonb