---
- branch: MAIN
  date: Sat Feb 23 10:43:37 UTC 2019
  files:
  - new: '1.326'
    old: '1.325'
    path: src/sys/arch/x86/x86/pmap.c
    pathrev: src/sys/arch/x86/x86/pmap.c@1.326
    type: modified
  - new: '1.13'
    old: '1.12'
    path: src/sys/dev/nvmm/x86/nvmm_x86_vmx.c
    pathrev: src/sys/dev/nvmm/x86/nvmm_x86_vmx.c@1.13
    type: modified
  id: 20190223T104337Z.89a1ca5e8b84c7caf6e203e77ca171f658ffbec4
  log: |
    Add support for CPUs that don't have the EPT_{A,D} bits.

    On such CPUs, these bits are ignored by the hardware. We don't care about
    setting them, however, we must always assume they are set. Modify the pmap
    code to do that.

    While here, in pmap_ept_remove_pte, don't flush the TLB when it's not
    needed.

    Tested on an old Intel Celeron.
  module: src
  subject: 'CVS commit: src/sys'
  unixtime: '1550918617'
  user: maxv