---
- branch: netbsd-8
  date: Wed Aug  5 16:02:53 UTC 2020
  files:
  - new: 1.98.2.20
    old: 1.98.2.19
    path: src/sys/arch/x86/include/specialreg.h
    pathrev: src/sys/arch/x86/include/specialreg.h@1.98.2.20
    type: modified
  id: 20200805T160253Z.5794384c109caf7f933331ab061b1ce80a85e356
  log: "Pull up the following revisions, requested by msaitoh in ticket #1588:\n\n\tsys/arch/x86/include/specialreg.h\t\t1.162-1.168
    via patch\n\n- AMD CPUID Fn8000_000a %edx bit 20 is \"SPEC_CTRL\".\n- Add some
    bit definitions of AMD's CPUID Fn8000_001f Encrypted Memory\n  features.\n- Add
    AMD INVLPGB/TLBSYNC hypervisor enable in VMCB and TLBSYNC\n  intercept bit.\n-
    Add AMD MSR_DE_CFG's bit 1 as DE_CFG_LFENCE_SERIALIZE.\n- Add some definitions
    for Intel:\n  - Add CPUID leaf 6 %eax bit 19 for HW_FEEDBACK* and\n    IA32_PACKAGE_TERM*
    MSRs.\n  - Add CPUID leaf 7 %ecx bit 31 for Protection Keys.\n  - Add definition
    of Load only TLB and Store only TLB.\n  - Add IF_PSCHANGE_MC_NO bit of IA32_ARCH_CAPABILITIES\n
    \ - Fix HWP_IGNIDL.\n- Add CPUID 7 %edx bit 9 \"SRBDS_CTRL\"\n- Modify comment.
    Style and fix typo.\n"
  module: src
  subject: 'CVS commit: [netbsd-8] src/sys/arch/x86/include'
  unixtime: '1596643373'
  user: martin