Received: by mail.netbsd.org (Postfix, from userid 0) id 5317E63B10B; Sun, 8 Aug 2010 11:24:55 +0000 (UTC) Received: from cvs.netbsd.org (cvs.NetBSD.org [IPv6:2001:4f8:3:7:2e0:81ff:fe30:95bd]) by mail.netbsd.org (Postfix) with ESMTP id 3A6EF63B101 for ; Sun, 8 Aug 2010 11:24:52 +0000 (UTC) Received: by cvs.netbsd.org (Postfix, from userid 500) id DCB16175DD; Sun, 8 Aug 2010 11:24:52 +0000 (UTC) MIME-Version: 1.0 Content-Disposition: inline Content-Transfer-Encoding: 8bit Content-Type: text/plain Date: Sun, 8 Aug 2010 11:24:52 +0000 From: Izumi Tsutsui Subject: CVS commit: src/sys/arch/arm/xscale To: source-changes@NetBSD.org X-Mailer: log_accum Message-Id: <20100808112452.DCB16175DD@cvs.netbsd.org> Sender: source-changes-owner@NetBSD.org List-Id: source-changes.NetBSD.org Precedence: list Reply-To: source-changes-d@NetBSD.org Mail-Reply-To: Izumi Tsutsui Mail-Followup-To: source-changes-d@NetBSD.org Module Name: src Committed By: tsutsui Date: Sun Aug 8 11:24:52 UTC 2010 Modified Files: src/sys/arch/arm/xscale: pxa2x0_lcd.c Log Message: Allow pxa2x0_lcd driver mapping screen buffer memory cachable with write-through map (i.e. map it without BUS_DMA_COHERENT) since currently all DMA data transfers are memory to device only. Disabled by default, but enabled by "options PXA2X0_LCD_WRITETHROUGH" or setting pxa2x0_lcd_writethrough = 1 in a kernel binary. Tested on WS003SH by me and on WS011SH by jun@, and console output speed is improved ~three times faster than coherent (uncached) mapping. XXX: should we have a flag like BUS_DMA_WRITETHROUGH in MI bus_dma(9)? To generate a diff of this commit: cvs rdiff -u -r1.29 -r1.30 src/sys/arch/arm/xscale/pxa2x0_lcd.c Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.