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Date: Sat, 28 Mar 2015 16:13:56 +0000
From: "Matt Thomas" <matt@netbsd.org>
Subject: CVS commit: src/sys/arch/riscv
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Message-Id: <20150328161356.9018998@cvs.netbsd.org>
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Module Name:	src
Committed By:	matt
Date:		Sat Mar 28 16:13:56 UTC 2015

Modified Files:
	src/sys/arch/riscv/include: cpu.h intr.h locore.h sysreg.h types.h
Added Files:
	src/sys/arch/riscv/conf: GENERIC INSTALL INSTALL.config Makefile.riscv
	    files.riscv kern.ldscript std.riscv std.riscv64
	src/sys/arch/riscv/htif: htif.c htif_cons.c htif_disk.c htif_var.h
	src/sys/arch/riscv/riscv: autoconf.c clock_machdep.c core32_machdep.c
	    core_machdep.c cpu_mainbus.c cpu_subr.c db_disasm.c db_machdep.c
	    db_trace.c exec_machdep.c fixup.c fpu.c genassym.cf kobj_machdep.c
	    locore.S mainbus.c netbsd32_machdep.c pmap_machdep.c
	    process_machdep.c procfs_machdep.c riscv_machdep.c sig32_machdep.c
	    sig_machdep.c softint_machdep.c spl.S stubs.c sys_machdep.c
	    syscall.c trap.c vm_machdep.c

Log Message:
Beginnings of RISCV kernel support.  Note that the pmap support is not yet
committed and probably won't be for awhile.  This is mostly preliminary
waiting for the supervisor specification to come out.  Lots of missing pieces
but it mostly builds.


To generate a diff of this commit:
cvs rdiff -u -r0 -r1.1 src/sys/arch/riscv/conf/GENERIC \
    src/sys/arch/riscv/conf/INSTALL src/sys/arch/riscv/conf/INSTALL.config \
    src/sys/arch/riscv/conf/Makefile.riscv \
    src/sys/arch/riscv/conf/files.riscv src/sys/arch/riscv/conf/kern.ldscript \
    src/sys/arch/riscv/conf/std.riscv src/sys/arch/riscv/conf/std.riscv64
cvs rdiff -u -r0 -r1.1 src/sys/arch/riscv/htif/htif.c \
    src/sys/arch/riscv/htif/htif_cons.c src/sys/arch/riscv/htif/htif_disk.c \
    src/sys/arch/riscv/htif/htif_var.h
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/riscv/include/cpu.h \
    src/sys/arch/riscv/include/intr.h src/sys/arch/riscv/include/locore.h \
    src/sys/arch/riscv/include/sysreg.h src/sys/arch/riscv/include/types.h
cvs rdiff -u -r0 -r1.1 src/sys/arch/riscv/riscv/autoconf.c \
    src/sys/arch/riscv/riscv/clock_machdep.c \
    src/sys/arch/riscv/riscv/core32_machdep.c \
    src/sys/arch/riscv/riscv/core_machdep.c \
    src/sys/arch/riscv/riscv/cpu_mainbus.c \
    src/sys/arch/riscv/riscv/cpu_subr.c src/sys/arch/riscv/riscv/db_disasm.c \
    src/sys/arch/riscv/riscv/db_machdep.c src/sys/arch/riscv/riscv/db_trace.c \
    src/sys/arch/riscv/riscv/exec_machdep.c src/sys/arch/riscv/riscv/fixup.c \
    src/sys/arch/riscv/riscv/fpu.c src/sys/arch/riscv/riscv/genassym.cf \
    src/sys/arch/riscv/riscv/kobj_machdep.c src/sys/arch/riscv/riscv/locore.S \
    src/sys/arch/riscv/riscv/mainbus.c \
    src/sys/arch/riscv/riscv/netbsd32_machdep.c \
    src/sys/arch/riscv/riscv/pmap_machdep.c \
    src/sys/arch/riscv/riscv/process_machdep.c \
    src/sys/arch/riscv/riscv/procfs_machdep.c \
    src/sys/arch/riscv/riscv/riscv_machdep.c \
    src/sys/arch/riscv/riscv/sig32_machdep.c \
    src/sys/arch/riscv/riscv/sig_machdep.c \
    src/sys/arch/riscv/riscv/softint_machdep.c src/sys/arch/riscv/riscv/spl.S \
    src/sys/arch/riscv/riscv/stubs.c src/sys/arch/riscv/riscv/sys_machdep.c \
    src/sys/arch/riscv/riscv/syscall.c src/sys/arch/riscv/riscv/trap.c \
    src/sys/arch/riscv/riscv/vm_machdep.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.