Sat Jan 3 18:15:11 2009 UTC ()
Initialise cpu_info_store so that we start up with a valid curlwp.


(bjh21)
diff -r1.24 -r1.25 src/sys/arch/acorn26/acorn26/machdep.c

cvs diff -r1.24 -r1.25 src/sys/arch/acorn26/acorn26/Attic/machdep.c (switch to unified diff)

--- src/sys/arch/acorn26/acorn26/Attic/machdep.c 2008/11/11 06:46:40 1.24
+++ src/sys/arch/acorn26/acorn26/Attic/machdep.c 2009/01/03 18:15:11 1.25
@@ -1,225 +1,230 @@ @@ -1,225 +1,230 @@
1/* $NetBSD: machdep.c,v 1.24 2008/11/11 06:46:40 dyoung Exp $ */ 1/* $NetBSD: machdep.c,v 1.25 2009/01/03 18:15:11 bjh21 Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 1998 Ben Harris 4 * Copyright (c) 1998 Ben Harris
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Redistribution and use in source and binary forms, with or without 7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions 8 * modification, are permitted provided that the following conditions
9 * are met: 9 * are met:
10 * 1. Redistributions of source code must retain the above copyright 10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer. 11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright 12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the 13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution. 14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products 15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission. 16 * derived from this software without specific prior written permission.
17 *  17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */ 28 */
29/* 29/*
30 * machdep.c -- standard machine-dependent functions 30 * machdep.c -- standard machine-dependent functions
31 */ 31 */
32 32
33#include <sys/param.h> 33#include <sys/param.h>
34 34
35__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.24 2008/11/11 06:46:40 dyoung Exp $"); 35__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.25 2009/01/03 18:15:11 bjh21 Exp $");
36 36
37#include <sys/buf.h> 37#include <sys/buf.h>
38#include <sys/kernel.h> 38#include <sys/kernel.h>
39#include <sys/mbuf.h> 39#include <sys/mbuf.h>
40#include <sys/mount.h> 40#include <sys/mount.h>
41#include <sys/reboot.h> 41#include <sys/reboot.h>
42#include <sys/sysctl.h> 42#include <sys/sysctl.h>
43#include <sys/systm.h> 43#include <sys/systm.h>
44#include <sys/cpu.h> 44#include <sys/cpu.h>
45#include <sys/device.h> 45#include <sys/device.h>
46 46
47#include <dev/i2c/i2cvar.h> 47#include <dev/i2c/i2cvar.h>
48#include <dev/i2c/pcf8583var.h> 48#include <dev/i2c/pcf8583var.h>
49 49
50#include <uvm/uvm_extern.h> 50#include <uvm/uvm_extern.h>
51 51
52#include <machine/machdep.h> 52#include <machine/machdep.h>
53#include <machine/memcreg.h> 53#include <machine/memcreg.h>
54 54
55int physmem; 55int physmem;
56char machine[] = MACHINE; 56char machine[] = MACHINE;
57char machine_arch[] = MACHINE_ARCH; 57char machine_arch[] = MACHINE_ARCH;
58char cpu_model[] = "Archimedes"; 58char cpu_model[] = "Archimedes";
59 59
60/* Our exported CPU info; we can have only one. */ 60/* Our exported CPU info; we can have only one. */
61struct cpu_info cpu_info_store; 61struct cpu_info cpu_info_store = {
 62 .ci_cpl = IPL_HIGH,
 63#ifndef PROCESS_ID_IS_CURLWP
 64 .ci_curlwp = &lwp0,
 65#endif
 66};
62 67
63/* For reading NVRAM during bootstrap. */ 68/* For reading NVRAM during bootstrap. */
64i2c_tag_t acorn26_i2c_tag; 69i2c_tag_t acorn26_i2c_tag;
65 70
66struct vm_map *phys_map = NULL; 71struct vm_map *phys_map = NULL;
67struct vm_map *mb_map = NULL; /* and ever more shall be so */ 72struct vm_map *mb_map = NULL; /* and ever more shall be so */
68 73
69int waittime = -1; 74int waittime = -1;
70 75
71void 76void
72cpu_reboot(howto, b) 77cpu_reboot(howto, b)
73 int howto; 78 int howto;
74 char *b; 79 char *b;
75{ 80{
76 81
77 /* If "always halt" was specified as a boot flag, obey. */ 82 /* If "always halt" was specified as a boot flag, obey. */
78 if ((boothowto & RB_HALT) != 0) 83 if ((boothowto & RB_HALT) != 0)
79 howto |= RB_HALT; 84 howto |= RB_HALT;
80 85
81 boothowto = howto; 86 boothowto = howto;
82 87
83 /* If system is cold, just halt. */ 88 /* If system is cold, just halt. */
84 if (cold) { 89 if (cold) {
85 boothowto |= RB_HALT; 90 boothowto |= RB_HALT;
86 goto haltsys; 91 goto haltsys;
87 } 92 }
88 93
89 if ((boothowto & RB_NOSYNC) == 0 && waittime < 0) { 94 if ((boothowto & RB_NOSYNC) == 0 && waittime < 0) {
90 waittime = 0; 95 waittime = 0;
91 vfs_shutdown(); 96 vfs_shutdown();
92 /* 97 /*
93 * If we've been adjusting the clock, the todr 98 * If we've been adjusting the clock, the todr
94 * will be out of synch; adjust it now. 99 * will be out of synch; adjust it now.
95 */ 100 */
96 resettodr(); 101 resettodr();
97 } 102 }
98 103
99 /* Disable interrupts. */ 104 /* Disable interrupts. */
100 splhigh(); 105 splhigh();
101 106
102#if 0 107#if 0
103 /* XXX Need to implement this */ 108 /* XXX Need to implement this */
104 if (boothowto & RB_DUMP) 109 if (boothowto & RB_DUMP)
105 dumpsys(); 110 dumpsys();
106#endif 111#endif
107 112
108 /* run any shutdown hooks */ 113 /* run any shutdown hooks */
109 doshutdownhooks(); 114 doshutdownhooks();
110 115
111 pmf_system_shutdown(boothowto); 116 pmf_system_shutdown(boothowto);
112 117
113haltsys: 118haltsys:
114 if (howto & RB_HALT) { 119 if (howto & RB_HALT) {
115 printf("system halted\n"); 120 printf("system halted\n");
116 for (;;); 121 for (;;);
117 } else { 122 } else {
118 printf("rebooting..."); 123 printf("rebooting...");
119 /* 124 /*
120 * On a real reset, the ROM is mapped into address 125 * On a real reset, the ROM is mapped into address
121 * zero. On RISC OS 3.11 at least, this can be faked 126 * zero. On RISC OS 3.11 at least, this can be faked
122 * by copying the first instruction in the ROM to 127 * by copying the first instruction in the ROM to
123 * address zero -- it immediately branches into the 128 * address zero -- it immediately branches into the
124 * ROM at its usual address, and hence would remove 129 * ROM at its usual address, and hence would remove
125 * the ROM mapped at zero anyway. 130 * the ROM mapped at zero anyway.
126 * 131 *
127 * In order to convince RISC OS to do a hard reset, we 132 * In order to convince RISC OS to do a hard reset, we
128 * fake a *FX 200,2. Note that I don't know if this 133 * fake a *FX 200,2. Note that I don't know if this
129 * will work on RISC OS <3.10. This is slightly 134 * will work on RISC OS <3.10. This is slightly
130 * suboptimal as it causes RISC OS to zero the whole 135 * suboptimal as it causes RISC OS to zero the whole
131 * of RAM on startup (farewell, message buffer). If 136 * of RAM on startup (farewell, message buffer). If
132 * anyone can tell me how to fake a control-reset in 137 * anyone can tell me how to fake a control-reset in
133 * software, I'd be most grateful. 138 * software, I'd be most grateful.
134 */ 139 */
135 *(volatile u_int8_t *)0x9c2 = 2; /* Zero page magic */ 140 *(volatile u_int8_t *)0x9c2 = 2; /* Zero page magic */
136 *(volatile u_int32_t *)0 141 *(volatile u_int32_t *)0
137 = *(volatile u_int32_t *)MEMC_ROM_LOW_BASE; 142 = *(volatile u_int32_t *)MEMC_ROM_LOW_BASE;
138 /* reboot in SVC mode, IRQs and FIQs disabled */ 143 /* reboot in SVC mode, IRQs and FIQs disabled */
139 __asm volatile("movs pc, %0" : : 144 __asm volatile("movs pc, %0" : :
140 "r" (R15_MODE_SVC | R15_FIQ_DISABLE | R15_IRQ_DISABLE)); 145 "r" (R15_MODE_SVC | R15_FIQ_DISABLE | R15_IRQ_DISABLE));
141 } 146 }
142 panic("cpu_reboot failed"); 147 panic("cpu_reboot failed");
143} 148}
144 149
145/* 150/*
146 * cpu_startup: allocate memory for variable-sized tables, 151 * cpu_startup: allocate memory for variable-sized tables,
147 * initialize CPU, and do autoconfiguration. 152 * initialize CPU, and do autoconfiguration.
148 */ 153 */
149void 154void
150cpu_startup() 155cpu_startup()
151{ 156{
152 vaddr_t minaddr, maxaddr; 157 vaddr_t minaddr, maxaddr;
153 char pbuf[9]; 158 char pbuf[9];
154 159
155 /* Stuff to do here: */ 160 /* Stuff to do here: */
156 /* initmsgbuf() is called from start() */ 161 /* initmsgbuf() is called from start() */
157 162
158 printf("%s%s", copyright, version); 163 printf("%s%s", copyright, version);
159 format_bytes(pbuf, sizeof(pbuf), ctob(physmem)); 164 format_bytes(pbuf, sizeof(pbuf), ctob(physmem));
160 printf("total memory = %s\n", pbuf); 165 printf("total memory = %s\n", pbuf);
161 166
162 /* Various boilerplate memory allocations. */ 167 /* Various boilerplate memory allocations. */
163 minaddr = 0; 168 minaddr = 0;
164 169
165 /* 170 /*
166 * Allocate a submap for physio 171 * Allocate a submap for physio
167 */ 172 */
168 phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr, 173 phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
169 512 * 1024, 0, false, NULL); 174 512 * 1024, 0, false, NULL);
170 175
171 /* 176 /*
172 * No need to allocate an mbuf cluster submap. Mbuf clusters 177 * No need to allocate an mbuf cluster submap. Mbuf clusters
173 * are allocated via the pool allocator, and we use direct-mapped 178 * are allocated via the pool allocator, and we use direct-mapped
174 * pool pages. 179 * pool pages.
175 */ 180 */
176 181
177 format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free)); 182 format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free));
178 printf("avail memory = %s\n", pbuf); 183 printf("avail memory = %s\n", pbuf);
179 184
180 curpcb = &lwp0.l_addr->u_pcb; 185 curpcb = &lwp0.l_addr->u_pcb;
181 186
182#if 0 187#if 0
183 /* Test exception handlers */ 188 /* Test exception handlers */
184 __asm(".word 0x06000010"); /* undefined instruction */ 189 __asm(".word 0x06000010"); /* undefined instruction */
185 __asm("swi 0"); /* SWI */ 190 __asm("swi 0"); /* SWI */
186 (*(void (*)(void))(0x00008000))(); /* prefetch abort */ 191 (*(void (*)(void))(0x00008000))(); /* prefetch abort */
187 *(volatile int *)(0x00008000) = 0; /* data abort */ 192 *(volatile int *)(0x00008000) = 0; /* data abort */
188 *(volatile int *)(0x10000000) = 0; /* address exception */ 193 *(volatile int *)(0x10000000) = 0; /* address exception */
189#endif 194#endif
190} 195}
191 196
192/* Read a byte from CMOS RAM. */ 197/* Read a byte from CMOS RAM. */
193int 198int
194cmos_read(int location) 199cmos_read(int location)
195{ 200{
196 uint8_t val; 201 uint8_t val;
197 202
198 if (pcfrtc_bootstrap_read(acorn26_i2c_tag, 0x50, 203 if (pcfrtc_bootstrap_read(acorn26_i2c_tag, 0x50,
199 location, &val, 1) != 0) 204 location, &val, 1) != 0)
200 return (-1); 205 return (-1);
201 return (val); 206 return (val);
202} 207}
203 208
204/* Write a byte to CMOS RAM. */ 209/* Write a byte to CMOS RAM. */
205int 210int
206cmos_write(int location, int value) 211cmos_write(int location, int value)
207{ 212{
208 uint8_t val = value; 213 uint8_t val = value;
209 214
210 return (pcfrtc_bootstrap_write(acorn26_i2c_tag, 0x50, 215 return (pcfrtc_bootstrap_write(acorn26_i2c_tag, 0x50,
211 location, &val, 1)); 216 location, &val, 1));
212} 217}
213 218
214void 219void
215cpu_need_resched(struct cpu_info *ci, int flags) 220cpu_need_resched(struct cpu_info *ci, int flags)
216{ 221{
217 bool immed = (flags & RESCHED_IMMED) != 0; 222 bool immed = (flags & RESCHED_IMMED) != 0;
218 223
219 if (ci->ci_want_resched && !immed) 224 if (ci->ci_want_resched && !immed)
220 return; 225 return;
221 226
222 ci->ci_want_resched = 1; 227 ci->ci_want_resched = 1;
223 if (curlwp != ci->ci_data.cpu_idlelwp) 228 if (curlwp != ci->ci_data.cpu_idlelwp)
224 setsoftast(); 229 setsoftast();
225} 230}