Sun Mar 15 19:47:22 2009 UTC ()
Pull up following revision(s) (requested by christos in ticket #458):
	sys/arch/evbarm/ifpga/ifpga_intr.h: revision 1.9
Another port which needs <arm/cpu.h> added as in include due to
the new kern_ssp.c.


(snj)
diff -r1.8 -r1.8.10.1 src/sys/arch/evbarm/ifpga/ifpga_intr.h
cvs diff -r1.8 -r1.8.10.1 src/sys/arch/evbarm/ifpga/ifpga_intr.h (switch to unified diff)

--- src/sys/arch/evbarm/ifpga/ifpga_intr.h 2008/04/27 18:58:46 1.8
+++ src/sys/arch/evbarm/ifpga/ifpga_intr.h 2009/03/15 19:47:22 1.8.10.1
@@ -1,127 +1,128 @@ @@ -1,127 +1,128 @@
1/* $NetBSD: ifpga_intr.h,v 1.8 2008/04/27 18:58:46 matt Exp $ */ 1/* $NetBSD: ifpga_intr.h,v 1.8.10.1 2009/03/15 19:47:22 snj Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 2001, 2002 Wasabi Systems, Inc. 4 * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 7 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 * 8 *
9 * Redistribution and use in source and binary forms, with or without 9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions 10 * modification, are permitted provided that the following conditions
11 * are met: 11 * are met:
12 * 1. Redistributions of source code must retain the above copyright 12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer. 13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright 14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the 15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution. 16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software 17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement: 18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by 19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc. 20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior 22 * or promote products derived from this software without specific prior
23 * written permission. 23 * written permission.
24 * 24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE. 35 * POSSIBILITY OF SUCH DAMAGE.
36 */ 36 */
37 37
38#ifndef _IFPGA_INTR_H_ 38#ifndef _IFPGA_INTR_H_
39#define _IFPGA_INTR_H_ 39#define _IFPGA_INTR_H_
40 40
41#define ARM_IRQ_HANDLER _C_LABEL(ifpga_intr_dispatch) 41#define ARM_IRQ_HANDLER _C_LABEL(ifpga_intr_dispatch)
42 42
43#ifndef _LOCORE 43#ifndef _LOCORE
44 44
 45#include <arm/cpu.h>
45#include <arm/armreg.h> 46#include <arm/armreg.h>
46#include <arm/cpufunc.h> 47#include <arm/cpufunc.h>
47 48
48#include <evbarm/ifpga/ifpgareg.h> 49#include <evbarm/ifpga/ifpgareg.h>
49#include <evbarm/ifpga/ifpgavar.h> 50#include <evbarm/ifpga/ifpgavar.h>
50 51
51static inline void __attribute__((__unused__)) 52static inline void __attribute__((__unused__))
52ifpga_set_intrmask(void) 53ifpga_set_intrmask(void)
53{ 54{
54 extern volatile uint32_t intr_enabled; 55 extern volatile uint32_t intr_enabled;
55 extern struct ifpga_softc *ifpga_sc; 56 extern struct ifpga_softc *ifpga_sc;
56 uint32_t mask = intr_enabled; 57 uint32_t mask = intr_enabled;
57 58
58 bus_space_write_4 (ifpga_sc->sc_iot, ifpga_sc->sc_irq_ioh, 59 bus_space_write_4 (ifpga_sc->sc_iot, ifpga_sc->sc_irq_ioh,
59 IFPGA_INTR_ENABLECLR, ~mask); 60 IFPGA_INTR_ENABLECLR, ~mask);
60 bus_space_write_4 (ifpga_sc->sc_iot, ifpga_sc->sc_irq_ioh, 61 bus_space_write_4 (ifpga_sc->sc_iot, ifpga_sc->sc_irq_ioh,
61 IFPGA_INTR_ENABLESET, mask); 62 IFPGA_INTR_ENABLESET, mask);
62} 63}
63 64
64static inline void __attribute__((__unused__)) 65static inline void __attribute__((__unused__))
65ifpga_splx(int new) 66ifpga_splx(int new)
66{ 67{
67 extern volatile uint32_t intr_enabled; 68 extern volatile uint32_t intr_enabled;
68 extern volatile int ifpga_ipending; 69 extern volatile int ifpga_ipending;
69 int oldirqstate, hwpend; 70 int oldirqstate, hwpend;
70 71
71 __insn_barrier(); 72 __insn_barrier();
72 73
73 oldirqstate = disable_interrupts(I32_bit); 74 oldirqstate = disable_interrupts(I32_bit);
74 set_curcpl(new); 75 set_curcpl(new);
75 76
76 hwpend = (ifpga_ipending & IFPGA_INTR_HWMASK) & ~new; 77 hwpend = (ifpga_ipending & IFPGA_INTR_HWMASK) & ~new;
77 if (hwpend != 0) { 78 if (hwpend != 0) {
78 intr_enabled |= hwpend; 79 intr_enabled |= hwpend;
79 ifpga_set_intrmask(); 80 ifpga_set_intrmask();
80 } 81 }
81 82
82 restore_interrupts(oldirqstate); 83 restore_interrupts(oldirqstate);
83 84
84#ifdef __HAVE_FAST_SOFTINTS 85#ifdef __HAVE_FAST_SOFTINTS
85 cpu_dosoftints(); 86 cpu_dosoftints();
86#endif 87#endif
87} 88}
88 89
89static inline int __attribute__((__unused__)) 90static inline int __attribute__((__unused__))
90ifpga_splraise(int ipl) 91ifpga_splraise(int ipl)
91{ 92{
92 extern int ifpga_imask[]; 93 extern int ifpga_imask[];
93 const int old = curcpl(); 94 const int old = curcpl();
94 set_curcpl(old | ifpga_imask[ipl]); 95 set_curcpl(old | ifpga_imask[ipl]);
95 96
96 __insn_barrier(); 97 __insn_barrier();
97 98
98 return (old); 99 return (old);
99} 100}
100 101
101static inline int __attribute__((__unused__)) 102static inline int __attribute__((__unused__))
102ifpga_spllower(int ipl) 103ifpga_spllower(int ipl)
103{ 104{
104 extern int ifpga_imask[]; 105 extern int ifpga_imask[];
105 const int old = curcpl(); 106 const int old = curcpl();
106 107
107 ifpga_splx(ifpga_imask[ipl]); 108 ifpga_splx(ifpga_imask[ipl]);
108 return(old); 109 return(old);
109} 110}
110 111
111#if !defined(EVBARM_SPL_NOINLINE) 112#if !defined(EVBARM_SPL_NOINLINE)
112 113
113#define splx(new) ifpga_splx(new) 114#define splx(new) ifpga_splx(new)
114#define _spllower(ipl) ifpga_spllower(ipl) 115#define _spllower(ipl) ifpga_spllower(ipl)
115#define _splraise(ipl) ifpga_splraise(ipl) 116#define _splraise(ipl) ifpga_splraise(ipl)
116 117
117#else 118#else
118 119
119int _splraise(int); 120int _splraise(int);
120int _spllower(int); 121int _spllower(int);
121void splx(int); 122void splx(int);
122 123
123#endif /* ! EVBARM_SPL_NOINLINE */ 124#endif /* ! EVBARM_SPL_NOINLINE */
124 125
125#endif /* _LOCORE */ 126#endif /* _LOCORE */
126 127
127#endif /* _IFPGA_INTR_H_ */ 128#endif /* _IFPGA_INTR_H_ */