Mon Mar 16 09:32:38 2009 UTC ()
ansify function definitions


(cegger)
diff -r1.10 -r1.11 src/sys/dev/ic/tcic2var.h
cvs diff -r1.10 -r1.11 src/sys/dev/ic/tcic2var.h (expand / switch to unified diff)

--- src/sys/dev/ic/tcic2var.h 2007/07/09 21:00:39 1.10
+++ src/sys/dev/ic/tcic2var.h 2009/03/16 09:32:38 1.11
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: tcic2var.h,v 1.10 2007/07/09 21:00:39 ad Exp $ */ 1/* $NetBSD: tcic2var.h,v 1.11 2009/03/16 09:32:38 cegger Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 1998, 1999 Christoph Badura. All rights reserved. 4 * Copyright (c) 1998, 1999 Christoph Badura. All rights reserved.
5 * Copyright (c) 1997 Marc Horowitz. All rights reserved. 5 * Copyright (c) 1997 Marc Horowitz. All rights reserved.
6 * 6 *
7 * Redistribution and use in source and binary forms, with or without 7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions 8 * modification, are permitted provided that the following conditions
9 * are met: 9 * are met:
10 * 1. Redistributions of source code must retain the above copyright 10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer. 11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright 12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the 13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution. 14 * documentation and/or other materials provided with the distribution.
@@ -175,186 +175,151 @@ int tcic_chip_io_alloc(pcmcia_chipset_ha @@ -175,186 +175,151 @@ int tcic_chip_io_alloc(pcmcia_chipset_ha
175 bus_size_t, bus_size_t, struct pcmcia_io_handle *); 175 bus_size_t, bus_size_t, struct pcmcia_io_handle *);
176void tcic_chip_io_free(pcmcia_chipset_handle_t, 176void tcic_chip_io_free(pcmcia_chipset_handle_t,
177 struct pcmcia_io_handle *); 177 struct pcmcia_io_handle *);
178int tcic_chip_io_map(pcmcia_chipset_handle_t, int, bus_addr_t, 178int tcic_chip_io_map(pcmcia_chipset_handle_t, int, bus_addr_t,
179 bus_size_t, struct pcmcia_io_handle *, int *); 179 bus_size_t, struct pcmcia_io_handle *, int *);
180void tcic_chip_io_unmap(pcmcia_chipset_handle_t, int); 180void tcic_chip_io_unmap(pcmcia_chipset_handle_t, int);
181 181
182void tcic_chip_socket_enable(pcmcia_chipset_handle_t); 182void tcic_chip_socket_enable(pcmcia_chipset_handle_t);
183void tcic_chip_socket_disable(pcmcia_chipset_handle_t); 183void tcic_chip_socket_disable(pcmcia_chipset_handle_t);
184void tcic_chip_socket_settype(pcmcia_chipset_handle_t, int); 184void tcic_chip_socket_settype(pcmcia_chipset_handle_t, int);
185 185
186static __inline int tcic_read_1(struct tcic_handle *, int); 186static __inline int tcic_read_1(struct tcic_handle *, int);
187static __inline int 187static __inline int
188tcic_read_1(h, reg) 188tcic_read_1(struct tcic_handle *h, int reg)
189 struct tcic_handle *h; 
190 int reg; 
191{ 189{
192 return (bus_space_read_1(h->sc->iot, h->sc->ioh, reg)); 190 return (bus_space_read_1(h->sc->iot, h->sc->ioh, reg));
193} 191}
194 192
195static __inline int tcic_read_2(struct tcic_handle *, int); 193static __inline int tcic_read_2(struct tcic_handle *, int);
196static __inline int 194static __inline int
197tcic_read_2(h, reg) 195tcic_read_2(struct tcic_handle *h, int reg)
198 struct tcic_handle *h; 
199 int reg; 
200{ 196{
201 return (bus_space_read_2(h->sc->iot, h->sc->ioh, reg)); 197 return (bus_space_read_2(h->sc->iot, h->sc->ioh, reg));
202} 198}
203 199
204static __inline int tcic_read_4(struct tcic_handle *, int); 200static __inline int tcic_read_4(struct tcic_handle *, int);
205static __inline int 201static __inline int
206tcic_read_4(h, reg) 202tcic_read_4(struct tcic_handle *h, int reg)
207 struct tcic_handle *h; 
208 int reg; 
209{ 203{
210 int val; 204 int val;
211 val = bus_space_read_2(h->sc->iot, h->sc->ioh, reg); 205 val = bus_space_read_2(h->sc->iot, h->sc->ioh, reg);
212 val |= bus_space_read_2(h->sc->iot, h->sc->ioh, reg+2) << 16; 206 val |= bus_space_read_2(h->sc->iot, h->sc->ioh, reg+2) << 16;
213 return val; 207 return val;
214} 208}
215 209
216static __inline void tcic_write_1(struct tcic_handle *, int, int); 210static __inline void tcic_write_1(struct tcic_handle *, int, int);
217static __inline void 211static __inline void
218tcic_write_1(h, reg, data) 212tcic_write_1(struct tcic_handle *h, int reg, int data)
219 struct tcic_handle *h; 
220 int reg; 
221 int data; 
222{ 213{
223 bus_space_write_1(h->sc->iot, h->sc->ioh, reg, (data)); 214 bus_space_write_1(h->sc->iot, h->sc->ioh, reg, (data));
224} 215}
225 216
226static __inline void tcic_write_2(struct tcic_handle *, int, int); 217static __inline void tcic_write_2(struct tcic_handle *, int, int);
227static __inline void 218static __inline void
228tcic_write_2(h, reg, data) 219tcic_write_2(struct tcic_handle *h, int reg, int data)
229 struct tcic_handle *h; 
230 int reg; 
231 int data; 
232{ 220{
233 bus_space_write_2(h->sc->iot, h->sc->ioh, reg, (data)); 221 bus_space_write_2(h->sc->iot, h->sc->ioh, reg, (data));
234} 222}
235 223
236static __inline void tcic_write_4(struct tcic_handle *, int, int); 224static __inline void tcic_write_4(struct tcic_handle *, int, int);
237static __inline void 225static __inline void
238tcic_write_4(h, reg, data) 226tcic_write_4(struct tcic_handle *h, int reg, int data)
239 struct tcic_handle *h; 
240 int reg; 
241 int data; 
242{ 227{
243 bus_space_write_2(h->sc->iot, h->sc->ioh, reg, (data)); 228 bus_space_write_2(h->sc->iot, h->sc->ioh, reg, (data));
244 bus_space_write_2(h->sc->iot, h->sc->ioh, reg+2, (data)>>16); 229 bus_space_write_2(h->sc->iot, h->sc->ioh, reg+2, (data)>>16);
245} 230}
246 231
247static __inline int tcic_read_ind_2(struct tcic_handle *, int); 232static __inline int tcic_read_ind_2(struct tcic_handle *, int);
248static __inline int 233static __inline int
249tcic_read_ind_2(h, reg) 234tcic_read_ind_2(struct tcic_handle *h, int reg)
250 struct tcic_handle *h; 
251 int reg; 
252{ 235{
253 int r_addr, val; 236 int r_addr, val;
254 r_addr = tcic_read_4(h, TCIC_R_ADDR); 237 r_addr = tcic_read_4(h, TCIC_R_ADDR);
255 tcic_write_4(h, TCIC_R_ADDR, reg|TCIC_ADDR_INDREG); 238 tcic_write_4(h, TCIC_R_ADDR, reg|TCIC_ADDR_INDREG);
256 val = bus_space_read_2(h->sc->iot, h->sc->ioh, TCIC_R_DATA); 239 val = bus_space_read_2(h->sc->iot, h->sc->ioh, TCIC_R_DATA);
257 tcic_write_4(h, TCIC_R_ADDR, r_addr); 240 tcic_write_4(h, TCIC_R_ADDR, r_addr);
258 return val; 241 return val;
259} 242}
260 243
261static __inline void tcic_write_ind_2(struct tcic_handle *, int, int); 244static __inline void tcic_write_ind_2(struct tcic_handle *, int, int);
262static __inline void 245static __inline void
263tcic_write_ind_2(h, reg, data) 246tcic_write_ind_2(struct tcic_handle *h, int reg, int data)
264 struct tcic_handle *h; 
265 int reg; 
266 int data; 
267{ 247{
268 int r_addr; 248 int r_addr;
269 r_addr = tcic_read_4(h, TCIC_R_ADDR); 249 r_addr = tcic_read_4(h, TCIC_R_ADDR);
270 tcic_write_4(h, TCIC_R_ADDR, reg|TCIC_ADDR_INDREG); 250 tcic_write_4(h, TCIC_R_ADDR, reg|TCIC_ADDR_INDREG);
271 bus_space_write_2(h->sc->iot, h->sc->ioh, TCIC_R_DATA, (data)); 251 bus_space_write_2(h->sc->iot, h->sc->ioh, TCIC_R_DATA, (data));
272 tcic_write_4(h, TCIC_R_ADDR, r_addr); 252 tcic_write_4(h, TCIC_R_ADDR, r_addr);
273} 253}
274 254
275static __inline void tcic_sel_sock(struct tcic_handle *); 255static __inline void tcic_sel_sock(struct tcic_handle *);
276static __inline void 256static __inline void
277tcic_sel_sock(h) 257tcic_sel_sock(struct tcic_handle *h)
278 struct tcic_handle *h; 
279{ 258{
280 int r_addr; 259 int r_addr;
281 r_addr = tcic_read_2(h, TCIC_R_ADDR2); 260 r_addr = tcic_read_2(h, TCIC_R_ADDR2);
282 tcic_write_2(h, TCIC_R_ADDR2, 261 tcic_write_2(h, TCIC_R_ADDR2,
283 (h->sock<<TCIC_ADDR2_SS_SHFT)|(r_addr & ~TCIC_ADDR2_SS_MASK)); 262 (h->sock<<TCIC_ADDR2_SS_SHFT)|(r_addr & ~TCIC_ADDR2_SS_MASK));
284} 263}
285 264
286static __inline void tcic_wait_ready(struct tcic_handle *); 265static __inline void tcic_wait_ready(struct tcic_handle *);
287static __inline void 266static __inline void
288tcic_wait_ready(h) 267tcic_wait_ready(struct tcic_handle *h)
289 struct tcic_handle *h; 
290{ 268{
291 int i; 269 int i;
292 270
293 /* XXX appropriate socket must have been selected already. */ 271 /* XXX appropriate socket must have been selected already. */
294 for (i = 0; i < 10000; i++) { 272 for (i = 0; i < 10000; i++) {
295 if (tcic_read_1(h, TCIC_R_SSTAT) & TCIC_SSTAT_RDY) 273 if (tcic_read_1(h, TCIC_R_SSTAT) & TCIC_SSTAT_RDY)
296 return; 274 return;
297 delay(500); 275 delay(500);
298 } 276 }
299 277
300#ifdef DIAGNOSTIC 278#ifdef DIAGNOSTIC
301 printf("tcic_wait_ready ready never happened\n"); 279 printf("tcic_wait_ready ready never happened\n");
302#endif 280#endif
303} 281}
304 282
305static __inline int tcic_read_aux_1(bus_space_tag_t, bus_space_handle_t, int, int); 283static __inline int tcic_read_aux_1(bus_space_tag_t, bus_space_handle_t, int, int);
306static __inline int 284static __inline int
307tcic_read_aux_1(iot, ioh, auxreg, reg) 285tcic_read_aux_1(bus_space_tag_t iot, bus_space_handle_t ioh, int auxreg, int reg)
308 bus_space_tag_t iot; 
309 bus_space_handle_t ioh; 
310 int auxreg; 
311 int reg; 
312{ 286{
313 int mode, val; 287 int mode, val;
314 mode = bus_space_read_1(iot, ioh, TCIC_R_MODE); 288 mode = bus_space_read_1(iot, ioh, TCIC_R_MODE);
315 bus_space_write_1(iot, ioh, TCIC_R_MODE, (mode & ~TCIC_AR_MASK)|auxreg); 289 bus_space_write_1(iot, ioh, TCIC_R_MODE, (mode & ~TCIC_AR_MASK)|auxreg);
316 val = bus_space_read_1(iot, ioh, reg); 290 val = bus_space_read_1(iot, ioh, reg);
317 return val; 291 return val;
318} 292}
319 293
320static __inline int tcic_read_aux_2(bus_space_tag_t, bus_space_handle_t, int); 294static __inline int tcic_read_aux_2(bus_space_tag_t, bus_space_handle_t, int);
321static __inline int 295static __inline int
322tcic_read_aux_2(iot, ioh, auxreg) 296tcic_read_aux_2(bus_space_tag_t iot, bus_space_handle_t ioh, int auxreg)
323 bus_space_tag_t iot; 
324 bus_space_handle_t ioh; 
325 int auxreg; 
326{ 297{
327 int mode, val; 298 int mode, val;
328 mode = bus_space_read_1(iot, ioh, TCIC_R_MODE); 299 mode = bus_space_read_1(iot, ioh, TCIC_R_MODE);
329 bus_space_write_1(iot, ioh, TCIC_R_MODE, (mode & ~TCIC_AR_MASK)|auxreg); 300 bus_space_write_1(iot, ioh, TCIC_R_MODE, (mode & ~TCIC_AR_MASK)|auxreg);
330 val = bus_space_read_2(iot, ioh, TCIC_R_AUX); 301 val = bus_space_read_2(iot, ioh, TCIC_R_AUX);
331 return val; 302 return val;
332} 303}
333 304
334static __inline void tcic_write_aux_1(bus_space_tag_t, bus_space_handle_t, int, int, int); 305static __inline void tcic_write_aux_1(bus_space_tag_t, bus_space_handle_t, int, int, int);
335static __inline void 306static __inline void
336tcic_write_aux_1(iot, ioh, auxreg, reg, val) 307tcic_write_aux_1(bus_space_tag_t iot, bus_space_handle_t ioh, int auxreg, int reg, int val)
337 bus_space_tag_t iot; 
338 bus_space_handle_t ioh; 
339 int auxreg, reg, val; 
340{ 308{
341 int mode; 309 int mode;
342 mode = bus_space_read_1(iot, ioh, TCIC_R_MODE); 310 mode = bus_space_read_1(iot, ioh, TCIC_R_MODE);
343 bus_space_write_1(iot, ioh, TCIC_R_MODE, (mode & ~TCIC_AR_MASK)|auxreg); 311 bus_space_write_1(iot, ioh, TCIC_R_MODE, (mode & ~TCIC_AR_MASK)|auxreg);
344 bus_space_write_1(iot, ioh, reg, val); 312 bus_space_write_1(iot, ioh, reg, val);
345} 313}
346 314
347static __inline void tcic_write_aux_2(bus_space_tag_t, bus_space_handle_t, int, int); 315static __inline void tcic_write_aux_2(bus_space_tag_t, bus_space_handle_t, int, int);
348static __inline void 316static __inline void
349tcic_write_aux_2(iot, ioh, auxreg, val) 317tcic_write_aux_2(bus_space_tag_t iot, bus_space_handle_t ioh, int auxreg, int val)
350 bus_space_tag_t iot; 
351 bus_space_handle_t ioh; 
352 int auxreg, val; 
353{ 318{
354 int mode; 319 int mode;
355 mode = bus_space_read_1(iot, ioh, TCIC_R_MODE); 320 mode = bus_space_read_1(iot, ioh, TCIC_R_MODE);
356 bus_space_write_1(iot, ioh, TCIC_R_MODE, (mode & ~TCIC_AR_MASK)|auxreg); 321 bus_space_write_1(iot, ioh, TCIC_R_MODE, (mode & ~TCIC_AR_MASK)|auxreg);
357 bus_space_write_2(iot, ioh, TCIC_R_AUX, val); 322 bus_space_write_2(iot, ioh, TCIC_R_AUX, val);
358} 323}
359 324
360#endif /* _TCIC2VAR_H */ 325#endif /* _TCIC2VAR_H */