 @@ -1,2042 +1,2043 @@
-/*	$NetBSD: uhci.c,v 1.227 2009/05/02 22:09:39 martin Exp $	*/
+/*	$NetBSD: uhci.c,v 1.228 2009/05/02 22:28:41 martin Exp $	*/
 /*	$FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $	*/
 /*
  * Copyright (c) 1998, 2004 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Lennart Augustsson (lennart@augustsson.net) at
  * Carlstedt Research & Technology.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 /*
  * USB Universal Host Controller driver.
  * Handles e.g. PIIX3 and PIIX4.
+ *
  * UHCI spec: http://developer.intel.com/design/USB/UHCI11D.htm
  * USB spec: http://www.usb.org/developers/docs/usbspec.zip
  * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
  *             ftp://download.intel.com/design/intarch/datashts/29056201.pdf
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.227 2009/05/02 22:09:39 martin Exp $");
+__KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.228 2009/05/02 22:28:41 martin Exp $");
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/kernel.h>
 #include <sys/malloc.h>
 #if defined(__NetBSD__) || defined(__OpenBSD__)
 #include <sys/device.h>
 #include <sys/select.h>
 #include <sys/extent.h>
 #include <uvm/uvm_extern.h>
 #elif defined(__FreeBSD__)
 #include <sys/module.h>
 #include <sys/bus.h>
 #include <machine/bus_pio.h>
 #if defined(DIAGNOSTIC) && defined(__i386__)
 #include <sys/cpu.h>
 #endif
 #endif
 #include <sys/proc.h>
 #include <sys/queue.h>
 #include <sys/bus.h>
 #include <machine/endian.h>
 #include <dev/usb/usb.h>
 #include <dev/usb/usbdi.h>
 #include <dev/usb/usbdivar.h>
 #include <dev/usb/usb_mem.h>
 #include <dev/usb/usb_quirks.h>
 #include <dev/usb/uhcireg.h>
 #include <dev/usb/uhcivar.h>
 #include <dev/usb/usbroothub_subr.h>
 /* Use bandwidth reclamation for control transfers. Some devices choke on it. */
 /*#define UHCI_CTL_LOOP */
 #if defined(__FreeBSD__)
 #include <machine/clock.h>
 #define delay(d)		DELAY(d)
 #endif
 #if defined(__OpenBSD__)
 struct cfdriver uhci_cd = {
 	NULL, "uhci", DV_DULL
 };
 #endif
 #ifdef UHCI_DEBUG
 uhci_softc_t *thesc;
 #define DPRINTF(x)	if (uhcidebug) printf x
 #define DPRINTFN(n,x)	if (uhcidebug>(n)) printf x
 int uhcidebug = 0;
 int uhcinoloop = 0;
 #ifndef __NetBSD__
 #define snprintb((q), (f), "%b", q,f,b,l) snprintf((b), (l))
 #endif
 #else
 #define DPRINTF(x)
 #define DPRINTFN(n,x)
 #endif
 /*
  * The UHCI controller is little endian, so on big endian machines
  * the data stored in memory needs to be swapped.
  */
 #if defined(__FreeBSD__) || defined(__OpenBSD__)
 #if BYTE_ORDER == BIG_ENDIAN
 #define htole32(x) (bswap32(x))
 #define le32toh(x) (bswap32(x))
 #else
 #define htole32(x) (x)
 #define le32toh(x) (x)
 #endif
 #endif
 struct uhci_pipe {
 	struct usbd_pipe pipe;
 	int nexttoggle;
 	u_char aborting;
 	usbd_xfer_handle abortstart, abortend;
 	/* Info needed for different pipe kinds. */
 	union {
 		/* Control pipe */
 		struct {
 			uhci_soft_qh_t *sqh;
 			usb_dma_t reqdma;
 			uhci_soft_td_t *setup, *stat;
 			u_int length;
 		} ctl;
 		/* Interrupt pipe */
 		struct {
 			int npoll;
 			int isread;
 			uhci_soft_qh_t **qhs;
 		} intr;
 		/* Bulk pipe */
 		struct {
 			uhci_soft_qh_t *sqh;
 			u_int length;
 			int isread;
 		} bulk;
 		/* Iso pipe */
 		struct iso {
 			uhci_soft_td_t **stds;
 			int next, inuse;
 		} iso;
 	} u;
 };
 Static void		uhci_globalreset(uhci_softc_t *);
 Static usbd_status	uhci_portreset(uhci_softc_t*, int);
 Static void		uhci_reset(uhci_softc_t *);
 Static usbd_status	uhci_run(uhci_softc_t *, int run);
 Static uhci_soft_td_t  *uhci_alloc_std(uhci_softc_t *);
 Static void		uhci_free_std(uhci_softc_t *, uhci_soft_td_t *);
 Static uhci_soft_qh_t  *uhci_alloc_sqh(uhci_softc_t *);
 Static void		uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *);
 #if 0
 Static void		uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *,
 					 uhci_intr_info_t *);
 Static void		uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *);
 #endif
 Static void		uhci_free_std_chain(uhci_softc_t *,
 					    uhci_soft_td_t *, uhci_soft_td_t *);
 Static usbd_status	uhci_alloc_std_chain(struct uhci_pipe *,
 			    uhci_softc_t *, int, int, u_int16_t, usb_dma_t *,
 			    uhci_soft_td_t **, uhci_soft_td_t **);
 Static void		uhci_poll_hub(void *);
 Static void		uhci_waitintr(uhci_softc_t *, usbd_xfer_handle);
 Static void		uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *);
 Static void		uhci_idone(uhci_intr_info_t *);
 Static void		uhci_abort_xfer(usbd_xfer_handle, usbd_status status);
 Static void		uhci_timeout(void *);
 Static void		uhci_timeout_task(void *);
 Static void		uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
 Static void		uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
 Static void		uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *);
 Static void		uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
 Static void		uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
 Static void		uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *);
 Static void		uhci_add_loop(uhci_softc_t *sc);
 Static void		uhci_rem_loop(uhci_softc_t *sc);
 Static usbd_status	uhci_setup_isoc(usbd_pipe_handle pipe);
 Static void		uhci_device_isoc_enter(usbd_xfer_handle);
 Static usbd_status	uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
 Static void		uhci_freem(struct usbd_bus *, usb_dma_t *);
 Static usbd_xfer_handle	uhci_allocx(struct usbd_bus *);
 Static void		uhci_freex(struct usbd_bus *, usbd_xfer_handle);
 Static usbd_status	uhci_device_ctrl_transfer(usbd_xfer_handle);
 Static usbd_status	uhci_device_ctrl_start(usbd_xfer_handle);
 Static void		uhci_device_ctrl_abort(usbd_xfer_handle);
 Static void		uhci_device_ctrl_close(usbd_pipe_handle);
 Static void		uhci_device_ctrl_done(usbd_xfer_handle);
 Static usbd_status	uhci_device_intr_transfer(usbd_xfer_handle);
 Static usbd_status	uhci_device_intr_start(usbd_xfer_handle);
 Static void		uhci_device_intr_abort(usbd_xfer_handle);
 Static void		uhci_device_intr_close(usbd_pipe_handle);
 Static void		uhci_device_intr_done(usbd_xfer_handle);
 Static usbd_status	uhci_device_bulk_transfer(usbd_xfer_handle);
 Static usbd_status	uhci_device_bulk_start(usbd_xfer_handle);
 Static void		uhci_device_bulk_abort(usbd_xfer_handle);
 Static void		uhci_device_bulk_close(usbd_pipe_handle);
 Static void		uhci_device_bulk_done(usbd_xfer_handle);
 Static usbd_status	uhci_device_isoc_transfer(usbd_xfer_handle);
 Static usbd_status	uhci_device_isoc_start(usbd_xfer_handle);
 Static void		uhci_device_isoc_abort(usbd_xfer_handle);
 Static void		uhci_device_isoc_close(usbd_pipe_handle);
 Static void		uhci_device_isoc_done(usbd_xfer_handle);
 Static usbd_status	uhci_root_ctrl_transfer(usbd_xfer_handle);
 Static usbd_status	uhci_root_ctrl_start(usbd_xfer_handle);
 Static void		uhci_root_ctrl_abort(usbd_xfer_handle);
 Static void		uhci_root_ctrl_close(usbd_pipe_handle);
 Static void		uhci_root_ctrl_done(usbd_xfer_handle);
 Static usbd_status	uhci_root_intr_transfer(usbd_xfer_handle);
 Static usbd_status	uhci_root_intr_start(usbd_xfer_handle);
 Static void		uhci_root_intr_abort(usbd_xfer_handle);
 Static void		uhci_root_intr_close(usbd_pipe_handle);
 Static void		uhci_root_intr_done(usbd_xfer_handle);
 Static usbd_status	uhci_open(usbd_pipe_handle);
 Static void		uhci_poll(struct usbd_bus *);
 Static void		uhci_softintr(void *);
 Static usbd_status	uhci_device_request(usbd_xfer_handle xfer);
 Static void		uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *);
 Static void		uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *);
 Static usbd_status	uhci_device_setintr(uhci_softc_t *sc,
 			    struct uhci_pipe *pipe, int ival);
 Static void		uhci_device_clear_toggle(usbd_pipe_handle pipe);
 Static void		uhci_noop(usbd_pipe_handle pipe);
 Static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *,
 						    uhci_soft_qh_t *);
 #ifdef UHCI_DEBUG
 Static void		uhci_dump_all(uhci_softc_t *);
 Static void		uhci_dumpregs(uhci_softc_t *);
 Static void		uhci_dump_qhs(uhci_soft_qh_t *);
 Static void		uhci_dump_qh(uhci_soft_qh_t *);
 Static void		uhci_dump_tds(uhci_soft_td_t *);
 Static void		uhci_dump_td(uhci_soft_td_t *);
 Static void		uhci_dump_ii(uhci_intr_info_t *ii);
 void			uhci_dump(void);
 #endif
 #define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
 			BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
 #define UWRITE1(sc, r, x) \
  do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \
  } while (/*CONSTCOND*/0)
 #define UWRITE2(sc, r, x) \
  do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \
  } while (/*CONSTCOND*/0)
 #define UWRITE4(sc, r, x) \
  do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \
  } while (/*CONSTCOND*/0)
 static __inline uint8_t
 UREAD1(uhci_softc_t *sc, bus_size_t r)
+{
 	UBARR(sc);
 	return bus_space_read_1(sc->iot, sc->ioh, r);
+}
 static __inline uint16_t
 UREAD2(uhci_softc_t *sc, bus_size_t r)
+{
 	UBARR(sc);
 	return bus_space_read_2(sc->iot, sc->ioh, r);
+}
 static __inline uint32_t
 UREAD4(uhci_softc_t *sc, bus_size_t r)
+{
 	UBARR(sc);
 	return bus_space_read_4(sc->iot, sc->ioh, r);
+}
 #define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
 #define UHCISTS(sc) UREAD2(sc, UHCI_STS)
 #define UHCI_RESET_TIMEOUT 100	/* ms, reset timeout */
 #define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
 #define UHCI_INTR_ENDPT 1
 const struct usbd_bus_methods uhci_bus_methods = {
 	uhci_open,
 	uhci_softintr,
 	uhci_poll,
 	uhci_allocm,
 	uhci_freem,
 	uhci_allocx,
 	uhci_freex,
 };
 const struct usbd_pipe_methods uhci_root_ctrl_methods = {
 	uhci_root_ctrl_transfer,
 	uhci_root_ctrl_start,
 	uhci_root_ctrl_abort,
 	uhci_root_ctrl_close,
 	uhci_noop,
 	uhci_root_ctrl_done,
 };
 const struct usbd_pipe_methods uhci_root_intr_methods = {
 	uhci_root_intr_transfer,
 	uhci_root_intr_start,
 	uhci_root_intr_abort,
 	uhci_root_intr_close,
 	uhci_noop,
 	uhci_root_intr_done,
 };
 const struct usbd_pipe_methods uhci_device_ctrl_methods = {
 	uhci_device_ctrl_transfer,
 	uhci_device_ctrl_start,
 	uhci_device_ctrl_abort,
 	uhci_device_ctrl_close,
 	uhci_noop,
 	uhci_device_ctrl_done,
 };
 const struct usbd_pipe_methods uhci_device_intr_methods = {
 	uhci_device_intr_transfer,
 	uhci_device_intr_start,
 	uhci_device_intr_abort,
 	uhci_device_intr_close,
 	uhci_device_clear_toggle,
 	uhci_device_intr_done,
 };
 const struct usbd_pipe_methods uhci_device_bulk_methods = {
 	uhci_device_bulk_transfer,
 	uhci_device_bulk_start,
 	uhci_device_bulk_abort,
 	uhci_device_bulk_close,
 	uhci_device_clear_toggle,
 	uhci_device_bulk_done,
 };
 const struct usbd_pipe_methods uhci_device_isoc_methods = {
 	uhci_device_isoc_transfer,
 	uhci_device_isoc_start,
 	uhci_device_isoc_abort,
 	uhci_device_isoc_close,
 	uhci_noop,
 	uhci_device_isoc_done,
 };
 #define uhci_add_intr_info(sc, ii) \
 	LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list)
 #define uhci_del_intr_info(ii) \
 	do { \
 		LIST_REMOVE((ii), list); \
 		(ii)->list.le_prev = NULL; \
 	} while (0)
 #define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL)
 Static inline uhci_soft_qh_t *
 uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh)
+{
 	DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh));
 	for (; pqh->hlink != sqh; pqh = pqh->hlink) {
 #if defined(DIAGNOSTIC) || defined(UHCI_DEBUG)
 		usb_syncmem(&pqh->dma,
 		    pqh->offs + offsetof(uhci_qh_t, qh_hlink),
 		    sizeof(pqh->qh.qh_hlink),
 		    BUS_DMASYNC_POSTWRITE);
 		if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) {
 			printf("uhci_find_prev_qh: QH not found\n");
 			return (NULL);
+		}
 #endif
+	}
 	return (pqh);
+}
 void
 uhci_globalreset(uhci_softc_t *sc)
+{
 	UHCICMD(sc, UHCI_CMD_GRESET);	/* global reset */
 	usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
 	UHCICMD(sc, 0);			/* do nothing */
+}
 usbd_status
 uhci_init(uhci_softc_t *sc)
+{
 	usbd_status err;
 	int i, j;
 	uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh;
 	uhci_soft_td_t *std;
 	DPRINTFN(1,("uhci_init: start\n"));
 #ifdef UHCI_DEBUG
 	thesc = sc;
 	if (uhcidebug > 2)
 		uhci_dumpregs(sc);
 #endif
 	sc->sc_suspend = PWR_RESUME;
 	UWRITE2(sc, UHCI_INTR, 0);		/* disable interrupts */
 	uhci_globalreset(sc);			/* reset the controller */
 	uhci_reset(sc);
 #ifdef __NetBSD__
 	usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag,
 	    USB_MEM_RESERVE);
 #endif
 	/* Allocate and initialize real frame array. */
 	err = usb_allocmem(&sc->sc_bus,
 		  UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
 		  UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
 	if (err)
 		return (err);
 	sc->sc_pframes = KERNADDR(&sc->sc_dma, 0);
 	UWRITE2(sc, UHCI_FRNUM, 0);		/* set frame number to 0 */
 	UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/
 	/*
 	 * Allocate a TD, inactive, that hangs from the last QH.
 	 * This is to avoid a bug in the PIIX that makes it run berserk
 	 * otherwise.
 	 */
 	std = uhci_alloc_std(sc);
 	if (std == NULL)
 		return (USBD_NOMEM);
 	std->link.std = NULL;
 	std->td.td_link = htole32(UHCI_PTR_T);
 	std->td.td_status = htole32(0); /* inactive */
 	std->td.td_token = htole32(0);
 	std->td.td_buffer = htole32(0);
 	usb_syncmem(&std->dma, std->offs, sizeof(std->td),
 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
 	/* Allocate the dummy QH marking the end and used for looping the QHs.*/
 	lsqh = uhci_alloc_sqh(sc);
 	if (lsqh == NULL)
 		return (USBD_NOMEM);
 	lsqh->hlink = NULL;
 	lsqh->qh.qh_hlink = htole32(UHCI_PTR_T);	/* end of QH chain */
 	lsqh->elink = std;
 	lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD);
 	sc->sc_last_qh = lsqh;
 	usb_syncmem(&lsqh->dma, lsqh->offs, sizeof(lsqh->qh),
 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
 	/* Allocate the dummy QH where bulk traffic will be queued. */
 	bsqh = uhci_alloc_sqh(sc);
 	if (bsqh == NULL)
 		return (USBD_NOMEM);
 	bsqh->hlink = lsqh;
 	bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH);
 	bsqh->elink = NULL;
 	bsqh->qh.qh_elink = htole32(UHCI_PTR_T);
 	sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
 	usb_syncmem(&bsqh->dma, bsqh->offs, sizeof(bsqh->qh),
 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
 	/* Allocate dummy QH where high speed control traffic will be queued. */
 	chsqh = uhci_alloc_sqh(sc);
 	if (chsqh == NULL)
 		return (USBD_NOMEM);
 	chsqh->hlink = bsqh;
 	chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH);
 	chsqh->elink = NULL;
 	chsqh->qh.qh_elink = htole32(UHCI_PTR_T);
 	sc->sc_hctl_start = sc->sc_hctl_end = chsqh;
 	usb_syncmem(&chsqh->dma, chsqh->offs, sizeof(chsqh->qh),
 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
 	/* Allocate dummy QH where control traffic will be queued. */
 	clsqh = uhci_alloc_sqh(sc);
 	if (clsqh == NULL)
 		return (USBD_NOMEM);
 	clsqh->hlink = chsqh;
 	clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH);
 	clsqh->elink = NULL;
 	clsqh->qh.qh_elink = htole32(UHCI_PTR_T);
 	sc->sc_lctl_start = sc->sc_lctl_end = clsqh;
 	usb_syncmem(&clsqh->dma, clsqh->offs, sizeof(clsqh->qh),
 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
 	/*
 	 * Make all (virtual) frame list pointers point to the interrupt
 	 * queue heads and the interrupt queue heads at the control
 	 * queue head and point the physical frame list to the virtual.
 	 */
 	for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
 		std = uhci_alloc_std(sc);
 		sqh = uhci_alloc_sqh(sc);
 		if (std == NULL || sqh == NULL)
 			return (USBD_NOMEM);
 		std->link.sqh = sqh;
 		std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH);
 		std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
 		std->td.td_token = htole32(0);
 		std->td.td_buffer = htole32(0);
 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
 		sqh->hlink = clsqh;
 		sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH);
 		sqh->elink = NULL;
 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
 		usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
 		sc->sc_vframes[i].htd = std;
 		sc->sc_vframes[i].etd = std;
 		sc->sc_vframes[i].hqh = sqh;
 		sc->sc_vframes[i].eqh = sqh;
 		for (j = i;
 		     j < UHCI_FRAMELIST_COUNT;
 		     j += UHCI_VFRAMELIST_COUNT)
 			sc->sc_pframes[j] = htole32(std->physaddr);
+	}
 	usb_syncmem(&sc->sc_dma, 0,
 	    UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
 	    BUS_DMASYNC_PREWRITE);
 	LIST_INIT(&sc->sc_intrhead);
 	SIMPLEQ_INIT(&sc->sc_free_xfers);
 	usb_callout_init(sc->sc_poll_handle);
 	/* Set up the bus struct. */
 	sc->sc_bus.methods = &uhci_bus_methods;
 	sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
 	UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */
 	DPRINTFN(1,("uhci_init: enabling\n"));
 	err =  uhci_run(sc, 1);		/* and here we go... */
 	UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
 		UHCI_INTR_IOCE | UHCI_INTR_SPIE);	/* enable interrupts */
 	return err;
+}
 #if defined(__NetBSD__) || defined(__OpenBSD__)
 int
 uhci_activate(device_t self, enum devact act)
+{
 	struct uhci_softc *sc = device_private(self);
 	int rv = 0;
 	switch (act) {
 	case DVACT_ACTIVATE:
 		return (EOPNOTSUPP);
 	case DVACT_DEACTIVATE:
 		sc->sc_dying = 1;
 		if (sc->sc_child != NULL)
 			rv = config_deactivate(sc->sc_child);
 		break;
+	}
 	return (rv);
+}
 void
 uhci_childdet(device_t self, device_t child)
+{
 	struct uhci_softc *sc = device_private(self);
 	KASSERT(sc->sc_child == child);
 	sc->sc_child = NULL;
+}
 int
 uhci_detach(struct uhci_softc *sc, int flags)
+{
 	usbd_xfer_handle xfer;
 	int rv = 0;
 	if (sc->sc_child != NULL)
 		rv = config_detach(sc->sc_child, flags);
 	if (rv != 0)
 		return (rv);
 	/* Free all xfers associated with this HC. */
 	for (;;) {
 		xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
 		if (xfer == NULL)
 			break;
 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
 		free(xfer, M_USB);
+	}
 	callout_halt(&sc->sc_poll_handle, NULL);
 	callout_destroy(&sc->sc_poll_handle);
 	/* XXX free other data structures XXX */
 	return (rv);
+}
 #endif
 usbd_status
 uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
+{
 	struct uhci_softc *sc = bus->hci_private;
 	usbd_status status;
 	u_int32_t n;
 	/*
 	 * XXX
 	 * Since we are allocating a buffer we can assume that we will
 	 * need TDs for it.  Since we don't want to allocate those from
 	 * an interrupt context, we allocate them here and free them again.
 	 * This is no guarantee that we'll get the TDs next time...
 	 */
 	n = size / 8;
 	if (n > 16) {
 		u_int32_t i;
 		uhci_soft_td_t **stds;
 		DPRINTF(("uhci_allocm: get %d TDs\n", n));
 		stds = malloc(sizeof(uhci_soft_td_t *) * n, M_TEMP,
 		    M_WAITOK|M_ZERO);
 		for(i=0; i < n; i++)
 			stds[i] = uhci_alloc_std(sc);
 		for(i=0; i < n; i++)
 			if (stds[i] != NULL)
 				uhci_free_std(sc, stds[i]);
 		free(stds, M_TEMP);
+	}
 	status = usb_allocmem(&sc->sc_bus, size, 0, dma);
 #ifdef __NetBSD__
 	if (status == USBD_NOMEM)
 		status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size);
 #endif
 	return status;
+}
 void
 uhci_freem(struct usbd_bus *bus, usb_dma_t *dma)
+{
 #ifdef __NetBSD__
 	if (dma->block->flags & USB_DMA_RESERVE) {
 		usb_reserve_freem(&((struct uhci_softc *)bus)->sc_dma_reserve,
 		    dma);
 		return;
+	}
 #endif
 	usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma);
+}
 usbd_xfer_handle
 uhci_allocx(struct usbd_bus *bus)
+{
 	struct uhci_softc *sc = bus->hci_private;
 	usbd_xfer_handle xfer;
 	xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
 	if (xfer != NULL) {
 		SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
 #ifdef DIAGNOSTIC
 		if (xfer->busy_free != XFER_FREE) {
 			printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer,
 			       xfer->busy_free);
+		}
 #endif
 	} else {
 		xfer = malloc(sizeof(struct uhci_xfer), M_USB, M_NOWAIT);
+	}
 	if (xfer != NULL) {
 		memset(xfer, 0, sizeof (struct uhci_xfer));
 		UXFER(xfer)->iinfo.sc = sc;
 #ifdef DIAGNOSTIC
 		UXFER(xfer)->iinfo.isdone = 1;
 		xfer->busy_free = XFER_BUSY;
 #endif
+	}
 	return (xfer);
+}
 void
 uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
+{
 	struct uhci_softc *sc = bus->hci_private;
 #ifdef DIAGNOSTIC
 	if (xfer->busy_free != XFER_BUSY) {
 		printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer,
 		       xfer->busy_free);
+	}
 	xfer->busy_free = XFER_FREE;
 	if (!UXFER(xfer)->iinfo.isdone) {
 		printf("uhci_freex: !isdone\n");
+	}
 #endif
 	SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
+}
 /*
  * Handle suspend/resume.
+ *
  * We need to switch to polling mode here, because this routine is
  * called from an interrupt context.  This is all right since we
  * are almost suspended anyway.
  */
 bool
 uhci_resume(device_t dv PMF_FN_ARGS)
+{
 	uhci_softc_t *sc = device_private(dv);
 	int cmd;
 	int s;
 	s = splhardusb();
 	cmd = UREAD2(sc, UHCI_CMD);
 	sc->sc_bus.use_polling++;
 	UWRITE2(sc, UHCI_INTR, 0);
 	uhci_globalreset(sc);
 	uhci_reset(sc);
 	if (cmd & UHCI_CMD_RS)
 		uhci_run(sc, 0);
 	/* restore saved state */
 	UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0));
 	UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum);
 	UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof);
 	UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force resume */
 	usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
 	UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
 	UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE |
 	    UHCI_INTR_RIE | UHCI_INTR_IOCE | UHCI_INTR_SPIE);
 	UHCICMD(sc, UHCI_CMD_MAXP);
 	uhci_run(sc, 1); /* and start traffic again */
 	usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
 	sc->sc_bus.use_polling--;
 	if (sc->sc_intr_xfer != NULL)
 		usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub,
 		    sc->sc_intr_xfer);
 #ifdef UHCI_DEBUG
 	if (uhcidebug > 2)
 		uhci_dumpregs(sc);
 #endif
 	sc->sc_suspend = PWR_RESUME;
 	splx(s);
 	return true;
+}
 bool
 uhci_suspend(device_t dv PMF_FN_ARGS)
+{
 	uhci_softc_t *sc = device_private(dv);
 	int cmd;
 	int s;
 	s = splhardusb();
 	cmd = UREAD2(sc, UHCI_CMD);
 #ifdef UHCI_DEBUG
 	if (uhcidebug > 2)
 		uhci_dumpregs(sc);
 #endif
 	if (sc->sc_intr_xfer != NULL)
 		usb_uncallout(sc->sc_poll_handle, uhci_poll_hub,
 		    sc->sc_intr_xfer);
 	sc->sc_suspend = PWR_SUSPEND;
 	sc->sc_bus.use_polling++;
 	uhci_run(sc, 0); /* stop the controller */
 	cmd &= ~UHCI_CMD_RS;
 	/* save some state if BIOS doesn't */
 	sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM);
 	sc->sc_saved_sof = UREAD1(sc, UHCI_SOF);
 	UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */
 	UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter suspend */
 	usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
 	sc->sc_bus.use_polling--;
 	splx(s);
 	return true;
+}
 #ifdef UHCI_DEBUG
 Static void
 uhci_dumpregs(uhci_softc_t *sc)
+{
 	DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, "
 		     "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
 		     device_xname(sc->sc_dev),
 		     UREAD2(sc, UHCI_CMD),
 		     UREAD2(sc, UHCI_STS),
 		     UREAD2(sc, UHCI_INTR),
 		     UREAD2(sc, UHCI_FRNUM),
 		     UREAD4(sc, UHCI_FLBASEADDR),
 		     UREAD1(sc, UHCI_SOF),
 		     UREAD2(sc, UHCI_PORTSC1),
 		     UREAD2(sc, UHCI_PORTSC2)));
+}
 void
 uhci_dump_td(uhci_soft_td_t *p)
+{
 	char sbuf[128], sbuf2[128];
 	usb_syncmem(&p->dma, p->offs, sizeof(p->td),
 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
 	DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx "
 		     "token=0x%08lx buffer=0x%08lx\n",
 		     p, (long)p->physaddr,
 		     (long)le32toh(p->td.td_link),
 		     (long)le32toh(p->td.td_status),
 		     (long)le32toh(p->td.td_token),
 		     (long)le32toh(p->td.td_buffer)));
 	snprintb(sbuf, sizeof(sbuf), "\20\1T\2Q\3VF",
 	    (u_int32_t)le32toh(p->td.td_link));
 	snprintb(sbuf2, sizeof(sbuf2),
 	    "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
 	    "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
 	    (u_int32_t)le32toh(p->td.td_status));
 	DPRINTFN(-1,("  %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,"
 		     "D=%d,maxlen=%d\n", sbuf, sbuf2,
 		     UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)),
 		     UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)),
 		     UHCI_TD_GET_PID(le32toh(p->td.td_token)),
 		     UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)),
 		     UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)),
 		     UHCI_TD_GET_DT(le32toh(p->td.td_token)),
 		     UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token))));
 	usb_syncmem(&p->dma, p->offs, sizeof(p->td),
 	    BUS_DMASYNC_PREREAD);
+}
 void
 uhci_dump_qh(uhci_soft_qh_t *sqh)
+{
 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
 	DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh,
 	    (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink),
 	    le32toh(sqh->qh.qh_elink)));
 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD);
+}
 #if 1
 void
 uhci_dump(void)
+{
 	uhci_dump_all(thesc);
+}
 #endif
 void
 uhci_dump_all(uhci_softc_t *sc)
+{
 	uhci_dumpregs(sc);
 	printf("intrs=%d\n", sc->sc_bus.no_intrs);
 	/*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/
 	uhci_dump_qh(sc->sc_lctl_start);
+}
 void
 uhci_dump_qhs(uhci_soft_qh_t *sqh)
+{
 	uhci_dump_qh(sqh);
 	/* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards
 	 * Traverses sideways first, then down.
+	 *
 	 * QH1
 	 * QH2
 	 * No QH
 	 * TD2.1
 	 * TD2.2
 	 * TD1.1
 	 * etc.
+	 *
 	 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1.
 	 */
 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
 	if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T))
 		uhci_dump_qhs(sqh->hlink);
 	else
 		DPRINTF(("No QH\n"));
 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD);
 	if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T))
 		uhci_dump_tds(sqh->elink);
 	else
 		DPRINTF(("No TD\n"));
+}
 void
 uhci_dump_tds(uhci_soft_td_t *std)
+{
 	uhci_soft_td_t *td;
 	int stop;
 	for(td = std; td != NULL; td = td->link.std) {
 		uhci_dump_td(td);
 		/* Check whether the link pointer in this TD marks
 		 * the link pointer as end of queue. This avoids
 		 * printing the free list in case the queue/TD has
 		 * already been moved there (seatbelt).
 		 */
 		usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link),
 		    sizeof(td->td.td_link),
 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
 		stop = (le32toh(td->td.td_link) & UHCI_PTR_T ||
 			le32toh(td->td.td_link) == 0);
 		usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link),
 		    sizeof(td->td.td_link), BUS_DMASYNC_PREREAD);
 		if (stop)
 			break;
+	}
+}
 Static void
 uhci_dump_ii(uhci_intr_info_t *ii)
+{
 	usbd_pipe_handle pipe;
 	usb_endpoint_descriptor_t *ed;
 	usbd_device_handle dev;
 #ifdef DIAGNOSTIC
 #define DONE ii->isdone
 #else
 #define DONE 0
 #endif
         if (ii == NULL) {
                 printf("ii NULL\n");
                 return;
+        }
         if (ii->xfer == NULL) {
 		printf("ii %p: done=%d xfer=NULL\n",
 		       ii, DONE);
                 return;
+        }
         pipe = ii->xfer->pipe;
         if (pipe == NULL) {
 		printf("ii %p: done=%d xfer=%p pipe=NULL\n",
 		       ii, DONE, ii->xfer);
                 return;
+	}
         if (pipe->endpoint == NULL) {
 		printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n",
 		       ii, DONE, ii->xfer, pipe);
                 return;
+	}
         if (pipe->device == NULL) {
 		printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n",
 		       ii, DONE, ii->xfer, pipe);
                 return;
+	}
         ed = pipe->endpoint->edesc;
         dev = pipe->device;
 	printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n",
 	       ii, DONE, ii->xfer, dev,
 	       UGETW(dev->ddesc.idVendor),
 	       UGETW(dev->ddesc.idProduct),
 	       dev->address, pipe,
 	       ed->bEndpointAddress, ed->bmAttributes);
 #undef DONE
+}
 void uhci_dump_iis(struct uhci_softc *sc);
 void
 uhci_dump_iis(struct uhci_softc *sc)
+{
 	uhci_intr_info_t *ii;
 	printf("intr_info list:\n");
 	for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
 		uhci_dump_ii(ii);
+}
 void iidump(void);
 void iidump(void) { uhci_dump_iis(thesc); }
 #endif
 /*
  * This routine is executed periodically and simulates interrupts
  * from the root controller interrupt pipe for port status change.
  */
 void
 uhci_poll_hub(void *addr)
+{
 	usbd_xfer_handle xfer = addr;
 	usbd_pipe_handle pipe = xfer->pipe;
 	uhci_softc_t *sc;
 	int s;
 	u_char *p;
 	DPRINTFN(20, ("uhci_poll_hub\n"));
-	if (pipe->device == NULL) return;	/* device has detached */
+	if (__predict_false(pipe->device == NULL || pipe->device->bus == NULL))
 		return;	/* device has detached */
 	sc = pipe->device->bus->hci_private;
 	usb_callout(sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
 	p = KERNADDR(&xfer->dmabuf, 0);
 	p[0] = 0;
 	if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
 		p[0] |= 1<<1;
 	if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
 		p[0] |= 1<<2;
 	if (p[0] == 0)
 		/* No change, try again in a while */
 		return;
 	xfer->actlen = 1;
 	xfer->status = USBD_NORMAL_COMPLETION;
 	s = splusb();
 	xfer->device->bus->intr_context++;
 	usb_transfer_complete(xfer);
 	xfer->device->bus->intr_context--;
 	splx(s);
+}
 void
 uhci_root_intr_done(usbd_xfer_handle xfer)
+{
+}
 void
 uhci_root_ctrl_done(usbd_xfer_handle xfer)
+{
+}
 /*
  * Let the last QH loop back to the high speed control transfer QH.
  * This is what intel calls "bandwidth reclamation" and improves
  * USB performance a lot for some devices.
  * If we are already looping, just count it.
  */
 void
 uhci_add_loop(uhci_softc_t *sc) {
 #ifdef UHCI_DEBUG
 	if (uhcinoloop)
 		return;
 #endif
 	if (++sc->sc_loops == 1) {
 		DPRINTFN(5,("uhci_start_loop: add\n"));
 		/* Note, we don't loop back the soft pointer. */
 		sc->sc_last_qh->qh.qh_hlink =
 		    htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH);
 		usb_syncmem(&sc->sc_last_qh->dma,
 		    sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink),
 		    sizeof(sc->sc_last_qh->qh.qh_hlink),
 		    BUS_DMASYNC_PREWRITE);
+	}
+}
 void
 uhci_rem_loop(uhci_softc_t *sc) {
 #ifdef UHCI_DEBUG
 	if (uhcinoloop)
 		return;
 #endif
 	if (--sc->sc_loops == 0) {
 		DPRINTFN(5,("uhci_end_loop: remove\n"));
 		sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T);
 		usb_syncmem(&sc->sc_last_qh->dma,
 		    sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink),
 		    sizeof(sc->sc_last_qh->qh.qh_hlink),
 		    BUS_DMASYNC_PREWRITE);
+	}
+}
 /* Add high speed control QH, called at splusb(). */
 void
 uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
+{
 	uhci_soft_qh_t *eqh;
 	SPLUSBCHECK;
 	DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
 	eqh = sc->sc_hctl_end;
 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
 	    sizeof(eqh->qh.qh_hlink),
 	    BUS_DMASYNC_POSTWRITE);
 	sqh->hlink       = eqh->hlink;
 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
 	    BUS_DMASYNC_PREWRITE);
 	eqh->hlink       = sqh;
 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
 	sc->sc_hctl_end = sqh;
 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
 #ifdef UHCI_CTL_LOOP
 	uhci_add_loop(sc);
 #endif
+}
 /* Remove high speed control QH, called at splusb(). */
 void
 uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
+{
 	uhci_soft_qh_t *pqh;
 	SPLUSBCHECK;
 	DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh));
 #ifdef UHCI_CTL_LOOP
 	uhci_rem_loop(sc);
 #endif
 	/*
 	 * The T bit should be set in the elink of the QH so that the HC
 	 * doesn't follow the pointer.  This condition may fail if the
 	 * the transferred packet was short so that the QH still points
 	 * at the last used TD.
 	 * In this case we set the T bit and wait a little for the HC
 	 * to stop looking at the TD.
 	 * Note that if the TD chain is large enough, the controller
 	 * may still be looking at the chain at the end of this function.
 	 * uhci_free_std_chain() will make sure the controller stops
 	 * looking at it quickly, but until then we should not change
 	 * sqh->hlink.
 	 */
 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
 	    sizeof(sqh->qh.qh_elink),
 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
 		usb_syncmem(&sqh->dma,
 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
 		    sizeof(sqh->qh.qh_elink),
 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
 		delay(UHCI_QH_REMOVE_DELAY);
+	}
 	pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh);
 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
 	pqh->hlink = sqh->hlink;
 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
 	    sizeof(pqh->qh.qh_hlink),
 	    BUS_DMASYNC_PREWRITE);
 	delay(UHCI_QH_REMOVE_DELAY);
 	if (sc->sc_hctl_end == sqh)
 		sc->sc_hctl_end = pqh;
+}
 /* Add low speed control QH, called at splusb(). */
 void
 uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
+{
 	uhci_soft_qh_t *eqh;
 	SPLUSBCHECK;
 	DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh));
 	eqh = sc->sc_lctl_end;
 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
 	sqh->hlink = eqh->hlink;
 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
 	    BUS_DMASYNC_PREWRITE);
 	eqh->hlink = sqh;
 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
 	sc->sc_lctl_end = sqh;
+}
 /* Remove low speed control QH, called at splusb(). */
 void
 uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
+{
 	uhci_soft_qh_t *pqh;
 	SPLUSBCHECK;
 	DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh));
 	/* See comment in uhci_remove_hs_ctrl() */
 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
 	    sizeof(sqh->qh.qh_elink),
 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
 		usb_syncmem(&sqh->dma,
 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
 		    sizeof(sqh->qh.qh_elink),
 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
 		delay(UHCI_QH_REMOVE_DELAY);
+	}
 	pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh);
 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
 	pqh->hlink = sqh->hlink;
 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
 	    sizeof(pqh->qh.qh_hlink),
 	    BUS_DMASYNC_PREWRITE);
 	delay(UHCI_QH_REMOVE_DELAY);
 	if (sc->sc_lctl_end == sqh)
 		sc->sc_lctl_end = pqh;
+}
 /* Add bulk QH, called at splusb(). */
 void
 uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
+{
 	uhci_soft_qh_t *eqh;
 	SPLUSBCHECK;
 	DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
 	eqh = sc->sc_bulk_end;
 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
 	sqh->hlink = eqh->hlink;
 	sqh->qh.qh_hlink = eqh->qh.qh_hlink;
 	usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
 	    BUS_DMASYNC_PREWRITE);
 	eqh->hlink = sqh;
 	eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
 	usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
 	    sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
 	sc->sc_bulk_end = sqh;
 	uhci_add_loop(sc);
+}
 /* Remove bulk QH, called at splusb(). */
 void
 uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
+{
 	uhci_soft_qh_t *pqh;
 	SPLUSBCHECK;
 	DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
 	uhci_rem_loop(sc);
 	/* See comment in uhci_remove_hs_ctrl() */
 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
 	    sizeof(sqh->qh.qh_elink),
 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
 	if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
 		sqh->qh.qh_elink = htole32(UHCI_PTR_T);
 		usb_syncmem(&sqh->dma,
 		    sqh->offs + offsetof(uhci_qh_t, qh_elink),
 		    sizeof(sqh->qh.qh_elink),
 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
 		delay(UHCI_QH_REMOVE_DELAY);
+	}
 	pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh);
 	usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
 	    sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
 	pqh->hlink       = sqh->hlink;
 	pqh->qh.qh_hlink = sqh->qh.qh_hlink;
 	usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
 	    sizeof(pqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
 	delay(UHCI_QH_REMOVE_DELAY);
 	if (sc->sc_bulk_end == sqh)
 		sc->sc_bulk_end = pqh;
+}
 Static int uhci_intr1(uhci_softc_t *);
 int
 uhci_intr(void *arg)
+{
 	uhci_softc_t *sc = arg;
 	if (sc->sc_dying || !device_has_power(sc->sc_dev))
 		return (0);
 	if (sc->sc_bus.use_polling || UREAD2(sc, UHCI_INTR) == 0) {
 #ifdef DIAGNOSTIC
 		DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n"));
 #endif
 		return (0);
+	}
 	return (uhci_intr1(sc));
+}
 int
 uhci_intr1(uhci_softc_t *sc)
+{
 	int status;
 	int ack;
 #ifdef UHCI_DEBUG
 	if (uhcidebug > 15) {
 		DPRINTF(("%s: uhci_intr1\n", device_xname(sc->sc_dev)));
 		uhci_dumpregs(sc);
+	}
 #endif
 	status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS;
 	if (status == 0)	/* The interrupt was not for us. */
 		return (0);
 	if (sc->sc_suspend != PWR_RESUME) {
 #ifdef DIAGNOSTIC
 		printf("%s: interrupt while not operating ignored\n",
 		       device_xname(sc->sc_dev));
 #endif
 		UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */
 		return (0);
+	}
 	ack = 0;
 	if (status & UHCI_STS_USBINT)
 		ack |= UHCI_STS_USBINT;
 	if (status & UHCI_STS_USBEI)
 		ack |= UHCI_STS_USBEI;
 	if (status & UHCI_STS_RD) {
 		ack |= UHCI_STS_RD;
 #ifdef UHCI_DEBUG
 		printf("%s: resume detect\n", device_xname(sc->sc_dev));
 #endif
+	}
 	if (status & UHCI_STS_HSE) {
 		ack |= UHCI_STS_HSE;
 		printf("%s: host system error\n", device_xname(sc->sc_dev));
+	}
 	if (status & UHCI_STS_HCPE) {
 		ack |= UHCI_STS_HCPE;
 		printf("%s: host controller process error\n",
 		       device_xname(sc->sc_dev));
+	}
 	if (status & UHCI_STS_HCH) {
 		/* no acknowledge needed */
 		if (!sc->sc_dying) {
 			printf("%s: host controller halted\n",
 			    device_xname(sc->sc_dev));
 #ifdef UHCI_DEBUG
 			uhci_dump_all(sc);
 #endif
+		}
 		sc->sc_dying = 1;
+	}
 	if (!ack)
 		return (0);	/* nothing to acknowledge */
 	UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */
 	sc->sc_bus.no_intrs++;
 	usb_schedsoftintr(&sc->sc_bus);
 	DPRINTFN(15, ("%s: uhci_intr: exit\n", device_xname(sc->sc_dev)));
 	return (1);
+}
 void
 uhci_softintr(void *v)
+{
 	struct usbd_bus *bus = v;
 	uhci_softc_t *sc = bus->hci_private;
 	uhci_intr_info_t *ii, *nextii;
 	DPRINTFN(10,("%s: uhci_softintr (%d)\n", device_xname(sc->sc_dev),
 		     sc->sc_bus.intr_context));
 	sc->sc_bus.intr_context++;
 	/*
 	 * Interrupts on UHCI really suck.  When the host controller
 	 * interrupts because a transfer is completed there is no
 	 * way of knowing which transfer it was.  You can scan down
 	 * the TDs and QHs of the previous frame to limit the search,
 	 * but that assumes that the interrupt was not delayed by more
 	 * than 1 ms, which may not always be true (e.g. after debug
 	 * output on a slow console).
 	 * We scan all interrupt descriptors to see if any have
 	 * completed.
 	 */
 	for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) {
 		nextii = LIST_NEXT(ii, list);
 		uhci_check_intr(sc, ii);
+	}
 #ifdef USB_USE_SOFTINTR
 	if (sc->sc_softwake) {
 		sc->sc_softwake = 0;
 		wakeup(&sc->sc_softwake);
+	}
 #endif /* USB_USE_SOFTINTR */
 	sc->sc_bus.intr_context--;
+}
 /* Check for an interrupt. */
 void
 uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii)
+{
 	uhci_soft_td_t *std, *lstd;
 	u_int32_t status;
 	DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
 #ifdef DIAGNOSTIC
 	if (ii == NULL) {
 		printf("uhci_check_intr: no ii? %p\n", ii);
 		return;
+	}
 #endif
 	if (ii->xfer->status == USBD_CANCELLED ||
 	    ii->xfer->status == USBD_TIMEOUT) {
 		DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer));
 		return;
+	}
 	if (ii->stdstart == NULL)
 		return;
 	lstd = ii->stdend;
 #ifdef DIAGNOSTIC
 	if (lstd == NULL) {
 		printf("uhci_check_intr: std==0\n");
 		return;
+	}
 #endif
 	/*
 	 * If the last TD is still active we need to check whether there
 	 * is an error somewhere in the middle, or whether there was a
 	 * short packet (SPD and not ACTIVE).
 	 */
 	usb_syncmem(&lstd->dma,
 	    lstd->offs + offsetof(uhci_td_t, td_status),
 	    sizeof(lstd->td.td_status),
 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
 	if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) {
 		DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii));
 		for (std = ii->stdstart; std != lstd; std = std->link.std) {
 			usb_syncmem(&std->dma,
 			    std->offs + offsetof(uhci_td_t, td_status),
 			    sizeof(std->td.td_status),
 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
 			status = le32toh(std->td.td_status);
 			usb_syncmem(&std->dma,
 			    std->offs + offsetof(uhci_td_t, td_status),
 			    sizeof(std->td.td_status), BUS_DMASYNC_PREREAD);
 			/* If there's an active TD the xfer isn't done. */
 			if (status & UHCI_TD_ACTIVE)
 				break;
 			/* Any kind of error makes the xfer done. */
 			if (status & UHCI_TD_STALLED)
 				goto done;
 			/* We want short packets, and it is short: it's done */
 			usb_syncmem(&std->dma,
 			    std->offs + offsetof(uhci_td_t, td_token),
 			    sizeof(std->td.td_token),
 			    BUS_DMASYNC_POSTWRITE);
 			if ((status & UHCI_TD_SPD) &&
 			      UHCI_TD_GET_ACTLEN(status) <
 			      UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)))
 				goto done;
+		}
 		DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n",
 			      ii, ii->stdstart));
 		usb_syncmem(&lstd->dma,
 		    lstd->offs + offsetof(uhci_td_t, td_status),
 		    sizeof(lstd->td.td_status),
 		    BUS_DMASYNC_PREREAD);
 		return;
+	}
  done:
 	DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii));
 	usb_uncallout(ii->xfer->timeout_handle, uhci_timeout, ii);
 	uhci_idone(ii);
+}
 /* Called at splusb() */
 void
 uhci_idone(uhci_intr_info_t *ii)
+{
 	usbd_xfer_handle xfer = ii->xfer;
 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
 	uhci_soft_td_t *std;
 	u_int32_t status = 0, nstatus;
 	int actlen;
 	DPRINTFN(12, ("uhci_idone: ii=%p\n", ii));
 #ifdef DIAGNOSTIC
+	{
 		int s = splhigh();
 		if (ii->isdone) {
 			splx(s);
 #ifdef UHCI_DEBUG
 			printf("uhci_idone: ii is done!\n   ");
 			uhci_dump_ii(ii);
 #else
 			printf("uhci_idone: ii=%p is done!\n", ii);
 #endif
 			return;
+		}
 		ii->isdone = 1;
 		splx(s);
+	}
 #endif
 	if (xfer->nframes != 0) {
 		/* Isoc transfer, do things differently. */
 		uhci_soft_td_t **stds = upipe->u.iso.stds;
 		int i, n, nframes, len;
 		DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii));
 		nframes = xfer->nframes;
 		actlen = 0;
 		n = UXFER(xfer)->curframe;
 		for (i = 0; i < nframes; i++) {
 			std = stds[n];
 #ifdef UHCI_DEBUG
 			if (uhcidebug > 5) {
 				DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i));
 				uhci_dump_td(std);
+			}
 #endif
 			if (++n >= UHCI_VFRAMELIST_COUNT)
 				n = 0;
 			usb_syncmem(&std->dma,
 			    std->offs + offsetof(uhci_td_t, td_status),
 			    sizeof(std->td.td_status),
 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
 			status = le32toh(std->td.td_status);
 			len = UHCI_TD_GET_ACTLEN(status);
 			xfer->frlengths[i] = len;
 			actlen += len;
+		}
 		upipe->u.iso.inuse -= nframes;
 		xfer->actlen = actlen;
 		xfer->status = USBD_NORMAL_COMPLETION;
 		goto end;
+	}
 #ifdef UHCI_DEBUG
 	DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n",
 		      ii, xfer, upipe));
 	if (uhcidebug > 10)
 		uhci_dump_tds(ii->stdstart);
 #endif
 	/* The transfer is done, compute actual length and status. */
 	actlen = 0;
 	for (std = ii->stdstart; std != NULL; std = std->link.std) {
 		usb_syncmem(&std->dma, std->offs, sizeof(std->td),
 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
 		nstatus = le32toh(std->td.td_status);
 		if (nstatus & UHCI_TD_ACTIVE)
 			break;
 		status = nstatus;
 		if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) !=
 			UHCI_TD_PID_SETUP)
 			actlen += UHCI_TD_GET_ACTLEN(status);
 		else {
 			/*
 			 * UHCI will report CRCTO in addition to a STALL or NAK
 			 * for a SETUP transaction.  See section 3.2.2, "TD
 			 * CONTROL AND STATUS".
 			 */
 			if (status & (UHCI_TD_STALLED | UHCI_TD_NAK))
 				status &= ~UHCI_TD_CRCTO;
+		}
+	}
 	/* If there are left over TDs we need to update the toggle. */
 	if (std != NULL)
 		upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token));
 	status &= UHCI_TD_ERROR;
 	DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n",
 		      actlen, status));
 	xfer->actlen = actlen;
 	if (status != 0) {
 #ifdef UHCI_DEBUG
 		char sbuf[128];
 		snprintb(sbuf, sizeof(sbuf),
 		    "\20\22BITSTUFF\23CRCTO\24NAK\25"
 		    "BABBLE\26DBUFFER\27STALLED\30ACTIVE",(u_int32_t)status);
 		DPRINTFN((status == UHCI_TD_STALLED)*10,
 			 ("uhci_idone: error, addr=%d, endpt=0x%02x, "
 			  "status 0x%s\n",
 			  xfer->pipe->device->address,
 			  xfer->pipe->endpoint->edesc->bEndpointAddress,
 			  sbuf));
 #endif
 		if (status == UHCI_TD_STALLED)
 			xfer->status = USBD_STALLED;
 		else
 			xfer->status = USBD_IOERROR; /* more info XXX */
 	} else {
 		xfer->status = USBD_NORMAL_COMPLETION;
+	}
  end:
 	usb_transfer_complete(xfer);
 	DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii));
+}
 /*
  * Called when a request does not complete.
  */
 void
 uhci_timeout(void *addr)
+{
 	uhci_intr_info_t *ii = addr;
 	struct uhci_xfer *uxfer = UXFER(ii->xfer);
 	struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe;
 	uhci_softc_t *sc = upipe->pipe.device->bus->hci_private;
 	DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer));
 	if (sc->sc_dying) {
 		uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT);
 		return;
+	}
 	/* Execute the abort in a process context. */
 	usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer);
 	usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task,
 	    USB_TASKQ_HC);
+}
 void
 uhci_timeout_task(void *addr)
+{
 	usbd_xfer_handle xfer = addr;
 	int s;
 	DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer));
 	s = splusb();
 	uhci_abort_xfer(xfer, USBD_TIMEOUT);
 	splx(s);
+}
 /*
  * Wait here until controller claims to have an interrupt.
  * Then call uhci_intr and return.  Use timeout to avoid waiting
  * too long.
  * Only used during boot when interrupts are not enabled yet.
  */
 void
 uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer)
+{
 	int timo = xfer->timeout;
 	uhci_intr_info_t *ii;
 	DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo));
 	xfer->status = USBD_IN_PROGRESS;
 	for (; timo >= 0; timo--) {
 		usb_delay_ms(&sc->sc_bus, 1);
 		DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
 		if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
 			uhci_intr1(sc);
 			if (xfer->status != USBD_IN_PROGRESS)
 				return;
+		}
+	}
 	/* Timeout */
 	DPRINTF(("uhci_waitintr: timeout\n"));
 	for (ii = LIST_FIRST(&sc->sc_intrhead);
 	     ii != NULL && ii->xfer != xfer;
 	     ii = LIST_NEXT(ii, list))
+		;
 #ifdef DIAGNOSTIC
 	if (ii == NULL)
 		panic("uhci_waitintr: lost intr_info");
 #endif
 	uhci_idone(ii);
+}
 void
 uhci_poll(struct usbd_bus *bus)
+{
 	uhci_softc_t *sc = bus->hci_private;
 	if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT)
 		uhci_intr1(sc);
+}
 void
 uhci_reset(uhci_softc_t *sc)
+{
 	int n;
 	UHCICMD(sc, UHCI_CMD_HCRESET);
 	/* The reset bit goes low when the controller is done. */
 	for (n = 0; n < UHCI_RESET_TIMEOUT &&
 		    (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
 		usb_delay_ms(&sc->sc_bus, 1);
 	if (n >= UHCI_RESET_TIMEOUT)
 		printf("%s: controller did not reset\n",
 		       device_xname(sc->sc_dev));
+}
 usbd_status
 uhci_run(uhci_softc_t *sc, int run)
+{
 	int s, n, running;
 	u_int16_t cmd;
 	run = run != 0;
 	s = splhardusb();
 	DPRINTF(("uhci_run: setting run=%d\n", run));
 	cmd = UREAD2(sc, UHCI_CMD);
 	if (run)
 		cmd |= UHCI_CMD_RS;
 	else
 		cmd &= ~UHCI_CMD_RS;
 	UHCICMD(sc, cmd);
 	for(n = 0; n < 10; n++) {
 		running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
 		/* return when we've entered the state we want */
 		if (run == running) {
 			splx(s);
 			DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n",
 				 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS)));
 			return (USBD_NORMAL_COMPLETION);
+		}
 		usb_delay_ms(&sc->sc_bus, 1);
+	}
 	splx(s);
 	printf("%s: cannot %s\n", device_xname(sc->sc_dev),
 	       run ? "start" : "stop");
 	return (USBD_IOERROR);
+}
 /*
  * Memory management routines.
  *  uhci_alloc_std allocates TDs
  *  uhci_alloc_sqh allocates QHs
  * These two routines do their own free list management,
  * partly for speed, partly because allocating DMAable memory
  * has page size granularaity so much memory would be wasted if
  * only one TD/QH (32 bytes) was placed in each allocated chunk.
  */
 uhci_soft_td_t *
 uhci_alloc_std(uhci_softc_t *sc)
+{
 	uhci_soft_td_t *std;
 	usbd_status err;
 	int i, offs;
 	usb_dma_t dma;
 	if (sc->sc_freetds == NULL) {
 		DPRINTFN(2,("uhci_alloc_std: allocating chunk\n"));
 		err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK,
 			  UHCI_TD_ALIGN, &dma);
 		if (err)
 			return (0);
 		for(i = 0; i < UHCI_STD_CHUNK; i++) {
 			offs = i * UHCI_STD_SIZE;
 			std = KERNADDR(&dma, offs);
 			std->physaddr = DMAADDR(&dma, offs);
 			std->dma = dma;
 			std->offs = offs;
 			std->link.std = sc->sc_freetds;
 			sc->sc_freetds = std;
+		}
+	}
 	std = sc->sc_freetds;
 	sc->sc_freetds = std->link.std;
 	memset(&std->td, 0, sizeof(uhci_td_t));
 	return std;
+}
 void
 uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std)
+{
 #ifdef DIAGNOSTIC
 #define TD_IS_FREE 0x12345678
 	if (le32toh(std->td.td_token) == TD_IS_FREE) {
 		printf("uhci_free_std: freeing free TD %p\n", std);
 		return;
+	}
 	std->td.td_token = htole32(TD_IS_FREE);
 #endif
 	std->link.std = sc->sc_freetds;
 	sc->sc_freetds = std;
+}
 uhci_soft_qh_t *
 uhci_alloc_sqh(uhci_softc_t *sc)
+{
 	uhci_soft_qh_t *sqh;
 	usbd_status err;
 	int i, offs;
 	usb_dma_t dma;
 	if (sc->sc_freeqhs == NULL) {
 		DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
 		err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK,
 			  UHCI_QH_ALIGN, &dma);
 		if (err)
 			return (0);
 		for(i = 0; i < UHCI_SQH_CHUNK; i++) {
 			offs = i * UHCI_SQH_SIZE;
 			sqh = KERNADDR(&dma, offs);
 			sqh->physaddr = DMAADDR(&dma, offs);
 			sqh->dma = dma;
 			sqh->offs = offs;
 			sqh->hlink = sc->sc_freeqhs;
 			sc->sc_freeqhs = sqh;
+		}
+	}
 	sqh = sc->sc_freeqhs;
 	sc->sc_freeqhs = sqh->hlink;
 	memset(&sqh->qh, 0, sizeof(uhci_qh_t));
 	return (sqh);
+}
 void
 uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
+{
 	sqh->hlink = sc->sc_freeqhs;
 	sc->sc_freeqhs = sqh;
+}
 void
 uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std,
 		    uhci_soft_td_t *stdend)
+{
 	uhci_soft_td_t *p;
 	/*
 	 * to avoid race condition with the controller which may be looking
 	 * at this chain, we need to first invalidate all links, and
 	 * then wait for the controller to move to another queue
 	 */
 	for (p = std; p != stdend; p = p->link.std) {
 		usb_syncmem(&p->dma,
 		    p->offs + offsetof(uhci_td_t, td_link),
 		    sizeof(p->td.td_link),
 		    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
 		if ((p->td.td_link & UHCI_PTR_T) == 0) {
 			p->td.td_link = UHCI_PTR_T;
 			usb_syncmem(&p->dma,
 			    p->offs + offsetof(uhci_td_t, td_link),
 			    sizeof(p->td.td_link),
 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
+		}
+	}
 	delay(UHCI_QH_REMOVE_DELAY);
 	for (; std != stdend; std = p) {
 		p = std->link.std;
 		uhci_free_std(sc, std);
+	}
+}
 usbd_status
 uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len,
 		     int rd, u_int16_t flags, usb_dma_t *dma,
 		     uhci_soft_td_t **sp, uhci_soft_td_t **ep)
+{
 	uhci_soft_td_t *p, *lastp;
 	uhci_physaddr_t lastlink;
 	int i, ntd, l, tog, maxp;
 	u_int32_t status;
 	int addr = upipe->pipe.device->address;
 	int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
 	DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d "
 		      "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len,
 		      upipe->pipe.device->speed, flags));
 	maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize);
 	if (maxp == 0) {
 		printf("uhci_alloc_std_chain: maxp=0\n");
 		return (USBD_INVAL);
+	}
 	ntd = (len + maxp - 1) / maxp;
 	if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0)
 		ntd++;
 	DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd));
 	if (ntd == 0) {
 		*sp = *ep = 0;
 		DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n"));
 		return (USBD_NORMAL_COMPLETION);
+	}
 	tog = upipe->nexttoggle;
 	if (ntd % 2 == 0)
 		tog ^= 1;
 	upipe->nexttoggle = tog ^ 1;
 	lastp = NULL;
 	lastlink = UHCI_PTR_T;
 	ntd--;
 	status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE);
 	if (upipe->pipe.device->speed == USB_SPEED_LOW)
 		status |= UHCI_TD_LS;
 	if (flags & USBD_SHORT_XFER_OK)
 		status |= UHCI_TD_SPD;
 	usb_syncmem(dma, 0, len,
 	    rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
 	for (i = ntd; i >= 0; i--) {
 		p = uhci_alloc_std(sc);
 		if (p == NULL) {
 			KASSERT(lastp != NULL);
 			uhci_free_std_chain(sc, lastp, NULL);
 			return (USBD_NOMEM);
+		}
 		p->link.std = lastp;
 		p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD);
 		lastp = p;
 		lastlink = p->physaddr;
 		p->td.td_status = htole32(status);
 		if (i == ntd) {
 			/* last TD */
 			l = len % maxp;
 			if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER))
 				l = maxp;
 			*ep = p;
 		} else
 			l = maxp;
 		p->td.td_token =
 		    htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) :
 				 UHCI_TD_OUT(l, endpt, addr, tog));
 		p->td.td_buffer = htole32(DMAADDR(dma, i * maxp));
 		usb_syncmem(&p->dma, p->offs, sizeof(p->td),
 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
 		tog ^= 1;
+	}
 	*sp = lastp;
 	DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n",
 		      upipe->nexttoggle));
 	return (USBD_NORMAL_COMPLETION);
+}
 void
 uhci_device_clear_toggle(usbd_pipe_handle pipe)
+{
 	struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
 	upipe->nexttoggle = 0;
+}
 void
 uhci_noop(usbd_pipe_handle pipe)
+{
+}
 usbd_status
 uhci_device_bulk_transfer(usbd_xfer_handle xfer)
+{
 	usbd_status err;
 	/* Insert last in queue. */
 	err = usb_insert_transfer(xfer);
 	if (err)
 		return (err);
 	/*
 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
 	 * so start it first.
 	 */
 	return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
+}
 usbd_status
 uhci_device_bulk_start(usbd_xfer_handle xfer)
+{
 	struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
 	usbd_device_handle dev = upipe->pipe.device;
 	uhci_softc_t *sc = dev->bus->hci_private;
 	uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
 	uhci_soft_td_t *data, *dataend;
 	uhci_soft_qh_t *sqh;
 	usbd_status err;
 	int len, isread, endpt;
 	int s;
 	DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n",
 		     xfer, xfer->length, xfer->flags, ii));
 	if (sc->sc_dying)
 		return (USBD_IOERROR);
 #ifdef DIAGNOSTIC
 	if (xfer->rqflags & URQ_REQUEST)
 		panic("uhci_device_bulk_transfer: a request");
 #endif
 	len = xfer->length;
 	endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
 	sqh = upipe->u.bulk.sqh;
 	upipe->u.bulk.isread = isread;
 	upipe->u.bulk.length = len;
 	err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
 				   &xfer->dmabuf, &data, &dataend);
 	if (err)
 		return (err);