 @@ -1,14 +1,14 @@
-/*	$NetBSD: asp.c,v 1.13 2009/05/08 09:33:57 skrll Exp $	*/
+/*	$NetBSD: asp.c,v 1.14 2009/05/24 06:53:34 skrll Exp $	*/
 /*	$OpenBSD: asp.c,v 1.5 2000/02/09 05:04:22 mickey Exp $	*/
 /*
  * Copyright (c) 1998,1999 Michael Shalayeff
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
 @@ -31,63 +31,63 @@
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 /*
  * References:
+ *
  * 1. Cobra/Coral I/O Subsystem External Reference Specification
  *    Hewlett-Packard
+ *
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: asp.c,v 1.13 2009/05/08 09:33:57 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: asp.c,v 1.14 2009/05/24 06:53:34 skrll Exp $");
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/device.h>
 #include <sys/reboot.h>
 #include <machine/bus.h>
 #include <machine/iomod.h>
 #include <machine/autoconf.h>
 #include <machine/cpufunc.h>
 #include <hp700/hp700/machdep.h>
 #include <hp700/dev/cpudevs.h>
 #include <hp700/dev/viper.h>
 #include <hp700/gsc/gscbusvar.h>
 struct asp_hwr {
-	u_int8_t asp_reset;
+	uint8_t asp_reset;
-	u_int8_t asp_resv[31];
+	uint8_t asp_resv[31];
-	u_int8_t asp_version;
+	uint8_t asp_version;
-	u_int8_t asp_resv1[15];
+	uint8_t asp_resv1[15];
-	u_int8_t asp_scsidsync;
+	uint8_t asp_scsidsync;
-	u_int8_t asp_resv2[15];
+	uint8_t asp_resv2[15];
-	u_int8_t asp_error;
+	uint8_t asp_error;
 };
 struct asp_trs {
-	u_int32_t asp_irr;
+	uint32_t asp_irr;
-	u_int32_t asp_imr;
+	uint32_t asp_imr;
-	u_int32_t asp_ipr;
+	uint32_t asp_ipr;
-	u_int32_t asp_icr;
+	uint32_t asp_icr;
-	u_int32_t asp_iar;
+	uint32_t asp_iar;
-	u_int32_t asp_resv[3];
+	uint32_t asp_resv[3];
-	u_int8_t  asp_cled;
+	uint8_t  asp_cled;
-	u_int8_t  asp_resv1[3];
+	uint8_t  asp_resv1[3];
 	struct {
 		u_int		:20,
 			asp_spu	: 3,	/* SPU ID board jumper */
 #define	ASP_SPUCOBRA	0
 #define	ASP_SPUCORAL	1
 #define	ASP_SPUBUSH	2
 #define	ASP_SPUHARDBALL	3
 #define	ASP_SPUSCORPIO	4
 #define	ASP_SPUCORAL2	5
 			asp_sw	: 1,	/* front switch is normal */
 			asp_clk : 1,	/* SCSI clock is doubled */
 			asp_lan : 2,	/* LAN iface selector */
 #define	ASP_LANINVAL	0

 @@ -1,14 +1,14 @@
-/*	$NetBSD: lasi.c,v 1.13 2009/05/07 15:34:49 skrll Exp $	*/
+/*	$NetBSD: lasi.c,v 1.14 2009/05/24 06:53:34 skrll Exp $	*/
 /*	$OpenBSD: lasi.c,v 1.4 2001/06/09 03:57:19 mickey Exp $	*/
 /*
  * Copyright (c) 1998,1999 Michael Shalayeff
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
 @@ -23,59 +23,59 @@
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: lasi.c,v 1.13 2009/05/07 15:34:49 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: lasi.c,v 1.14 2009/05/24 06:53:34 skrll Exp $");
 #undef LASIDEBUG
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/device.h>
 #include <sys/reboot.h>
 #include <machine/bus.h>
 #include <machine/iomod.h>
 #include <machine/autoconf.h>
 #include <hp700/dev/cpudevs.h>
 #include <hp700/gsc/gscbusvar.h>
 struct lasi_hwr {
-	u_int32_t lasi_power;
+	uint32_t lasi_power;
 #define	LASI_BLINK	0x01
 #define	LASI_OFF	0x02
-	u_int32_t lasi_error;
+	uint32_t lasi_error;
-	u_int32_t lasi_version;
+	uint32_t lasi_version;
-	u_int32_t lasi_reset;
+	uint32_t lasi_reset;
-	u_int32_t lasi_arbmask;
+	uint32_t lasi_arbmask;
 };
 struct lasi_trs {
-	u_int32_t lasi_irr;	/* int requset register */
+	uint32_t lasi_irr;	/* int requset register */
-	u_int32_t lasi_imr;	/* int mask register */
+	uint32_t lasi_imr;	/* int mask register */
-	u_int32_t lasi_ipr;	/* int pending register */
+	uint32_t lasi_ipr;	/* int pending register */
-	u_int32_t lasi_icr;	/* int command? register */
+	uint32_t lasi_icr;	/* int command? register */
-	u_int32_t lasi_iar;	/* int acquire? register */
+	uint32_t lasi_iar;	/* int acquire? register */
 };
 #define	LASI_BANK_SZ	0x200000
 #define	LASI_REG_INT	0x100000
 #define	LASI_REG_MISC	0x10c000
 struct lasi_softc {
 	device_t sc_dev;
 	struct hp700_int_reg sc_int_reg;
 	struct lasi_hwr volatile *sc_hw;
 	struct lasi_trs volatile *sc_trs;

 @@ -1,14 +1,14 @@
-/*	$NetBSD: dino.c,v 1.12 2009/05/11 06:10:30 skrll Exp $ */
+/*	$NetBSD: dino.c,v 1.13 2009/05/24 06:53:34 skrll Exp $ */
 /*	$OpenBSD: dino.c,v 1.5 2004/02/13 20:39:31 mickey Exp $	*/
 /*
  * Copyright (c) 2003 Michael Shalayeff
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
 @@ -19,27 +19,27 @@
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  * THE POSSIBILITY OF SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: dino.c,v 1.12 2009/05/11 06:10:30 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: dino.c,v 1.13 2009/05/24 06:53:34 skrll Exp $");
 /* #include "cardbus.h" */
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/device.h>
 #include <sys/reboot.h>
 #include <sys/malloc.h>
 #include <sys/extent.h>
 #include <machine/iomod.h>
 #include <machine/autoconf.h>
 #include <machine/intr.h>
 @@ -52,68 +52,68 @@ __KERNEL_RCSID(0, "$NetBSD: dino.c,v 1.1
 #include <dev/cardbus/rbus.h>
 #endif
 #include <dev/pci/pcireg.h>
 #include <dev/pci/pcivar.h>
 #include <dev/pci/pcidevs.h>
 #define	DINO_MEM_CHUNK	0x800000
 /* from machdep.c */
 extern struct extent *hp700_io_extent;
 struct dino_regs {
-	u_int32_t	pad0;		/* 0x000 */
+	uint32_t	pad0;		/* 0x000 */
-	u_int32_t	iar0;		/* 0x004 rw intr addr reg 0 */
+	uint32_t	iar0;		/* 0x004 rw intr addr reg 0 */
-	u_int32_t	iodc;		/* 0x008 rw iodc data/addr */
+	uint32_t	iodc;		/* 0x008 rw iodc data/addr */
-	u_int32_t	irr0;		/* 0x00c r  intr req reg 0 */
+	uint32_t	irr0;		/* 0x00c r  intr req reg 0 */
-	u_int32_t	iar1;		/* 0x010 rw intr addr reg 1 */
+	uint32_t	iar1;		/* 0x010 rw intr addr reg 1 */
-	u_int32_t	irr1;		/* 0x014 r  intr req reg 1 */
+	uint32_t	irr1;		/* 0x014 r  intr req reg 1 */
-	u_int32_t	imr;		/* 0x018 rw intr mask reg */
+	uint32_t	imr;		/* 0x018 rw intr mask reg */
-	u_int32_t	ipr;		/* 0x01c rw intr pending reg */
+	uint32_t	ipr;		/* 0x01c rw intr pending reg */
-	u_int32_t	toc_addr;	/* 0x020 rw TOC addr reg */
+	uint32_t	toc_addr;	/* 0x020 rw TOC addr reg */
-	u_int32_t	icr;		/* 0x024 rw intr control reg */
+	uint32_t	icr;		/* 0x024 rw intr control reg */
-	u_int32_t	ilr;		/* 0x028 r  intr level reg */
+	uint32_t	ilr;		/* 0x028 r  intr level reg */
-	u_int32_t	pad1;		/* 0x02c */
+	uint32_t	pad1;		/* 0x02c */
-	u_int32_t	io_command;	/* 0x030  w command register */
+	uint32_t	io_command;	/* 0x030  w command register */
-	u_int32_t	io_status;	/* 0x034 r  status register */
+	uint32_t	io_status;	/* 0x034 r  status register */
-	u_int32_t	io_control;	/* 0x038 rw control register */
+	uint32_t	io_control;	/* 0x038 rw control register */
-	u_int32_t	pad2;		/* 0x03c AUX registers follow */
+	uint32_t	pad2;		/* 0x03c AUX registers follow */
-	u_int32_t	io_gsc_err_addr;/* 0x040 GSC error address */
+	uint32_t	io_gsc_err_addr;/* 0x040 GSC error address */
-	u_int32_t	io_err_info;	/* 0x044 error info register */
+	uint32_t	io_err_info;	/* 0x044 error info register */
-	u_int32_t	io_pci_err_addr;/* 0x048 PCI error address */
+	uint32_t	io_pci_err_addr;/* 0x048 PCI error address */
-	u_int32_t	pad3[4];	/* 0x04c */
+	uint32_t	pad3[4];	/* 0x04c */
-	u_int32_t	io_fbb_en;	/* 0x05c fast back2back enable reg */
+	uint32_t	io_fbb_en;	/* 0x05c fast back2back enable reg */
-	u_int32_t	io_addr_en;	/* 0x060 address enable reg */
+	uint32_t	io_addr_en;	/* 0x060 address enable reg */
-	u_int32_t	pci_addr;	/* 0x064 PCI conf/io/mem addr reg */
+	uint32_t	pci_addr;	/* 0x064 PCI conf/io/mem addr reg */
-	u_int32_t	pci_conf_data;	/* 0x068 PCI conf data reg */
+	uint32_t	pci_conf_data;	/* 0x068 PCI conf data reg */
-	u_int32_t	pci_io_data;	/* 0x06c PCI io data reg */
+	uint32_t	pci_io_data;	/* 0x06c PCI io data reg */
-	u_int32_t	pci_mem_data;	/* 0x070 PCI memory data reg */
+	uint32_t	pci_mem_data;	/* 0x070 PCI memory data reg */
-	u_int32_t	pad4[0x740/4];	/* 0x074 */
+	uint32_t	pad4[0x740/4];	/* 0x074 */
-	u_int32_t	gsc2x_config;	/* 0x7b4 GSC2X config reg */
+	uint32_t	gsc2x_config;	/* 0x7b4 GSC2X config reg */
-	u_int32_t	pad5[0x48/4];	/* 0x7b8: BSRS registers follow */
+	uint32_t	pad5[0x48/4];	/* 0x7b8: BSRS registers follow */
-	u_int32_t	gmask;		/* 0x800 GSC arbitration mask */
+	uint32_t	gmask;		/* 0x800 GSC arbitration mask */
-	u_int32_t	pamr;		/* 0x804 PCI arbitration mask */
+	uint32_t	pamr;		/* 0x804 PCI arbitration mask */
-	u_int32_t	papr;		/* 0x808 PCI arbitration priority */
+	uint32_t	papr;		/* 0x808 PCI arbitration priority */
-	u_int32_t	damode;		/* 0x80c PCI arbitration mode */
+	uint32_t	damode;		/* 0x80c PCI arbitration mode */
-	u_int32_t	pcicmd;		/* 0x810 PCI command register */
+	uint32_t	pcicmd;		/* 0x810 PCI command register */
-	u_int32_t	pcists;		/* 0x814 PCI status register */
+	uint32_t	pcists;		/* 0x814 PCI status register */
-	u_int32_t	pad6;		/* 0x818 */
+	uint32_t	pad6;		/* 0x818 */
-	u_int32_t	mltim;		/* 0x81c PCI master latency timer */
+	uint32_t	mltim;		/* 0x81c PCI master latency timer */
-	u_int32_t	brdg_feat;	/* 0x820 PCI bridge feature enable */
+	uint32_t	brdg_feat;	/* 0x820 PCI bridge feature enable */
-	u_int32_t	pciror;		/* 0x824 PCI read optimization reg */
+	uint32_t	pciror;		/* 0x824 PCI read optimization reg */
-	u_int32_t	pciwor;		/* 0x828 PCI write optimization reg */
+	uint32_t	pciwor;		/* 0x828 PCI write optimization reg */
-	u_int32_t	pad7;		/* 0x82c */
+	uint32_t	pad7;		/* 0x82c */
-	u_int32_t	tltim;		/* 0x830 PCI target latency reg */
+	uint32_t	tltim;		/* 0x830 PCI target latency reg */
 };
 struct dino_softc {
 	device_t sc_dv;
 	int sc_ver;
 	void *sc_ih;
 	struct hp700_int_reg sc_int_reg;
 	bus_space_tag_t sc_bt;
 	bus_space_handle_t sc_bh;
 	bus_space_handle_t sc_memh;
 	bus_dma_tag_t sc_dmat;
 	volatile struct dino_regs *sc_regs;
 @@ -151,90 +151,90 @@ void dino_intr_disestablish(void *, void
 void *dino_alloc_parent(device_t, struct pci_attach_args *, int);
 int dino_iomap(void *, bus_addr_t, bus_size_t, int, bus_space_handle_t *);
 int dino_memmap(void *, bus_addr_t, bus_size_t, int, bus_space_handle_t *);
 int dino_subregion(void *, bus_space_handle_t, bus_size_t, bus_size_t,
     bus_space_handle_t *);
 int dino_ioalloc(void *, bus_addr_t, bus_addr_t, bus_size_t,
     bus_size_t, bus_size_t, int, bus_addr_t *, bus_space_handle_t *);
 int dino_memalloc(void *, bus_addr_t, bus_addr_t, bus_size_t, bus_size_t,
     bus_size_t, int, bus_addr_t *, bus_space_handle_t *);
 void dino_unmap(void *, bus_space_handle_t, bus_size_t);
 void dino_free(void *, bus_space_handle_t, bus_size_t);
 void dino_barrier(void *, bus_space_handle_t, bus_size_t, bus_size_t, int);
 void *dino_vaddr(void *, bus_space_handle_t);
-u_int8_t dino_r1(void *, bus_space_handle_t, bus_size_t);
+uint8_t dino_r1(void *, bus_space_handle_t, bus_size_t);
-u_int16_t dino_r2(void *, bus_space_handle_t, bus_size_t);
+uint16_t dino_r2(void *, bus_space_handle_t, bus_size_t);
-u_int32_t dino_r4(void *, bus_space_handle_t, bus_size_t);
+uint32_t dino_r4(void *, bus_space_handle_t, bus_size_t);
-u_int64_t dino_r8(void *, bus_space_handle_t, bus_size_t);
+uint64_t dino_r8(void *, bus_space_handle_t, bus_size_t);
-void dino_w1(void *, bus_space_handle_t, bus_size_t, u_int8_t);
+void dino_w1(void *, bus_space_handle_t, bus_size_t, uint8_t);
-void dino_w2(void *, bus_space_handle_t, bus_size_t, u_int16_t);
+void dino_w2(void *, bus_space_handle_t, bus_size_t, uint16_t);
-void dino_w4(void *, bus_space_handle_t, bus_size_t, u_int32_t);
+void dino_w4(void *, bus_space_handle_t, bus_size_t, uint32_t);
-void dino_w8(void *, bus_space_handle_t, bus_size_t, u_int64_t);
+void dino_w8(void *, bus_space_handle_t, bus_size_t, uint64_t);
-void dino_rm_1(void *, bus_space_handle_t, bus_size_t, u_int8_t *, bus_size_t);
+void dino_rm_1(void *, bus_space_handle_t, bus_size_t, uint8_t *, bus_size_t);
-void dino_rm_2(void *, bus_space_handle_t, bus_size_t, u_int16_t *, bus_size_t);
+void dino_rm_2(void *, bus_space_handle_t, bus_size_t, uint16_t *, bus_size_t);
-void dino_rm_4(void *, bus_space_handle_t, bus_size_t, u_int32_t *, bus_size_t);
+void dino_rm_4(void *, bus_space_handle_t, bus_size_t, uint32_t *, bus_size_t);
-void dino_rm_8(void *, bus_space_handle_t, bus_size_t, u_int64_t *, bus_size_t);
+void dino_rm_8(void *, bus_space_handle_t, bus_size_t, uint64_t *, bus_size_t);
-void dino_wm_1(void *, bus_space_handle_t, bus_size_t, const u_int8_t *,
+void dino_wm_1(void *, bus_space_handle_t, bus_size_t, const uint8_t *,
     bus_size_t);
-void dino_wm_2(void *, bus_space_handle_t, bus_size_t, const u_int16_t *,
+void dino_wm_2(void *, bus_space_handle_t, bus_size_t, const uint16_t *,
     bus_size_t);
-void dino_wm_4(void *, bus_space_handle_t, bus_size_t, const u_int32_t *,
+void dino_wm_4(void *, bus_space_handle_t, bus_size_t, const uint32_t *,
     bus_size_t);
-void dino_wm_8(void *, bus_space_handle_t, bus_size_t, const u_int64_t *,
+void dino_wm_8(void *, bus_space_handle_t, bus_size_t, const uint64_t *,
     bus_size_t);
-void dino_sm_1(void *, bus_space_handle_t, bus_size_t, u_int8_t, bus_size_t);
+void dino_sm_1(void *, bus_space_handle_t, bus_size_t, uint8_t, bus_size_t);
-void dino_sm_2(void *, bus_space_handle_t, bus_size_t, u_int16_t, bus_size_t);
+void dino_sm_2(void *, bus_space_handle_t, bus_size_t, uint16_t, bus_size_t);
-void dino_sm_4(void *, bus_space_handle_t, bus_size_t, u_int32_t, bus_size_t);
+void dino_sm_4(void *, bus_space_handle_t, bus_size_t, uint32_t, bus_size_t);
-void dino_sm_8(void *, bus_space_handle_t, bus_size_t, u_int64_t, bus_size_t);
+void dino_sm_8(void *, bus_space_handle_t, bus_size_t, uint64_t, bus_size_t);
-void dino_rrm_2(void *, bus_space_handle_t, bus_size_t, u_int16_t *,
+void dino_rrm_2(void *, bus_space_handle_t, bus_size_t, uint16_t *,
     bus_size_t);
-void dino_rrm_4(void *, bus_space_handle_t, bus_size_t, u_int32_t *,
+void dino_rrm_4(void *, bus_space_handle_t, bus_size_t, uint32_t *,
     bus_size_t);
-void dino_rrm_8(void *, bus_space_handle_t, bus_size_t, u_int64_t *,
+void dino_rrm_8(void *, bus_space_handle_t, bus_size_t, uint64_t *,
     bus_size_t);
-void dino_wrm_2(void *, bus_space_handle_t, bus_size_t, const u_int16_t *,
+void dino_wrm_2(void *, bus_space_handle_t, bus_size_t, const uint16_t *,
     bus_size_t);
-void dino_wrm_4(void *, bus_space_handle_t, bus_size_t, const u_int32_t *,
+void dino_wrm_4(void *, bus_space_handle_t, bus_size_t, const uint32_t *,
     bus_size_t);
-void dino_wrm_8(void *, bus_space_handle_t, bus_size_t, const u_int64_t *,
+void dino_wrm_8(void *, bus_space_handle_t, bus_size_t, const uint64_t *,
     bus_size_t);
-void dino_rr_1(void *, bus_space_handle_t, bus_size_t, u_int8_t *, bus_size_t);
+void dino_rr_1(void *, bus_space_handle_t, bus_size_t, uint8_t *, bus_size_t);
-void dino_rr_2(void *, bus_space_handle_t, bus_size_t, u_int16_t *, bus_size_t);
+void dino_rr_2(void *, bus_space_handle_t, bus_size_t, uint16_t *, bus_size_t);
-void dino_rr_4(void *, bus_space_handle_t, bus_size_t, u_int32_t *, bus_size_t);
+void dino_rr_4(void *, bus_space_handle_t, bus_size_t, uint32_t *, bus_size_t);
-void dino_rr_8(void *, bus_space_handle_t, bus_size_t, u_int64_t *, bus_size_t);
+void dino_rr_8(void *, bus_space_handle_t, bus_size_t, uint64_t *, bus_size_t);
-void dino_wr_1(void *, bus_space_handle_t, bus_size_t, const u_int8_t *,
+void dino_wr_1(void *, bus_space_handle_t, bus_size_t, const uint8_t *,
     bus_size_t);
-void dino_wr_2(void *, bus_space_handle_t, bus_size_t, const u_int16_t *,
+void dino_wr_2(void *, bus_space_handle_t, bus_size_t, const uint16_t *,
     bus_size_t);
-void dino_wr_4(void *, bus_space_handle_t, bus_size_t, const u_int32_t *,
+void dino_wr_4(void *, bus_space_handle_t, bus_size_t, const uint32_t *,
     bus_size_t);
-void dino_wr_8(void *, bus_space_handle_t, bus_size_t, const u_int64_t *,
+void dino_wr_8(void *, bus_space_handle_t, bus_size_t, const uint64_t *,
     bus_size_t);
-void dino_rrr_2(void *, bus_space_handle_t, bus_size_t, u_int16_t *,
+void dino_rrr_2(void *, bus_space_handle_t, bus_size_t, uint16_t *,
     bus_size_t);
-void dino_rrr_4(void *, bus_space_handle_t, bus_size_t, u_int32_t *,
+void dino_rrr_4(void *, bus_space_handle_t, bus_size_t, uint32_t *,
     bus_size_t);
-void dino_rrr_8(void *, bus_space_handle_t, bus_size_t, u_int64_t *,
+void dino_rrr_8(void *, bus_space_handle_t, bus_size_t, uint64_t *,
     bus_size_t);
-void dino_wrr_2(void *, bus_space_handle_t, bus_size_t, const u_int16_t *,
+void dino_wrr_2(void *, bus_space_handle_t, bus_size_t, const uint16_t *,
     bus_size_t);
-void dino_wrr_4(void *, bus_space_handle_t, bus_size_t, const u_int32_t *,
+void dino_wrr_4(void *, bus_space_handle_t, bus_size_t, const uint32_t *,
     bus_size_t);
-void dino_wrr_8(void *, bus_space_handle_t, bus_size_t, const u_int64_t *,
+void dino_wrr_8(void *, bus_space_handle_t, bus_size_t, const uint64_t *,
     bus_size_t);
-void dino_sr_1(void *, bus_space_handle_t, bus_size_t, u_int8_t, bus_size_t);
+void dino_sr_1(void *, bus_space_handle_t, bus_size_t, uint8_t, bus_size_t);
-void dino_sr_2(void *, bus_space_handle_t, bus_size_t, u_int16_t, bus_size_t);
+void dino_sr_2(void *, bus_space_handle_t, bus_size_t, uint16_t, bus_size_t);
-void dino_sr_4(void *, bus_space_handle_t, bus_size_t, u_int32_t, bus_size_t);
+void dino_sr_4(void *, bus_space_handle_t, bus_size_t, uint32_t, bus_size_t);
-void dino_sr_8(void *, bus_space_handle_t, bus_size_t, u_int64_t, bus_size_t);
+void dino_sr_8(void *, bus_space_handle_t, bus_size_t, uint64_t, bus_size_t);
 void dino_cp_1(void *, bus_space_handle_t, bus_size_t, bus_space_handle_t,
     bus_size_t, bus_size_t);
 void dino_cp_2(void *, bus_space_handle_t, bus_size_t, bus_space_handle_t,
     bus_size_t, bus_size_t);
 void dino_cp_4(void *, bus_space_handle_t, bus_size_t, bus_space_handle_t,
     bus_size_t, bus_size_t);
 void dino_cp_8(void *, bus_space_handle_t, bus_size_t, bus_space_handle_t,
     bus_size_t, bus_size_t);
 int dino_dmamap_create(void *, bus_size_t, int, bus_size_t, bus_size_t, int,
     bus_dmamap_t *);
 void dino_dmamap_destroy(void *, bus_dmamap_t);
 int dino_dmamap_load(void *, bus_dmamap_t, void *, bus_size_t, struct proc *,
     int);
 @@ -435,27 +435,27 @@ dino_iomap(void *v, bus_addr_t bpa, bus_
 	if (bshp)
 		*bshp = bpa;
 	return 0;
+}
 int
 dino_memmap(void *v, bus_addr_t bpa, bus_size_t size,
     int flags, bus_space_handle_t *bshp)
+{
 	struct dino_softc *sc = v;
 	volatile struct dino_regs *r = sc->sc_regs;
-	u_int32_t reg;
+	uint32_t reg;
 	int error;
 	reg = r->io_addr_en;
 	reg |= 1 << ((bpa >> 23) & 0x1f);
 #ifdef DEBUG
 	if (reg & 0x80000001)
 		panic("mapping outside the mem extent range");
 #endif
 	if ((error = bus_space_map(sc->sc_bt, bpa, size, flags, bshp)))
 		return error;
 	++sc->sc_memrefcount[((bpa >> 23) & 0x1f)];
 	/* map into the upper bus space, if not yet mapped this 8M */
 	if (reg != r->io_addr_en)
 @@ -493,27 +493,27 @@ dino_ioalloc(void *v, bus_addr_t rstart,
 	if (bshp)
 		*bshp = bpa;
 	return 0;
+}
 int
 dino_memalloc(void *v, bus_addr_t rstart, bus_addr_t rend, bus_size_t size,
     bus_size_t align, bus_size_t boundary, int flags, bus_addr_t *addrp,
     bus_space_handle_t *bshp)
+{
 	struct dino_softc *sc = v;
 	volatile struct dino_regs *r = sc->sc_regs;
-	u_int32_t reg;
+	uint32_t reg;
 	int i, error;
 	/*
 	 * Allow allocation only when PCI MEM is already maped.
 	 * Needed to avoid allocation of I/O space used by devices that
 	 * have no driver in the current kernel.
 	 * Dino can map PCI MEM in the range 0xf0800000..0xff800000 only.
 	 */
 	reg = r->io_addr_en;
 	if (rstart < 0xf0800000 || rend >= 0xff800000 || reg == 0)
 		return -1;
 	/* Find used PCI MEM and narrow allocateble region down to it. */
 	for (i = 1; i < 31; i++)
 @@ -559,807 +559,807 @@ void
 dino_barrier(void *v, bus_space_handle_t h, bus_size_t o, bus_size_t l, int op)
+{
 	sync_caches();
+}
 void*
 dino_vaddr(void *v, bus_space_handle_t h)
+{
 	struct dino_softc *sc = v;
 	return bus_space_vaddr(sc->sc_bt, h);
+}
-u_int8_t
+uint8_t
 dino_r1(void *v, bus_space_handle_t h, bus_size_t o)
+{
 	h += o;
 	if (h & 0xf0000000)
-		return *(volatile u_int8_t *)h;
+		return *(volatile uint8_t *)h;
 	else {
 		struct dino_softc *sc = v;
 		volatile struct dino_regs *r = sc->sc_regs;
 		r->pci_addr = h & ~3;
-		return *((volatile u_int8_t *)&r->pci_io_data + (h & 3));
+		return *((volatile uint8_t *)&r->pci_io_data + (h & 3));
+	}
+}
-u_int16_t
+uint16_t
 dino_r2(void *v, bus_space_handle_t h, bus_size_t o)
+{
-	volatile u_int16_t *p;
+	volatile uint16_t *p;
-	volatile u_int16_t d;
+	volatile uint16_t d;
 	h += o;
 	if (h & 0xf0000000) {
-		p = (volatile u_int16_t *)h;
+		p = (volatile uint16_t *)h;
 		d = le16toh(*p);
 	} else {
 		struct dino_softc *sc = v;
 		volatile struct dino_regs *r = sc->sc_regs;
 		r->pci_addr = h & ~3;
-		p = (volatile u_int16_t *)&r->pci_io_data;
+		p = (volatile uint16_t *)&r->pci_io_data;
 		if (h & 2)
 			p++;
 		d = le16toh(*p);
+	}
 	return d;
+}
-u_int32_t
+uint32_t
 dino_r4(void *v, bus_space_handle_t h, bus_size_t o)
+{
-	u_int32_t data;
+	uint32_t data;
 	h += o;
 	if (h & 0xf0000000)
-		data = *(volatile u_int32_t *)h;
+		data = *(volatile uint32_t *)h;
 	else {
 		struct dino_softc *sc = v;
 		volatile struct dino_regs *r = sc->sc_regs;
 		r->pci_addr = h;
 		data = r->pci_io_data;
+	}
 	return le32toh(data);
+}
-u_int64_t
+uint64_t
 dino_r8(void *v, bus_space_handle_t h, bus_size_t o)
+{
 	h += o;
 	if (h & 0xf0000000)
-		return *(volatile u_int64_t *)h;
+		return *(volatile uint64_t *)h;
 	else
 		panic("dino_r8: not implemented");
+}
 void
-dino_w1(void *v, bus_space_handle_t h, bus_size_t o, u_int8_t vv)
+dino_w1(void *v, bus_space_handle_t h, bus_size_t o, uint8_t vv)
+{
 	h += o;
 	if (h & 0xf0000000)
-		*(volatile u_int8_t *)h = vv;
+		*(volatile uint8_t *)h = vv;
 	else {
 		struct dino_softc *sc = v;
 		volatile struct dino_regs *r = sc->sc_regs;
 		r->pci_addr = h & ~3;
-		*((volatile u_int8_t *)&r->pci_io_data + (h & 3)) = vv;
+		*((volatile uint8_t *)&r->pci_io_data + (h & 3)) = vv;
+	}
+}
 void
-dino_w2(void *v, bus_space_handle_t h, bus_size_t o, u_int16_t vv)
+dino_w2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t vv)
+{
-	volatile u_int16_t *p;
+	volatile uint16_t *p;
 	h += o;
 	if (h & 0xf0000000)
-		p = (volatile u_int16_t *)h;
+		p = (volatile uint16_t *)h;
 	else {
 		struct dino_softc *sc = v;
 		volatile struct dino_regs *r = sc->sc_regs;
 		r->pci_addr = h & ~3;
-		p = (volatile u_int16_t *)&r->pci_io_data;
+		p = (volatile uint16_t *)&r->pci_io_data;
 		if (h & 2)
 			p++;
+	}
 	*p = htole16(vv);
+}
 void
-dino_w4(void *v, bus_space_handle_t h, bus_size_t o, u_int32_t vv)
+dino_w4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t vv)
+{
 	h += o;
 	vv = htole32(vv);
 	if (h & 0xf0000000)
-		*(volatile u_int32_t *)h = vv;
+		*(volatile uint32_t *)h = vv;
 	else {
 		struct dino_softc *sc = v;
 		volatile struct dino_regs *r = sc->sc_regs;
 		r->pci_addr = h;
 		r->pci_io_data = vv;
+	}
+}
 void
-dino_w8(void *v, bus_space_handle_t h, bus_size_t o, u_int64_t vv)
+dino_w8(void *v, bus_space_handle_t h, bus_size_t o, uint64_t vv)
+{
 	h += o;
 	if (h & 0xf0000000)
-		*(volatile u_int64_t *)h = vv;
+		*(volatile uint64_t *)h = vv;
 	else
 		panic("dino_w8: not implemented");
+}
 void
-dino_rm_1(void *v, bus_space_handle_t h, bus_size_t o, u_int8_t *a, bus_size_t c)
+dino_rm_1(void *v, bus_space_handle_t h, bus_size_t o, uint8_t *a, bus_size_t c)
+{
-	volatile u_int8_t *p;
+	volatile uint8_t *p;
 	h += o;
 	if (h & 0xf0000000)
-		p = (volatile u_int8_t *)h;
+		p = (volatile uint8_t *)h;
 	else {
 		struct dino_softc *sc = v;
 		volatile struct dino_regs *r = sc->sc_regs;
 		r->pci_addr = h & ~3;
-		p = (volatile u_int8_t *)&r->pci_io_data + (h & 3);
+		p = (volatile uint8_t *)&r->pci_io_data + (h & 3);
+	}
 	while (c--)
 		*a++ = *p;
+}
 void
-dino_rm_2(void *v, bus_space_handle_t h, bus_size_t o, u_int16_t *a, bus_size_t c)
+dino_rm_2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t *a, bus_size_t c)
+{
-	volatile u_int16_t *p;
+	volatile uint16_t *p;
 	h += o;
 	if (h & 0xf0000000)
-		p = (volatile u_int16_t *)h;
+		p = (volatile uint16_t *)h;
 	else {
 		struct dino_softc *sc = v;
 		volatile struct dino_regs *r = sc->sc_regs;
 		r->pci_addr = h & ~3;
-		p = (volatile u_int16_t *)&r->pci_io_data;
+		p = (volatile uint16_t *)&r->pci_io_data;
 		if (h & 2)
 			p++;
+	}
 	while (c--)
 		*a++ = le16toh(*p);
+}
 void
-dino_rm_4(void *v, bus_space_handle_t h, bus_size_t o, u_int32_t *a, bus_size_t c)
+dino_rm_4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t *a, bus_size_t c)
+{
-	volatile u_int32_t *p;
+	volatile uint32_t *p;
 	h += o;
 	if (h & 0xf0000000)
-		p = (volatile u_int32_t *)h;
+		p = (volatile uint32_t *)h;
 	else {
 		struct dino_softc *sc = v;
 		volatile struct dino_regs *r = sc->sc_regs;
 		r->pci_addr = h;
-		p = (volatile u_int32_t *)&r->pci_io_data;
+		p = (volatile uint32_t *)&r->pci_io_data;
+	}
 	while (c--)
 		*a++ = le32toh(*p);
+}
 void
-dino_rm_8(void *v, bus_space_handle_t h, bus_size_t o, u_int64_t *a, bus_size_t c)
+dino_rm_8(void *v, bus_space_handle_t h, bus_size_t o, uint64_t *a, bus_size_t c)
+{
 	panic("dino_rm_8: not implemented");
+}
 void
-dino_wm_1(void *v, bus_space_handle_t h, bus_size_t o, const u_int8_t *a, bus_size_t c)
+dino_wm_1(void *v, bus_space_handle_t h, bus_size_t o, const uint8_t *a, bus_size_t c)
+{
-	volatile u_int8_t *p;
+	volatile uint8_t *p;
 	h += o;
 	if (h & 0xf0000000)
-		p = (volatile u_int8_t *)h;
+		p = (volatile uint8_t *)h;
 	else {
 		struct dino_softc *sc = v;
 		volatile struct dino_regs *r = sc->sc_regs;
 		r->pci_addr = h & ~3;
-		p = (volatile u_int8_t *)&r->pci_io_data + (h & 3);
+		p = (volatile uint8_t *)&r->pci_io_data + (h & 3);
+	}
 	while (c--)
 		*p = *a++;
+}
 void
-dino_wm_2(void *v, bus_space_handle_t h, bus_size_t o, const u_int16_t *a, bus_size_t c)
+dino_wm_2(void *v, bus_space_handle_t h, bus_size_t o, const uint16_t *a, bus_size_t c)
+{
-	volatile u_int16_t *p;
+	volatile uint16_t *p;
 	h += o;
 	if (h & 0xf0000000)
-		p = (volatile u_int16_t *)h;
+		p = (volatile uint16_t *)h;
 	else {
 		struct dino_softc *sc = v;
 		volatile struct dino_regs *r = sc->sc_regs;
 		r->pci_addr = h & ~3;
-		p = (volatile u_int16_t *)&r->pci_io_data;
+		p = (volatile uint16_t *)&r->pci_io_data;
 		if (h & 2)
 			p++;
+	}
 	while (c--)
 		*p = htole16(*a++);
+}
 void
-dino_wm_4(void *v, bus_space_handle_t h, bus_size_t o, const u_int32_t *a, bus_size_t c)
+dino_wm_4(void *v, bus_space_handle_t h, bus_size_t o, const uint32_t *a, bus_size_t c)
+{
-	volatile u_int32_t *p;
+	volatile uint32_t *p;
 	h += o;
 	if (h & 0xf0000000)
-		p = (volatile u_int32_t *)h;
+		p = (volatile uint32_t *)h;
 	else {
 		struct dino_softc *sc = v;
 		volatile struct dino_regs *r = sc->sc_regs;
 		r->pci_addr = h;
-		p = (volatile u_int32_t *)&r->pci_io_data;
+		p = (volatile uint32_t *)&r->pci_io_data;
+	}
 	while (c--)
 		*p = htole32(*a++);
+}
 void
-dino_wm_8(void *v, bus_space_handle_t h, bus_size_t o, const u_int64_t *a, bus_size_t c)
+dino_wm_8(void *v, bus_space_handle_t h, bus_size_t o, const uint64_t *a, bus_size_t c)
+{
 	panic("dino_wm_8: not implemented");
+}
 void
-dino_sm_1(void *v, bus_space_handle_t h, bus_size_t o, u_int8_t vv, bus_size_t c)
+dino_sm_1(void *v, bus_space_handle_t h, bus_size_t o, uint8_t vv, bus_size_t c)
+{
-	volatile u_int8_t *p;
+	volatile uint8_t *p;
 	h += o;
 	if (h & 0xf0000000)
-		p = (volatile u_int8_t *)h;
+		p = (volatile uint8_t *)h;
 	else {
 		struct dino_softc *sc = v;
 		volatile struct dino_regs *r = sc->sc_regs;
 		r->pci_addr = h & ~3;
-		p = (volatile u_int8_t *)&r->pci_io_data + (h & 3);
+		p = (volatile uint8_t *)&r->pci_io_data + (h & 3);
+	}
 	while (c--)
 		*p = vv;
+}
 void
-dino_sm_2(void *v, bus_space_handle_t h, bus_size_t o, u_int16_t vv, bus_size_t c)
+dino_sm_2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t vv, bus_size_t c)
+{
-	volatile u_int16_t *p;
+	volatile uint16_t *p;
 	h += o;
 	if (h & 0xf0000000)
-		p = (volatile u_int16_t *)h;
+		p = (volatile uint16_t *)h;
 	else {
 		struct dino_softc *sc = v;
 		volatile struct dino_regs *r = sc->sc_regs;
 		r->pci_addr = h & ~3;
-		p = (volatile u_int16_t *)&r->pci_io_data;
+		p = (volatile uint16_t *)&r->pci_io_data;
 		if (h & 2)
 			p++;
+	}
 	while (c--)
 		*p = htole16(vv);
+}
 void
-dino_sm_4(void *v, bus_space_handle_t h, bus_size_t o, u_int32_t vv, bus_size_t c)
+dino_sm_4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t vv, bus_size_t c)
+{
-	volatile u_int32_t *p;
+	volatile uint32_t *p;
 	h += o;
 	if (h & 0xf0000000)
-		p = (volatile u_int32_t *)h;
+		p = (volatile uint32_t *)h;
 	else {
 		struct dino_softc *sc = v;
 		volatile struct dino_regs *r = sc->sc_regs;
 		r->pci_addr = h;
-		p = (volatile u_int32_t *)&r->pci_io_data;
+		p = (volatile uint32_t *)&r->pci_io_data;
+	}
 	while (c--)
 		*p = htole32(vv);
+}
 void
-dino_sm_8(void *v, bus_space_handle_t h, bus_size_t o, u_int64_t vv, bus_size_t c)
+dino_sm_8(void *v, bus_space_handle_t h, bus_size_t o, uint64_t vv, bus_size_t c)
+{
 	panic("dino_sm_8: not implemented");
+}
 void
 dino_rrm_2(void *v, bus_space_handle_t h, bus_size_t o,
-    u_int16_t *a, bus_size_t c)
+    uint16_t *a, bus_size_t c)
+{
-	volatile u_int16_t *p;
+	volatile uint16_t *p;
 	h += o;
 	if (h & 0xf0000000)
-		p = (volatile u_int16_t *)h;
+		p = (volatile uint16_t *)h;
 	else {
 		struct dino_softc *sc = v;
 		volatile struct dino_regs *r = sc->sc_regs;
 		r->pci_addr = h & ~3;
-		p = (volatile u_int16_t *)&r->pci_io_data;
+		p = (volatile uint16_t *)&r->pci_io_data;
 		if (h & 2)
 			p++;
+	}
 	while (c--)
 		*a++ = *p;
+}
 void
 dino_rrm_4(void *v, bus_space_handle_t h, bus_size_t o,
-    u_int32_t *a, bus_size_t c)
+    uint32_t *a, bus_size_t c)
+{
-	volatile u_int32_t *p;
+	volatile uint32_t *p;
 	h += o;
 	if (h & 0xf0000000)
-		p = (volatile u_int32_t *)h;
+		p = (volatile uint32_t *)h;
 	else {
 		struct dino_softc *sc = v;
 		volatile struct dino_regs *r = sc->sc_regs;
 		r->pci_addr = h;
-		p = (volatile u_int32_t *)&r->pci_io_data;
+		p = (volatile uint32_t *)&r->pci_io_data;
+	}
 	while (c--)
 		*a++ = *p;
+}
 void
 dino_rrm_8(void *v, bus_space_handle_t h, bus_size_t o,
-    u_int64_t *a, bus_size_t c)
+    uint64_t *a, bus_size_t c)
+{
 	panic("dino_rrm_8: not implemented");
+}
 void
 dino_wrm_2(void *v, bus_space_handle_t h, bus_size_t o,
-    const u_int16_t *a, bus_size_t c)
+    const uint16_t *a, bus_size_t c)
+{
-	volatile u_int16_t *p;
+	volatile uint16_t *p;
 	h += o;
 	if (h & 0xf0000000)
-		p = (volatile u_int16_t *)h;
+		p = (volatile uint16_t *)h;
 	else {
 		struct dino_softc *sc = v;
 		volatile struct dino_regs *r = sc->sc_regs;
 		r->pci_addr = h & ~3;
-		p = (volatile u_int16_t *)&r->pci_io_data;
+		p = (volatile uint16_t *)&r->pci_io_data;
 		if (h & 2)
 			p++;
+	}
 	while (c--)
 		*p = *a++;
+}
 void
 dino_wrm_4(void *v, bus_space_handle_t h, bus_size_t o,
-    const u_int32_t *a, bus_size_t c)
+    const uint32_t *a, bus_size_t c)
+{
-	volatile u_int32_t *p;
+	volatile uint32_t *p;
 	h += o;
 	if (h & 0xf0000000)
-		p = (volatile u_int32_t *)h;
+		p = (volatile uint32_t *)h;
 	else {
 		struct dino_softc *sc = v;
 		volatile struct dino_regs *r = sc->sc_regs;
 		r->pci_addr = h;
-		p = (volatile u_int32_t *)&r->pci_io_data;
+		p = (volatile uint32_t *)&r->pci_io_data;
+	}
 	while (c--)
 		*p = *a++;
+}
 void
 dino_wrm_8(void *v, bus_space_handle_t h, bus_size_t o,
-    const u_int64_t *a, bus_size_t c)
+    const uint64_t *a, bus_size_t c)
+{
 	panic("dino_wrm_8: not implemented");
+}
 void
-dino_rr_1(void *v, bus_space_handle_t h, bus_size_t o, u_int8_t *a, bus_size_t c)
+dino_rr_1(void *v, bus_space_handle_t h, bus_size_t o, uint8_t *a, bus_size_t c)
+{
-	volatile u_int8_t *p;
+	volatile uint8_t *p;
 	h += o;
 	if (h & 0xf0000000) {
-		p = (volatile u_int8_t *)h;
+		p = (volatile uint8_t *)h;
 		while (c--)
 			*a++ = *p++;
 	} else {
 		struct dino_softc *sc = v;
 		volatile struct dino_regs *r = sc->sc_regs;
 		r->pci_addr = h & ~3;
 		while (c--) {
-			p = (volatile u_int8_t *)&r->pci_io_data + (h & 3);
+			p = (volatile uint8_t *)&r->pci_io_data + (h & 3);
 			*a++ = *p;
 			if (!(++h & 3))
 				r->pci_addr = h;
+		}
+	}
+}
 void
-dino_rr_2(void *v, bus_space_handle_t h, bus_size_t o, u_int16_t *a, bus_size_t c)
+dino_rr_2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t *a, bus_size_t c)
+{
-	volatile u_int16_t *p;
+	volatile uint16_t *p;
 	h += o;
 	if (h & 0xf0000000) {
-		p = (volatile u_int16_t *)h;
+		p = (volatile uint16_t *)h;
 		while (c--)
 			*a++ = le16toh(*p++);
 	} else {
 		struct dino_softc *sc = v;
 		volatile struct dino_regs *r = sc->sc_regs;
 		r->pci_addr = h & ~3;
 		while (c--) {
-			p = (volatile u_int16_t *)&r->pci_io_data;
+			p = (volatile uint16_t *)&r->pci_io_data;
 			if (h & 2)
 				p++;
 			*a++ = le16toh(*p);
 			h += 2;
 			if (!(h & 2))
 				r->pci_addr = h;
+		}
+	}
+}
 void
-dino_rr_4(void *v, bus_space_handle_t h, bus_size_t o, u_int32_t *a, bus_size_t c)
+dino_rr_4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t *a, bus_size_t c)
+{
-	volatile u_int32_t *p;
+	volatile uint32_t *p;
 	h += o;
 	if (h & 0xf0000000) {
-		p = (volatile u_int32_t *)h;
+		p = (volatile uint32_t *)h;
 		while (c--)
 			*a++ = le32toh(*p++);
 	} else {
 		struct dino_softc *sc = v;
 		volatile struct dino_regs *r = sc->sc_regs;
 		for (; c--; h += 4) {
 			r->pci_addr = h;
 			*a++ = le32toh(r->pci_io_data);
+		}
+	}
+}
 void
-dino_rr_8(void *v, bus_space_handle_t h, bus_size_t o, u_int64_t *a, bus_size_t c)
+dino_rr_8(void *v, bus_space_handle_t h, bus_size_t o, uint64_t *a, bus_size_t c)
+{
 	panic("dino_rr_8: not implemented");
+}
 void
-dino_wr_1(void *v, bus_space_handle_t h, bus_size_t o, const u_int8_t *a, bus_size_t c)
+dino_wr_1(void *v, bus_space_handle_t h, bus_size_t o, const uint8_t *a, bus_size_t c)
+{
-	volatile u_int8_t *p;
+	volatile uint8_t *p;
 	h += o;
 	if (h & 0xf0000000) {
-		p = (volatile u_int8_t *)h;
+		p = (volatile uint8_t *)h;
 		while (c--)
 			*p++ = *a++;
 	} else {
 		struct dino_softc *sc = v;
 		volatile struct dino_regs *r = sc->sc_regs;
 		r->pci_addr = h & ~3;
 		while (c--) {
-			p = (volatile u_int8_t *)&r->pci_io_data + (h & 3);
+			p = (volatile uint8_t *)&r->pci_io_data + (h & 3);
 			*p = *a++;
 			if (!(++h & 3))
 				r->pci_addr = h;
+		}
+	}
+}
 void
-dino_wr_2(void *v, bus_space_handle_t h, bus_size_t o, const u_int16_t *a, bus_size_t c)
+dino_wr_2(void *v, bus_space_handle_t h, bus_size_t o, const uint16_t *a, bus_size_t c)
+{
-	volatile u_int16_t *p;
+	volatile uint16_t *p;
 	h += o;
 	if (h & 0xf0000000) {
-		p = (volatile u_int16_t *)h;
+		p = (volatile uint16_t *)h;
 		while (c--)
 			*p++ = htole16(*a++);
 	} else {
 		struct dino_softc *sc = v;
 		volatile struct dino_regs *r = sc->sc_regs;
 		r->pci_addr = h & ~3;
 		while (c--) {
-			p = (volatile u_int16_t *)&r->pci_io_data;
+			p = (volatile uint16_t *)&r->pci_io_data;
 			if (h & 2)
 				p++;
 			*p = htole16(*a++);
 			h += 2;
 			if (!(h & 2))
 				r->pci_addr = h;
+		}
+	}
+}
 void
-dino_wr_4(void *v, bus_space_handle_t h, bus_size_t o, const u_int32_t *a, bus_size_t c)
+dino_wr_4(void *v, bus_space_handle_t h, bus_size_t o, const uint32_t *a, bus_size_t c)
+{
-	volatile u_int32_t *p;
+	volatile uint32_t *p;
 	h += o;
 	if (h & 0xf0000000) {
-		p = (volatile u_int32_t *)h;
+		p = (volatile uint32_t *)h;
 		while (c--)
 			*p++ = htole32(*a++);
 	} else {
 		struct dino_softc *sc = v;
 		volatile struct dino_regs *r = sc->sc_regs;
 		for (; c--; h += 4) {
 			r->pci_addr = h;
 			r->pci_io_data = htole32(*a++);
+		}
+	}
+}
 void
-dino_wr_8(void *v, bus_space_handle_t h, bus_size_t o, const u_int64_t *a, bus_size_t c)
+dino_wr_8(void *v, bus_space_handle_t h, bus_size_t o, const uint64_t *a, bus_size_t c)
+{
 	panic("dino_wr_8: not implemented");
+}
 void
 dino_rrr_2(void *v, bus_space_handle_t h, bus_size_t o,
-    u_int16_t *a, bus_size_t c)
+    uint16_t *a, bus_size_t c)
+{
-	volatile u_int16_t *p;
+	volatile uint16_t *p;
 	h += o;
 	if (h & 0xf0000000) {
-		p = (volatile u_int16_t *)h;
+		p = (volatile uint16_t *)h;
 		while (c--)
 			*a++ = *p++;
 	} else {
 		struct dino_softc *sc = v;
 		volatile struct dino_regs *r = sc->sc_regs;
 		r->pci_addr = h & ~3;
 		while (c--) {
-			p = (volatile u_int16_t *)&r->pci_io_data;
+			p = (volatile uint16_t *)&r->pci_io_data;
 			if (h & 2)
 				p++;
 			*a++ = *p;
 			h += 2;
 			if (!(h & 2))
 				r->pci_addr = h;
+		}
+	}
+}
 void
 dino_rrr_4(void *v, bus_space_handle_t h, bus_size_t o,
-    u_int32_t *a, bus_size_t c)
+    uint32_t *a, bus_size_t c)
+{
-	volatile u_int32_t *p;
+	volatile uint32_t *p;
 	h += o;
 	if (h & 0xf0000000) {
-		p = (volatile u_int32_t *)h;
+		p = (volatile uint32_t *)h;
 		while (c--)
 			*a++ = *p++;
 	} else {
 		struct dino_softc *sc = v;
 		volatile struct dino_regs *r = sc->sc_regs;
 		for (; c--; h += 4) {
 			r->pci_addr = h;
 			*a++ = r->pci_io_data;
+		}
+	}
+}
 void
 dino_rrr_8(void *v, bus_space_handle_t h, bus_size_t o,
-    u_int64_t *a, bus_size_t c)
+    uint64_t *a, bus_size_t c)
+{
 	panic("dino_rrr_8: not implemented");
+}
 void
 dino_wrr_2(void *v, bus_space_handle_t h, bus_size_t o,
-    const u_int16_t *a, bus_size_t c)
+    const uint16_t *a, bus_size_t c)
+{
-	volatile u_int16_t *p;
+	volatile uint16_t *p;
 	h += o;
 	if (h & 0xf0000000) {
-		p = (volatile u_int16_t *)h;
+		p = (volatile uint16_t *)h;
 		while (c--)
 			*p++ = *a++;
 	} else {
 		struct dino_softc *sc = v;
 		volatile struct dino_regs *r = sc->sc_regs;
 		r->pci_addr = h & ~3;
 		while (c--) {
-			p = (volatile u_int16_t *)&r->pci_io_data;
+			p = (volatile uint16_t *)&r->pci_io_data;
 			if (h & 2)
 				p++;
 			*p = *a++;
 			h += 2;
 			if (!(h & 2))
 				r->pci_addr = h;
+		}
+	}
+}
 void
 dino_wrr_4(void *v, bus_space_handle_t h, bus_size_t o,
-    const u_int32_t *a, bus_size_t c)
+    const uint32_t *a, bus_size_t c)
+{
-	volatile u_int32_t *p;
+	volatile uint32_t *p;
 	h += o;
 	if (h & 0xf0000000) {
-		p = (volatile u_int32_t *)h;
+		p = (volatile uint32_t *)h;
 		while (c--)
 			*p++ = *a++;
 	} else {
 		struct dino_softc *sc = v;
 		volatile struct dino_regs *r = sc->sc_regs;
 		for (; c--; h += 4) {
 			r->pci_addr = h;
 			r->pci_io_data = *a++;
+		}
+	}
+}
 void
 dino_wrr_8(void *v, bus_space_handle_t h, bus_size_t o,
-    const u_int64_t *a, bus_size_t c)
+    const uint64_t *a, bus_size_t c)
+{
 	panic("dino_wrr_8: not implemented");
+}
 void
-dino_sr_1(void *v, bus_space_handle_t h, bus_size_t o, u_int8_t vv, bus_size_t c)
+dino_sr_1(void *v, bus_space_handle_t h, bus_size_t o, uint8_t vv, bus_size_t c)
+{
-	volatile u_int8_t *p;
+	volatile uint8_t *p;
 	h += o;
 	if (h & 0xf0000000) {
-		p = (volatile u_int8_t *)h;
+		p = (volatile uint8_t *)h;
 		while (c--)
 			*p++ = vv;
 	} else {
 		struct dino_softc *sc = v;
 		volatile struct dino_regs *r = sc->sc_regs;
 		r->pci_addr = h & ~3;
 		while (c--) {
-			p = (volatile u_int8_t *)&r->pci_io_data + (h & 3);
+			p = (volatile uint8_t *)&r->pci_io_data + (h & 3);
 			*p = vv;
 			if (!(++h & 3))
 				r->pci_addr = h;
+		}
+	}
+}
 void
-dino_sr_2(void *v, bus_space_handle_t h, bus_size_t o, u_int16_t vv, bus_size_t c)
+dino_sr_2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t vv, bus_size_t c)
+{
-	volatile u_int16_t *p;
+	volatile uint16_t *p;
 	h += o;
 	if (h & 0xf0000000) {
-		p = (volatile u_int16_t *)h;
+		p = (volatile uint16_t *)h;
 		while (c--)
 			*p++ = htole16(vv);
 	} else {
 		struct dino_softc *sc = v;
 		volatile struct dino_regs *r = sc->sc_regs;
 		r->pci_addr = h & ~3;
 		while (c--) {
-			p = (volatile u_int16_t *)&r->pci_io_data;
+			p = (volatile uint16_t *)&r->pci_io_data;
 			if (h & 2)
 				p++;
 			*p = htole16(vv);
 			h += 2;
 			if (!(h & 2))
 				r->pci_addr = h;
+		}
+	}
+}
 void
-dino_sr_4(void *v, bus_space_handle_t h, bus_size_t o, u_int32_t vv, bus_size_t c)
+dino_sr_4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t vv, bus_size_t c)
+{
-	volatile u_int32_t *p;
+	volatile uint32_t *p;
 	h += o;
 	if (h & 0xf0000000) {
-		p = (volatile u_int32_t *)h;
+		p = (volatile uint32_t *)h;
 		while (c--)
 			*p++ = htole32(vv);
 	} else {
 		struct dino_softc *sc = v;
 		volatile struct dino_regs *r = sc->sc_regs;
 		for (; c--; h += 4) {
 			r->pci_addr = h;
 			r->pci_io_data = htole32(vv);
+		}
+	}
+}
 void
-dino_sr_8(void *v, bus_space_handle_t h, bus_size_t o, u_int64_t vv, bus_size_t c)
+dino_sr_8(void *v, bus_space_handle_t h, bus_size_t o, uint64_t vv, bus_size_t c)
+{
 	panic("dino_sr_8: not implemented");
+}
 void
 dino_cp_1(void *v, bus_space_handle_t h1, bus_size_t o1,
 	  bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
+{
 	while (c--)
 		dino_w1(v, h1, o1++, dino_r1(v, h2, o2++));
+}
 void

 @@ -1,14 +1,14 @@
-/*	$NetBSD: wax.c,v 1.12 2009/05/08 09:33:58 skrll Exp $	*/
+/*	$NetBSD: wax.c,v 1.13 2009/05/24 06:53:34 skrll Exp $	*/
 /*	$OpenBSD: wax.c,v 1.1 1998/11/23 03:04:10 mickey Exp $	*/
 /*
  * Copyright (c) 1998 Michael Shalayeff
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
 @@ -23,49 +23,49 @@
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: wax.c,v 1.12 2009/05/08 09:33:58 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: wax.c,v 1.13 2009/05/24 06:53:34 skrll Exp $");
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/device.h>
 #include <sys/reboot.h>
 #include <machine/iomod.h>
 #include <machine/autoconf.h>
 #include <hp700/dev/cpudevs.h>
 #include <hp700/gsc/gscbusvar.h>
 #define	WAX_IOMASK	0xfff00000
 #define	WAX_REGS	0xc000
 struct wax_regs {
-	u_int32_t wax_irr;	/* int requset register */
+	uint32_t wax_irr;	/* int requset register */
-	u_int32_t wax_imr;	/* int mask register */
+	uint32_t wax_imr;	/* int mask register */
-	u_int32_t wax_ipr;	/* int pending register */
+	uint32_t wax_ipr;	/* int pending register */
-	u_int32_t wax_icr;	/* int control register */
+	uint32_t wax_icr;	/* int control register */
-	u_int32_t wax_iar;	/* int address register */
+	uint32_t wax_iar;	/* int address register */
 };
 struct wax_softc {
 	device_t sc_dv;
 	struct hp700_int_reg sc_int_reg;
 	struct wax_regs volatile *sc_regs;
 };
 int	waxmatch(device_t, cfdata_t, void *);
 void	waxattach(device_t, device_t, void *);
 CFATTACH_DECL_NEW(wax, sizeof(struct wax_softc),

 @@ -1,14 +1,14 @@
-/*	$NetBSD: mongoose.c,v 1.14 2009/05/12 19:35:59 skrll Exp $	*/
+/*	$NetBSD: mongoose.c,v 1.15 2009/05/24 06:53:34 skrll Exp $	*/
 /*	$OpenBSD: mongoose.c,v 1.7 2000/08/15 19:42:56 mickey Exp $	*/
 /*
  * Copyright (c) 1998,1999 Michael Shalayeff
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
 @@ -24,150 +24,150 @@
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  * THE POSSIBILITY OF SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mongoose.c,v 1.14 2009/05/12 19:35:59 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mongoose.c,v 1.15 2009/05/24 06:53:34 skrll Exp $");
 #define MONGOOSE_DEBUG 9
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/device.h>
 #include <sys/reboot.h>
 #include <machine/bus.h>
 #include <machine/iomod.h>
 #include <machine/autoconf.h>
 #include <hp700/hp700/intr.h>
 #include <hp700/dev/cpudevs.h>
 #include <hp700/dev/viper.h>
 #include <dev/eisa/eisareg.h>
 #include <dev/eisa/eisavar.h>
 #include <dev/isa/isareg.h>
 #include <dev/isa/isavar.h>
 /* EISA Bus Adapter registers definitions */
 #define	MONGOOSE_MONGOOSE	0x10000
 struct mongoose_regs {
-	u_int8_t	version;
+	uint8_t	version;
-	u_int8_t	lock;
+	uint8_t	lock;
-	u_int8_t	liowait;
+	uint8_t	liowait;
-	u_int8_t	clock;
+	uint8_t	clock;
-	u_int8_t	reserved[0xf000 - 4];
+	uint8_t	reserved[0xf000 - 4];
-	u_int8_t	intack;
+	uint8_t	intack;
 };
 #define	MONGOOSE_CTRL		0x00000
 #define	MONGOOSE_NINTS		16
 struct mongoose_ctrl {
 	struct dma0 {
 		struct {
-			u_int32_t	addr : 8;
+			uint32_t	addr : 8;
-			u_int32_t	count: 8;
+			uint32_t	count: 8;
 		} ch[4];
-		u_int8_t	command;
+		uint8_t	command;
-		u_int8_t	request;
+		uint8_t	request;
-		u_int8_t	mask_channel;
+		uint8_t	mask_channel;
-		u_int8_t	mode;
+		uint8_t	mode;
-		u_int8_t	clr_byte_ptr;
+		uint8_t	clr_byte_ptr;
-		u_int8_t	master_clear;
+		uint8_t	master_clear;
-		u_int8_t	mask_clear;
+		uint8_t	mask_clear;
-		u_int8_t	master_write;
+		uint8_t	master_write;
-		u_int8_t	pad[8];
+		uint8_t	pad[8];
 	}	dma0;
-	u_int8_t	irr0;		/* 0x20 */
+	uint8_t	irr0;		/* 0x20 */
-	u_int8_t	imr0;
+	uint8_t	imr0;
-	u_int8_t	iack;		/* 0x22 -- 2 b2b reads generate
+	uint8_t	iack;		/* 0x22 -- 2 b2b reads generate
 					(e)isa Iack cycle & returns int level */
-	u_int8_t	pad0[29];
+	uint8_t	pad0[29];
 	struct timers {
-		u_int8_t	sysclk;
+		uint8_t	sysclk;
-		u_int8_t	refresh;
+		uint8_t	refresh;
-		u_int8_t	spkr;
+		uint8_t	spkr;
-		u_int8_t	ctrl;
+		uint8_t	ctrl;
-		u_int32_t	pad;
+		uint32_t	pad;
 	}	tmr[2];			/* 0x40 -- timers control */
-	u_int8_t	pad1[16];
+	uint8_t	pad1[16];
-	u_int16_t	inmi;		/* 0x60 NMI control */
+	uint16_t	inmi;		/* 0x60 NMI control */
-	u_int8_t	pad2[30];
+	uint8_t	pad2[30];
 	struct {
-		u_int8_t	pad0;
+		uint8_t	pad0;
-		u_int8_t	ch2;
+		uint8_t	ch2;
-		u_int8_t	ch3;
+		uint8_t	ch3;
-		u_int8_t	ch1;
+		uint8_t	ch1;
-		u_int8_t	pad1;
+		uint8_t	pad1;
-		u_int8_t	pad2[3];
+		uint8_t	pad2[3];
-		u_int8_t	ch0;
+		uint8_t	ch0;
-		u_int8_t	pad4;
+		uint8_t	pad4;
-		u_int8_t	ch6;
+		uint8_t	ch6;
-		u_int8_t	ch7;
+		uint8_t	ch7;
-		u_int8_t	ch5;
+		uint8_t	ch5;
-		u_int8_t	pad5[3];
+		uint8_t	pad5[3];
-		u_int8_t	pad6[16];
+		uint8_t	pad6[16];
 	} pr;				/* 0x80 */
-	u_int8_t	irr1;		/* 0xa0 */
+	uint8_t	irr1;		/* 0xa0 */
-	u_int8_t	imr1;
+	uint8_t	imr1;
-	u_int8_t	pad3[30];
+	uint8_t	pad3[30];
 	struct dma1 {
 		struct {
-			u_int32_t	addr : 8;
+			uint32_t	addr : 8;
-			u_int32_t	pad0 : 8;
+			uint32_t	pad0 : 8;
-			u_int32_t	count: 8;
+			uint32_t	count: 8;
-			u_int32_t	pad1 : 8;
+			uint32_t	pad1 : 8;
 		} ch[4];
-		u_int8_t	command;
+		uint8_t	command;
-		u_int8_t	pad0;
+		uint8_t	pad0;
-		u_int8_t	request;
+		uint8_t	request;
-		u_int8_t	pad1;
+		uint8_t	pad1;
-		u_int8_t	mask_channel;
+		uint8_t	mask_channel;
-		u_int8_t	pad2;
+		uint8_t	pad2;
-		u_int8_t	mode;
+		uint8_t	mode;
-		u_int8_t	pad3;
+		uint8_t	pad3;
-		u_int8_t	clr_byte_ptr;
+		uint8_t	clr_byte_ptr;
-		u_int8_t	pad4;
+		uint8_t	pad4;
-		u_int8_t	master_clear;
+		uint8_t	master_clear;
-		u_int8_t	pad5;
+		uint8_t	pad5;
-		u_int8_t	mask_clear;
+		uint8_t	mask_clear;
-		u_int8_t	pad6;
+		uint8_t	pad6;
-		u_int8_t	master_write;
+		uint8_t	master_write;
-		u_int8_t	pad7;
+		uint8_t	pad7;
 	}	dma1;			/* 0xc0 */
-	u_int8_t	master_req;	/* 0xe0 master request register */
+	uint8_t	master_req;	/* 0xe0 master request register */
-	u_int8_t	pad4[31];
+	uint8_t	pad4[31];
-	u_int8_t	pad5[0x3d0];	/* 0x4d0 */
+	uint8_t	pad5[0x3d0];	/* 0x4d0 */
-	u_int8_t	pic0;		/* 0 - edge, 1 - level */
+	uint8_t	pic0;		/* 0 - edge, 1 - level */
-	u_int8_t	pic1;
+	uint8_t	pic1;
-	u_int8_t	pad6[0x460];
+	uint8_t	pad6[0x460];
-	u_int8_t	nmi;
+	uint8_t	nmi;
-	u_int8_t	nmi_ext;
+	uint8_t	nmi_ext;
 #define	MONGOOSE_NMI_BUSRESET	0x01
 #define	MONGOOSE_NMI_IOPORT_EN	0x02
 #define	MONGOOSE_NMI_EN		0x04
 #define	MONGOOSE_NMI_MTMO_EN	0x08
 #define	MONGOOSE_NMI_RES4	0x10
 #define	MONGOOSE_NMI_IOPORT_INT	0x20
 #define	MONGOOSE_NMI_MASTER_INT	0x40
 #define	MONGOOSE_NMI_INT	0x80
 };
 #define	MONGOOSE_IOMAP	0x100000
 struct hppa_isa_iv {
 @@ -211,42 +211,42 @@ union mongoose_attach_args {
 void mg_eisa_attach_hook(device_t, device_t, struct eisabus_attach_args *);
 int mg_intr_map(void *, u_int, eisa_intr_handle_t *);
 const char *mg_intr_string(void *, int);
 void mg_isa_attach_hook(device_t, device_t, struct isabus_attach_args *);
 void *mg_intr_establish(void *, int, int, int, int (*)(void *), void *);
 void mg_intr_disestablish(void *, void *);
 int mg_intr_check(void *, int, int);
 int mg_intr(void *);
 int mg_eisa_iomap(void *, bus_addr_t, bus_size_t, int, bus_space_handle_t *);
 int mg_eisa_memmap(void *, bus_addr_t, bus_size_t, int, bus_space_handle_t *);
 void mg_eisa_memunmap(void *, bus_space_handle_t, bus_size_t);
 void mg_isa_barrier(void *, bus_space_handle_t, bus_size_t, bus_size_t, int);
-u_int16_t mg_isa_r2(void *, bus_space_handle_t, bus_size_t);
+uint16_t mg_isa_r2(void *, bus_space_handle_t, bus_size_t);
-u_int32_t mg_isa_r4(void *, bus_space_handle_t, bus_size_t);
+uint32_t mg_isa_r4(void *, bus_space_handle_t, bus_size_t);
-void mg_isa_w2(void *, bus_space_handle_t, bus_size_t, u_int16_t);
+void mg_isa_w2(void *, bus_space_handle_t, bus_size_t, uint16_t);
-void mg_isa_w4(void *, bus_space_handle_t, bus_size_t, u_int32_t);
+void mg_isa_w4(void *, bus_space_handle_t, bus_size_t, uint32_t);
-void mg_isa_rm_2(void *, bus_space_handle_t, bus_size_t, u_int16_t *, bus_size_t);
+void mg_isa_rm_2(void *, bus_space_handle_t, bus_size_t, uint16_t *, bus_size_t);
-void mg_isa_rm_4(void *, bus_space_handle_t, bus_size_t, u_int32_t *, bus_size_t);
+void mg_isa_rm_4(void *, bus_space_handle_t, bus_size_t, uint32_t *, bus_size_t);
-void mg_isa_wm_2(void *, bus_space_handle_t, bus_size_t, const u_int16_t *, bus_size_t);
+void mg_isa_wm_2(void *, bus_space_handle_t, bus_size_t, const uint16_t *, bus_size_t);
-void mg_isa_wm_4(void *, bus_space_handle_t, bus_size_t, const u_int32_t *, bus_size_t);
+void mg_isa_wm_4(void *, bus_space_handle_t, bus_size_t, const uint32_t *, bus_size_t);
-void mg_isa_sm_2(void *, bus_space_handle_t, bus_size_t, u_int16_t, bus_size_t);
+void mg_isa_sm_2(void *, bus_space_handle_t, bus_size_t, uint16_t, bus_size_t);
-void mg_isa_sm_4(void *, bus_space_handle_t, bus_size_t, u_int32_t, bus_size_t);
+void mg_isa_sm_4(void *, bus_space_handle_t, bus_size_t, uint32_t, bus_size_t);
-void mg_isa_rr_2(void *, bus_space_handle_t, bus_size_t, u_int16_t *, bus_size_t);
+void mg_isa_rr_2(void *, bus_space_handle_t, bus_size_t, uint16_t *, bus_size_t);
-void mg_isa_rr_4(void *, bus_space_handle_t, bus_size_t, u_int32_t *, bus_size_t);
+void mg_isa_rr_4(void *, bus_space_handle_t, bus_size_t, uint32_t *, bus_size_t);
-void mg_isa_wr_2(void *, bus_space_handle_t, bus_size_t, const u_int16_t *, bus_size_t);
+void mg_isa_wr_2(void *, bus_space_handle_t, bus_size_t, const uint16_t *, bus_size_t);
-void mg_isa_wr_4(void *, bus_space_handle_t, bus_size_t, const u_int32_t *, bus_size_t);
+void mg_isa_wr_4(void *, bus_space_handle_t, bus_size_t, const uint32_t *, bus_size_t);
-void mg_isa_sr_2(void *, bus_space_handle_t, bus_size_t, u_int16_t, bus_size_t);
+void mg_isa_sr_2(void *, bus_space_handle_t, bus_size_t, uint16_t, bus_size_t);
-void mg_isa_sr_4(void *, bus_space_handle_t, bus_size_t, u_int32_t, bus_size_t);
+void mg_isa_sr_4(void *, bus_space_handle_t, bus_size_t, uint32_t, bus_size_t);
 int	mgmatch(device_t, cfdata_t, void *);
 void	mgattach(device_t, device_t, void *);
 CFATTACH_DECL_NEW(mongoose, sizeof(struct mongoose_softc),
     mgmatch, mgattach, NULL, NULL);
 /* TODO: DMA guts */
 void
 mg_eisa_attach_hook(device_t parent, device_t self,
 	struct eisabus_attach_args *mg)
+{
 @@ -271,27 +271,27 @@ mg_intr_string(void *v, int irq)
 void
 mg_isa_attach_hook(device_t parent, device_t self,
 	struct isabus_attach_args *iba)
+{
+}
 void *
 mg_intr_establish(void *v, int irq, int type, int pri,
 	int (*handler)(void *), void *arg)
+{
 	struct hppa_isa_iv *iv;
 	struct mongoose_softc *sc = v;
-	volatile u_int8_t *imr, *pic;
+	volatile uint8_t *imr, *pic;
 	if (!sc || irq < 0 || irq >= MONGOOSE_NINTS ||
 	    (0 <= irq && irq < MONGOOSE_NINTS && sc->sc_iv[irq].iv_handler))
 		return NULL;
 	if (type != IST_LEVEL && type != IST_EDGE) {
 		aprint_debug_dev(sc->sc_dev, "bad interrupt level (%d)\n",
 		    type);
 		return NULL;
+	}
 	iv = &sc->sc_iv[irq];
 	if (iv->iv_handler) {
 @@ -317,27 +317,27 @@ mg_intr_establish(void *v, int irq, int
 	*pic |= (type == IST_LEVEL) << irq;
 	/* TODO: ack it? */
 	return iv;
+}
 void
 mg_intr_disestablish(void *v, void *cookie)
+{
 	struct hppa_isa_iv *iv = cookie;
 	struct mongoose_softc *sc = v;
  	int irq = iv - sc->sc_iv;
- 	volatile u_int8_t *imr;
+ 	volatile uint8_t *imr;
 	if (!sc || !cookie)
 		return;
 	if (irq < 8)
 		imr = &sc->sc_ctrl->imr0;
 	else
 		imr = &sc->sc_ctrl->imr1;
 	*imr &= ~(1 << irq);
 	/* TODO: ack it? */
 	iv->iv_handler = NULL;
+}
 @@ -390,184 +390,184 @@ mg_eisa_memmap(void *v, bus_addr_t addr,
 void
 mg_eisa_memunmap(void *v, bus_space_handle_t bsh, bus_size_t size)
+{
 	/* TODO: eisa memory unmap */
+}
 void
 mg_isa_barrier(void *v, bus_space_handle_t h, bus_size_t o, bus_size_t l, int op)
+{
 	sync_caches();
+}
-u_int16_t
+uint16_t
 mg_isa_r2(void *v, bus_space_handle_t h, bus_size_t o)
+{
-	u_int16_t r = *((volatile u_int16_t *)(h + o));
+	uint16_t r = *((volatile uint16_t *)(h + o));
 	return le16toh(r);
+}
-u_int32_t
+uint32_t
 mg_isa_r4(void *v, bus_space_handle_t h, bus_size_t o)
+{
-	u_int32_t r = *((volatile u_int32_t *)(h + o));
+	uint32_t r = *((volatile uint32_t *)(h + o));
 	return le32toh(r);
+}
 void
-mg_isa_w2(void *v, bus_space_handle_t h, bus_size_t o, u_int16_t vv)
+mg_isa_w2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t vv)
+{
-	*((volatile u_int16_t *)(h + o)) = htole16(vv);
+	*((volatile uint16_t *)(h + o)) = htole16(vv);
+}
 void
-mg_isa_w4(void *v, bus_space_handle_t h, bus_size_t o, u_int32_t vv)
+mg_isa_w4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t vv)
+{
-	*((volatile u_int32_t *)(h + o)) = htole32(vv);
+	*((volatile uint32_t *)(h + o)) = htole32(vv);
+}
 void
-mg_isa_rm_2(void *v, bus_space_handle_t h, bus_size_t o, u_int16_t *a, bus_size_t c)
+mg_isa_rm_2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t *a, bus_size_t c)
+{
 	h += o;
 	while (c--)
-		*(a++) = le16toh(*(volatile u_int16_t *)h);
+		*(a++) = le16toh(*(volatile uint16_t *)h);
+}
 void
-mg_isa_rm_4(void *v, bus_space_handle_t h, bus_size_t o, u_int32_t *a, bus_size_t c)
+mg_isa_rm_4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t *a, bus_size_t c)
+{
 	h += o;
 	while (c--)
-		*(a++) = le32toh(*(volatile u_int32_t *)h);
+		*(a++) = le32toh(*(volatile uint32_t *)h);
+}
 void
-mg_isa_wm_2(void *v, bus_space_handle_t h, bus_size_t o, const u_int16_t *a, bus_size_t c)
+mg_isa_wm_2(void *v, bus_space_handle_t h, bus_size_t o, const uint16_t *a, bus_size_t c)
+{
-	u_int16_t r;
+	uint16_t r;
 	h += o;
 	while (c--) {
 		r = *(a++);
-		*(volatile u_int16_t *)h = htole16(r);
+		*(volatile uint16_t *)h = htole16(r);
+	}
+}
 void
-mg_isa_wm_4(void *v, bus_space_handle_t h, bus_size_t o, const u_int32_t *a, bus_size_t c)
+mg_isa_wm_4(void *v, bus_space_handle_t h, bus_size_t o, const uint32_t *a, bus_size_t c)
+{
-	u_int32_t r;
+	uint32_t r;
 	h += o;
 	while (c--) {
 		r = *(a++);
-		*(volatile u_int32_t *)h = htole32(r);
+		*(volatile uint32_t *)h = htole32(r);
+	}
+}
 void
-mg_isa_sm_2(void *v, bus_space_handle_t h, bus_size_t o, u_int16_t vv, bus_size_t c)
+mg_isa_sm_2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t vv, bus_size_t c)
+{
 	vv = htole16(vv);
 	h += o;
 	while (c--)
-		*(volatile u_int16_t *)h = vv;
+		*(volatile uint16_t *)h = vv;
+}
 void
-mg_isa_sm_4(void *v, bus_space_handle_t h, bus_size_t o, u_int32_t vv, bus_size_t c)
+mg_isa_sm_4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t vv, bus_size_t c)
+{
 	vv = htole32(vv);
 	h += o;
 	while (c--)
-		*(volatile u_int32_t *)h = vv;
+		*(volatile uint32_t *)h = vv;
+}
 void
-mg_isa_rr_2(void *v, bus_space_handle_t h, bus_size_t o, u_int16_t *a, bus_size_t c)
+mg_isa_rr_2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t *a, bus_size_t c)
+{
-	u_int16_t r;
+	uint16_t r;
-	volatile u_int16_t *p;
+	volatile uint16_t *p;
 	h += o;
 	p = (void *)h;
 	while (c--) {
 		r = *p++;
 		*a++ = le16toh(r);
+	}
+}
 void
-mg_isa_rr_4(void *v, bus_space_handle_t h, bus_size_t o, u_int32_t *a, bus_size_t c)
+mg_isa_rr_4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t *a, bus_size_t c)
+{
-	u_int32_t r;
+	uint32_t r;
-	volatile u_int32_t *p;
+	volatile uint32_t *p;
 	h += o;
 	p = (void *)h;
 	while (c--) {
 		r = *p++;
 		*a++ = le32toh(r);
+	}
+}
 void
-mg_isa_wr_2(void *v, bus_space_handle_t h, bus_size_t o, const u_int16_t *a, bus_size_t c)
+mg_isa_wr_2(void *v, bus_space_handle_t h, bus_size_t o, const uint16_t *a, bus_size_t c)
+{
-	u_int16_t r;
+	uint16_t r;
-	volatile u_int16_t *p;
+	volatile uint16_t *p;
 	h += o;
 	p = (void *)h;
 	while (c--) {
 		r = *a++;
 		*p++ = htole16(r);
+	}
+}
 void
-mg_isa_wr_4(void *v, bus_space_handle_t h, bus_size_t o, const u_int32_t *a, bus_size_t c)
+mg_isa_wr_4(void *v, bus_space_handle_t h, bus_size_t o, const uint32_t *a, bus_size_t c)
+{
-	u_int32_t r;
+	uint32_t r;
-	volatile u_int32_t *p;
+	volatile uint32_t *p;
 	h += o;
 	p = (void *)h;
 	while (c--) {
 		r = *a++;
 		*p++ = htole32(r);
+	}
+}
 void
-mg_isa_sr_2(void *v, bus_space_handle_t h, bus_size_t o, u_int16_t vv, bus_size_t c)
+mg_isa_sr_2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t vv, bus_size_t c)
+{
-	volatile u_int16_t *p;
+	volatile uint16_t *p;
 	vv = htole16(vv);
 	h += o;
 	p = (void *)h;
 	while (c--)
 		*p++ = vv;
+}
 void
-mg_isa_sr_4(void *v, bus_space_handle_t h, bus_size_t o, u_int32_t vv, bus_size_t c)
+mg_isa_sr_4(void *v, bus_space_handle_t h, bus_size_t o, uint32_t vv, bus_size_t c)
+{
-	volatile u_int32_t *p;
+	volatile uint32_t *p;
 	vv = htole32(vv);
 	h += o;
 	p = (void *)h;
 	while (c--)
 		*p++ = vv;
+}
 int
 mgmatch(device_t parent, cfdata_t cf, void *aux)
+{
 	struct confargs *ca = aux;
 	bus_space_handle_t ioh;
 @@ -609,29 +609,29 @@ mgattach(device_t parent, device_t self,
 		panic("mgattach: can't map control registers");
 	sc->sc_ctrl = (struct mongoose_ctrl *)ioh;
 	viper_eisa_en();
 	/* BUS RESET */
 	sc->sc_ctrl->nmi_ext = MONGOOSE_NMI_BUSRESET;
 	DELAY(1);
 	sc->sc_ctrl->nmi_ext = 0;
 	DELAY(100);
 	/* determine eisa board id */
+	{
-		u_int8_t id[4], *p;
+		uint8_t id[4], *p;
 		/* XXX this is awful */
-		p = (u_int8_t *)(ioh + EISA_SLOTOFF_VID);
+		p = (uint8_t *)(ioh + EISA_SLOTOFF_VID);
 		id[0] = *p++;
 		id[1] = *p++;
 		id[2] = *p++;
 		id[3] = *p++;
 		brid[0] = EISA_VENDID_0(id);
 		brid[1] = EISA_VENDID_1(id);
 		brid[2] = EISA_VENDID_2(id);
 		brid[3] = EISA_PRODID_0(id + 2);
 		brid[4] = EISA_PRODID_1(id + 2);
 		brid[5] = EISA_PRODID_2(id + 2);
 		brid[6] = EISA_PRODID_3(id + 2);
 		brid[7] = '\0';

 @@ -1,35 +1,35 @@
-/*	$NetBSD: siop_sgc.c,v 1.4 2009/05/15 17:55:44 tsutsui Exp $	*/
+/*	$NetBSD: siop_sgc.c,v 1.5 2009/05/24 06:53:34 skrll Exp $	*/
 /*	$OpenBSD: siop_sgc.c,v 1.1 2007/08/05 19:09:52 kettenis Exp $	*/
 /*
  * Copyright (c) 2007 Mark Kettenis
+ *
  * Permission to use, copy, modify, and distribute this software for any
  * purpose with or without fee is hereby granted, provided that the above
  * copyright notice and this permission notice appear in all copies.
+ *
  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: siop_sgc.c,v 1.4 2009/05/15 17:55:44 tsutsui Exp $");
+__KERNEL_RCSID(0, "$NetBSD: siop_sgc.c,v 1.5 2009/05/24 06:53:34 skrll Exp $");
 #include <sys/param.h>
 #include <sys/device.h>
 #include <sys/systm.h>
 #include <uvm/uvm_extern.h>
 #include <machine/autoconf.h>
 #include <machine/bus.h>
 #include <machine/iomod.h>
 #include <dev/scsipi/scsi_all.h>
 #include <dev/scsipi/scsipi_all.h>
 @@ -41,30 +41,30 @@ __KERNEL_RCSID(0, "$NetBSD: siop_sgc.c,v
 #include <hp700/dev/cpudevs.h>
 #include <hp700/hp700/intr.h>
 #define IO_II_INTEN		0x20000000
 #define IO_II_PACKEN		0x10000000
 #define IO_II_PREFETCHEN	0x08000000
 int siop_sgc_match(device_t, cfdata_t, void *);
 void siop_sgc_attach(device_t, device_t, void *);
 int siop_sgc_intr(void *);
 void siop_sgc_reset(struct siop_common_softc *);
-u_int8_t siop_sgc_r1(void *, bus_space_handle_t, bus_size_t);
+uint8_t siop_sgc_r1(void *, bus_space_handle_t, bus_size_t);
-u_int16_t siop_sgc_r2(void *, bus_space_handle_t, bus_size_t);
+uint16_t siop_sgc_r2(void *, bus_space_handle_t, bus_size_t);
-void siop_sgc_w1(void *, bus_space_handle_t, bus_size_t, u_int8_t);
+void siop_sgc_w1(void *, bus_space_handle_t, bus_size_t, uint8_t);
-void siop_sgc_w2(void *, bus_space_handle_t, bus_size_t, u_int16_t);
+void siop_sgc_w2(void *, bus_space_handle_t, bus_size_t, uint16_t);
 struct siop_sgc_softc {
 	struct siop_softc sc_siop;
 	bus_space_tag_t sc_iot;
 	bus_space_handle_t sc_ioh;
 	struct hppa_bus_space_tag sc_bustag;
 };
 CFATTACH_DECL_NEW(siop_gedoens, sizeof(struct siop_sgc_softc),
     siop_sgc_match, siop_sgc_attach, NULL, NULL);
 int
 siop_sgc_match(device_t parent, cfdata_t match, void *aux)
 @@ -139,43 +139,43 @@ siop_sgc_attach(device_t parent, device_
+}
 void
 siop_sgc_reset(struct siop_common_softc *sc)
+{
 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_DCNTL, DCNTL_EA);
 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST0, CTEST0_EHP);
 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST4, CTEST4_MUX);
 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STIME0,
 	    (0xc << STIME0_SEL_SHIFT));
+}
-u_int8_t
+uint8_t
 siop_sgc_r1(void *v, bus_space_handle_t h, bus_size_t o)
+{
-	return *(volatile u_int8_t *)(h + (o ^ 3));
+	return *(volatile uint8_t *)(h + (o ^ 3));
+}
-u_int16_t
+uint16_t
 siop_sgc_r2(void *v, bus_space_handle_t h, bus_size_t o)
+{
 	if (o == SIOP_SIST0) {
-		u_int16_t reg;
+		uint16_t reg;
 		reg = siop_sgc_r1(v, h, SIOP_SIST0);
 		reg |= siop_sgc_r1(v, h, SIOP_SIST1) << 8;
 		return reg;
+	}
-	return *(volatile u_int16_t *)(h + (o ^ 2));
+	return *(volatile uint16_t *)(h + (o ^ 2));
+}
 void
-siop_sgc_w1(void *v, bus_space_handle_t h, bus_size_t o, u_int8_t vv)
+siop_sgc_w1(void *v, bus_space_handle_t h, bus_size_t o, uint8_t vv)
+{
-	*(volatile u_int8_t *)(h + (o ^ 3)) = vv;
+	*(volatile uint8_t *)(h + (o ^ 3)) = vv;
+}
 void
-siop_sgc_w2(void *v, bus_space_handle_t h, bus_size_t o, u_int16_t vv)
+siop_sgc_w2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t vv)
+{
-	*(volatile u_int16_t *)(h + (o ^ 2)) = vv;
+	*(volatile uint16_t *)(h + (o ^ 2)) = vv;
+}

 @@ -1,14 +1,14 @@
-/*	$NetBSD: uturn.c,v 1.4 2009/05/23 13:39:54 skrll Exp $	*/
+/*	$NetBSD: uturn.c,v 1.5 2009/05/24 06:53:34 skrll Exp $	*/
 /*	$OpenBSD: uturn.c,v 1.6 2007/12/29 01:26:14 kettenis Exp $	*/
 /*
  * Copyright (c) 2004 Michael Shalayeff
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
 @@ -31,30 +31,30 @@
 /* TODO IOA programming */
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/device.h>
 #include <sys/reboot.h>
 #include <machine/iomod.h>
 #include <machine/autoconf.h>
 #include <hp700/dev/cpudevs.h>
 struct uturn_regs {
-	u_int64_t	resv0[2];
+	uint64_t	resv0[2];
-	u_int64_t	status;		/* 0x10: */
+	uint64_t	status;		/* 0x10: */
-	u_int64_t	resv1[5];
+	uint64_t	resv1[5];
-	u_int64_t	debug;		/* 0x40: */
+	uint64_t	debug;		/* 0x40: */
 };
 struct uturn_softc {
 	device_t sc_dv;
 	struct uturn_regs volatile *sc_regs;
 };
 int	uturnmatch(device_t, cfdata_t, void *);
 void	uturnattach(device_t, device_t, void *);
 static void uturn_callback(device_t self, struct confargs *ca);
 CFATTACH_DECL_NEW(uturn, sizeof(struct uturn_softc),

 @@ -1,14 +1,14 @@
-/*	$NetBSD: sti_sgc.c,v 1.16 2009/05/08 09:33:58 skrll Exp $	*/
+/*	$NetBSD: sti_sgc.c,v 1.17 2009/05/24 06:53:34 skrll Exp $	*/
 /*	$OpenBSD: sti_sgc.c,v 1.21 2003/12/22 23:39:06 mickey Exp $	*/
 /*
  * Copyright (c) 2000-2003 Michael Shalayeff
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
 @@ -29,27 +29,27 @@
  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 /*
  * These cards has to be known to work so far:
  *	- HPA1991AGrayscale rev 0.02	(705/35) (byte-wide)
  *	- HPA1991AC19       rev 0.02	(715/33) (byte-wide)
  *	- HPA208LC1280      rev 8.04	(712/80) just works
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: sti_sgc.c,v 1.16 2009/05/08 09:33:58 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: sti_sgc.c,v 1.17 2009/05/24 06:53:34 skrll Exp $");
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/device.h>
 #include <uvm/uvm.h>
 #include <machine/bus.h>
 #include <machine/cpu.h>
 #include <machine/iomod.h>
 #include <machine/autoconf.h>
 #include <dev/wscons/wsdisplayvar.h>
 @@ -118,27 +118,27 @@ sti_sgc_getrom(struct confargs *ca)
 	case STI_INEG_REV:
 		rom = STI_INEG_PROM;
 		break;
+	}
 	return rom;
+}
 int
 sti_sgc_probe(device_t parent, cfdata_t cf, void *aux)
+{
 	struct confargs *ca = aux;
 	bus_space_handle_t romh;
 	paddr_t rom;
-	u_int32_t id, romend;
+	uint32_t id, romend;
 	u_char devtype;
 	int rv = 0, romunmapped = 0;
 	if (ca->ca_type.iodc_type != HPPA_TYPE_FIO)
 		return (0);
 	/* these need futher checking for the graphics id */
 	if (ca->ca_type.iodc_sv_model != HPPA_FIO_GSGC &&
 	    ca->ca_type.iodc_sv_model != HPPA_FIO_SGC)
 		return 0;
 	rom = sti_sgc_getrom(ca);
 #ifdef STIDEBUG
 @@ -214,27 +214,27 @@ sti_sgc_probe(device_t parent, cfdata_t
 	ca->ca_naddrs++;
 	if (!romunmapped)
 		bus_space_unmap(ca->ca_iot, romh, STI_ROMSIZE);
 	return (rv);
+}
 void
 sti_sgc_attach(device_t parent, device_t self, void *aux)
+{
 	struct sti_softc *sc = device_private(self);
 	struct confargs *ca = aux;
 	paddr_t rom;
-	u_int32_t romlen;
+	uint32_t romlen;
 	int rv;
 	int pagezero_cookie;
 	pagezero_cookie = hp700_pagezero_map();
 	sc->sc_dev = self;
 	sc->memt = sc->iot = ca->ca_iot;
 	sc->base = ca->ca_hpa;
 	/* we stashed rom addr/len into the last slot during probe */
 	rom = ca->ca_addrs[ca->ca_naddrs - 1].addr;
 	romlen = ca->ca_addrs[ca->ca_naddrs - 1].size;
 	if ((rv = bus_space_map(ca->ca_iot, rom, romlen, 0, &sc->romh))) {
 		if ((rom & HPPA_IOBEGIN) == HPPA_IOBEGIN)

 @@ -1,14 +1,14 @@
-/*	$NetBSD: com_gsc.c,v 1.12 2008/03/14 15:09:10 cube Exp $	*/
+/*	$NetBSD: com_gsc.c,v 1.13 2009/05/24 06:53:35 skrll Exp $	*/
 /*	$OpenBSD: com_gsc.c,v 1.8 2000/03/13 14:39:59 mickey Exp $	*/
 /*
  * Copyright (c) 1998 Michael Shalayeff
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
 @@ -23,27 +23,27 @@
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: com_gsc.c,v 1.12 2008/03/14 15:09:10 cube Exp $");
+__KERNEL_RCSID(0, "$NetBSD: com_gsc.c,v 1.13 2009/05/24 06:53:35 skrll Exp $");
 #include "opt_kgdb.h"
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/device.h>
 #include <sys/tty.h>
 #ifdef KGDB
 #include <sys/kgdb.h>
 #endif
 #include <machine/bus.h>
 @@ -52,27 +52,27 @@ __KERNEL_RCSID(0, "$NetBSD: com_gsc.c,v
 #include <machine/autoconf.h>
 #include <dev/ic/comreg.h>
 #include <dev/ic/comvar.h>
 #include <hp700/dev/cpudevs.h>
 #include <hp700/gsc/gscbusvar.h>
 #include <hp700/hp700/machdep.h>
 #define	COMGSC_OFFSET	0x800
 #define	COMGSC_FREQUENCY (1843200 * 4) /* 16-bit baud rate divisor */
 struct com_gsc_regs {
-	u_int8_t reset;
+	uint8_t reset;
 };
 struct com_gsc_softc {
 	struct	com_softc sc_com;	/* real "com" softc */
 	/* GSC-specific goo. */
 	void	*sc_ih;			/* interrupt handler */
 };
 int	com_gsc_probe(device_t, cfdata_t , void *);
 void	com_gsc_attach(device_t, device_t, void *);
 CFATTACH_DECL_NEW(com_gsc, sizeof(struct com_gsc_softc),

 @@ -1,14 +1,14 @@
-/*	$NetBSD: gscbusvar.h,v 1.7 2009/05/08 09:33:58 skrll Exp $	*/
+/*	$NetBSD: gscbusvar.h,v 1.8 2009/05/24 06:53:35 skrll Exp $	*/
 /*	$OpenBSD: gscbusvar.h,v 1.3 1999/08/16 02:48:39 mickey Exp $	*/
 /*
  * Copyright (c) 1998 Michael Shalayeff
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
 @@ -47,17 +47,17 @@ struct gsc_attach_args {
 /*#define	ga_pdc_iodc_read	ga_ca.ca_pdc_iodc_read */
 	/* The interrupt register for this GSC bus. */
 	struct hp700_int_reg *ga_int_reg;
 	/* This fixes a module's attach arguments. */
 	void (*ga_fix_args)(void *, struct gsc_attach_args *);
 	void *ga_fix_args_cookie;
 	/* The SCSI target for the host adapter. */
 	int	ga_scsi_target;
 	/* The address for the Ethernet adapter. */
-	u_int8_t ga_ether_address[6];
+	uint8_t	ga_ether_address[6];
 };
 int gscprint(void *, const char *);

 @@ -1,14 +1,14 @@
-/*	$NetBSD: if_ie_gsc.c,v 1.18 2009/05/08 09:33:58 skrll Exp $	*/
+/*	$NetBSD: if_ie_gsc.c,v 1.19 2009/05/24 06:53:35 skrll Exp $	*/
 /*	$OpenBSD: if_ie_gsc.c,v 1.6 2001/01/12 22:57:04 mickey Exp $	*/
 /*
  * Copyright (c) 1998,1999 Michael Shalayeff
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
 @@ -32,27 +32,27 @@
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 /*
  * Referencies:
  * 1. 82596DX and 82596SX High-Perfomance 32-bit Local Area Network Coprocessor
  *    Intel Corporation, November 1996, Order Number: 290219-006
+ *
  * 2. 712 I/O Subsystem ERS Rev 1.0
  *    Hewlett-Packard, June 17 1992, Dwg No. A-A2263-66510-31
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_ie_gsc.c,v 1.18 2009/05/08 09:33:58 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_ie_gsc.c,v 1.19 2009/05/24 06:53:35 skrll Exp $");
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/device.h>
 #include <sys/socket.h>
 #include <sys/sockio.h>
 #include <uvm/uvm_extern.h>
 #include <net/if.h>
 #include <net/if_dl.h>
 #include <net/if_ether.h>
 #include <net/if_types.h>
 @@ -75,29 +75,29 @@ __KERNEL_RCSID(0, "$NetBSD: if_ie_gsc.c,
 #define	I82596_DEBUG	I82586_DEBUG
 /*
  * XXX fredette - I'm defining these on a hunch.  When things
  * appear to be working, remove these.
  */
 #if 1
 #define fdcache_small fdcache
 #define pdcache_small pdcache
 #endif
 #ifdef __for_reference_only
 struct ie_gsc_regs {
-	u_int32_t	ie_reset;
+	uint32_t	ie_reset;
-	u_int32_t	ie_port;
+	uint32_t	ie_port;
-	u_int32_t	ie_attn;
+	uint32_t	ie_attn;
 };
 #endif
 #define	IE_GSC_BANK_SZ		(12)
 #define	IE_GSC_REG_RESET	(0)
 #define	IE_GSC_REG_PORT		(4)
 #define	IE_GSC_REG_ATTN		(8)
 #define	IE_GSC_ALIGN(v)	((((u_int) (v)) + 0xf) & ~0xf)
 #define	IE_GSC_SYSBUS	(IE_SYSBUS_596_RSVD_SET	| \
 			 IE_SYSBUS_596_82586	| \
 			 IE_SYSBUS_596_INTLOW	| \
 @@ -381,27 +381,27 @@ ie_gsc_probe(device_t parent, cfdata_t m
 	return 1;
+}
 void
 ie_gsc_attach(device_t parent, device_t self, void *aux)
+{
 	struct ie_gsc_softc *gsc = device_private(self);
 	struct ie_softc *sc = &gsc->ie;
 	struct gsc_attach_args *ga = aux;
 	bus_dma_segment_t seg;
 	int rseg;
 	int rv;
-	u_int8_t myaddr[ETHER_ADDR_LEN];
+	uint8_t myaddr[ETHER_ADDR_LEN];
 #ifdef PMAPDEBUG
 	extern int pmapdebug;
 	int opmapdebug = pmapdebug;
 	pmapdebug = 0;
 #endif
 	if (ga->ga_type.iodc_sv_model == HPPA_FIO_GLAN)
 		gsc->flags |= IEGSC_GECKO;
 	/*
 	 * Map the GSC registers.
 	 */
 	if (bus_space_map(ga->ga_iot, ga->ga_hpa,

 @@ -1,14 +1,14 @@
-/* $NetBSD: if_iee_gsc.c,v 1.14 2009/05/10 04:26:19 tsutsui Exp $ */
+/* $NetBSD: if_iee_gsc.c,v 1.15 2009/05/24 06:53:35 skrll Exp $ */
 /*
  * Copyright (c) 2003 Jochen Kunz.
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
 @@ -24,27 +24,27 @@
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 /*
  * hp700 GSC bus MD frontend for the iee(4) Intel i82596 Ethernet driver.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_iee_gsc.c,v 1.14 2009/05/10 04:26:19 tsutsui Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_iee_gsc.c,v 1.15 2009/05/24 06:53:35 skrll Exp $");
 /* autoconfig and device stuff */
 #include <sys/param.h>
 #include <sys/device.h>
 #include <sys/conf.h>
 #include <machine/iomod.h>
 #include <machine/autoconf.h>
 #include <hp700/dev/cpudevs.h>
 #include <hp700/gsc/gscbusvar.h>
 #include "locators.h"
 #include "ioconf.h"
 /* bus_space / bus_dma etc. */
 @@ -95,31 +95,31 @@ struct iee_gsc_softc {
 	bus_space_handle_t sc_ioh;
 	void *sc_ih;
 };
 CFATTACH_DECL_NEW(
 	iee_gsc,
 	sizeof(struct iee_gsc_softc),
 	iee_gsc_match,
 	iee_gsc_attach,
 	iee_gsc_detach,
 	NULL
 );
-int iee_gsc_cmd(struct iee_softc *, u_int32_t);
+int iee_gsc_cmd(struct iee_softc *, uint32_t);
 int iee_gsc_reset(struct iee_softc *);
 int
-iee_gsc_cmd(struct iee_softc *sc, u_int32_t cmd)
+iee_gsc_cmd(struct iee_softc *sc, uint32_t cmd)
+{
 	struct iee_gsc_softc *sc_gsc = (struct iee_gsc_softc *)sc;
 	int n;
 	uint16_t ack;
 	SC_SCB(sc)->scb_cmd = cmd;
 	IEE_SCBSYNC(sc, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
 	/* Issue a Channel Attention to force the chip to read the cmd. */
 	bus_space_write_4(sc_gsc->sc_iot, sc_gsc->sc_ioh, IEE_GSC_CHANATT, 0);
 	/* Wait for the cmd to finish */
 	for (n = 0 ; n < 100000; n++) {
 		DELAY(1);
 		IEE_SCBSYNC(sc, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);

 @@ -1,14 +1,14 @@
-/*	$NetBSD: lpt_gsc.c,v 1.10 2009/05/08 09:33:58 skrll Exp $	*/
+/*	$NetBSD: lpt_gsc.c,v 1.11 2009/05/24 06:53:35 skrll Exp $	*/
 /*	$OpenBSD: lpt_gsc.c,v 1.6 2000/07/21 17:41:06 mickey Exp $	*/
 /*
  * Copyright (c) 1998 Michael Shalayeff
  * Copyright (c) 1993, 1994 Charles Hannum.
  * Copyright (c) 1990 William F. Jolitz, TeleMuse
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
 @@ -43,27 +43,27 @@
  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  * ARE DISCLAIMED.  IN NO EVENT SHALL THE DEVELOPER BE LIABLE
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: lpt_gsc.c,v 1.10 2009/05/08 09:33:58 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: lpt_gsc.c,v 1.11 2009/05/24 06:53:35 skrll Exp $");
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/device.h>
 #include <machine/bus.h>
 #include <machine/intr.h>
 #include <machine/iomod.h>
 #include <machine/autoconf.h>
 #include <dev/ic/lptreg.h>
 #include <dev/ic/lptvar.h>
 @@ -128,27 +128,27 @@ lpt_port_test(bus_space_tag_t iot, bus_s
+ *
  *	   XXX Some printers may not like a fast pulse on init or strobe, I
  *	   don't know at this point, if that becomes a problem these bits
  *	   should be turned off in the mask byte for the control port test.
+ *
  *	3) Set the data and control ports to a value of 0
  */
 int
 lpt_gsc_probe(device_t parent, cfdata_t match, void *aux)
+{
 	struct gsc_attach_args *ga = aux;
 	bus_space_handle_t ioh;
 	bus_addr_t base;
-	u_int8_t mask, data;
+	uint8_t mask, data;
 	int i, rv;
 	if (ga->ga_type.iodc_type != HPPA_TYPE_FIO ||
 	    ga->ga_type.iodc_sv_model != HPPA_FIO_CENT)
 		return 0;
 #ifdef DEBUG
 #define	ABORT								     \
 	do {								     \
 		printf("lpt_gsc_probe: mask %x data %x failed\n", mask,	     \
 		    data);						     \
 		bus_space_unmap(ga->ga_iot, ioh, LPT_NPORTS);		     \
 		return 0;						     \

 @@ -1,35 +1,35 @@
-/*	$NetBSD: siop_gsc.c,v 1.10 2009/05/15 17:55:44 tsutsui Exp $	*/
+/*	$NetBSD: siop_gsc.c,v 1.11 2009/05/24 06:53:35 skrll Exp $	*/
 /*	$OpenBSD: siop_gsc.c,v 1.4 2007/08/23 21:01:22 kettenis Exp $	*/
 /*
  * Copyright (c) 2007 Mark Kettenis
+ *
  * Permission to use, copy, modify, and distribute this software for any
  * purpose with or without fee is hereby granted, provided that the above
  * copyright notice and this permission notice appear in all copies.
+ *
  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: siop_gsc.c,v 1.10 2009/05/15 17:55:44 tsutsui Exp $");
+__KERNEL_RCSID(0, "$NetBSD: siop_gsc.c,v 1.11 2009/05/24 06:53:35 skrll Exp $");
 #include <sys/param.h>
 #include <sys/device.h>
 #include <sys/systm.h>
 #include <uvm/uvm_extern.h>
 #include <machine/autoconf.h>
 #include <machine/bus.h>
 #include <machine/iomod.h>
 #include <dev/scsipi/scsi_all.h>
 #include <dev/scsipi/scsipi_all.h>
 @@ -40,30 +40,30 @@ __KERNEL_RCSID(0, "$NetBSD: siop_gsc.c,v
 #include <dev/ic/siopvar.h>
 #include <hp700/dev/cpudevs.h>
 #include <hp700/gsc/gscbusvar.h>
 #define	SIOP_GSC_RESET	0x0000
 #define	SIOP_GSC_OFFSET	0x0100
 int siop_gsc_match(device_t, cfdata_t, void *);
 void siop_gsc_attach(device_t, device_t, void *);
 int siop_gsc_intr(void *);
 void siop_gsc_reset(struct siop_common_softc *);
-u_int8_t siop_gsc_r1(void *, bus_space_handle_t, bus_size_t);
+uint8_t siop_gsc_r1(void *, bus_space_handle_t, bus_size_t);
-u_int16_t siop_gsc_r2(void *, bus_space_handle_t, bus_size_t);
+uint16_t siop_gsc_r2(void *, bus_space_handle_t, bus_size_t);
-void siop_gsc_w1(void *, bus_space_handle_t, bus_size_t, u_int8_t);
+void siop_gsc_w1(void *, bus_space_handle_t, bus_size_t, uint8_t);
-void siop_gsc_w2(void *, bus_space_handle_t, bus_size_t, u_int16_t);
+void siop_gsc_w2(void *, bus_space_handle_t, bus_size_t, uint16_t);
 struct siop_gsc_softc {
 	struct siop_softc sc_siop;
 	bus_space_tag_t sc_iot;
 	bus_space_handle_t sc_ioh;
 	struct hppa_bus_space_tag sc_bustag;
 };
 CFATTACH_DECL_NEW(siop_gsc, sizeof(struct siop_gsc_softc),
     siop_gsc_match, siop_gsc_attach, NULL, NULL);
 int
 siop_gsc_match(device_t parent, cfdata_t match, void *aux)
 @@ -130,43 +130,43 @@ siop_gsc_attach(device_t parent, device_
+}
 void
 siop_gsc_reset(struct siop_common_softc *sc)
+{
 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_DCNTL, DCNTL_EA);
 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST0, CTEST0_EHP);
 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST4, CTEST4_MUX);
 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STIME0,
 	    (0xc << STIME0_SEL_SHIFT));
+}
-u_int8_t
+uint8_t
 siop_gsc_r1(void *v, bus_space_handle_t h, bus_size_t o)
+{
-	return *(volatile u_int8_t *)(h + (o ^ 3));
+	return *(volatile uint8_t *)(h + (o ^ 3));
+}
-u_int16_t
+uint16_t
 siop_gsc_r2(void *v, bus_space_handle_t h, bus_size_t o)
+{
 	if (o == SIOP_SIST0) {
-		u_int16_t reg;
+		uint16_t reg;
 		reg = siop_gsc_r1(v, h, SIOP_SIST0);
 		reg |= siop_gsc_r1(v, h, SIOP_SIST1) << 8;
 		return reg;
+	}
-	return *(volatile u_int16_t *)(h + (o ^ 2));
+	return *(volatile uint16_t *)(h + (o ^ 2));
+}
 void
-siop_gsc_w1(void *v, bus_space_handle_t h, bus_size_t o, u_int8_t vv)
+siop_gsc_w1(void *v, bus_space_handle_t h, bus_size_t o, uint8_t vv)
+{
-	*(volatile u_int8_t *)(h + (o ^ 3)) = vv;
+	*(volatile uint8_t *)(h + (o ^ 3)) = vv;
+}
 void
-siop_gsc_w2(void *v, bus_space_handle_t h, bus_size_t o, u_int16_t vv)
+siop_gsc_w2(void *v, bus_space_handle_t h, bus_size_t o, uint16_t vv)
+{
-	*(volatile u_int16_t *)(h + (o ^ 2)) = vv;
+	*(volatile uint16_t *)(h + (o ^ 2)) = vv;
+}

 @@ -1,14 +1,14 @@
-/*	$NetBSD: osiop_gsc.c,v 1.13 2009/05/08 09:33:58 skrll Exp $	*/
+/*	$NetBSD: osiop_gsc.c,v 1.14 2009/05/24 06:53:35 skrll Exp $	*/
 /*
  * Copyright (c) 2001 Matt Fredette.  All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
  * 3. The name of the author may not be used to endorse or promote products
 @@ -73,27 +73,27 @@
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: osiop_gsc.c,v 1.13 2009/05/08 09:33:58 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: osiop_gsc.c,v 1.14 2009/05/24 06:53:35 skrll Exp $");
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/device.h>
 #include <sys/buf.h>
 #include <sys/malloc.h>
 #include <dev/scsipi/scsi_all.h>
 #include <dev/scsipi/scsipi_all.h>
 #include <dev/scsipi/scsiconf.h>
 #include <machine/cpu.h>
 #include <machine/intr.h>
 @@ -183,27 +183,27 @@ osiop_gsc_attach(device_t parent, device
 	osiop_attach(sc);
 	(void)hp700_intr_establish(self, IPL_BIO,
 	    osiop_gsc_intr, sc, ga->ga_int_reg, ga->ga_irq);
+}
 /*
  * interrupt handler
  */
 int
 osiop_gsc_intr(void *arg)
+{
 	struct osiop_softc *sc = arg;
-	u_int8_t istat;
+	uint8_t istat;
 	/* This is potentially nasty, since the IRQ is level triggered... */
 	if (sc->sc_flags & OSIOP_INTSOFF)
 		return (0);
 	istat = osiop_read_1(sc, OSIOP_ISTAT);
 	if ((istat & (OSIOP_ISTAT_SIP | OSIOP_ISTAT_DIP)) == 0)
 		return (0);
 	/* Save interrupt details for the back-end interrupt handler */
 	sc->sc_sstat0 = osiop_read_1(sc, OSIOP_SSTAT0);
 	sc->sc_istat = istat;

 @@ -1,14 +1,14 @@
-/*	$NetBSD: bus.h,v 1.12 2007/03/04 05:59:51 christos Exp $	*/
+/*	$NetBSD: bus.h,v 1.13 2009/05/24 06:53:35 skrll Exp $	*/
 /*	$OpenBSD: bus.h,v 1.13 2001/07/30 14:15:59 art Exp $	*/
 /*
  * Copyright (c) 1998,1999 Michael Shalayeff
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
 @@ -55,117 +55,117 @@ struct hppa_bus_space_tag {
 			       bus_size_t size);
 	int  (*hbt_subregion)(void *v, bus_space_handle_t bsh,
 				   bus_size_t offset, bus_size_t size,
 				   bus_space_handle_t *nbshp);
 	int  (*hbt_alloc)(void *v, bus_addr_t rstart, bus_addr_t rend,
 			       bus_size_t size, bus_size_t align,
 			       bus_size_t boundary, int flags,
 			       bus_addr_t *addrp, bus_space_handle_t *bshp);
 	void (*hbt_free)(void *, bus_space_handle_t, bus_size_t);
 	void (*hbt_barrier)(void *v, bus_space_handle_t h,
 				 bus_size_t o, bus_size_t l, int op);
 	void *(*hbt_vaddr)(void *, bus_space_handle_t);
-	u_int8_t  (*hbt_r1)(void *, bus_space_handle_t, bus_size_t);
+	uint8_t  (*hbt_r1)(void *, bus_space_handle_t, bus_size_t);
-	u_int16_t (*hbt_r2)(void *, bus_space_handle_t, bus_size_t);
+	uint16_t (*hbt_r2)(void *, bus_space_handle_t, bus_size_t);
-	u_int32_t (*hbt_r4)(void *, bus_space_handle_t, bus_size_t);
+	uint32_t (*hbt_r4)(void *, bus_space_handle_t, bus_size_t);
-	u_int64_t (*hbt_r8)(void *, bus_space_handle_t, bus_size_t);
+	uint64_t (*hbt_r8)(void *, bus_space_handle_t, bus_size_t);
-	void (*hbt_w1)(void *, bus_space_handle_t, bus_size_t, u_int8_t);
+	void (*hbt_w1)(void *, bus_space_handle_t, bus_size_t, uint8_t);
-	void (*hbt_w2)(void *, bus_space_handle_t, bus_size_t, u_int16_t);
+	void (*hbt_w2)(void *, bus_space_handle_t, bus_size_t, uint16_t);
-	void (*hbt_w4)(void *, bus_space_handle_t, bus_size_t, u_int32_t);
+	void (*hbt_w4)(void *, bus_space_handle_t, bus_size_t, uint32_t);
-	void (*hbt_w8)(void *, bus_space_handle_t, bus_size_t, u_int64_t);
+	void (*hbt_w8)(void *, bus_space_handle_t, bus_size_t, uint64_t);
 	void (*hbt_rm_1)(void *v, bus_space_handle_t h,
-			      bus_size_t o, u_int8_t *a, bus_size_t c);
+			      bus_size_t o, uint8_t *a, bus_size_t c);
 	void (*hbt_rm_2)(void *v, bus_space_handle_t h,
-			      bus_size_t o, u_int16_t *a, bus_size_t c);
+			      bus_size_t o, uint16_t *a, bus_size_t c);
 	void (*hbt_rm_4)(void *v, bus_space_handle_t h,
-			      bus_size_t o, u_int32_t *a, bus_size_t c);
+			      bus_size_t o, uint32_t *a, bus_size_t c);
 	void (*hbt_rm_8)(void *v, bus_space_handle_t h,
-			      bus_size_t o, u_int64_t *a, bus_size_t c);
+			      bus_size_t o, uint64_t *a, bus_size_t c);
 	void (*hbt_wm_1)(void *v, bus_space_handle_t h, bus_size_t o,
-			      const u_int8_t *a, bus_size_t c);
+			      const uint8_t *a, bus_size_t c);
 	void (*hbt_wm_2)(void *v, bus_space_handle_t h, bus_size_t o,
-			      const u_int16_t *a, bus_size_t c);
+			      const uint16_t *a, bus_size_t c);
 	void (*hbt_wm_4)(void *v, bus_space_handle_t h, bus_size_t o,
-			      const u_int32_t *a, bus_size_t c);
+			      const uint32_t *a, bus_size_t c);
 	void (*hbt_wm_8)(void *v, bus_space_handle_t h, bus_size_t o,
-			      const u_int64_t *a, bus_size_t c);
+			      const uint64_t *a, bus_size_t c);
 	void (*hbt_sm_1)(void *v, bus_space_handle_t h, bus_size_t o,
-			      u_int8_t  vv, bus_size_t c);
+			      uint8_t  vv, bus_size_t c);
 	void (*hbt_sm_2)(void *v, bus_space_handle_t h, bus_size_t o,
-			      u_int16_t vv, bus_size_t c);
+			      uint16_t vv, bus_size_t c);
 	void (*hbt_sm_4)(void *v, bus_space_handle_t h, bus_size_t o,
-			      u_int32_t vv, bus_size_t c);
+			      uint32_t vv, bus_size_t c);
 	void (*hbt_sm_8)(void *v, bus_space_handle_t h, bus_size_t o,
-			      u_int64_t vv, bus_size_t c);
+			      uint64_t vv, bus_size_t c);
 	void (*hbt_rrm_2)(void *v, bus_space_handle_t h,
-			       bus_size_t o, u_int16_t *a, bus_size_t c);
+			       bus_size_t o, uint16_t *a, bus_size_t c);
 	void (*hbt_rrm_4)(void *v, bus_space_handle_t h,
-			       bus_size_t o, u_int32_t *a, bus_size_t c);
+			       bus_size_t o, uint32_t *a, bus_size_t c);
 	void (*hbt_rrm_8)(void *v, bus_space_handle_t h,
-			       bus_size_t o, u_int64_t *a, bus_size_t c);
+			       bus_size_t o, uint64_t *a, bus_size_t c);
 	void (*hbt_wrm_2)(void *v, bus_space_handle_t h,
-			       bus_size_t o, const u_int16_t *a, bus_size_t c);
+			       bus_size_t o, const uint16_t *a, bus_size_t c);
 	void (*hbt_wrm_4)(void *v, bus_space_handle_t h,
-			       bus_size_t o, const u_int32_t *a, bus_size_t c);
+			       bus_size_t o, const uint32_t *a, bus_size_t c);
 	void (*hbt_wrm_8)(void *v, bus_space_handle_t h,
-			       bus_size_t o, const u_int64_t *a, bus_size_t c);
+			       bus_size_t o, const uint64_t *a, bus_size_t c);
 	void (*hbt_rr_1)(void *v, bus_space_handle_t h,
-			      bus_size_t o, u_int8_t *a, bus_size_t c);
+			      bus_size_t o, uint8_t *a, bus_size_t c);
 	void (*hbt_rr_2)(void *v, bus_space_handle_t h,
-			      bus_size_t o, u_int16_t *a, bus_size_t c);
+			      bus_size_t o, uint16_t *a, bus_size_t c);
 	void (*hbt_rr_4)(void *v, bus_space_handle_t h,
-			      bus_size_t o, u_int32_t *a, bus_size_t c);
+			      bus_size_t o, uint32_t *a, bus_size_t c);
 	void (*hbt_rr_8)(void *v, bus_space_handle_t h,
-			      bus_size_t o, u_int64_t *a, bus_size_t c);
+			      bus_size_t o, uint64_t *a, bus_size_t c);
 	void (*hbt_wr_1)(void *v, bus_space_handle_t h,
-			      bus_size_t o, const u_int8_t *a, bus_size_t c);
+			      bus_size_t o, const uint8_t *a, bus_size_t c);
 	void (*hbt_wr_2)(void *v, bus_space_handle_t h,
-			      bus_size_t o, const u_int16_t *a, bus_size_t c);
+			      bus_size_t o, const uint16_t *a, bus_size_t c);
 	void (*hbt_wr_4)(void *v, bus_space_handle_t h,
-			      bus_size_t o, const u_int32_t *a, bus_size_t c);
+			      bus_size_t o, const uint32_t *a, bus_size_t c);
 	void (*hbt_wr_8)(void *v, bus_space_handle_t h,
-			      bus_size_t o, const u_int64_t *a, bus_size_t c);
+			      bus_size_t o, const uint64_t *a, bus_size_t c);
 	void (*hbt_rrr_2)(void *v, bus_space_handle_t h,
-			       bus_size_t o, u_int16_t *a, bus_size_t c);
+			       bus_size_t o, uint16_t *a, bus_size_t c);
 	void (*hbt_rrr_4)(void *v, bus_space_handle_t h,
-			       bus_size_t o, u_int32_t *a, bus_size_t c);
+			       bus_size_t o, uint32_t *a, bus_size_t c);
 	void (*hbt_rrr_8)(void *v, bus_space_handle_t h,
-			       bus_size_t o, u_int64_t *a, bus_size_t c);
+			       bus_size_t o, uint64_t *a, bus_size_t c);
 	void (*hbt_wrr_2)(void *v, bus_space_handle_t h,
-			       bus_size_t o, const u_int16_t *a, bus_size_t c);
+			       bus_size_t o, const uint16_t *a, bus_size_t c);
 	void (*hbt_wrr_4)(void *v, bus_space_handle_t h,
-			       bus_size_t o, const u_int32_t *a, bus_size_t c);
+			       bus_size_t o, const uint32_t *a, bus_size_t c);
 	void (*hbt_wrr_8)(void *v, bus_space_handle_t h,
-			       bus_size_t o, const u_int64_t *a, bus_size_t c);
+			       bus_size_t o, const uint64_t *a, bus_size_t c);
 	void (*hbt_sr_1)(void *v, bus_space_handle_t h,
-			       bus_size_t o, u_int8_t vv, bus_size_t c);
+			       bus_size_t o, uint8_t vv, bus_size_t c);
 	void (*hbt_sr_2)(void *v, bus_space_handle_t h,
-			       bus_size_t o, u_int16_t vv, bus_size_t c);
+			       bus_size_t o, uint16_t vv, bus_size_t c);
 	void (*hbt_sr_4)(void *v, bus_space_handle_t h,
-			       bus_size_t o, u_int32_t vv, bus_size_t c);
+			       bus_size_t o, uint32_t vv, bus_size_t c);
 	void (*hbt_sr_8)(void *v, bus_space_handle_t h,
-			       bus_size_t o, u_int64_t vv, bus_size_t c);
+			       bus_size_t o, uint64_t vv, bus_size_t c);
 	void (*hbt_cp_1)(void *v, bus_space_handle_t h1, bus_size_t o1,
 			      bus_space_handle_t h2, bus_size_t o2, bus_size_t c);
 	void (*hbt_cp_2)(void *v, bus_space_handle_t h1, bus_size_t o1,
 			      bus_space_handle_t h2, bus_size_t o2, bus_size_t c);
 	void (*hbt_cp_4)(void *v, bus_space_handle_t h1, bus_size_t o1,
 			      bus_space_handle_t h2, bus_size_t o2, bus_size_t c);
 	void (*hbt_cp_8)(void *v, bus_space_handle_t h1, bus_size_t o1,
 			      bus_space_handle_t h2, bus_size_t o2, bus_size_t c);
 };
 typedef const struct hppa_bus_space_tag *bus_space_tag_t;
 extern const struct hppa_bus_space_tag hppa_bustag;

 @@ -1,14 +1,14 @@
-/*	$NetBSD: pdc.h,v 1.9 2009/05/08 09:33:58 skrll Exp $	*/
+/*	$NetBSD: pdc.h,v 1.10 2009/05/24 06:53:35 skrll Exp $	*/
 /*	$OpenBSD: pdc.h,v 1.35 2007/07/15 20:03:48 kettenis Exp $	*/
 /*
  * Copyright (c) 1990 mt Xinu, Inc.  All rights reserved.
  * Copyright (c) 1990,1991,1992,1994 University of Utah.  All rights reserved.
+ *
  * Permission to use, copy, modify and distribute this software is hereby
  * granted provided that (1) source code retains these copyright, permission,
  * and disclaimer notices, and (2) redistributions including binaries
  * reproduce the notices in supporting documentation, and (3) all advertising
  * materials mentioning features or use of this software display the following
  * acknowledgement: ``This product includes software developed by the
 @@ -561,60 +561,60 @@ struct pdc_pat_cell_module {	/* PDC_PAT_
 #define	PDC_PAT_CELL_MODIOC(t)	(((t) >> 40) & 0xff)
 #define	PDC_PAT_CELL_MODSIZE(t)	(((t) & 0xffffff) << PAGE_SHIFT)
 	u_long	loc;		/* module location */
 	struct device_path dp;	/* module path */
 	u_long	pad[508];	/* cell module gedoens */
 };
 struct pdc_pat_io_num {	/* PDC_PAT_IO */
 	u_int	num;
 	u_int	filler[31];
 };
 struct pdc_pat_pci_rt {	/* PDC_PAT_IO_GET_PCI_RT */
-	u_int8_t	type;		/* 0x8b */
+	uint8_t		type;		/* 0x8b */
-	u_int8_t	len;
+	uint8_t		len;
-	u_int8_t	itype;		/* 0 -- vectored int */
+	uint8_t		itype;		/* 0 -- vectored int */
-	u_int8_t	trigger;	/* polarity/level */
+	uint8_t		trigger;	/* polarity/level */
-	u_int8_t	pin;		/* PCI pin number */
+	uint8_t		pin;		/* PCI pin number */
-	u_int8_t	bus;
+	uint8_t		bus;
-	u_int8_t	seg;		/* reserved */
+	uint8_t		seg;		/* reserved */
-	u_int8_t	line;
+	uint8_t		line;
-	u_int64_t	addr;		/* io sapic address */
+	uint64_t	addr;		/* io sapic address */
 };
 struct pdc_memmap {	/* PDC_MEMMAP */
 	u_int	hpa;		/* HPA for module */
 	u_int	morepages;	/* additional IO pages */
 	u_int	filler[30];
 };
 struct pdc_system_map_find_mod {	/* PDC_SYSTEM_MAP_FIND_MOD */
 	u_int	hpa;
 	u_int	size;		/* pages */
 	u_int	naddrs;
 	u_int	mod_index;
 	u_int	filler[28];
 };
 struct pdc_system_map_find_addr {	/* PDC_SYSTEM_MAP_FIND_ADDR */
 	u_int	hpa;
 	u_int	size;		/* pages */
 	u_int	filler[30];
 };
 struct pdc_lan_station_id {	/* PDC_LAN_STATION_ID */
-	u_int8_t addr[6];
+	uint8_t	addr[6];
-	u_int8_t filler1[2];
+	uint8_t	filler1[2];
 	u_int	filler2[30];
 };
 /*
  * The PDC_CHASSIS is a strange bird.  The format for updating the display
  * is as follows:
+ *
  *	0     11 12      14    15   16    19 20    23 24    27 28    31
  *	+-------+----------+-------+--------+--------+--------+--------+
  *	|   R   | OS State | Blank |  Hex1  |  Hex2  |  Hex3  |  Hex4  |
  *	+-------+----------+-------+--------+--------+--------+--------+
+ *
  * Unfortunately, someone forgot to tell the hardware designers that
 @@ -650,30 +650,30 @@ struct pdc_lan_station_id {	/* PDC_LAN_S
 struct pdc_chassis_info {
 	u_int	size;
 	u_int	max_size;
 	u_int	filler[30];
 };
 struct pdc_chassis_lcd {
 	u_int	model : 16,
 		width : 16;
 	u_int	cmd_addr;
 	u_int	data_addr;
 	u_int	delay;
-	u_int8_t line[2];
+	uint8_t	line[2];
-	u_int8_t enabled;
+	uint8_t	enabled;
-	u_int8_t heartbeat[3];
+	uint8_t	heartbeat[3];
-	u_int8_t disk[3];
+	uint8_t disk[3];
 	u_int	filler[25];
 };
 /*
  * A processors Stable Storage is accessed through the PDC.  There are
  * at least 96 bytes of stable storage (the device path information may
  * or may not exist).  However, as far as I know, processors provide at
  * least 192 bytes of stable storage.
  */
 struct stable_storage {
 	struct device_path ss_pri_boot;	/* (see above) */
 	char	ss_filenames[32];
 	u_short	ss_os_version;	/* 0 == none, 1 == HP-UX, 2 == MPE-XL */

 @@ -1,14 +1,14 @@
-/*	$NetBSD: fpu.c,v 1.17 2009/04/30 15:34:24 skrll Exp $	*/
+/*	$NetBSD: fpu.c,v 1.18 2009/05/24 06:53:35 skrll Exp $	*/
 /*
  * Copyright (c) 2002 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Matthew Fredette.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
 @@ -24,27 +24,27 @@
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 /*
  * FPU handling for NetBSD/hppa.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.17 2009/04/30 15:34:24 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.18 2009/05/24 06:53:35 skrll Exp $");
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/proc.h>
 #include <sys/signalvar.h>
 #include <sys/user.h>
 #include <uvm/uvm_extern.h>
 #include <machine/cpufunc.h>
 #include <machine/frame.h>
 #include <machine/reg.h>
 #include <machine/pmap.h>
 @@ -131,28 +131,28 @@ const int _frame_reg_positions[32] = {
 	_FRAME_POSITION(tf_ret0),	/* r28 */
 	_FRAME_POSITION(tf_ret1),	/* r29 */
 	_FRAME_POSITION(tf_sp),		/* r30 */
 	_FRAME_POSITION(tf_r31),
 };
 #endif /* FPEMUL */
 /*
  * Bootstraps the FPU.
  */
 void
 hppa_fpu_bootstrap(u_int ccr_enable)
+{
-	u_int32_t junk[2];
+	uint32_t junk[2];
-	u_int32_t vers[2];
+	uint32_t vers[2];
 	extern u_int hppa_fpu_nop0;
 	extern u_int hppa_fpu_nop1;
 	/* See if we have a present and functioning hardware FPU. */
 	fpu_present = (ccr_enable & HPPA_FPUS) == HPPA_FPUS;
 	/* Initialize the FPU and get its version. */
 	if (fpu_present) {
 		/*
 		 * To somewhat optimize the emulation
 		 * assist trap handling and context
 		 * switching (to save them from having

 @@ -1,14 +1,14 @@
-/*	$NetBSD: pcb.h,v 1.6 2008/01/18 10:03:27 skrll Exp $	*/
+/*	$NetBSD: pcb.h,v 1.7 2009/05/24 06:53:35 skrll Exp $	*/
 /*	$OpenBSD: pcb.h,v 1.6 2000/01/12 07:24:35 mickey Exp $	*/
 /*
  * Copyright (c) 1999-2000 Michael Shalayeff
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
 @@ -30,27 +30,27 @@
  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  * THE POSSIBILITY OF SUCH DAMAGE.
  */
 #ifndef _HPPA_PCB_H_
 #define _HPPA_PCB_H_
 #include <machine/reg.h>
 struct pcb {
-	u_int64_t	pcb_fpregs[HPPA_NFPREGS+1];
+	uint64_t	pcb_fpregs[HPPA_NFPREGS+1];
 					/* not in the trapframe */
 	u_int		pcb_onfault;	/* SW copy fault handler */
 	pa_space_t	pcb_space;	/* copy pmap_space, for asm's sake */
 	vaddr_t		pcb_uva;	/* KVA for U-area */
 	u_int		pcb_ksp;	/* kernel sp for ctxsw */
 };
 struct md_coredump {
 	struct reg md_reg;
 	struct fpreg md_fpreg;
 };

 @@ -1,14 +1,14 @@
-/*	$NetBSD: pmap.h,v 1.20 2009/04/30 19:15:18 skrll Exp $	*/
+/*	$NetBSD: pmap.h,v 1.21 2009/05/24 06:53:35 skrll Exp $	*/
 /*	$OpenBSD: pmap.h,v 1.35 2007/12/14 18:32:23 deraadt Exp $	*/
 /*
  * Copyright (c) 2002-2004 Michael Shalayeff
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
 @@ -39,27 +39,27 @@
 #include <machine/pte.h>
 #include <machine/cpufunc.h>
 #include <uvm/uvm_pglist.h>
 #include <uvm/uvm_object.h>
 #ifdef	_KERNEL
 struct pmap {
 	struct uvm_object pm_obj;	/* object (lck by object lock) */
 #define	pm_lock	pm_obj.vmobjlock
 	struct vm_page	*pm_ptphint;
 	struct vm_page	*pm_pdir_pg;	/* vm_page for pdir */
-	volatile u_int32_t *pm_pdir;	/* page dir (read-only after create) */
+	volatile uint32_t *pm_pdir;	/* page dir (read-only after create) */
 	pa_space_t	pm_space;	/* space id (read-only after create) */
 	u_int		pm_pid;		/* prot id (read-only after create) */
 	struct pmap_statistics	pm_stats;
 };
 #define	PMAP_NC		0x100
 /*
  * Flags that indicate attributes of pages or mappings of pages.
+ *
  * We need two flags for cacheability because pages/mappings can be marked
  * uncacheable for two reasons,

 @@ -1,14 +1,14 @@
-/*	$NetBSD: reg.h,v 1.8 2009/05/16 12:57:05 skrll Exp $	*/
+/*	$NetBSD: reg.h,v 1.9 2009/05/24 06:53:35 skrll Exp $	*/
 /*	$OpenBSD: reg.h,v 1.7 2000/06/15 17:00:37 mickey Exp $	*/
 /*
  * Copyright (c) 1998 Michael Shalayeff
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
 @@ -177,41 +177,41 @@
 #define	DR_ITLB_SIZE_0		25
 #define	DR_DTLB_SIZE_1		26
 #define	DR_DTLB_SIZE_0		27
 #define CCR_MASK 0xff
 #define	HPPA_NREGS	(32)
 #define	HPPA_NFPREGS	(33)	/* 33rd is used for r0 in fpemul */
 #ifndef __ASSEMBLER__
 struct reg {
-	u_int32_t r_regs[HPPA_NREGS];	/* r0 is psw */
+	uint32_t r_regs[HPPA_NREGS];	/* r0 is psw */
-	u_int32_t r_sar;
+	uint32_t r_sar;
-	u_int32_t r_pcsqh;
+	uint32_t r_pcsqh;
-	u_int32_t r_pcsqt;
+	uint32_t r_pcsqt;
-	u_int32_t r_pcoqh;
+	uint32_t r_pcoqh;
-	u_int32_t r_pcoqt;
+	uint32_t r_pcoqt;
-	u_int32_t r_sr0;
+	uint32_t r_sr0;
-	u_int32_t r_sr1;
+	uint32_t r_sr1;
-	u_int32_t r_sr2;
+	uint32_t r_sr2;
-	u_int32_t r_sr3;
+	uint32_t r_sr3;
-	u_int32_t r_sr4;
+	uint32_t r_sr4;
-	u_int32_t r_sr5;	/* !mcontext */
+	uint32_t r_sr5;	/* !mcontext */
-	u_int32_t r_sr6;	/* !mcontext */
+	uint32_t r_sr6;	/* !mcontext */
-	u_int32_t r_sr7;	/* !mcontext */
+	uint32_t r_sr7;	/* !mcontext */
-	u_int32_t r_cr26;
+	uint32_t r_cr26;
-	u_int32_t r_cr27;
+	uint32_t r_cr27;
 };
 struct fpreg {
-	u_int64_t fpr_regs[HPPA_NFPREGS];
+	uint64_t fpr_regs[HPPA_NFPREGS];
 };
 #endif /* !__ASSEMBLER__ */
 #endif /* _HPPA_REG_H_ */