Sun Aug 2 00:06:44 2009 UTC ()
fix build failure.


(nonaka)
diff -r1.6 -r1.7 src/sys/arch/landisk/dev/obio.c
diff -r1.4 -r1.5 src/sys/arch/landisk/include/bus.h
diff -r1.1 -r1.2 src/sys/arch/landisk/landisk/shpcic_machdep.c
diff -r1.12 -r1.13 src/sys/arch/sh3/dev/shpcic.c
diff -r1.6 -r1.7 src/sys/arch/sh3/dev/shpcicvar.h

cvs diff -r1.6 -r1.7 src/sys/arch/landisk/dev/obio.c (expand / switch to unified diff)

--- src/sys/arch/landisk/dev/obio.c 2008/04/28 20:23:26 1.6
+++ src/sys/arch/landisk/dev/obio.c 2009/08/02 00:06:44 1.7
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: obio.c,v 1.6 2008/04/28 20:23:26 martin Exp $ */ 1/* $NetBSD: obio.c,v 1.7 2009/08/02 00:06:44 nonaka Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Charles M. Hannum. 8 * by Charles M. Hannum.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -20,27 +20,27 @@ @@ -20,27 +20,27 @@
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE. 29 * POSSIBILITY OF SUCH DAMAGE.
30 */ 30 */
31 31
32#include <sys/cdefs.h> 32#include <sys/cdefs.h>
33__KERNEL_RCSID(0, "$NetBSD: obio.c,v 1.6 2008/04/28 20:23:26 martin Exp $"); 33__KERNEL_RCSID(0, "$NetBSD: obio.c,v 1.7 2009/08/02 00:06:44 nonaka Exp $");
34 34
35#include "btn_obio.h" 35#include "btn_obio.h"
36#include "pwrsw_obio.h" 36#include "pwrsw_obio.h"
37 37
38#include <sys/param.h> 38#include <sys/param.h>
39#include <sys/systm.h> 39#include <sys/systm.h>
40#include <sys/device.h> 40#include <sys/device.h>
41 41
42#include <uvm/uvm_extern.h> 42#include <uvm/uvm_extern.h>
43 43
44#include <sh3/devreg.h> 44#include <sh3/devreg.h>
45#include <sh3/mmu.h> 45#include <sh3/mmu.h>
46#include <sh3/pmap.h> 46#include <sh3/pmap.h>
@@ -233,26 +233,28 @@ obio_intr_disestablish(void *arg) @@ -233,26 +233,28 @@ obio_intr_disestablish(void *arg)
233 (OBIO_IOMEM_PCMCIA_MEM|OBIO_IOMEM_PCMCIA_8BIT) 233 (OBIO_IOMEM_PCMCIA_MEM|OBIO_IOMEM_PCMCIA_8BIT)
234#define OBIO_IOMEM_PCMCIA_ATT8 \ 234#define OBIO_IOMEM_PCMCIA_ATT8 \
235 (OBIO_IOMEM_PCMCIA_ATT|OBIO_IOMEM_PCMCIA_8BIT) 235 (OBIO_IOMEM_PCMCIA_ATT|OBIO_IOMEM_PCMCIA_8BIT)
236 236
237int obio_iomem_map(void *v, bus_addr_t bpa, bus_size_t size, int flags, 237int obio_iomem_map(void *v, bus_addr_t bpa, bus_size_t size, int flags,
238 bus_space_handle_t *bshp); 238 bus_space_handle_t *bshp);
239void obio_iomem_unmap(void *v, bus_space_handle_t bsh, bus_size_t size); 239void obio_iomem_unmap(void *v, bus_space_handle_t bsh, bus_size_t size);
240int obio_iomem_subregion(void *v, bus_space_handle_t bsh, 240int obio_iomem_subregion(void *v, bus_space_handle_t bsh,
241 bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp); 241 bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp);
242int obio_iomem_alloc(void *v, bus_addr_t rstart, bus_addr_t rend, 242int obio_iomem_alloc(void *v, bus_addr_t rstart, bus_addr_t rend,
243 bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags, 243 bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
244 bus_addr_t *bpap, bus_space_handle_t *bshp); 244 bus_addr_t *bpap, bus_space_handle_t *bshp);
245void obio_iomem_free(void *v, bus_space_handle_t bsh, bus_size_t size); 245void obio_iomem_free(void *v, bus_space_handle_t bsh, bus_size_t size);
 246paddr_t obio_iomem_mmap(void *v, bus_addr_t addr, off_t off, int prot,
 247 int flags);
246 248
247static int obio_iomem_add_mapping(bus_addr_t, bus_size_t, int, 249static int obio_iomem_add_mapping(bus_addr_t, bus_size_t, int,
248 bus_space_handle_t *); 250 bus_space_handle_t *);
249 251
250static int 252static int
251obio_iomem_add_mapping(bus_addr_t bpa, bus_size_t size, int type, 253obio_iomem_add_mapping(bus_addr_t bpa, bus_size_t size, int type,
252 bus_space_handle_t *bshp) 254 bus_space_handle_t *bshp)
253{ 255{
254 u_long pa, endpa; 256 u_long pa, endpa;
255 vaddr_t va; 257 vaddr_t va;
256 pt_entry_t *pte; 258 pt_entry_t *pte;
257 unsigned int m = 0; 259 unsigned int m = 0;
258 int io_type = type & ~OBIO_IOMEM_PCMCIA_8BIT; 260 int io_type = type & ~OBIO_IOMEM_PCMCIA_8BIT;
@@ -374,26 +376,33 @@ obio_iomem_alloc(void *v, bus_addr_t rst @@ -374,26 +376,33 @@ obio_iomem_alloc(void *v, bus_addr_t rst
374 376
375 *bshp = *bpap = rstart; 377 *bshp = *bpap = rstart;
376 378
377 return (0); 379 return (0);
378} 380}
379 381
380void 382void
381obio_iomem_free(void *v, bus_space_handle_t bsh, bus_size_t size) 383obio_iomem_free(void *v, bus_space_handle_t bsh, bus_size_t size)
382{ 384{
383 385
384 obio_iomem_unmap(v, bsh, size); 386 obio_iomem_unmap(v, bsh, size);
385} 387}
386 388
 389paddr_t
 390obio_iomem_mmap(void *v, bus_addr_t addr, off_t off, int prot, int flags)
 391{
 392
 393 return (paddr_t)-1;
 394}
 395
387/* 396/*
388 * on-board I/O bus space read/write 397 * on-board I/O bus space read/write
389 */ 398 */
390uint8_t obio_iomem_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset); 399uint8_t obio_iomem_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset);
391uint16_t obio_iomem_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset); 400uint16_t obio_iomem_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset);
392uint32_t obio_iomem_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset); 401uint32_t obio_iomem_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset);
393void obio_iomem_read_multi_1(void *v, bus_space_handle_t bsh, 402void obio_iomem_read_multi_1(void *v, bus_space_handle_t bsh,
394 bus_size_t offset, uint8_t *addr, bus_size_t count); 403 bus_size_t offset, uint8_t *addr, bus_size_t count);
395void obio_iomem_read_multi_2(void *v, bus_space_handle_t bsh, 404void obio_iomem_read_multi_2(void *v, bus_space_handle_t bsh,
396 bus_size_t offset, uint16_t *addr, bus_size_t count); 405 bus_size_t offset, uint16_t *addr, bus_size_t count);
397void obio_iomem_read_multi_4(void *v, bus_space_handle_t bsh, 406void obio_iomem_read_multi_4(void *v, bus_space_handle_t bsh,
398 bus_size_t offset, uint32_t *addr, bus_size_t count); 407 bus_size_t offset, uint32_t *addr, bus_size_t count);
399void obio_iomem_read_region_1(void *v, bus_space_handle_t bsh, 408void obio_iomem_read_region_1(void *v, bus_space_handle_t bsh,
@@ -440,26 +449,28 @@ void obio_iomem_copy_region_4(void *v, b @@ -440,26 +449,28 @@ void obio_iomem_copy_region_4(void *v, b
440 bus_space_handle_t h2, bus_size_t o2, bus_size_t count); 449 bus_space_handle_t h2, bus_size_t o2, bus_size_t count);
441 450
442struct _bus_space obio_bus_io = 451struct _bus_space obio_bus_io =
443{ 452{
444 .bs_cookie = (void *)OBIO_IOMEM_PCMCIA_IO, 453 .bs_cookie = (void *)OBIO_IOMEM_PCMCIA_IO,
445 454
446 .bs_map = obio_iomem_map, 455 .bs_map = obio_iomem_map,
447 .bs_unmap = obio_iomem_unmap, 456 .bs_unmap = obio_iomem_unmap,
448 .bs_subregion = obio_iomem_subregion, 457 .bs_subregion = obio_iomem_subregion,
449 458
450 .bs_alloc = obio_iomem_alloc, 459 .bs_alloc = obio_iomem_alloc,
451 .bs_free = obio_iomem_free, 460 .bs_free = obio_iomem_free,
452 461
 462 .bs_mmap = obio_iomem_mmap,
 463
453 .bs_r_1 = obio_iomem_read_1, 464 .bs_r_1 = obio_iomem_read_1,
454 .bs_r_2 = obio_iomem_read_2, 465 .bs_r_2 = obio_iomem_read_2,
455 .bs_r_4 = obio_iomem_read_4, 466 .bs_r_4 = obio_iomem_read_4,
456 467
457 .bs_rm_1 = obio_iomem_read_multi_1, 468 .bs_rm_1 = obio_iomem_read_multi_1,
458 .bs_rm_2 = obio_iomem_read_multi_2, 469 .bs_rm_2 = obio_iomem_read_multi_2,
459 .bs_rm_4 = obio_iomem_read_multi_4, 470 .bs_rm_4 = obio_iomem_read_multi_4,
460 471
461 .bs_rr_1 = obio_iomem_read_region_1, 472 .bs_rr_1 = obio_iomem_read_region_1,
462 .bs_rr_2 = obio_iomem_read_region_2, 473 .bs_rr_2 = obio_iomem_read_region_2,
463 .bs_rr_4 = obio_iomem_read_region_4, 474 .bs_rr_4 = obio_iomem_read_region_4,
464 475
465 .bs_w_1 = obio_iomem_write_1, 476 .bs_w_1 = obio_iomem_write_1,

cvs diff -r1.4 -r1.5 src/sys/arch/landisk/include/Attic/bus.h (expand / switch to unified diff)

--- src/sys/arch/landisk/include/Attic/bus.h 2008/04/28 20:23:26 1.4
+++ src/sys/arch/landisk/include/Attic/bus.h 2009/08/02 00:06:44 1.5
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: bus.h,v 1.4 2008/04/28 20:23:26 martin Exp $ */ 1/* $NetBSD: bus.h,v 1.5 2009/08/02 00:06:44 nonaka Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc. 4 * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center. 9 * NASA Ames Research Center.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions 12 * modification, are permitted provided that the following conditions
13 * are met: 13 * are met:
14 * 1. Redistributions of source code must retain the above copyright 14 * 1. Redistributions of source code must retain the above copyright
@@ -120,26 +120,29 @@ struct _bus_space { @@ -120,26 +120,29 @@ struct _bus_space {
120 int (*bs_subregion)(void *, bus_space_handle_t, 120 int (*bs_subregion)(void *, bus_space_handle_t,
121 bus_size_t, bus_size_t, bus_space_handle_t *); 121 bus_size_t, bus_size_t, bus_space_handle_t *);
122 122
123 /* allocation/deallocation */ 123 /* allocation/deallocation */
124 int (*bs_alloc)(void *, bus_addr_t, bus_addr_t, 124 int (*bs_alloc)(void *, bus_addr_t, bus_addr_t,
125 bus_size_t, bus_size_t, bus_size_t, int, 125 bus_size_t, bus_size_t, bus_size_t, int,
126 bus_addr_t *, bus_space_handle_t *); 126 bus_addr_t *, bus_space_handle_t *);
127 void (*bs_free)(void *, bus_space_handle_t, 127 void (*bs_free)(void *, bus_space_handle_t,
128 bus_size_t); 128 bus_size_t);
129 129
130 /* get kernel virtual address */ 130 /* get kernel virtual address */
131 void * (*bs_vaddr)(void *, bus_space_handle_t); 131 void * (*bs_vaddr)(void *, bus_space_handle_t);
132 132
 133 /* mmap bus space for user */
 134 paddr_t (*bs_mmap)(void *, bus_addr_t, off_t, int, int);
 135
133 /* read (single) */ 136 /* read (single) */
134 uint8_t (*bs_r_1)(void *, bus_space_handle_t, 137 uint8_t (*bs_r_1)(void *, bus_space_handle_t,
135 bus_size_t); 138 bus_size_t);
136 uint16_t (*bs_r_2)(void *, bus_space_handle_t, 139 uint16_t (*bs_r_2)(void *, bus_space_handle_t,
137 bus_size_t); 140 bus_size_t);
138 uint32_t (*bs_r_4)(void *, bus_space_handle_t, 141 uint32_t (*bs_r_4)(void *, bus_space_handle_t,
139 bus_size_t); 142 bus_size_t);
140 uint64_t (*bs_r_8)(void *, bus_space_handle_t, 143 uint64_t (*bs_r_8)(void *, bus_space_handle_t,
141 bus_size_t); 144 bus_size_t);
142 145
143 /* read multiple */ 146 /* read multiple */
144 void (*bs_rm_1)(void *, bus_space_handle_t, 147 void (*bs_rm_1)(void *, bus_space_handle_t,
145 bus_size_t, uint8_t *, bus_size_t); 148 bus_size_t, uint8_t *, bus_size_t);
@@ -282,26 +285,32 @@ do { \ @@ -282,26 +285,32 @@ do { \
282#define bus_space_alloc(t, rs, re, s, a, b, f, ap, hp) \ 285#define bus_space_alloc(t, rs, re, s, a, b, f, ap, hp) \
283 (*(t)->bs_alloc)((t)->bs_cookie, (rs), (re), (s), (a), (b), \ 286 (*(t)->bs_alloc)((t)->bs_cookie, (rs), (re), (s), (a), (b), \
284 (f), (ap), (hp)) 287 (f), (ap), (hp))
285#define bus_space_free(t, h, s) \ 288#define bus_space_free(t, h, s) \
286 (*(t)->bs_free)((t)->bs_cookie, (h), (s)) 289 (*(t)->bs_free)((t)->bs_cookie, (h), (s))
287 290
288/* 291/*
289 * Get kernel virtual address for ranges mapped BUS_SPACE_MAP_LINEAR. 292 * Get kernel virtual address for ranges mapped BUS_SPACE_MAP_LINEAR.
290 */ 293 */
291#define bus_space_vaddr(t, h) \ 294#define bus_space_vaddr(t, h) \
292 (*(t)->bs_vaddr)((t)->bs_cookie, (h)) 295 (*(t)->bs_vaddr)((t)->bs_cookie, (h))
293 296
294/* 297/*
 298 * MMap bus space for a user application.
 299 */
 300#define bus_space_mmap(t, a, o, p, f) \
 301 (*(t)->bs_mmap)((t)->bs_cookie, (a), (o), (p), (f))
 302
 303/*
295 * Bus barrier operations. The SH3 does not currently require 304 * Bus barrier operations. The SH3 does not currently require
296 * barriers, but we must provide the flags to MI code. 305 * barriers, but we must provide the flags to MI code.
297 */ 306 */
298#define bus_space_barrier(t, h, o, l, f) \ 307#define bus_space_barrier(t, h, o, l, f) \
299 ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f))) 308 ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f)))
300 309
301#define BUS_SPACE_BARRIER_READ 0x01 310#define BUS_SPACE_BARRIER_READ 0x01
302#define BUS_SPACE_BARRIER_WRITE 0x02 311#define BUS_SPACE_BARRIER_WRITE 0x02
303 312
304 313
305/* 314/*
306 * Bus read (single) operations. 315 * Bus read (single) operations.
307 */ 316 */

cvs diff -r1.1 -r1.2 src/sys/arch/landisk/landisk/shpcic_machdep.c (expand / switch to unified diff)

--- src/sys/arch/landisk/landisk/shpcic_machdep.c 2006/09/01 21:26:18 1.1
+++ src/sys/arch/landisk/landisk/shpcic_machdep.c 2009/08/02 00:06:44 1.2
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: shpcic_machdep.c,v 1.1 2006/09/01 21:26:18 uwe Exp $ */ 1/* $NetBSD: shpcic_machdep.c,v 1.2 2009/08/02 00:06:44 nonaka Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. 4 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
5 * Copyright (c) 1994 Charles M. Hannum. All rights reserved. 5 * Copyright (c) 1994 Charles M. Hannum. All rights reserved.
6 * 6 *
7 * Redistribution and use in source and binary forms, with or without 7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions 8 * modification, are permitted provided that the following conditions
9 * are met: 9 * are met:
10 * 1. Redistributions of source code must retain the above copyright 10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer. 11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright 12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the 13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution. 14 * documentation and/or other materials provided with the distribution.
@@ -25,27 +25,27 @@ @@ -25,27 +25,27 @@
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */ 31 */
32 32
33/* 33/*
34 * Machine-specific functions for PCI autoconfiguration. 34 * Machine-specific functions for PCI autoconfiguration.
35 */ 35 */
36 36
37#include <sys/cdefs.h> 37#include <sys/cdefs.h>
38__KERNEL_RCSID(0, "$NetBSD: shpcic_machdep.c,v 1.1 2006/09/01 21:26:18 uwe Exp $"); 38__KERNEL_RCSID(0, "$NetBSD: shpcic_machdep.c,v 1.2 2009/08/02 00:06:44 nonaka Exp $");
39 39
40#include <sys/types.h> 40#include <sys/types.h>
41#include <sys/param.h> 41#include <sys/param.h>
42#include <sys/time.h> 42#include <sys/time.h>
43#include <sys/systm.h> 43#include <sys/systm.h>
44#include <sys/errno.h> 44#include <sys/errno.h>
45#include <sys/extent.h> 45#include <sys/extent.h>
46#include <sys/device.h> 46#include <sys/device.h>
47 47
48#include <uvm/uvm_extern.h> 48#include <uvm/uvm_extern.h>
49 49
50#include <dev/pci/pcivar.h> 50#include <dev/pci/pcivar.h>
51#include <dev/pci/pcireg.h> 51#include <dev/pci/pcireg.h>
@@ -179,26 +179,28 @@ landisk_pci_conf_hook(void *v, int bus,  @@ -179,26 +179,28 @@ landisk_pci_conf_hook(void *v, int bus,
179 * shpcic bus space 179 * shpcic bus space
180 */ 180 */
181struct _bus_space landisk_pci_bus_io = 181struct _bus_space landisk_pci_bus_io =
182{ 182{
183 .bs_cookie = NULL, 183 .bs_cookie = NULL,
184 184
185 .bs_map = shpcic_iomem_map, 185 .bs_map = shpcic_iomem_map,
186 .bs_unmap = shpcic_iomem_unmap, 186 .bs_unmap = shpcic_iomem_unmap,
187 .bs_subregion = shpcic_iomem_subregion, 187 .bs_subregion = shpcic_iomem_subregion,
188 188
189 .bs_alloc = shpcic_iomem_alloc, 189 .bs_alloc = shpcic_iomem_alloc,
190 .bs_free = shpcic_iomem_free, 190 .bs_free = shpcic_iomem_free,
191 191
 192 .bs_mmap = shpcic_iomem_mmap,
 193
192 .bs_r_1 = shpcic_io_read_1, 194 .bs_r_1 = shpcic_io_read_1,
193 .bs_r_2 = shpcic_io_read_2, 195 .bs_r_2 = shpcic_io_read_2,
194 .bs_r_4 = shpcic_io_read_4, 196 .bs_r_4 = shpcic_io_read_4,
195 197
196 .bs_rm_1 = shpcic_io_read_multi_1, 198 .bs_rm_1 = shpcic_io_read_multi_1,
197 .bs_rm_2 = shpcic_io_read_multi_2, 199 .bs_rm_2 = shpcic_io_read_multi_2,
198 .bs_rm_4 = shpcic_io_read_multi_4, 200 .bs_rm_4 = shpcic_io_read_multi_4,
199 201
200 .bs_rr_1 = shpcic_io_read_region_1, 202 .bs_rr_1 = shpcic_io_read_region_1,
201 .bs_rr_2 = shpcic_io_read_region_2, 203 .bs_rr_2 = shpcic_io_read_region_2,
202 .bs_rr_4 = shpcic_io_read_region_4, 204 .bs_rr_4 = shpcic_io_read_region_4,
203 205
204 .bs_w_1 = shpcic_io_write_1, 206 .bs_w_1 = shpcic_io_write_1,
@@ -227,26 +229,28 @@ struct _bus_space landisk_pci_bus_io = @@ -227,26 +229,28 @@ struct _bus_space landisk_pci_bus_io =
227}; 229};
228 230
229struct _bus_space landisk_pci_bus_mem = 231struct _bus_space landisk_pci_bus_mem =
230{ 232{
231 .bs_cookie = NULL, 233 .bs_cookie = NULL,
232 234
233 .bs_map = shpcic_iomem_map, 235 .bs_map = shpcic_iomem_map,
234 .bs_unmap = shpcic_iomem_unmap, 236 .bs_unmap = shpcic_iomem_unmap,
235 .bs_subregion = shpcic_iomem_subregion, 237 .bs_subregion = shpcic_iomem_subregion,
236 238
237 .bs_alloc = shpcic_iomem_alloc, 239 .bs_alloc = shpcic_iomem_alloc,
238 .bs_free = shpcic_iomem_free, 240 .bs_free = shpcic_iomem_free,
239 241
 242 .bs_mmap = shpcic_iomem_mmap,
 243
240 .bs_r_1 = shpcic_mem_read_1, 244 .bs_r_1 = shpcic_mem_read_1,
241 .bs_r_2 = shpcic_mem_read_2, 245 .bs_r_2 = shpcic_mem_read_2,
242 .bs_r_4 = shpcic_mem_read_4, 246 .bs_r_4 = shpcic_mem_read_4,
243 247
244 .bs_rm_1 = shpcic_mem_read_multi_1, 248 .bs_rm_1 = shpcic_mem_read_multi_1,
245 .bs_rm_2 = shpcic_mem_read_multi_2, 249 .bs_rm_2 = shpcic_mem_read_multi_2,
246 .bs_rm_4 = shpcic_mem_read_multi_4, 250 .bs_rm_4 = shpcic_mem_read_multi_4,
247 251
248 .bs_rr_1 = shpcic_mem_read_region_1, 252 .bs_rr_1 = shpcic_mem_read_region_1,
249 .bs_rr_2 = shpcic_mem_read_region_2, 253 .bs_rr_2 = shpcic_mem_read_region_2,
250 .bs_rr_4 = shpcic_mem_read_region_4, 254 .bs_rr_4 = shpcic_mem_read_region_4,
251 255
252 .bs_w_1 = shpcic_mem_write_1, 256 .bs_w_1 = shpcic_mem_write_1,

cvs diff -r1.12 -r1.13 src/sys/arch/sh3/dev/shpcic.c (expand / switch to unified diff)

--- src/sys/arch/sh3/dev/shpcic.c 2008/03/27 02:05:43 1.12
+++ src/sys/arch/sh3/dev/shpcic.c 2009/08/02 00:06:44 1.13
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: shpcic.c,v 1.12 2008/03/27 02:05:43 uwe Exp $ */ 1/* $NetBSD: shpcic.c,v 1.13 2009/08/02 00:06:44 nonaka Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 2005 NONAKA Kimihiro 4 * Copyright (c) 2005 NONAKA Kimihiro
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Redistribution and use in source and binary forms, with or without 7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions 8 * modification, are permitted provided that the following conditions
9 * are met: 9 * are met:
10 * 1. Redistributions of source code must retain the above copyright 10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer. 11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright 12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the 13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution. 14 * documentation and/or other materials provided with the distribution.
@@ -16,27 +16,27 @@ @@ -16,27 +16,27 @@
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 */ 26 */
27 27
28#include <sys/cdefs.h> 28#include <sys/cdefs.h>
29__KERNEL_RCSID(0, "$NetBSD: shpcic.c,v 1.12 2008/03/27 02:05:43 uwe Exp $"); 29__KERNEL_RCSID(0, "$NetBSD: shpcic.c,v 1.13 2009/08/02 00:06:44 nonaka Exp $");
30 30
31#include "opt_pci.h" 31#include "opt_pci.h"
32 32
33#include <sys/param.h> 33#include <sys/param.h>
34#include <sys/systm.h> 34#include <sys/systm.h>
35#include <sys/kernel.h> 35#include <sys/kernel.h>
36#include <sys/device.h> 36#include <sys/device.h>
37#include <sys/extent.h> 37#include <sys/extent.h>
38#include <sys/malloc.h> 38#include <sys/malloc.h>
39 39
40#include <dev/pci/pcireg.h> 40#include <dev/pci/pcireg.h>
41#include <dev/pci/pcivar.h> 41#include <dev/pci/pcivar.h>
42#include <dev/pci/pciconf.h> 42#include <dev/pci/pciconf.h>
@@ -414,26 +414,33 @@ shpcic_iomem_alloc(void *v, bus_addr_t r @@ -414,26 +414,33 @@ shpcic_iomem_alloc(void *v, bus_addr_t r
414 414
415 *bshp = *bpap = rstart; 415 *bshp = *bpap = rstart;
416 416
417 return (0); 417 return (0);
418} 418}
419 419
420void 420void
421shpcic_iomem_free(void *v, bus_space_handle_t bsh, bus_size_t size) 421shpcic_iomem_free(void *v, bus_space_handle_t bsh, bus_size_t size)
422{ 422{
423 423
424 /* Nothing to do */ 424 /* Nothing to do */
425} 425}
426 426
 427paddr_t
 428shpcic_iomem_mmap(void *v, bus_addr_t addr, off_t off, int prot, int flags)
 429{
 430
 431 return (paddr_t)-1;
 432}
 433
427/* 434/*
428 * shpcic bus space io/mem read/write 435 * shpcic bus space io/mem read/write
429 */ 436 */
430/* read */ 437/* read */
431static inline uint8_t __shpcic_io_read_1(bus_space_handle_t bsh, 438static inline uint8_t __shpcic_io_read_1(bus_space_handle_t bsh,
432 bus_size_t offset); 439 bus_size_t offset);
433static inline uint16_t __shpcic_io_read_2(bus_space_handle_t bsh, 440static inline uint16_t __shpcic_io_read_2(bus_space_handle_t bsh,
434 bus_size_t offset); 441 bus_size_t offset);
435static inline uint32_t __shpcic_io_read_4(bus_space_handle_t bsh, 442static inline uint32_t __shpcic_io_read_4(bus_space_handle_t bsh,
436 bus_size_t offset); 443 bus_size_t offset);
437static inline uint8_t __shpcic_mem_read_1(bus_space_handle_t bsh, 444static inline uint8_t __shpcic_mem_read_1(bus_space_handle_t bsh,
438 bus_size_t offset); 445 bus_size_t offset);
439static inline uint16_t __shpcic_mem_read_2(bus_space_handle_t bsh, 446static inline uint16_t __shpcic_mem_read_2(bus_space_handle_t bsh,

cvs diff -r1.6 -r1.7 src/sys/arch/sh3/dev/shpcicvar.h (expand / switch to unified diff)

--- src/sys/arch/sh3/dev/shpcicvar.h 2005/12/11 12:18:58 1.6
+++ src/sys/arch/sh3/dev/shpcicvar.h 2009/08/02 00:06:44 1.7
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: shpcicvar.h,v 1.6 2005/12/11 12:18:58 christos Exp $ */ 1/* $NetBSD: shpcicvar.h,v 1.7 2009/08/02 00:06:44 nonaka Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2005 NONAKA Kimihiro 4 * Copyright (c) 2005 NONAKA Kimihiro
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Redistribution and use in source and binary forms, with or without 7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions 8 * modification, are permitted provided that the following conditions
9 * are met: 9 * are met:
10 * 1. Redistributions of source code must retain the above copyright 10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer. 11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright 12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the 13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution. 14 * documentation and/or other materials provided with the distribution.
@@ -47,26 +47,28 @@ void shpcic_intr_disestablish(void *ih); @@ -47,26 +47,28 @@ void shpcic_intr_disestablish(void *ih);
47 47
48/* 48/*
49 * shpcic io/mem bus space 49 * shpcic io/mem bus space
50 */ 50 */
51int shpcic_iomem_map(void *v, bus_addr_t bpa, bus_size_t size, int flags, 51int shpcic_iomem_map(void *v, bus_addr_t bpa, bus_size_t size, int flags,
52 bus_space_handle_t *bshp); 52 bus_space_handle_t *bshp);
53void shpcic_iomem_unmap(void *v, bus_space_handle_t bsh, bus_size_t size); 53void shpcic_iomem_unmap(void *v, bus_space_handle_t bsh, bus_size_t size);
54int shpcic_iomem_subregion(void *v, bus_space_handle_t bsh, bus_size_t offset, 54int shpcic_iomem_subregion(void *v, bus_space_handle_t bsh, bus_size_t offset,
55 bus_size_t size, bus_space_handle_t *nbshp); 55 bus_size_t size, bus_space_handle_t *nbshp);
56int shpcic_iomem_alloc(void *v, bus_addr_t rstart, bus_addr_t rend, 56int shpcic_iomem_alloc(void *v, bus_addr_t rstart, bus_addr_t rend,
57 bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags, 57 bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
58 bus_addr_t *bpap, bus_space_handle_t *bshp); 58 bus_addr_t *bpap, bus_space_handle_t *bshp);
59void shpcic_iomem_free(void *v, bus_space_handle_t bsh, bus_size_t size); 59void shpcic_iomem_free(void *v, bus_space_handle_t bsh, bus_size_t size);
 60paddr_t shpcic_iomem_mmap(void *v, bus_addr_t addr, off_t off, int prot,
 61 int flags);
60 62
61/* read single */ 63/* read single */
62uint8_t shpcic_io_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset); 64uint8_t shpcic_io_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset);
63uint16_t shpcic_io_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset); 65uint16_t shpcic_io_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset);
64uint32_t shpcic_io_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset); 66uint32_t shpcic_io_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset);
65uint8_t shpcic_mem_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset); 67uint8_t shpcic_mem_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset);
66uint16_t shpcic_mem_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset); 68uint16_t shpcic_mem_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset);
67uint32_t shpcic_mem_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset); 69uint32_t shpcic_mem_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset);
68 70
69/* read multi */ 71/* read multi */
70void shpcic_io_read_multi_1(void *v, bus_space_handle_t bsh, 72void shpcic_io_read_multi_1(void *v, bus_space_handle_t bsh,
71 bus_size_t offset, uint8_t *addr, bus_size_t count); 73 bus_size_t offset, uint8_t *addr, bus_size_t count);
72void shpcic_io_read_multi_2(void *v, bus_space_handle_t bsh, 74void shpcic_io_read_multi_2(void *v, bus_space_handle_t bsh,