Mon Nov 30 09:34:39 2009 UTC ()
sparc64_ipi_flush_ctx and sparc64_ipi_flush_all have been removed,
so remove its event counters as well.


(nakayama)
diff -r1.25 -r1.26 src/sys/arch/sparc64/include/intr.h
cvs diff -r1.25 -r1.26 src/sys/arch/sparc64/include/intr.h (switch to unified diff)

--- src/sys/arch/sparc64/include/intr.h 2008/04/28 20:23:37 1.25
+++ src/sys/arch/sparc64/include/intr.h 2009/11/30 09:34:39 1.26
@@ -1,87 +1,84 @@ @@ -1,87 +1,84 @@
1/* $NetBSD: intr.h,v 1.25 2008/04/28 20:23:37 martin Exp $ */ 1/* $NetBSD: intr.h,v 1.26 2009/11/30 09:34:39 nakayama Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Paul Kranenburg. 8 * by Paul Kranenburg.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright 15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the 16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution. 17 * documentation and/or other materials provided with the distribution.
18 * 18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE. 29 * POSSIBILITY OF SUCH DAMAGE.
30 */ 30 */
31 31
32#ifndef _SPARC64_INTR_H_ 32#ifndef _SPARC64_INTR_H_
33#define _SPARC64_INTR_H_ 33#define _SPARC64_INTR_H_
34 34
35#if defined(_KERNEL_OPT) 35#if defined(_KERNEL_OPT)
36#include "opt_multiprocessor.h" 36#include "opt_multiprocessor.h"
37#endif 37#endif
38 38
39#ifndef _LOCORE 39#ifndef _LOCORE
40#include <machine/cpuset.h> 40#include <machine/cpuset.h>
41#endif 41#endif
42#include <machine/psl.h> 42#include <machine/psl.h>
43 43
44/* XXX - arbitrary numbers; no interpretation is defined yet */ 44/* XXX - arbitrary numbers; no interpretation is defined yet */
45#define IPL_NONE 0 /* nothing */ 45#define IPL_NONE 0 /* nothing */
46#define IPL_SOFTCLOCK 1 /* timeouts */ 46#define IPL_SOFTCLOCK 1 /* timeouts */
47#define IPL_SOFTBIO 1 /* block I/O */ 47#define IPL_SOFTBIO 1 /* block I/O */
48#define IPL_SOFTNET 1 /* protocol stack */ 48#define IPL_SOFTNET 1 /* protocol stack */
49#define IPL_SOFTSERIAL 4 /* serial */ 49#define IPL_SOFTSERIAL 4 /* serial */
50#define IPL_VM PIL_VM /* memory allocation */ 50#define IPL_VM PIL_VM /* memory allocation */
51#define IPL_SCHED PIL_SCHED /* scheduler */ 51#define IPL_SCHED PIL_SCHED /* scheduler */
52#define IPL_HIGH PIL_HIGH /* everything */ 52#define IPL_HIGH PIL_HIGH /* everything */
53#define IPL_HALT 5 /* cpu stop-self */ 53#define IPL_HALT 5 /* cpu stop-self */
54#define IPL_PAUSE 13 /* pause cpu */ 54#define IPL_PAUSE 13 /* pause cpu */
55#define IPL_FDSOFT PIL_FDSOFT /* floppy */ 55#define IPL_FDSOFT PIL_FDSOFT /* floppy */
56 56
57#ifndef _LOCORE 57#ifndef _LOCORE
58void fpusave_lwp(struct lwp *, bool); 58void fpusave_lwp(struct lwp *, bool);
59#endif /* _LOCORE */ 59#endif /* _LOCORE */
60 60
61#if defined(MULTIPROCESSOR) 61#if defined(MULTIPROCESSOR)
62#ifndef _LOCORE 62#ifndef _LOCORE
63void sparc64_ipi_init (void); 63void sparc64_ipi_init (void);
64int sparc64_ipi_halt_thiscpu (void *); 64int sparc64_ipi_halt_thiscpu (void *);
65int sparc64_ipi_pause_thiscpu (void *); 65int sparc64_ipi_pause_thiscpu (void *);
66void sparc64_do_pause(void); 66void sparc64_do_pause(void);
67void sparc64_ipi_drop_fpstate (void *); 67void sparc64_ipi_drop_fpstate (void *);
68void sparc64_ipi_save_fpstate (void *); 68void sparc64_ipi_save_fpstate (void *);
69void sparc64_ipi_nop (void *); 69void sparc64_ipi_nop (void *);
70void mp_halt_cpus (void); 70void mp_halt_cpus (void);
71void mp_pause_cpus (void); 71void mp_pause_cpus (void);
72void mp_resume_cpus (void); 72void mp_resume_cpus (void);
73int mp_cpu_is_paused (sparc64_cpuset_t); 73int mp_cpu_is_paused (sparc64_cpuset_t);
74void mp_resume_cpu(int); 74void mp_resume_cpu(int);
75#endif /* _LOCORE */ 75#endif /* _LOCORE */
76 76
77#define IPI_EVCNT_TLB_PTE 0 77#define IPI_EVCNT_TLB_PTE 0
78#define IPI_EVCNT_TLB_CTX 1 78#define IPI_EVCNT_FPU_SYNCH 1
79#define IPI_EVCNT_TLB_ALL 2 79#define IPI_EVCNT_FPU_FLUSH 2
80#define IPI_EVCNT_FPU_SYNCH 3 80#define IPI_EVCNT_NUM 3
81#define IPI_EVCNT_FPU_FLUSH 4 81#define IPI_EVCNT_NAMES { "TLB pte IPI", "FPU synch IPI", "FPU flush IPI" }
82#define IPI_EVCNT_NUM 5 
83#define IPI_EVCNT_NAMES { "TLB pte IPI", "TLB ctx IPI", "TLB all IPI", \ 
84 "FPU synch IPI", "FPU flush IPI" } 
85#endif 82#endif
86 83
87#endif /* _SPARC64_INTR_H_ */ 84#endif /* _SPARC64_INTR_H_ */