Tue Dec 1 01:08:45 2009 UTC ()
KNF: define struct pareg near the top of the file.


(dyoung)
diff -r1.43 -r1.44 src/sys/arch/i386/pci/elan520.c
cvs diff -r1.43 -r1.44 src/sys/arch/i386/pci/elan520.c (expand / switch to unified diff)

--- src/sys/arch/i386/pci/elan520.c 2009/09/17 20:21:54 1.43
+++ src/sys/arch/i386/pci/elan520.c 2009/12/01 01:08:45 1.44
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: elan520.c,v 1.43 2009/09/17 20:21:54 dyoung Exp $ */ 1/* $NetBSD: elan520.c,v 1.44 2009/12/01 01:08:45 dyoung Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2002 The NetBSD Foundation, Inc. 4 * Copyright (c) 2002 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe. 8 * by Jason R. Thorpe.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -30,27 +30,27 @@ @@ -30,27 +30,27 @@
30 */ 30 */
31 31
32/* 32/*
33 * Device driver for the AMD Elan SC520 System Controller. This attaches 33 * Device driver for the AMD Elan SC520 System Controller. This attaches
34 * where the "pchb" driver might normally attach, and provides support for 34 * where the "pchb" driver might normally attach, and provides support for
35 * extra features on the SC520, such as the watchdog timer and GPIO. 35 * extra features on the SC520, such as the watchdog timer and GPIO.
36 * 36 *
37 * Information about the GP bus echo bug work-around is from code posted 37 * Information about the GP bus echo bug work-around is from code posted
38 * to the "soekris-tech" mailing list by Jasper Wallace. 38 * to the "soekris-tech" mailing list by Jasper Wallace.
39 */ 39 */
40 40
41#include <sys/cdefs.h> 41#include <sys/cdefs.h>
42 42
43__KERNEL_RCSID(0, "$NetBSD: elan520.c,v 1.43 2009/09/17 20:21:54 dyoung Exp $"); 43__KERNEL_RCSID(0, "$NetBSD: elan520.c,v 1.44 2009/12/01 01:08:45 dyoung Exp $");
44 44
45#include <sys/param.h> 45#include <sys/param.h>
46#include <sys/systm.h> 46#include <sys/systm.h>
47#include <sys/time.h> 47#include <sys/time.h>
48#include <sys/device.h> 48#include <sys/device.h>
49#include <sys/gpio.h> 49#include <sys/gpio.h>
50#include <sys/mutex.h> 50#include <sys/mutex.h>
51#include <sys/wdog.h> 51#include <sys/wdog.h>
52#include <sys/reboot.h> 52#include <sys/reboot.h>
53 53
54#include <uvm/uvm_extern.h> 54#include <uvm/uvm_extern.h>
55 55
56#include <machine/bus.h> 56#include <machine/bus.h>
@@ -98,26 +98,31 @@ struct elansc_softc { @@ -98,26 +98,31 @@ struct elansc_softc {
98 void *sc_pih; 98 void *sc_pih;
99 void *sc_sh; 99 void *sc_sh;
100 uint8_t sc_mpicmode; 100 uint8_t sc_mpicmode;
101 uint8_t sc_picicr; 101 uint8_t sc_picicr;
102 int sc_pg0par; 102 int sc_pg0par;
103 int sc_textpar[3]; 103 int sc_textpar[3];
104#if NGPIO > 0 104#if NGPIO > 0
105 /* GPIO interface */ 105 /* GPIO interface */
106 struct gpio_chipset_tag sc_gpio_gc; 106 struct gpio_chipset_tag sc_gpio_gc;
107 gpio_pin_t sc_gpio_pins[ELANSC_PIO_NPINS]; 107 gpio_pin_t sc_gpio_pins[ELANSC_PIO_NPINS];
108#endif 108#endif
109}; 109};
110 110
 111struct pareg {
 112 paddr_t start;
 113 paddr_t end;
 114};
 115
111static bool elansc_attached = false; 116static bool elansc_attached = false;
112int elansc_wpvnmi = 1; 117int elansc_wpvnmi = 1;
113int elansc_pcinmi = 1; 118int elansc_pcinmi = 1;
114int elansc_do_protect_pg0 = 1; 119int elansc_do_protect_pg0 = 1;
115 120
116#if NGPIO > 0 121#if NGPIO > 0
117static int elansc_gpio_pin_read(void *, int); 122static int elansc_gpio_pin_read(void *, int);
118static void elansc_gpio_pin_write(void *, int, int); 123static void elansc_gpio_pin_write(void *, int, int);
119static void elansc_gpio_pin_ctl(void *, int, int); 124static void elansc_gpio_pin_ctl(void *, int, int);
120#endif 125#endif
121 126
122static void elansc_print_par(device_t, int, uint32_t); 127static void elansc_print_par(device_t, int, uint32_t);
123 128
@@ -637,31 +642,26 @@ elansc_alloc_par(bus_space_tag_t memt, b @@ -637,31 +642,26 @@ elansc_alloc_par(bus_space_tag_t memt, b
637 return i; 642 return i;
638} 643}
639 644
640static void 645static void
641elansc_disable_par(bus_space_tag_t memt, bus_space_handle_t memh, int idx) 646elansc_disable_par(bus_space_tag_t memt, bus_space_handle_t memh, int idx)
642{ 647{
643 uint32_t par; 648 uint32_t par;
644 par = bus_space_read_4(memt, memh, MMCR_PAR(idx)); 649 par = bus_space_read_4(memt, memh, MMCR_PAR(idx));
645 par &= ~MMCR_PAR_TARGET; 650 par &= ~MMCR_PAR_TARGET;
646 par |= MMCR_PAR_TARGET_OFF; 651 par |= MMCR_PAR_TARGET_OFF;
647 bus_space_write_4(memt, memh, MMCR_PAR(idx), par); 652 bus_space_write_4(memt, memh, MMCR_PAR(idx), par);
648} 653}
649 654
650struct pareg { 
651 paddr_t start; 
652 paddr_t end; 
653}; 
654 
655static int 655static int
656region_paddr_to_par(struct pareg *region0, struct pareg *regions, uint32_t unit) 656region_paddr_to_par(struct pareg *region0, struct pareg *regions, uint32_t unit)
657{ 657{
658 struct pareg *residue = regions; 658 struct pareg *residue = regions;
659 paddr_t start, end; 659 paddr_t start, end;
660 paddr_t start0, end0; 660 paddr_t start0, end0;
661 661
662 start0 = region0->start; 662 start0 = region0->start;
663 end0 = region0->end; 663 end0 = region0->end;
664 664
665 if (start0 % unit != 0) 665 if (start0 % unit != 0)
666 start = start0 + unit - start0 % unit; 666 start = start0 + unit - start0 % unit;
667 else 667 else