Wed Dec 2 13:49:32 2009 UTC ()
Define DPRINTF and use it.


(skrll)
diff -r1.57 -r1.58 src/sys/arch/hp700/hp700/mainbus.c

cvs diff -r1.57 -r1.58 src/sys/arch/hp700/hp700/Attic/mainbus.c (switch to unified diff)

--- src/sys/arch/hp700/hp700/Attic/mainbus.c 2009/12/02 13:45:13 1.57
+++ src/sys/arch/hp700/hp700/Attic/mainbus.c 2009/12/02 13:49:32 1.58
@@ -1,1409 +1,1424 @@ @@ -1,1409 +1,1424 @@
1/* $NetBSD: mainbus.c,v 1.57 2009/12/02 13:45:13 skrll Exp $ */ 1/* $NetBSD: mainbus.c,v 1.58 2009/12/02 13:49:32 skrll Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc. 4 * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Matthew Fredette. 8 * by Matthew Fredette.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright 15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the 16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution. 17 * documentation and/or other materials provided with the distribution.
18 * 18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE. 29 * POSSIBILITY OF SUCH DAMAGE.
30 */ 30 */
31 31
32/* $OpenBSD: mainbus.c,v 1.13 2001/09/19 20:50:56 mickey Exp $ */ 32/* $OpenBSD: mainbus.c,v 1.13 2001/09/19 20:50:56 mickey Exp $ */
33 33
34/* 34/*
35 * Copyright (c) 1998-2004 Michael Shalayeff 35 * Copyright (c) 1998-2004 Michael Shalayeff
36 * All rights reserved. 36 * All rights reserved.
37 * 37 *
38 * Redistribution and use in source and binary forms, with or without 38 * Redistribution and use in source and binary forms, with or without
39 * modification, are permitted provided that the following conditions 39 * modification, are permitted provided that the following conditions
40 * are met: 40 * are met:
41 * 1. Redistributions of source code must retain the above copyright 41 * 1. Redistributions of source code must retain the above copyright
42 * notice, this list of conditions and the following disclaimer. 42 * notice, this list of conditions and the following disclaimer.
43 * 2. Redistributions in binary form must reproduce the above copyright 43 * 2. Redistributions in binary form must reproduce the above copyright
44 * notice, this list of conditions and the following disclaimer in the 44 * notice, this list of conditions and the following disclaimer in the
45 * documentation and/or other materials provided with the distribution. 45 * documentation and/or other materials provided with the distribution.
46 * 46 *
47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 47 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
50 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 50 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
51 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 51 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
52 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 52 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
53 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 53 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
55 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 55 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
56 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 56 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
57 * THE POSSIBILITY OF SUCH DAMAGE. 57 * THE POSSIBILITY OF SUCH DAMAGE.
58 */ 58 */
59 59
60#include <sys/cdefs.h> 60#include <sys/cdefs.h>
61__KERNEL_RCSID(0, "$NetBSD: mainbus.c,v 1.57 2009/12/02 13:45:13 skrll Exp $"); 61__KERNEL_RCSID(0, "$NetBSD: mainbus.c,v 1.58 2009/12/02 13:49:32 skrll Exp $");
62 62
63#include "locators.h" 63#include "locators.h"
64#include "power.h" 64#include "power.h"
65 65
66#include <sys/param.h> 66#include <sys/param.h>
67#include <sys/systm.h> 67#include <sys/systm.h>
68#include <sys/device.h> 68#include <sys/device.h>
69#include <sys/reboot.h> 69#include <sys/reboot.h>
70#include <sys/extent.h> 70#include <sys/extent.h>
71#include <sys/mbuf.h> 71#include <sys/mbuf.h>
72 72
73#include <uvm/uvm_page.h> 73#include <uvm/uvm_page.h>
74#include <uvm/uvm.h> 74#include <uvm/uvm.h>
75 75
76#include <machine/pdc.h> 76#include <machine/pdc.h>
77#include <machine/iomod.h> 77#include <machine/iomod.h>
78#include <machine/autoconf.h> 78#include <machine/autoconf.h>
79 79
80#include <hp700/hp700/machdep.h> 80#include <hp700/hp700/machdep.h>
81#include <hp700/hp700/intr.h> 81#include <hp700/hp700/intr.h>
82#include <hp700/dev/cpudevs.h> 82#include <hp700/dev/cpudevs.h>
83 83
84static struct pdc_hpa pdc_hpa PDC_ALIGNMENT; 84static struct pdc_hpa pdc_hpa PDC_ALIGNMENT;
85 85
 86#ifdef MBUSDEBUG
 87
 88#define DPRINTF(s) do { \
 89 if (mbusdebug) \
 90 printf s; \
 91} while(0)
 92
 93int mbusdebug = 1;
 94#else
 95#define DPRINTF(s) /* */
 96#endif
 97
86struct mainbus_softc { 98struct mainbus_softc {
87 device_t sc_dv; 99 device_t sc_dv;
88 100
89 hppa_hpa_t sc_hpa; 101 hppa_hpa_t sc_hpa;
90}; 102};
91 103
92int mbmatch(device_t, cfdata_t, void *); 104int mbmatch(device_t, cfdata_t, void *);
93void mbattach(device_t, device_t, void *); 105void mbattach(device_t, device_t, void *);
94 106
95CFATTACH_DECL_NEW(mainbus, sizeof(struct mainbus_softc), 107CFATTACH_DECL_NEW(mainbus, sizeof(struct mainbus_softc),
96 mbmatch, mbattach, NULL, NULL); 108 mbmatch, mbattach, NULL, NULL);
97 109
98extern struct cfdriver mainbus_cd; 110extern struct cfdriver mainbus_cd;
99 111
100static int mb_attached; 112static int mb_attached;
101 113
102/* from machdep.c */ 114/* from machdep.c */
103extern struct extent *hp700_io_extent; 115extern struct extent *hp700_io_extent;
104extern struct extent *dma24_ex; 116extern struct extent *dma24_ex;
105 117
106u_int8_t mbus_r1(void *, bus_space_handle_t, bus_size_t); 118u_int8_t mbus_r1(void *, bus_space_handle_t, bus_size_t);
107u_int16_t mbus_r2(void *, bus_space_handle_t, bus_size_t); 119u_int16_t mbus_r2(void *, bus_space_handle_t, bus_size_t);
108u_int32_t mbus_r4(void *, bus_space_handle_t, bus_size_t); 120u_int32_t mbus_r4(void *, bus_space_handle_t, bus_size_t);
109u_int64_t mbus_r8(void *, bus_space_handle_t, bus_size_t); 121u_int64_t mbus_r8(void *, bus_space_handle_t, bus_size_t);
110void mbus_w1(void *, bus_space_handle_t, bus_size_t, u_int8_t); 122void mbus_w1(void *, bus_space_handle_t, bus_size_t, u_int8_t);
111void mbus_w2(void *, bus_space_handle_t, bus_size_t, u_int16_t); 123void mbus_w2(void *, bus_space_handle_t, bus_size_t, u_int16_t);
112void mbus_w4(void *, bus_space_handle_t, bus_size_t, u_int32_t); 124void mbus_w4(void *, bus_space_handle_t, bus_size_t, u_int32_t);
113void mbus_w8(void *, bus_space_handle_t, bus_size_t, u_int64_t); 125void mbus_w8(void *, bus_space_handle_t, bus_size_t, u_int64_t);
114void mbus_rm_1(void *, bus_space_handle_t, bus_size_t, u_int8_t *, bus_size_t); 126void mbus_rm_1(void *, bus_space_handle_t, bus_size_t, u_int8_t *, bus_size_t);
115void mbus_rm_2(void *, bus_space_handle_t, bus_size_t, u_int16_t *, bus_size_t); 127void mbus_rm_2(void *, bus_space_handle_t, bus_size_t, u_int16_t *, bus_size_t);
116void mbus_rm_4(void *, bus_space_handle_t, bus_size_t, u_int32_t *, bus_size_t); 128void mbus_rm_4(void *, bus_space_handle_t, bus_size_t, u_int32_t *, bus_size_t);
117void mbus_rm_8(void *, bus_space_handle_t, bus_size_t, u_int64_t *, bus_size_t); 129void mbus_rm_8(void *, bus_space_handle_t, bus_size_t, u_int64_t *, bus_size_t);
118void mbus_wm_1(void *, bus_space_handle_t, bus_size_t, const u_int8_t *, bus_size_t); 130void mbus_wm_1(void *, bus_space_handle_t, bus_size_t, const u_int8_t *, bus_size_t);
119void mbus_wm_2(void *, bus_space_handle_t, bus_size_t, const u_int16_t *, bus_size_t); 131void mbus_wm_2(void *, bus_space_handle_t, bus_size_t, const u_int16_t *, bus_size_t);
120void mbus_wm_4(void *, bus_space_handle_t, bus_size_t, const u_int32_t *, bus_size_t); 132void mbus_wm_4(void *, bus_space_handle_t, bus_size_t, const u_int32_t *, bus_size_t);
121void mbus_wm_8(void *, bus_space_handle_t, bus_size_t, const u_int64_t *, bus_size_t); 133void mbus_wm_8(void *, bus_space_handle_t, bus_size_t, const u_int64_t *, bus_size_t);
122void mbus_rr_1(void *, bus_space_handle_t, bus_size_t, u_int8_t *, bus_size_t); 134void mbus_rr_1(void *, bus_space_handle_t, bus_size_t, u_int8_t *, bus_size_t);
123void mbus_rr_2(void *, bus_space_handle_t, bus_size_t, u_int16_t *, bus_size_t); 135void mbus_rr_2(void *, bus_space_handle_t, bus_size_t, u_int16_t *, bus_size_t);
124void mbus_rr_4(void *, bus_space_handle_t, bus_size_t, u_int32_t *, bus_size_t); 136void mbus_rr_4(void *, bus_space_handle_t, bus_size_t, u_int32_t *, bus_size_t);
125void mbus_rr_8(void *, bus_space_handle_t, bus_size_t, u_int64_t *, bus_size_t); 137void mbus_rr_8(void *, bus_space_handle_t, bus_size_t, u_int64_t *, bus_size_t);
126void mbus_wr_1(void *, bus_space_handle_t, bus_size_t, const u_int8_t *, bus_size_t); 138void mbus_wr_1(void *, bus_space_handle_t, bus_size_t, const u_int8_t *, bus_size_t);
127void mbus_wr_2(void *, bus_space_handle_t, bus_size_t, const u_int16_t *, bus_size_t); 139void mbus_wr_2(void *, bus_space_handle_t, bus_size_t, const u_int16_t *, bus_size_t);
128void mbus_wr_4(void *, bus_space_handle_t, bus_size_t, const u_int32_t *, bus_size_t); 140void mbus_wr_4(void *, bus_space_handle_t, bus_size_t, const u_int32_t *, bus_size_t);
129void mbus_wr_8(void *, bus_space_handle_t, bus_size_t, const u_int64_t *, bus_size_t); 141void mbus_wr_8(void *, bus_space_handle_t, bus_size_t, const u_int64_t *, bus_size_t);
130void mbus_sm_1(void *, bus_space_handle_t, bus_size_t, u_int8_t, bus_size_t); 142void mbus_sm_1(void *, bus_space_handle_t, bus_size_t, u_int8_t, bus_size_t);
131void mbus_sm_2(void *, bus_space_handle_t, bus_size_t, u_int16_t, bus_size_t); 143void mbus_sm_2(void *, bus_space_handle_t, bus_size_t, u_int16_t, bus_size_t);
132void mbus_sm_4(void *, bus_space_handle_t, bus_size_t, u_int32_t, bus_size_t); 144void mbus_sm_4(void *, bus_space_handle_t, bus_size_t, u_int32_t, bus_size_t);
133void mbus_sm_8(void *, bus_space_handle_t, bus_size_t, u_int64_t, bus_size_t); 145void mbus_sm_8(void *, bus_space_handle_t, bus_size_t, u_int64_t, bus_size_t);
134void mbus_sr_1(void *, bus_space_handle_t, bus_size_t, u_int8_t, bus_size_t); 146void mbus_sr_1(void *, bus_space_handle_t, bus_size_t, u_int8_t, bus_size_t);
135void mbus_sr_2(void *, bus_space_handle_t, bus_size_t, u_int16_t, bus_size_t); 147void mbus_sr_2(void *, bus_space_handle_t, bus_size_t, u_int16_t, bus_size_t);
136void mbus_sr_4(void *, bus_space_handle_t, bus_size_t, u_int32_t, bus_size_t); 148void mbus_sr_4(void *, bus_space_handle_t, bus_size_t, u_int32_t, bus_size_t);
137void mbus_sr_8(void *, bus_space_handle_t, bus_size_t, u_int64_t, bus_size_t); 149void mbus_sr_8(void *, bus_space_handle_t, bus_size_t, u_int64_t, bus_size_t);
138void mbus_cp_1(void *, bus_space_handle_t, bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t); 150void mbus_cp_1(void *, bus_space_handle_t, bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t);
139void mbus_cp_2(void *, bus_space_handle_t, bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t); 151void mbus_cp_2(void *, bus_space_handle_t, bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t);
140void mbus_cp_4(void *, bus_space_handle_t, bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t); 152void mbus_cp_4(void *, bus_space_handle_t, bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t);
141void mbus_cp_8(void *, bus_space_handle_t, bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t); 153void mbus_cp_8(void *, bus_space_handle_t, bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t);
142 154
143int mbus_add_mapping(bus_addr_t, bus_size_t, int, bus_space_handle_t *); 155int mbus_add_mapping(bus_addr_t, bus_size_t, int, bus_space_handle_t *);
144int mbus_remove_mapping(bus_space_handle_t, bus_size_t, bus_addr_t *); 156int mbus_remove_mapping(bus_space_handle_t, bus_size_t, bus_addr_t *);
145int mbus_map(void *, bus_addr_t, bus_size_t, int, bus_space_handle_t *); 157int mbus_map(void *, bus_addr_t, bus_size_t, int, bus_space_handle_t *);
146void mbus_unmap(void *, bus_space_handle_t, bus_size_t); 158void mbus_unmap(void *, bus_space_handle_t, bus_size_t);
147int mbus_alloc(void *, bus_addr_t, bus_addr_t, bus_size_t, bus_size_t, bus_size_t, int, bus_addr_t *, bus_space_handle_t *); 159int mbus_alloc(void *, bus_addr_t, bus_addr_t, bus_size_t, bus_size_t, bus_size_t, int, bus_addr_t *, bus_space_handle_t *);
148void mbus_free(void *, bus_space_handle_t, bus_size_t); 160void mbus_free(void *, bus_space_handle_t, bus_size_t);
149int mbus_subregion(void *, bus_space_handle_t, bus_size_t, bus_size_t, bus_space_handle_t *); 161int mbus_subregion(void *, bus_space_handle_t, bus_size_t, bus_size_t, bus_space_handle_t *);
150void mbus_barrier(void *, bus_space_handle_t, bus_size_t, bus_size_t, int); 162void mbus_barrier(void *, bus_space_handle_t, bus_size_t, bus_size_t, int);
151void *mbus_vaddr(void *, bus_space_handle_t); 163void *mbus_vaddr(void *, bus_space_handle_t);
152paddr_t mbus_mmap(void *, bus_addr_t, off_t, int, int); 164paddr_t mbus_mmap(void *, bus_addr_t, off_t, int, int);
153 165
154int mbus_dmamap_create(void *, bus_size_t, int, bus_size_t, bus_size_t, int, bus_dmamap_t *); 166int mbus_dmamap_create(void *, bus_size_t, int, bus_size_t, bus_size_t, int, bus_dmamap_t *);
155void mbus_dmamap_destroy(void *, bus_dmamap_t); 167void mbus_dmamap_destroy(void *, bus_dmamap_t);
156int mbus_dmamap_load(void *, bus_dmamap_t, void *, bus_size_t, struct proc *, int); 168int mbus_dmamap_load(void *, bus_dmamap_t, void *, bus_size_t, struct proc *, int);
157int mbus_dmamap_load_mbuf(void *, bus_dmamap_t, struct mbuf *, int); 169int mbus_dmamap_load_mbuf(void *, bus_dmamap_t, struct mbuf *, int);
158int mbus_dmamap_load_uio(void *, bus_dmamap_t, struct uio *, int); 170int mbus_dmamap_load_uio(void *, bus_dmamap_t, struct uio *, int);
159int mbus_dmamap_load_raw(void *, bus_dmamap_t, bus_dma_segment_t *, int, bus_size_t, int); 171int mbus_dmamap_load_raw(void *, bus_dmamap_t, bus_dma_segment_t *, int, bus_size_t, int);
160void mbus_dmamap_unload(void *, bus_dmamap_t); 172void mbus_dmamap_unload(void *, bus_dmamap_t);
161void mbus_dmamap_sync(void *, bus_dmamap_t, bus_addr_t, bus_size_t, int); 173void mbus_dmamap_sync(void *, bus_dmamap_t, bus_addr_t, bus_size_t, int);
162int mbus_dmamem_alloc(void *, bus_size_t, bus_size_t, bus_size_t, bus_dma_segment_t *, int, int *, int); 174int mbus_dmamem_alloc(void *, bus_size_t, bus_size_t, bus_size_t, bus_dma_segment_t *, int, int *, int);
163void mbus_dmamem_free(void *, bus_dma_segment_t *, int); 175void mbus_dmamem_free(void *, bus_dma_segment_t *, int);
164int mbus_dmamem_map(void *, bus_dma_segment_t *, int, size_t, void **, int); 176int mbus_dmamem_map(void *, bus_dma_segment_t *, int, size_t, void **, int);
165void mbus_dmamem_unmap(void *, void *, size_t); 177void mbus_dmamem_unmap(void *, void *, size_t);
166paddr_t mbus_dmamem_mmap(void *, bus_dma_segment_t *, int, off_t, int, int); 178paddr_t mbus_dmamem_mmap(void *, bus_dma_segment_t *, int, off_t, int, int);
167int _bus_dmamap_load_buffer(bus_dma_tag_t t, bus_dmamap_t map, void *buf, 179int _bus_dmamap_load_buffer(bus_dma_tag_t t, bus_dmamap_t map, void *buf,
168 bus_size_t buflen, struct vmspace *vm, int flags, paddr_t *lastaddrp, 180 bus_size_t buflen, struct vmspace *vm, int flags, paddr_t *lastaddrp,
169 int *segp, int first); 181 int *segp, int first);
170 182
171int 183int
172mbus_add_mapping(bus_addr_t bpa, bus_size_t size, int flags, 184mbus_add_mapping(bus_addr_t bpa, bus_size_t size, int flags,
173 bus_space_handle_t *bshp) 185 bus_space_handle_t *bshp)
174{ 186{
175 u_int frames; 187 u_int frames;
176#ifdef USE_BTLB 188#ifdef USE_BTLB
177 vsize_t btlb_size; 189 vsize_t btlb_size;
178 int error; 190 int error;
179#endif /* USE_BTLB */ 191#endif /* USE_BTLB */
180 192
 193 DPRINTF(("\n%s(%lx,%lx,%scachable,%p)\n", __func__,
 194 bpa, size, flags? "" : "non", bshp));
 195
181 /* 196 /*
182 * We must be called with a page-aligned address in 197 * We must be called with a page-aligned address in
183 * I/O space, and with a multiple of the page size. 198 * I/O space, and with a multiple of the page size.
184 */ 199 */
185 KASSERT((bpa & PGOFSET) == 0); 200 KASSERT((bpa & PGOFSET) == 0);
186 KASSERT(bpa >= HPPA_IOSPACE); 201 KASSERT(bpa >= HPPA_IOSPACE);
187 KASSERT((size & PGOFSET) == 0); 202 KASSERT((size & PGOFSET) == 0);
188 203
189 /* 204 /*
190 * Assume that this will succeed. 205 * Assume that this will succeed.
191 */ 206 */
192 *bshp = bpa; 207 *bshp = bpa;
193 208
194 /* 209 /*
195 * Loop while there is space left to map. 210 * Loop while there is space left to map.
196 */ 211 */
197 frames = size >> PGSHIFT; 212 frames = size >> PGSHIFT;
198 while (frames > 0) { 213 while (frames > 0) {
199 214
200 /* 215 /*
201 * If this mapping is more than eight pages long, 216 * If this mapping is more than eight pages long,
202 * try to add a BTLB entry. 217 * try to add a BTLB entry.
203 */ 218 */
204#ifdef USE_BTLB 219#ifdef USE_BTLB
205 if (frames > 8 && 220 if (frames > 8 &&
206 frames >= hppa_btlb_size_min) { 221 frames >= hppa_btlb_size_min) {
207 btlb_size = frames; 222 btlb_size = frames;
208 if (btlb_size > hppa_btlb_size_max) 223 if (btlb_size > hppa_btlb_size_max)
209 btlb_size = hppa_btlb_size_max; 224 btlb_size = hppa_btlb_size_max;
210 btlb_size <<= PGSHIFT; 225 btlb_size <<= PGSHIFT;
211 error = hppa_btlb_insert(pmap_kernel()->pmap_space, 226 error = hppa_btlb_insert(pmap_kernel()->pmap_space,
212 bpa, bpa, &btlb_size, 227 bpa, bpa, &btlb_size,
213 pmap_kernel()->pmap_pid | 228 pmap_kernel()->pmap_pid |
214 pmap_prot(pmap_kernel(), VM_PROT_READ | VM_PROT_WRITE)); 229 pmap_prot(pmap_kernel(), VM_PROT_READ | VM_PROT_WRITE));
215 if (error == 0) { 230 if (error == 0) {
216 bpa += btlb_size; 231 bpa += btlb_size;
217 frames -= (btlb_size >> PGSHIFT); 232 frames -= (btlb_size >> PGSHIFT);
218 continue; 233 continue;
219 } 234 }
220 else if (error != ENOMEM) 235 else if (error != ENOMEM)
221 return error; 236 return error;
222 } 237 }
223#endif /* USE_BTLB */ 238#endif /* USE_BTLB */
224 239
225 /* 240 /*
226 * Enter another single-page mapping. 241 * Enter another single-page mapping.
227 */ 242 */
228 pmap_kenter_pa(bpa, bpa, VM_PROT_READ | VM_PROT_WRITE, 0); 243 pmap_kenter_pa(bpa, bpa, VM_PROT_READ | VM_PROT_WRITE, 0);
229 bpa += PAGE_SIZE; 244 bpa += PAGE_SIZE;
230 frames--; 245 frames--;
231 } 246 }
232 247
233 /* Success. */ 248 /* Success. */
234 return 0; 249 return 0;
235} 250}
236 251
237/* 252/*
238 * This removes a mapping added by mbus_add_mapping. 253 * This removes a mapping added by mbus_add_mapping.
239 */ 254 */
240int 255int
241mbus_remove_mapping(bus_space_handle_t bsh, bus_size_t size, bus_addr_t *bpap) 256mbus_remove_mapping(bus_space_handle_t bsh, bus_size_t size, bus_addr_t *bpap)
242{ 257{
243 bus_addr_t bpa; 258 bus_addr_t bpa;
244 u_int frames; 259 u_int frames;
245#ifdef USE_BTLB 260#ifdef USE_BTLB
246 vsize_t btlb_size; 261 vsize_t btlb_size;
247 int error; 262 int error;
248#endif /* USE_BTLB */ 263#endif /* USE_BTLB */
249 264
250 /* 265 /*
251 * We must be called with a page-aligned address in 266 * We must be called with a page-aligned address in
252 * I/O space, and with a multiple of the page size. 267 * I/O space, and with a multiple of the page size.
253 */ 268 */
254 bpa = *bpap = bsh; 269 bpa = *bpap = bsh;
255 KASSERT((bpa & PGOFSET) == 0); 270 KASSERT((bpa & PGOFSET) == 0);
256 KASSERT(bpa >= HPPA_IOSPACE); 271 KASSERT(bpa >= HPPA_IOSPACE);
257 KASSERT((size & PGOFSET) == 0); 272 KASSERT((size & PGOFSET) == 0);
258 273
259 /* 274 /*
260 * Loop while there is space left to unmap. 275 * Loop while there is space left to unmap.
261 */ 276 */
262 frames = size >> PGSHIFT; 277 frames = size >> PGSHIFT;
263 while (frames > 0) { 278 while (frames > 0) {
264 279
265 /* 280 /*
266 * If this mapping is more than eight pages long, 281 * If this mapping is more than eight pages long,
267 * try to remove a BTLB entry. 282 * try to remove a BTLB entry.
268 */ 283 */
269#ifdef USE_BTLB 284#ifdef USE_BTLB
270 if (frames > 8 && 285 if (frames > 8 &&
271 frames >= hppa_btlb_size_min) { 286 frames >= hppa_btlb_size_min) {
272 btlb_size = frames; 287 btlb_size = frames;
273 if (btlb_size > hppa_btlb_size_max) 288 if (btlb_size > hppa_btlb_size_max)
274 btlb_size = hppa_btlb_size_max; 289 btlb_size = hppa_btlb_size_max;
275 btlb_size <<= PGSHIFT; 290 btlb_size <<= PGSHIFT;
276 error = hppa_btlb_purge(pmap_kernel()->pmap_space, 291 error = hppa_btlb_purge(pmap_kernel()->pmap_space,
277 bpa, &btlb_size); 292 bpa, &btlb_size);
278 if (error == 0) { 293 if (error == 0) {
279 bpa += btlb_size; 294 bpa += btlb_size;
280 frames -= (btlb_size >> PGSHIFT); 295 frames -= (btlb_size >> PGSHIFT);
281 continue; 296 continue;
282 } 297 }
283 else if (error != ENOENT) 298 else if (error != ENOENT)
284 return error; 299 return error;
285 } 300 }
286#endif /* USE_BTLB */ 301#endif /* USE_BTLB */
287 302
288 /* 303 /*
289 * Remove another single-page mapping. 304 * Remove another single-page mapping.
290 */ 305 */
291 pmap_kremove(bpa, PAGE_SIZE); 306 pmap_kremove(bpa, PAGE_SIZE);
292 bpa += PAGE_SIZE; 307 bpa += PAGE_SIZE;
293 frames--; 308 frames--;
294 } 309 }
295 310
296 /* Success. */ 311 /* Success. */
297 return 0; 312 return 0;
298} 313}
299 314
300int 315int
301mbus_map(void *v, bus_addr_t bpa, bus_size_t size, int flags, 316mbus_map(void *v, bus_addr_t bpa, bus_size_t size, int flags,
302 bus_space_handle_t *bshp) 317 bus_space_handle_t *bshp)
303{ 318{
304 int error; 319 int error;
305 bus_size_t offset; 320 bus_size_t offset;
306 321
307 /* 322 /*
308 * We must only be called with addresses in I/O space. 323 * We must only be called with addresses in I/O space.
309 */ 324 */
310 KASSERT(bpa >= HPPA_IOSPACE); 325 KASSERT(bpa >= HPPA_IOSPACE);
311 326
312 /* 327 /*
313 * Page-align the I/O address and size. 328 * Page-align the I/O address and size.
314 */ 329 */
315 offset = (bpa & PGOFSET); 330 offset = (bpa & PGOFSET);
316 bpa -= offset; 331 bpa -= offset;
317 size += offset; 332 size += offset;
318 size = round_page(size); 333 size = round_page(size);
319 334
320 /* 335 /*
321 * Allocate the region of I/O space. 336 * Allocate the region of I/O space.
322 */ 337 */
323 error = extent_alloc_region(hp700_io_extent, bpa, size, EX_NOWAIT); 338 error = extent_alloc_region(hp700_io_extent, bpa, size, EX_NOWAIT);
324 if (error) 339 if (error)
325 return (error); 340 return (error);
326 341
327 /* 342 /*
328 * Map the region of I/O space. 343 * Map the region of I/O space.
329 */ 344 */
330 error = mbus_add_mapping(bpa, size, flags, bshp); 345 error = mbus_add_mapping(bpa, size, flags, bshp);
331 *bshp |= offset; 346 *bshp |= offset;
332 if (error) { 347 if (error) {
 348 DPRINTF(("bus_space_map: pa 0x%lx, size 0x%lx failed\n",
 349 bpa, size));
333 if (extent_free(hp700_io_extent, bpa, size, EX_NOWAIT)) { 350 if (extent_free(hp700_io_extent, bpa, size, EX_NOWAIT)) {
334 printf ("bus_space_map: pa 0x%lx, size 0x%lx\n", 
335 bpa, size); 
336 printf ("bus_space_map: can't free region\n"); 351 printf ("bus_space_map: can't free region\n");
337 } 352 }
338 } 353 }
339 354
340 return error; 355 return error;
341} 356}
342 357
343void 358void
344mbus_unmap(void *v, bus_space_handle_t bsh, bus_size_t size) 359mbus_unmap(void *v, bus_space_handle_t bsh, bus_size_t size)
345{ 360{
346 bus_size_t offset; 361 bus_size_t offset;
347 bus_addr_t bpa; 362 bus_addr_t bpa;
348 int error; 363 int error;
349 364
350 /* 365 /*
351 * Page-align the bus_space handle and size. 366 * Page-align the bus_space handle and size.
352 */ 367 */
353 offset = bsh & PGOFSET; 368 offset = bsh & PGOFSET;
354 bsh -= offset; 369 bsh -= offset;
355 size += offset; 370 size += offset;
356 size = round_page(size); 371 size = round_page(size);
357 372
358 /* 373 /*
359 * Unmap the region of I/O space. 374 * Unmap the region of I/O space.
360 */ 375 */
361 error = mbus_remove_mapping(bsh, size, &bpa); 376 error = mbus_remove_mapping(bsh, size, &bpa);
362 if (error) 377 if (error)
363 panic("mbus_unmap: can't unmap region (%d)", error); 378 panic("mbus_unmap: can't unmap region (%d)", error);
364 379
365 /* 380 /*
366 * Free the region of I/O space. 381 * Free the region of I/O space.
367 */ 382 */
368 error = extent_free(hp700_io_extent, bpa, size, EX_NOWAIT); 383 error = extent_free(hp700_io_extent, bpa, size, EX_NOWAIT);
369 if (error) { 384 if (error) {
370 printf("bus_space_unmap: ps 0x%lx, size 0x%lx\n", 385 DPRINTF(("bus_space_unmap: ps 0x%lx, size 0x%lx\n",
371 bpa, size); 386 bpa, size));
372 panic("bus_space_unmap: can't free region (%d)", error); 387 panic("bus_space_unmap: can't free region (%d)", error);
373 } 388 }
374} 389}
375 390
376int 391int
377mbus_alloc(void *v, bus_addr_t rstart, bus_addr_t rend, bus_size_t size, 392mbus_alloc(void *v, bus_addr_t rstart, bus_addr_t rend, bus_size_t size,
378 bus_size_t align, bus_size_t boundary, int flags, bus_addr_t *addrp, 393 bus_size_t align, bus_size_t boundary, int flags, bus_addr_t *addrp,
379 bus_space_handle_t *bshp) 394 bus_space_handle_t *bshp)
380{ 395{
381 bus_addr_t bpa; 396 bus_addr_t bpa;
382 int error; 397 int error;
383 398
384 if (rstart < hp700_io_extent->ex_start || 399 if (rstart < hp700_io_extent->ex_start ||
385 rend > hp700_io_extent->ex_end) 400 rend > hp700_io_extent->ex_end)
386 panic("bus_space_alloc: bad region start/end"); 401 panic("bus_space_alloc: bad region start/end");
387 402
388 /* 403 /*
389 * Force the allocated region to be page-aligned. 404 * Force the allocated region to be page-aligned.
390 */ 405 */
391 if (align < PAGE_SIZE) 406 if (align < PAGE_SIZE)
392 align = PAGE_SIZE; 407 align = PAGE_SIZE;
393 size = round_page(size); 408 size = round_page(size);
394 409
395 /* 410 /*
396 * Allocate the region of I/O space. 411 * Allocate the region of I/O space.
397 */ 412 */
398 error = extent_alloc_subregion1(hp700_io_extent, rstart, rend, size, 413 error = extent_alloc_subregion1(hp700_io_extent, rstart, rend, size,
399 align, 0, boundary, EX_NOWAIT, &bpa); 414 align, 0, boundary, EX_NOWAIT, &bpa);
400 if (error) 415 if (error)
401 return (error); 416 return (error);
402 417
403 /* 418 /*
404 * Map the region of I/O space. 419 * Map the region of I/O space.
405 */ 420 */
406 error = mbus_add_mapping(bpa, size, flags, bshp); 421 error = mbus_add_mapping(bpa, size, flags, bshp);
407 if (error) { 422 if (error) {
 423 DPRINTF(("bus_space_alloc: pa 0x%lx, size 0x%lx failed\n",
 424 bpa, size));
408 if (extent_free(hp700_io_extent, bpa, size, EX_NOWAIT)) { 425 if (extent_free(hp700_io_extent, bpa, size, EX_NOWAIT)) {
409 printf("bus_space_alloc: pa 0x%lx, size 0x%lx\n", 
410 bpa, size); 
411 printf("bus_space_alloc: can't free region\n"); 426 printf("bus_space_alloc: can't free region\n");
412 } 427 }
413 } 428 }
414 429
415 *addrp = bpa; 430 *addrp = bpa;
416 431
417 return error; 432 return error;
418} 433}
419 434
420void 435void
421mbus_free(void *v, bus_space_handle_t h, bus_size_t size) 436mbus_free(void *v, bus_space_handle_t h, bus_size_t size)
422{ 437{
423 /* bus_space_unmap() does all that we need to do. */ 438 /* bus_space_unmap() does all that we need to do. */
424 mbus_unmap(v, h, size); 439 mbus_unmap(v, h, size);
425} 440}
426 441
427int 442int
428mbus_subregion(void *v, bus_space_handle_t bsh, bus_size_t offset, 443mbus_subregion(void *v, bus_space_handle_t bsh, bus_size_t offset,
429 bus_size_t size, bus_space_handle_t *nbshp) 444 bus_size_t size, bus_space_handle_t *nbshp)
430{ 445{
431 *nbshp = bsh + offset; 446 *nbshp = bsh + offset;
432 return(0); 447 return(0);
433} 448}
434 449
435void 450void
436mbus_barrier(void *v, bus_space_handle_t h, bus_size_t o, bus_size_t l, int op) 451mbus_barrier(void *v, bus_space_handle_t h, bus_size_t o, bus_size_t l, int op)
437{ 452{
438 sync_caches(); 453 sync_caches();
439} 454}
440 455
441void* 456void*
442mbus_vaddr(void *v, bus_space_handle_t h) 457mbus_vaddr(void *v, bus_space_handle_t h)
443{ 458{
444 /* 459 /*
445 * We must only be called with addresses in I/O space. 460 * We must only be called with addresses in I/O space.
446 */ 461 */
447 KASSERT(h >= HPPA_IOSPACE); 462 KASSERT(h >= HPPA_IOSPACE);
448 return (void*)h; 463 return (void*)h;
449} 464}
450 465
451paddr_t 466paddr_t
452mbus_mmap(void *v, bus_addr_t addr, off_t off, int prot, int flags) 467mbus_mmap(void *v, bus_addr_t addr, off_t off, int prot, int flags)
453{ 468{
454 469
455 return -1; 470 return -1;
456} 471}
457 472
458u_int8_t 473u_int8_t
459mbus_r1(void *v, bus_space_handle_t h, bus_size_t o) 474mbus_r1(void *v, bus_space_handle_t h, bus_size_t o)
460{ 475{
461 return *((volatile u_int8_t *)(h + o)); 476 return *((volatile u_int8_t *)(h + o));
462} 477}
463 478
464u_int16_t 479u_int16_t
465mbus_r2(void *v, bus_space_handle_t h, bus_size_t o) 480mbus_r2(void *v, bus_space_handle_t h, bus_size_t o)
466{ 481{
467 return *((volatile u_int16_t *)(h + o)); 482 return *((volatile u_int16_t *)(h + o));
468} 483}
469 484
470u_int32_t 485u_int32_t
471mbus_r4(void *v, bus_space_handle_t h, bus_size_t o) 486mbus_r4(void *v, bus_space_handle_t h, bus_size_t o)
472{ 487{
473 return *((volatile u_int32_t *)(h + o)); 488 return *((volatile u_int32_t *)(h + o));
474} 489}
475 490
476u_int64_t 491u_int64_t
477mbus_r8(void *v, bus_space_handle_t h, bus_size_t o) 492mbus_r8(void *v, bus_space_handle_t h, bus_size_t o)
478{ 493{
479 return *((volatile u_int64_t *)(h + o)); 494 return *((volatile u_int64_t *)(h + o));
480} 495}
481 496
482void 497void
483mbus_w1(void *v, bus_space_handle_t h, bus_size_t o, u_int8_t vv) 498mbus_w1(void *v, bus_space_handle_t h, bus_size_t o, u_int8_t vv)
484{ 499{
485 *((volatile u_int8_t *)(h + o)) = vv; 500 *((volatile u_int8_t *)(h + o)) = vv;
486} 501}
487 502
488void 503void
489mbus_w2(void *v, bus_space_handle_t h, bus_size_t o, u_int16_t vv) 504mbus_w2(void *v, bus_space_handle_t h, bus_size_t o, u_int16_t vv)
490{ 505{
491 *((volatile u_int16_t *)(h + o)) = vv; 506 *((volatile u_int16_t *)(h + o)) = vv;
492} 507}
493 508
494void 509void
495mbus_w4(void *v, bus_space_handle_t h, bus_size_t o, u_int32_t vv) 510mbus_w4(void *v, bus_space_handle_t h, bus_size_t o, u_int32_t vv)
496{ 511{
497 *((volatile u_int32_t *)(h + o)) = vv; 512 *((volatile u_int32_t *)(h + o)) = vv;
498} 513}
499 514
500void 515void
501mbus_w8(void *v, bus_space_handle_t h, bus_size_t o, u_int64_t vv) 516mbus_w8(void *v, bus_space_handle_t h, bus_size_t o, u_int64_t vv)
502{ 517{
503 *((volatile u_int64_t *)(h + o)) = vv; 518 *((volatile u_int64_t *)(h + o)) = vv;
504} 519}
505 520
506 521
507void 522void
508mbus_rm_1(void *v, bus_space_handle_t h, bus_size_t o, u_int8_t *a, bus_size_t c) 523mbus_rm_1(void *v, bus_space_handle_t h, bus_size_t o, u_int8_t *a, bus_size_t c)
509{ 524{
510 h += o; 525 h += o;
511 while (c--) 526 while (c--)
512 *(a++) = *(volatile u_int8_t *)h; 527 *(a++) = *(volatile u_int8_t *)h;
513} 528}
514 529
515void 530void
516mbus_rm_2(void *v, bus_space_handle_t h, bus_size_t o, u_int16_t *a, bus_size_t c) 531mbus_rm_2(void *v, bus_space_handle_t h, bus_size_t o, u_int16_t *a, bus_size_t c)
517{ 532{
518 h += o; 533 h += o;
519 while (c--) 534 while (c--)
520 *(a++) = *(volatile u_int16_t *)h; 535 *(a++) = *(volatile u_int16_t *)h;
521} 536}
522 537
523void 538void
524mbus_rm_4(void *v, bus_space_handle_t h, bus_size_t o, u_int32_t *a, bus_size_t c) 539mbus_rm_4(void *v, bus_space_handle_t h, bus_size_t o, u_int32_t *a, bus_size_t c)
525{ 540{
526 h += o; 541 h += o;
527 while (c--) 542 while (c--)
528 *(a++) = *(volatile u_int32_t *)h; 543 *(a++) = *(volatile u_int32_t *)h;
529} 544}
530 545
531void 546void
532mbus_rm_8(void *v, bus_space_handle_t h, bus_size_t o, u_int64_t *a, bus_size_t c) 547mbus_rm_8(void *v, bus_space_handle_t h, bus_size_t o, u_int64_t *a, bus_size_t c)
533{ 548{
534 h += o; 549 h += o;
535 while (c--) 550 while (c--)
536 *(a++) = *(volatile u_int64_t *)h; 551 *(a++) = *(volatile u_int64_t *)h;
537} 552}
538 553
539void 554void
540mbus_wm_1(void *v, bus_space_handle_t h, bus_size_t o, const u_int8_t *a, bus_size_t c) 555mbus_wm_1(void *v, bus_space_handle_t h, bus_size_t o, const u_int8_t *a, bus_size_t c)
541{ 556{
542 h += o; 557 h += o;
543 while (c--) 558 while (c--)
544 *(volatile u_int8_t *)h = *(a++); 559 *(volatile u_int8_t *)h = *(a++);
545} 560}
546 561
547void 562void
548mbus_wm_2(void *v, bus_space_handle_t h, bus_size_t o, const u_int16_t *a, bus_size_t c) 563mbus_wm_2(void *v, bus_space_handle_t h, bus_size_t o, const u_int16_t *a, bus_size_t c)
549{ 564{
550 h += o; 565 h += o;
551 while (c--) 566 while (c--)
552 *(volatile u_int16_t *)h = *(a++); 567 *(volatile u_int16_t *)h = *(a++);
553} 568}
554 569
555void 570void
556mbus_wm_4(void *v, bus_space_handle_t h, bus_size_t o, const u_int32_t *a, bus_size_t c) 571mbus_wm_4(void *v, bus_space_handle_t h, bus_size_t o, const u_int32_t *a, bus_size_t c)
557{ 572{
558 h += o; 573 h += o;
559 while (c--) 574 while (c--)
560 *(volatile u_int32_t *)h = *(a++); 575 *(volatile u_int32_t *)h = *(a++);
561} 576}
562 577
563void 578void
564mbus_wm_8(void *v, bus_space_handle_t h, bus_size_t o, const u_int64_t *a, bus_size_t c) 579mbus_wm_8(void *v, bus_space_handle_t h, bus_size_t o, const u_int64_t *a, bus_size_t c)
565{ 580{
566 h += o; 581 h += o;
567 while (c--) 582 while (c--)
568 *(volatile u_int64_t *)h = *(a++); 583 *(volatile u_int64_t *)h = *(a++);
569} 584}
570 585
571void 586void
572mbus_sm_1(void *v, bus_space_handle_t h, bus_size_t o, u_int8_t vv, bus_size_t c) 587mbus_sm_1(void *v, bus_space_handle_t h, bus_size_t o, u_int8_t vv, bus_size_t c)
573{ 588{
574 h += o; 589 h += o;
575 while (c--) 590 while (c--)
576 *(volatile u_int8_t *)h = vv; 591 *(volatile u_int8_t *)h = vv;
577} 592}
578 593
579void 594void
580mbus_sm_2(void *v, bus_space_handle_t h, bus_size_t o, u_int16_t vv, bus_size_t c) 595mbus_sm_2(void *v, bus_space_handle_t h, bus_size_t o, u_int16_t vv, bus_size_t c)
581{ 596{
582 h += o; 597 h += o;
583 while (c--) 598 while (c--)
584 *(volatile u_int16_t *)h = vv; 599 *(volatile u_int16_t *)h = vv;
585} 600}
586 601
587void 602void
588mbus_sm_4(void *v, bus_space_handle_t h, bus_size_t o, u_int32_t vv, bus_size_t c) 603mbus_sm_4(void *v, bus_space_handle_t h, bus_size_t o, u_int32_t vv, bus_size_t c)
589{ 604{
590 h += o; 605 h += o;
591 while (c--) 606 while (c--)
592 *(volatile u_int32_t *)h = vv; 607 *(volatile u_int32_t *)h = vv;
593} 608}
594 609
595void 610void
596mbus_sm_8(void *v, bus_space_handle_t h, bus_size_t o, u_int64_t vv, bus_size_t c) 611mbus_sm_8(void *v, bus_space_handle_t h, bus_size_t o, u_int64_t vv, bus_size_t c)
597{ 612{
598 h += o; 613 h += o;
599 while (c--) 614 while (c--)
600 *(volatile u_int64_t *)h = vv; 615 *(volatile u_int64_t *)h = vv;
601} 616}
602 617
603void mbus_rrm_2(void *v, bus_space_handle_t h, bus_size_t o, u_int16_t*a, bus_size_t c); 618void mbus_rrm_2(void *v, bus_space_handle_t h, bus_size_t o, u_int16_t*a, bus_size_t c);
604void mbus_rrm_4(void *v, bus_space_handle_t h, bus_size_t o, u_int32_t*a, bus_size_t c); 619void mbus_rrm_4(void *v, bus_space_handle_t h, bus_size_t o, u_int32_t*a, bus_size_t c);
605void mbus_rrm_8(void *v, bus_space_handle_t h, bus_size_t o, u_int64_t*a, bus_size_t c); 620void mbus_rrm_8(void *v, bus_space_handle_t h, bus_size_t o, u_int64_t*a, bus_size_t c);
606 621
607void mbus_wrm_2(void *v, bus_space_handle_t h, bus_size_t o, const u_int16_t *a, bus_size_t c); 622void mbus_wrm_2(void *v, bus_space_handle_t h, bus_size_t o, const u_int16_t *a, bus_size_t c);
608void mbus_wrm_4(void *v, bus_space_handle_t h, bus_size_t o, const u_int32_t *a, bus_size_t c); 623void mbus_wrm_4(void *v, bus_space_handle_t h, bus_size_t o, const u_int32_t *a, bus_size_t c);
609void mbus_wrm_8(void *v, bus_space_handle_t h, bus_size_t o, const u_int64_t *a, bus_size_t c); 624void mbus_wrm_8(void *v, bus_space_handle_t h, bus_size_t o, const u_int64_t *a, bus_size_t c);
610 625
611void 626void
612mbus_rr_1(void *v, bus_space_handle_t h, bus_size_t o, u_int8_t *a, bus_size_t c) 627mbus_rr_1(void *v, bus_space_handle_t h, bus_size_t o, u_int8_t *a, bus_size_t c)
613{ 628{
614 volatile u_int8_t *p; 629 volatile u_int8_t *p;
615 630
616 h += o; 631 h += o;
617 p = (void *)h; 632 p = (void *)h;
618 while (c--) 633 while (c--)
619 *a++ = *p++; 634 *a++ = *p++;
620} 635}
621 636
622void 637void
623mbus_rr_2(void *v, bus_space_handle_t h, bus_size_t o, u_int16_t *a, bus_size_t c) 638mbus_rr_2(void *v, bus_space_handle_t h, bus_size_t o, u_int16_t *a, bus_size_t c)
624{ 639{
625 volatile u_int16_t *p; 640 volatile u_int16_t *p;
626 641
627 h += o; 642 h += o;
628 p = (void *)h; 643 p = (void *)h;
629 while (c--) 644 while (c--)
630 *a++ = *p++; 645 *a++ = *p++;
631} 646}
632 647
633void 648void
634mbus_rr_4(void *v, bus_space_handle_t h, bus_size_t o, u_int32_t *a, bus_size_t c) 649mbus_rr_4(void *v, bus_space_handle_t h, bus_size_t o, u_int32_t *a, bus_size_t c)
635{ 650{
636 volatile u_int32_t *p; 651 volatile u_int32_t *p;
637 652
638 h += o; 653 h += o;
639 p = (void *)h; 654 p = (void *)h;
640 while (c--) 655 while (c--)
641 *a++ = *p++; 656 *a++ = *p++;
642} 657}
643 658
644void 659void
645mbus_rr_8(void *v, bus_space_handle_t h, bus_size_t o, u_int64_t *a, bus_size_t c) 660mbus_rr_8(void *v, bus_space_handle_t h, bus_size_t o, u_int64_t *a, bus_size_t c)
646{ 661{
647 volatile u_int64_t *p; 662 volatile u_int64_t *p;
648 663
649 h += o; 664 h += o;
650 p = (void *)h; 665 p = (void *)h;
651 while (c--) 666 while (c--)
652 *a++ = *p++; 667 *a++ = *p++;
653} 668}
654 669
655void 670void
656mbus_wr_1(void *v, bus_space_handle_t h, bus_size_t o, const u_int8_t *a, bus_size_t c) 671mbus_wr_1(void *v, bus_space_handle_t h, bus_size_t o, const u_int8_t *a, bus_size_t c)
657{ 672{
658 volatile u_int8_t *p; 673 volatile u_int8_t *p;
659 674
660 h += o; 675 h += o;
661 p = (void *)h; 676 p = (void *)h;
662 while (c--) 677 while (c--)
663 *p++ = *a++; 678 *p++ = *a++;
664} 679}
665 680
666void 681void
667mbus_wr_2(void *v, bus_space_handle_t h, bus_size_t o, const u_int16_t *a, bus_size_t c) 682mbus_wr_2(void *v, bus_space_handle_t h, bus_size_t o, const u_int16_t *a, bus_size_t c)
668{ 683{
669 volatile u_int16_t *p; 684 volatile u_int16_t *p;
670 685
671 h += o; 686 h += o;
672 p = (void *)h; 687 p = (void *)h;
673 while (c--) 688 while (c--)
674 *p++ = *a++; 689 *p++ = *a++;
675} 690}
676 691
677void 692void
678mbus_wr_4(void *v, bus_space_handle_t h, bus_size_t o, const u_int32_t *a, bus_size_t c) 693mbus_wr_4(void *v, bus_space_handle_t h, bus_size_t o, const u_int32_t *a, bus_size_t c)
679{ 694{
680 volatile u_int32_t *p; 695 volatile u_int32_t *p;
681 696
682 h += o; 697 h += o;
683 p = (void *)h; 698 p = (void *)h;
684 while (c--) 699 while (c--)
685 *p++ = *a++; 700 *p++ = *a++;
686} 701}
687 702
688void 703void
689mbus_wr_8(void *v, bus_space_handle_t h, bus_size_t o, const u_int64_t *a, bus_size_t c) 704mbus_wr_8(void *v, bus_space_handle_t h, bus_size_t o, const u_int64_t *a, bus_size_t c)
690{ 705{
691 volatile u_int64_t *p; 706 volatile u_int64_t *p;
692 707
693 h += o; 708 h += o;
694 p = (void *)h; 709 p = (void *)h;
695 while (c--) 710 while (c--)
696 *p++ = *a++; 711 *p++ = *a++;
697} 712}
698 713
699void mbus_rrr_2(void *, bus_space_handle_t, bus_size_t, u_int16_t *, bus_size_t); 714void mbus_rrr_2(void *, bus_space_handle_t, bus_size_t, u_int16_t *, bus_size_t);
700void mbus_rrr_4(void *, bus_space_handle_t, bus_size_t, u_int32_t *, bus_size_t); 715void mbus_rrr_4(void *, bus_space_handle_t, bus_size_t, u_int32_t *, bus_size_t);
701void mbus_rrr_8(void *, bus_space_handle_t, bus_size_t, u_int64_t *, bus_size_t); 716void mbus_rrr_8(void *, bus_space_handle_t, bus_size_t, u_int64_t *, bus_size_t);
702 717
703void mbus_wrr_2(void *, bus_space_handle_t, bus_size_t, const u_int16_t *, bus_size_t); 718void mbus_wrr_2(void *, bus_space_handle_t, bus_size_t, const u_int16_t *, bus_size_t);
704void mbus_wrr_4(void *, bus_space_handle_t, bus_size_t, const u_int32_t *, bus_size_t); 719void mbus_wrr_4(void *, bus_space_handle_t, bus_size_t, const u_int32_t *, bus_size_t);
705void mbus_wrr_8(void *, bus_space_handle_t, bus_size_t, const u_int64_t *, bus_size_t); 720void mbus_wrr_8(void *, bus_space_handle_t, bus_size_t, const u_int64_t *, bus_size_t);
706 721
707void 722void
708mbus_sr_1(void *v, bus_space_handle_t h, bus_size_t o, u_int8_t vv, bus_size_t c) 723mbus_sr_1(void *v, bus_space_handle_t h, bus_size_t o, u_int8_t vv, bus_size_t c)
709{ 724{
710 volatile u_int8_t *p; 725 volatile u_int8_t *p;
711 726
712 h += o; 727 h += o;
713 p = (void *)h; 728 p = (void *)h;
714 while (c--) 729 while (c--)
715 *p++ = vv; 730 *p++ = vv;
716} 731}
717 732
718void 733void
719mbus_sr_2(void *v, bus_space_handle_t h, bus_size_t o, u_int16_t vv, bus_size_t c) 734mbus_sr_2(void *v, bus_space_handle_t h, bus_size_t o, u_int16_t vv, bus_size_t c)
720{ 735{
721 volatile u_int16_t *p; 736 volatile u_int16_t *p;
722 737
723 h += o; 738 h += o;
724 p = (void *)h; 739 p = (void *)h;
725 while (c--) 740 while (c--)
726 *p++ = vv; 741 *p++ = vv;
727} 742}
728 743
729void 744void
730mbus_sr_4(void *v, bus_space_handle_t h, bus_size_t o, u_int32_t vv, bus_size_t c) 745mbus_sr_4(void *v, bus_space_handle_t h, bus_size_t o, u_int32_t vv, bus_size_t c)
731{ 746{
732 volatile u_int32_t *p; 747 volatile u_int32_t *p;
733 748
734 h += o; 749 h += o;
735 p = (void *)h; 750 p = (void *)h;
736 while (c--) 751 while (c--)
737 *p++ = vv; 752 *p++ = vv;
738} 753}
739 754
740void 755void
741mbus_sr_8(void *v, bus_space_handle_t h, bus_size_t o, u_int64_t vv, bus_size_t c) 756mbus_sr_8(void *v, bus_space_handle_t h, bus_size_t o, u_int64_t vv, bus_size_t c)
742{ 757{
743 volatile u_int64_t *p; 758 volatile u_int64_t *p;
744 759
745 h += o; 760 h += o;
746 p = (void *)h; 761 p = (void *)h;
747 while (c--) 762 while (c--)
748 *p++ = vv; 763 *p++ = vv;
749} 764}
750 765
751void 766void
752mbus_cp_1(void *v, bus_space_handle_t h1, bus_size_t o1, 767mbus_cp_1(void *v, bus_space_handle_t h1, bus_size_t o1,
753 bus_space_handle_t h2, bus_size_t o2, bus_size_t c) 768 bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
754{ 769{
755 volatile u_int8_t *p1, *p2; 770 volatile u_int8_t *p1, *p2;
756 771
757 h1 += o1; 772 h1 += o1;
758 h2 += o2; 773 h2 += o2;
759 p1 = (void *)h1; 774 p1 = (void *)h1;
760 p2 = (void *)h2; 775 p2 = (void *)h2;
761 while (c--) 776 while (c--)
762 *p1++ = *p2++; 777 *p1++ = *p2++;
763} 778}
764 779
765void 780void
766mbus_cp_2(void *v, bus_space_handle_t h1, bus_size_t o1, 781mbus_cp_2(void *v, bus_space_handle_t h1, bus_size_t o1,
767 bus_space_handle_t h2, bus_size_t o2, bus_size_t c) 782 bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
768{ 783{
769 volatile u_int16_t *p1, *p2; 784 volatile u_int16_t *p1, *p2;
770 785
771 h1 += o1; 786 h1 += o1;
772 h2 += o2; 787 h2 += o2;
773 p1 = (void *)h1; 788 p1 = (void *)h1;
774 p2 = (void *)h2; 789 p2 = (void *)h2;
775 while (c--) 790 while (c--)
776 *p1++ = *p2++; 791 *p1++ = *p2++;
777} 792}
778 793
779void 794void
780mbus_cp_4(void *v, bus_space_handle_t h1, bus_size_t o1, 795mbus_cp_4(void *v, bus_space_handle_t h1, bus_size_t o1,
781 bus_space_handle_t h2, bus_size_t o2, bus_size_t c) 796 bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
782{ 797{
783 volatile u_int32_t *p1, *p2; 798 volatile u_int32_t *p1, *p2;
784 799
785 h1 += o1; 800 h1 += o1;
786 h2 += o2; 801 h2 += o2;
787 p1 = (void *)h1; 802 p1 = (void *)h1;
788 p2 = (void *)h2; 803 p2 = (void *)h2;
789 while (c--) 804 while (c--)
790 *p1++ = *p2++; 805 *p1++ = *p2++;
791} 806}
792 807
793void 808void
794mbus_cp_8(void *v, bus_space_handle_t h1, bus_size_t o1, 809mbus_cp_8(void *v, bus_space_handle_t h1, bus_size_t o1,
795 bus_space_handle_t h2, bus_size_t o2, bus_size_t c) 810 bus_space_handle_t h2, bus_size_t o2, bus_size_t c)
796{ 811{
797 volatile u_int64_t *p1, *p2; 812 volatile u_int64_t *p1, *p2;
798 813
799 h1 += o1; 814 h1 += o1;
800 h2 += o2; 815 h2 += o2;
801 p1 = (void *)h1; 816 p1 = (void *)h1;
802 p2 = (void *)h2; 817 p2 = (void *)h2;
803 while (c--) 818 while (c--)
804 *p1++ = *p2++; 819 *p1++ = *p2++;
805} 820}
806 821
807 822
808const struct hppa_bus_space_tag hppa_bustag = { 823const struct hppa_bus_space_tag hppa_bustag = {
809 NULL, 824 NULL,
810 825
811 mbus_map, mbus_unmap, mbus_subregion, mbus_alloc, mbus_free, 826 mbus_map, mbus_unmap, mbus_subregion, mbus_alloc, mbus_free,
812 mbus_barrier, mbus_vaddr, mbus_mmap, 827 mbus_barrier, mbus_vaddr, mbus_mmap,
813 mbus_r1, mbus_r2, mbus_r4, mbus_r8, 828 mbus_r1, mbus_r2, mbus_r4, mbus_r8,
814 mbus_w1, mbus_w2, mbus_w4, mbus_w8, 829 mbus_w1, mbus_w2, mbus_w4, mbus_w8,
815 mbus_rm_1, mbus_rm_2, mbus_rm_4, mbus_rm_8, 830 mbus_rm_1, mbus_rm_2, mbus_rm_4, mbus_rm_8,
816 mbus_wm_1, mbus_wm_2, mbus_wm_4, mbus_wm_8, 831 mbus_wm_1, mbus_wm_2, mbus_wm_4, mbus_wm_8,
817 mbus_sm_1, mbus_sm_2, mbus_sm_4, mbus_sm_8, 832 mbus_sm_1, mbus_sm_2, mbus_sm_4, mbus_sm_8,
818 /* *_stream_* are the same as non-stream for native busses */ 833 /* *_stream_* are the same as non-stream for native busses */
819 mbus_rm_2, mbus_rm_4, mbus_rm_8, 834 mbus_rm_2, mbus_rm_4, mbus_rm_8,
820 mbus_wm_2, mbus_wm_4, mbus_wm_8, 835 mbus_wm_2, mbus_wm_4, mbus_wm_8,
821 mbus_rr_1, mbus_rr_2, mbus_rr_4, mbus_rr_8, 836 mbus_rr_1, mbus_rr_2, mbus_rr_4, mbus_rr_8,
822 mbus_wr_1, mbus_wr_2, mbus_wr_4, mbus_wr_8, 837 mbus_wr_1, mbus_wr_2, mbus_wr_4, mbus_wr_8,
823 /* *_stream_* are the same as non-stream for native busses */ 838 /* *_stream_* are the same as non-stream for native busses */
824 mbus_rr_2, mbus_rr_4, mbus_rr_8, 839 mbus_rr_2, mbus_rr_4, mbus_rr_8,
825 mbus_wr_2, mbus_wr_4, mbus_wr_8, 840 mbus_wr_2, mbus_wr_4, mbus_wr_8,
826 mbus_sr_1, mbus_sr_2, mbus_sr_4, mbus_sr_8, 841 mbus_sr_1, mbus_sr_2, mbus_sr_4, mbus_sr_8,
827 mbus_cp_1, mbus_cp_2, mbus_cp_4, mbus_cp_8 842 mbus_cp_1, mbus_cp_2, mbus_cp_4, mbus_cp_8
828}; 843};
829 844
830/* 845/*
831 * Common function for DMA map creation. May be called by bus-specific 846 * Common function for DMA map creation. May be called by bus-specific
832 * DMA map creation functions. 847 * DMA map creation functions.
833 */ 848 */
834int 849int
835mbus_dmamap_create(void *v, bus_size_t size, int nsegments, bus_size_t maxsegsz, 850mbus_dmamap_create(void *v, bus_size_t size, int nsegments, bus_size_t maxsegsz,
836 bus_size_t boundary, int flags, bus_dmamap_t *dmamp) 851 bus_size_t boundary, int flags, bus_dmamap_t *dmamp)
837{ 852{
838 struct hppa_bus_dmamap *map; 853 struct hppa_bus_dmamap *map;
839 size_t mapsize; 854 size_t mapsize;
840 855
841 /* 856 /*
842 * Allocate and initialize the DMA map. The end of the map 857 * Allocate and initialize the DMA map. The end of the map
843 * is a variable-sized array of segments, so we allocate enough 858 * is a variable-sized array of segments, so we allocate enough
844 * room for them in one shot. 859 * room for them in one shot.
845 * 860 *
846 * Note we don't preserve the WAITOK or NOWAIT flags. Preservation 861 * Note we don't preserve the WAITOK or NOWAIT flags. Preservation
847 * of ALLOCNOW notifies others that we've reserved these resources, 862 * of ALLOCNOW notifies others that we've reserved these resources,
848 * and they are not to be freed. 863 * and they are not to be freed.
849 * 864 *
850 * The bus_dmamap_t includes one bus_dma_segment_t, hence 865 * The bus_dmamap_t includes one bus_dma_segment_t, hence
851 * the (nsegments - 1). 866 * the (nsegments - 1).
852 */ 867 */
853 mapsize = sizeof(struct hppa_bus_dmamap) + 868 mapsize = sizeof(struct hppa_bus_dmamap) +
854 (sizeof(bus_dma_segment_t) * (nsegments - 1)); 869 (sizeof(bus_dma_segment_t) * (nsegments - 1));
855 map = malloc(mapsize, M_DMAMAP, 870 map = malloc(mapsize, M_DMAMAP,
856 (flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK); 871 (flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK);
857 if (!map) 872 if (!map)
858 return (ENOMEM); 873 return (ENOMEM);
859 874
860 memset(map, 0, mapsize); 875 memset(map, 0, mapsize);
861 map->_dm_size = size; 876 map->_dm_size = size;
862 map->_dm_segcnt = nsegments; 877 map->_dm_segcnt = nsegments;
863 map->_dm_maxsegsz = maxsegsz; 878 map->_dm_maxsegsz = maxsegsz;
864 map->_dm_boundary = boundary; 879 map->_dm_boundary = boundary;
865 map->_dm_flags = flags & ~(BUS_DMA_WAITOK|BUS_DMA_NOWAIT); 880 map->_dm_flags = flags & ~(BUS_DMA_WAITOK|BUS_DMA_NOWAIT);
866 map->dm_mapsize = 0; /* no valid mappings */ 881 map->dm_mapsize = 0; /* no valid mappings */
867 map->dm_nsegs = 0; 882 map->dm_nsegs = 0;
868 883
869 *dmamp = map; 884 *dmamp = map;
870 return (0); 885 return (0);
871} 886}
872 887
873/* 888/*
874 * Common function for DMA map destruction. May be called by bus-specific 889 * Common function for DMA map destruction. May be called by bus-specific
875 * DMA map destruction functions. 890 * DMA map destruction functions.
876 */ 891 */
877void 892void
878mbus_dmamap_destroy(void *v, bus_dmamap_t map) 893mbus_dmamap_destroy(void *v, bus_dmamap_t map)
879{ 894{
880 895
881 /* 896 /*
882 * If the handle contains a valid mapping, unload it. 897 * If the handle contains a valid mapping, unload it.
883 */ 898 */
884 if (map->dm_mapsize != 0) 899 if (map->dm_mapsize != 0)
885 mbus_dmamap_unload(v, map); 900 mbus_dmamap_unload(v, map);
886 901
887 free(map, M_DMAMAP); 902 free(map, M_DMAMAP);
888} 903}
889 904
890/* 905/*
891 * load DMA map with a linear buffer. 906 * load DMA map with a linear buffer.
892 */ 907 */
893int 908int
894mbus_dmamap_load(void *v, bus_dmamap_t map, void *buf, bus_size_t buflen, 909mbus_dmamap_load(void *v, bus_dmamap_t map, void *buf, bus_size_t buflen,
895 struct proc *p, int flags) 910 struct proc *p, int flags)
896{ 911{
897 vaddr_t lastaddr; 912 vaddr_t lastaddr;
898 int seg, error; 913 int seg, error;
899 struct vmspace *vm; 914 struct vmspace *vm;
900 915
901 /* 916 /*
902 * Make sure that on error condition we return "no valid mappings". 917 * Make sure that on error condition we return "no valid mappings".
903 */ 918 */
904 map->dm_mapsize = 0; 919 map->dm_mapsize = 0;
905 map->dm_nsegs = 0; 920 map->dm_nsegs = 0;
906 921
907 if (buflen > map->_dm_size) 922 if (buflen > map->_dm_size)
908 return (EINVAL); 923 return (EINVAL);
909 924
910 if (p != NULL) { 925 if (p != NULL) {
911 vm = p->p_vmspace; 926 vm = p->p_vmspace;
912 } else { 927 } else {
913 vm = vmspace_kernel(); 928 vm = vmspace_kernel();
914 } 929 }
915 930
916 seg = 0; 931 seg = 0;
917 error = _bus_dmamap_load_buffer(NULL, map, buf, buflen, vm, flags, 932 error = _bus_dmamap_load_buffer(NULL, map, buf, buflen, vm, flags,
918 &lastaddr, &seg, 1); 933 &lastaddr, &seg, 1);
919 if (error == 0) { 934 if (error == 0) {
920 map->dm_mapsize = buflen; 935 map->dm_mapsize = buflen;
921 map->dm_nsegs = seg + 1; 936 map->dm_nsegs = seg + 1;
922 } 937 }
923 return (error); 938 return (error);
924} 939}
925 940
926/* 941/*
927 * Like _bus_dmamap_load(), but for mbufs. 942 * Like _bus_dmamap_load(), but for mbufs.
928 */ 943 */
929int 944int
930mbus_dmamap_load_mbuf(void *v, bus_dmamap_t map, struct mbuf *m0, 945mbus_dmamap_load_mbuf(void *v, bus_dmamap_t map, struct mbuf *m0,
931 int flags) 946 int flags)
932{ 947{
933 vaddr_t lastaddr; 948 vaddr_t lastaddr;
934 int seg, error, first; 949 int seg, error, first;
935 struct mbuf *m; 950 struct mbuf *m;
936 951
937 /* 952 /*
938 * Make sure that on error condition we return "no valid mappings." 953 * Make sure that on error condition we return "no valid mappings."
939 */ 954 */
940 map->dm_mapsize = 0; 955 map->dm_mapsize = 0;
941 map->dm_nsegs = 0; 956 map->dm_nsegs = 0;
942 957
943#ifdef DIAGNOSTIC 958#ifdef DIAGNOSTIC
944 if ((m0->m_flags & M_PKTHDR) == 0) 959 if ((m0->m_flags & M_PKTHDR) == 0)
945 panic("_bus_dmamap_load_mbuf: no packet header"); 960 panic("_bus_dmamap_load_mbuf: no packet header");
946#endif /* DIAGNOSTIC */ 961#endif /* DIAGNOSTIC */
947 962
948 if (m0->m_pkthdr.len > map->_dm_size) 963 if (m0->m_pkthdr.len > map->_dm_size)
949 return (EINVAL); 964 return (EINVAL);
950 965
951 first = 1; 966 first = 1;
952 seg = 0; 967 seg = 0;
953 error = 0; 968 error = 0;
954 for (m = m0; m != NULL && error == 0; m = m->m_next) { 969 for (m = m0; m != NULL && error == 0; m = m->m_next) {
955 if (m->m_len == 0) 970 if (m->m_len == 0)
956 continue; 971 continue;
957 error = _bus_dmamap_load_buffer(NULL, map, m->m_data, m->m_len, 972 error = _bus_dmamap_load_buffer(NULL, map, m->m_data, m->m_len,
958 vmspace_kernel(), flags, &lastaddr, &seg, first); 973 vmspace_kernel(), flags, &lastaddr, &seg, first);
959 first = 0; 974 first = 0;
960 } 975 }
961 if (error == 0) { 976 if (error == 0) {
962 map->dm_mapsize = m0->m_pkthdr.len; 977 map->dm_mapsize = m0->m_pkthdr.len;
963 map->dm_nsegs = seg + 1; 978 map->dm_nsegs = seg + 1;
964 } 979 }
965 return (error); 980 return (error);
966} 981}
967 982
968/* 983/*
969 * Like _bus_dmamap_load(), but for uios. 984 * Like _bus_dmamap_load(), but for uios.
970 */ 985 */
971int 986int
972mbus_dmamap_load_uio(void *v, bus_dmamap_t map, struct uio *uio, 987mbus_dmamap_load_uio(void *v, bus_dmamap_t map, struct uio *uio,
973 int flags) 988 int flags)
974{ 989{
975 vaddr_t lastaddr; 990 vaddr_t lastaddr;
976 int seg, i, error, first; 991 int seg, i, error, first;
977 bus_size_t minlen, resid; 992 bus_size_t minlen, resid;
978 struct iovec *iov; 993 struct iovec *iov;
979 void *addr; 994 void *addr;
980 995
981 /* 996 /*
982 * Make sure that on error condition we return "no valid mappings." 997 * Make sure that on error condition we return "no valid mappings."
983 */ 998 */
984 map->dm_mapsize = 0; 999 map->dm_mapsize = 0;
985 map->dm_nsegs = 0; 1000 map->dm_nsegs = 0;
986 1001
987 resid = uio->uio_resid; 1002 resid = uio->uio_resid;
988 iov = uio->uio_iov; 1003 iov = uio->uio_iov;
989 1004
990 first = 1; 1005 first = 1;
991 seg = 0; 1006 seg = 0;
992 error = 0; 1007 error = 0;
993 for (i = 0; i < uio->uio_iovcnt && resid != 0 && error == 0; i++) { 1008 for (i = 0; i < uio->uio_iovcnt && resid != 0 && error == 0; i++) {
994 /* 1009 /*
995 * Now at the first iovec to load. Load each iovec 1010 * Now at the first iovec to load. Load each iovec
996 * until we have exhausted the residual count. 1011 * until we have exhausted the residual count.
997 */ 1012 */
998 minlen = MIN(resid, iov[i].iov_len); 1013 minlen = MIN(resid, iov[i].iov_len);
999 addr = (void *)iov[i].iov_base; 1014 addr = (void *)iov[i].iov_base;
1000 1015
1001 error = _bus_dmamap_load_buffer(NULL, map, addr, minlen, 1016 error = _bus_dmamap_load_buffer(NULL, map, addr, minlen,
1002 uio->uio_vmspace, flags, &lastaddr, &seg, first); 1017 uio->uio_vmspace, flags, &lastaddr, &seg, first);
1003 first = 0; 1018 first = 0;
1004 1019
1005 resid -= minlen; 1020 resid -= minlen;
1006 } 1021 }
1007 if (error == 0) { 1022 if (error == 0) {
1008 map->dm_mapsize = uio->uio_resid; 1023 map->dm_mapsize = uio->uio_resid;
1009 map->dm_nsegs = seg + 1; 1024 map->dm_nsegs = seg + 1;
1010 } 1025 }
1011 return (error); 1026 return (error);
1012} 1027}
1013 1028
1014/* 1029/*
1015 * Like bus_dmamap_load(), but for raw memory allocated with 1030 * Like bus_dmamap_load(), but for raw memory allocated with
1016 * bus_dmamem_alloc(). 1031 * bus_dmamem_alloc().
1017 */ 1032 */
1018int 1033int
1019mbus_dmamap_load_raw(void *v, bus_dmamap_t map, bus_dma_segment_t *segs, 1034mbus_dmamap_load_raw(void *v, bus_dmamap_t map, bus_dma_segment_t *segs,
1020 int nsegs, bus_size_t size, int flags) 1035 int nsegs, bus_size_t size, int flags)
1021{ 1036{
1022 struct pglist *mlist; 1037 struct pglist *mlist;
1023 struct vm_page *m; 1038 struct vm_page *m;
1024 paddr_t pa, pa_next; 1039 paddr_t pa, pa_next;
1025 bus_size_t mapsize; 1040 bus_size_t mapsize;
1026 bus_size_t pagesz = PAGE_SIZE; 1041 bus_size_t pagesz = PAGE_SIZE;
1027 int seg; 1042 int seg;
1028 1043
1029 /* 1044 /*
1030 * Make sure that on error condition we return "no valid mappings". 1045 * Make sure that on error condition we return "no valid mappings".
1031 */ 1046 */
1032 map->dm_nsegs = 0; 1047 map->dm_nsegs = 0;
1033 map->dm_mapsize = 0; 1048 map->dm_mapsize = 0;
1034 1049
1035 /* Load the allocated pages. */ 1050 /* Load the allocated pages. */
1036 mlist = segs[0]._ds_mlist; 1051 mlist = segs[0]._ds_mlist;
1037 pa_next = 0; 1052 pa_next = 0;
1038 seg = -1; 1053 seg = -1;
1039 mapsize = size; 1054 mapsize = size;
1040 for (m = TAILQ_FIRST(mlist); m != NULL; m = TAILQ_NEXT(m,pageq.queue)) { 1055 for (m = TAILQ_FIRST(mlist); m != NULL; m = TAILQ_NEXT(m,pageq.queue)) {
1041 1056
1042 if (size == 0) 1057 if (size == 0)
1043 panic("mbus_dmamem_load_raw: size botch"); 1058 panic("mbus_dmamem_load_raw: size botch");
1044 1059
1045 pa = VM_PAGE_TO_PHYS(m); 1060 pa = VM_PAGE_TO_PHYS(m);
1046 if (pa != pa_next) { 1061 if (pa != pa_next) {
1047 if (++seg >= map->_dm_segcnt) 1062 if (++seg >= map->_dm_segcnt)
1048 panic("mbus_dmamem_load_raw: nsegs botch"); 1063 panic("mbus_dmamem_load_raw: nsegs botch");
1049 map->dm_segs[seg].ds_addr = pa; 1064 map->dm_segs[seg].ds_addr = pa;
1050 map->dm_segs[seg].ds_len = 0; 1065 map->dm_segs[seg].ds_len = 0;
1051 } 1066 }
1052 pa_next = pa + PAGE_SIZE; 1067 pa_next = pa + PAGE_SIZE;
1053 if (size < pagesz) 1068 if (size < pagesz)
1054 pagesz = size; 1069 pagesz = size;
1055 map->dm_segs[seg].ds_len += pagesz; 1070 map->dm_segs[seg].ds_len += pagesz;
1056 size -= pagesz; 1071 size -= pagesz;
1057 } 1072 }
1058 1073
1059 /* Make the map truly valid. */ 1074 /* Make the map truly valid. */
1060 map->dm_nsegs = seg + 1; 1075 map->dm_nsegs = seg + 1;
1061 map->dm_mapsize = mapsize; 1076 map->dm_mapsize = mapsize;
1062 1077
1063 return (0); 1078 return (0);
1064} 1079}
1065 1080
1066/* 1081/*
1067 * unload a DMA map. 1082 * unload a DMA map.
1068 */ 1083 */
1069void 1084void
1070mbus_dmamap_unload(void *v, bus_dmamap_t map) 1085mbus_dmamap_unload(void *v, bus_dmamap_t map)
1071{ 1086{
1072 /* 1087 /*
1073 * If this map was loaded with mbus_dmamap_load, 1088 * If this map was loaded with mbus_dmamap_load,
1074 * we don't need to do anything. If this map was 1089 * we don't need to do anything. If this map was
1075 * loaded with mbus_dmamap_load_raw, we also don't 1090 * loaded with mbus_dmamap_load_raw, we also don't
1076 * need to do anything. 1091 * need to do anything.
1077 */ 1092 */
1078 1093
1079 /* Mark the mappings as invalid. */ 1094 /* Mark the mappings as invalid. */
1080 map->dm_mapsize = 0; 1095 map->dm_mapsize = 0;
1081 map->dm_nsegs = 0; 1096 map->dm_nsegs = 0;
1082} 1097}
1083 1098
1084void 1099void
1085mbus_dmamap_sync(void *v, bus_dmamap_t map, bus_addr_t offset, bus_size_t len, 1100mbus_dmamap_sync(void *v, bus_dmamap_t map, bus_addr_t offset, bus_size_t len,
1086 int ops) 1101 int ops)
1087{ 1102{
1088 int i; 1103 int i;
1089 /* 1104 /*
1090 * Mixing of PRE and POST operations is not allowed. 1105 * Mixing of PRE and POST operations is not allowed.
1091 */ 1106 */
1092 if ((ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) != 0 && 1107 if ((ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) != 0 &&
1093 (ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) != 0) 1108 (ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) != 0)
1094 panic("mbus_dmamap_sync: mix PRE and POST"); 1109 panic("mbus_dmamap_sync: mix PRE and POST");
1095 1110
1096#ifdef DIAGNOSTIC 1111#ifdef DIAGNOSTIC
1097 if (offset >= map->dm_mapsize) 1112 if (offset >= map->dm_mapsize)
1098 panic("mbus_dmamap_sync: bad offset %lu (map size is %lu)", 1113 panic("mbus_dmamap_sync: bad offset %lu (map size is %lu)",
1099 offset, map->dm_mapsize); 1114 offset, map->dm_mapsize);
1100 if (len == 0 || (offset + len) > map->dm_mapsize) 1115 if (len == 0 || (offset + len) > map->dm_mapsize)
1101 panic("mbus_dmamap_sync: bad length"); 1116 panic("mbus_dmamap_sync: bad length");
1102#endif 1117#endif
1103 1118
1104 /* 1119 /*
1105 * For a virtually-indexed write-back cache, we need 1120 * For a virtually-indexed write-back cache, we need
1106 * to do the following things: 1121 * to do the following things:
1107 * 1122 *
1108 * PREREAD -- Invalidate the D-cache. We do this 1123 * PREREAD -- Invalidate the D-cache. We do this
1109 * here in case a write-back is required by the back-end. 1124 * here in case a write-back is required by the back-end.
1110 * 1125 *
1111 * PREWRITE -- Write-back the D-cache. Note that if 1126 * PREWRITE -- Write-back the D-cache. Note that if
1112 * we are doing a PREREAD|PREWRITE, we can collapse 1127 * we are doing a PREREAD|PREWRITE, we can collapse
1113 * the whole thing into a single Wb-Inv. 1128 * the whole thing into a single Wb-Inv.
1114 * 1129 *
1115 * POSTREAD -- Nothing. 1130 * POSTREAD -- Nothing.
1116 * 1131 *
1117 * POSTWRITE -- Nothing. 1132 * POSTWRITE -- Nothing.
1118 */ 1133 */
1119 1134
1120 ops &= (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1135 ops &= (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1121 if (ops == 0) 1136 if (ops == 0)
1122 return; 1137 return;
1123 1138
1124 for (i = 0; len != 0 && i < map->dm_nsegs; i++) { 1139 for (i = 0; len != 0 && i < map->dm_nsegs; i++) {
1125 if (offset >= map->dm_segs[i].ds_len) 1140 if (offset >= map->dm_segs[i].ds_len)
1126 offset -= map->dm_segs[i].ds_len; 1141 offset -= map->dm_segs[i].ds_len;
1127 else { 1142 else {
1128 bus_size_t l = map->dm_segs[i].ds_len - offset; 1143 bus_size_t l = map->dm_segs[i].ds_len - offset;
1129 1144
1130 if (l > len) 1145 if (l > len)
1131 l = len; 1146 l = len;
1132 1147
1133 fdcache(HPPA_SID_KERNEL, map->dm_segs[i]._ds_va + 1148 fdcache(HPPA_SID_KERNEL, map->dm_segs[i]._ds_va +
1134 offset, l); 1149 offset, l);
1135 len -= l; 1150 len -= l;
1136 offset = 0; 1151 offset = 0;
1137 } 1152 }
1138 } 1153 }
1139 1154
1140 /* for either operation sync the shit away */ 1155 /* for either operation sync the shit away */
1141 __asm __volatile ("sync\n\tsyncdma\n\tsync\n\t" 1156 __asm __volatile ("sync\n\tsyncdma\n\tsync\n\t"
1142 "nop\n\tnop\n\tnop\n\tnop\n\tnop\n\tnop\n\tnop" ::: "memory"); 1157 "nop\n\tnop\n\tnop\n\tnop\n\tnop\n\tnop\n\tnop" ::: "memory");
1143} 1158}
1144 1159
1145/* 1160/*
1146 * Common function for DMA-safe memory allocation. May be called 1161 * Common function for DMA-safe memory allocation. May be called
1147 * by bus-specific DMA memory allocation functions. 1162 * by bus-specific DMA memory allocation functions.
1148 */ 1163 */
1149int 1164int
1150mbus_dmamem_alloc(void *v, bus_size_t size, bus_size_t alignment, 1165mbus_dmamem_alloc(void *v, bus_size_t size, bus_size_t alignment,
1151 bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs, 1166 bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs,
1152 int flags) 1167 int flags)
1153{ 1168{
1154 paddr_t low, high; 1169 paddr_t low, high;
1155 struct pglist *mlist; 1170 struct pglist *mlist;
1156 struct vm_page *m; 1171 struct vm_page *m;
1157 paddr_t pa, pa_next; 1172 paddr_t pa, pa_next;
1158 int seg; 1173 int seg;
1159 int error; 1174 int error;
1160 1175
1161 /* Always round the size. */ 1176 /* Always round the size. */
1162 size = round_page(size); 1177 size = round_page(size);
1163 1178
1164 /* Decide where we can allocate pages. */ 1179 /* Decide where we can allocate pages. */
1165 low = 0; 1180 low = 0;
1166 high = ((flags & BUS_DMA_24BIT) ? (1 << 24) : 0) - 1; 1181 high = ((flags & BUS_DMA_24BIT) ? (1 << 24) : 0) - 1;
1167 1182
1168 if ((mlist = malloc(sizeof(*mlist), M_DEVBUF, 1183 if ((mlist = malloc(sizeof(*mlist), M_DEVBUF,
1169 (flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK)) == NULL) 1184 (flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK)) == NULL)
1170 return (ENOMEM); 1185 return (ENOMEM);
1171 1186
1172 /* 1187 /*
1173 * Allocate physical pages from the VM system. 1188 * Allocate physical pages from the VM system.
1174 */ 1189 */
1175 TAILQ_INIT(mlist); 1190 TAILQ_INIT(mlist);
1176 error = uvm_pglistalloc(size, low, high, 0, 0, 1191 error = uvm_pglistalloc(size, low, high, 0, 0,
1177 mlist, nsegs, (flags & BUS_DMA_NOWAIT) == 0); 1192 mlist, nsegs, (flags & BUS_DMA_NOWAIT) == 0);
1178 1193
1179 /* 1194 /*
1180 * If the allocation failed, and this is a 24-bit 1195 * If the allocation failed, and this is a 24-bit
1181 * device, see if we have space left in the 24-bit 1196 * device, see if we have space left in the 24-bit
1182 * region. 1197 * region.
1183 */ 1198 */
1184 if (error == ENOMEM && (flags & BUS_DMA_24BIT) && dma24_ex != NULL) { 1199 if (error == ENOMEM && (flags & BUS_DMA_24BIT) && dma24_ex != NULL) {
1185 error = extent_alloc(dma24_ex, size, alignment, 0, 0, &pa); 1200 error = extent_alloc(dma24_ex, size, alignment, 0, 0, &pa);
1186 if (!error) { 1201 if (!error) {
1187 free(mlist, M_DEVBUF); 1202 free(mlist, M_DEVBUF);
1188 /* 1203 /*
1189 * A _ds_mlist value of NULL is the 1204 * A _ds_mlist value of NULL is the
1190 * signal to mbus_dmamem_map that no 1205 * signal to mbus_dmamem_map that no
1191 * real mapping needs to be done, and 1206 * real mapping needs to be done, and
1192 * it is the signal to mbus_dmamem_free 1207 * it is the signal to mbus_dmamem_free
1193 * that an extent_free is needed. 1208 * that an extent_free is needed.
1194 */ 1209 */
1195 *rsegs = 1; 1210 *rsegs = 1;
1196 segs[0].ds_addr = 0; 1211 segs[0].ds_addr = 0;
1197 segs[0].ds_len = size; 1212 segs[0].ds_len = size;
1198 segs[0]._ds_va = (vaddr_t)pa; 1213 segs[0]._ds_va = (vaddr_t)pa;
1199 segs[0]._ds_mlist = NULL; 1214 segs[0]._ds_mlist = NULL;
1200 return (0); 1215 return (0);
1201 } 1216 }
1202 } 1217 }
1203 1218
1204 /* If we don't have the pages. */ 1219 /* If we don't have the pages. */
1205 if (error) { 1220 if (error) {
1206 free(mlist, M_DEVBUF); 1221 free(mlist, M_DEVBUF);
1207 return (error); 1222 return (error);
1208 } 1223 }
1209 1224
1210 /* 1225 /*
1211 * Since, at least as of revision 1.17 of uvm_pglist.c, 1226 * Since, at least as of revision 1.17 of uvm_pglist.c,
1212 * uvm_pglistalloc ignores its nsegs argument, we need 1227 * uvm_pglistalloc ignores its nsegs argument, we need
1213 * to check that the pages returned conform to the 1228 * to check that the pages returned conform to the
1214 * caller's segment requirements. 1229 * caller's segment requirements.
1215 */ 1230 */
1216 pa_next = 0; 1231 pa_next = 0;
1217 seg = -1; 1232 seg = -1;
1218 for (m = TAILQ_FIRST(mlist); m != NULL; m = TAILQ_NEXT(m,pageq.queue)) { 1233 for (m = TAILQ_FIRST(mlist); m != NULL; m = TAILQ_NEXT(m,pageq.queue)) {
1219 pa = VM_PAGE_TO_PHYS(m); 1234 pa = VM_PAGE_TO_PHYS(m);
1220 if (pa != pa_next) { 1235 if (pa != pa_next) {
1221 if (++seg >= nsegs) { 1236 if (++seg >= nsegs) {
1222 uvm_pglistfree(mlist); 1237 uvm_pglistfree(mlist);
1223 free(mlist, M_DEVBUF); 1238 free(mlist, M_DEVBUF);
1224 return (ENOMEM); 1239 return (ENOMEM);
1225 } 1240 }
1226 segs[seg].ds_addr = 0; 1241 segs[seg].ds_addr = 0;
1227 segs[seg].ds_len = 0; 1242 segs[seg].ds_len = 0;
1228 segs[seg]._ds_va = 0; 1243 segs[seg]._ds_va = 0;
1229 } 1244 }
1230 pa_next = pa + PAGE_SIZE; 1245 pa_next = pa + PAGE_SIZE;
1231 } 1246 }
1232 *rsegs = seg + 1; 1247 *rsegs = seg + 1;
1233 1248
1234 /* 1249 /*
1235 * Simply keep a pointer around to the linked list, so 1250 * Simply keep a pointer around to the linked list, so
1236 * bus_dmamap_free() can return it. 1251 * bus_dmamap_free() can return it.
1237 * 1252 *
1238 * NOBODY SHOULD TOUCH THE pageq.queue FIELDS WHILE THESE PAGES 1253 * NOBODY SHOULD TOUCH THE pageq.queue FIELDS WHILE THESE PAGES
1239 * ARE IN OUR CUSTODY. 1254 * ARE IN OUR CUSTODY.
1240 */ 1255 */
1241 segs[0]._ds_mlist = mlist; 1256 segs[0]._ds_mlist = mlist;
1242 1257
1243 /* 1258 /*
1244 * We now have physical pages, but no kernel virtual addresses 1259 * We now have physical pages, but no kernel virtual addresses
1245 * yet. These may be allocated in bus_dmamap_map. Hence we 1260 * yet. These may be allocated in bus_dmamap_map. Hence we
1246 * save any alignment and boundary requirements in this DMA 1261 * save any alignment and boundary requirements in this DMA
1247 * segment. 1262 * segment.
1248 */ 1263 */
1249 return (0); 1264 return (0);
1250} 1265}
1251 1266
1252void 1267void
1253mbus_dmamem_free(void *v, bus_dma_segment_t *segs, int nsegs) 1268mbus_dmamem_free(void *v, bus_dma_segment_t *segs, int nsegs)
1254{ 1269{
1255 1270
1256 /* 1271 /*
1257 * Return the list of physical pages back to the VM system. 1272 * Return the list of physical pages back to the VM system.
1258 */ 1273 */
1259 if (segs[0]._ds_mlist != NULL) { 1274 if (segs[0]._ds_mlist != NULL) {
1260 uvm_pglistfree(segs[0]._ds_mlist); 1275 uvm_pglistfree(segs[0]._ds_mlist);
1261 free(segs[0]._ds_mlist, M_DEVBUF); 1276 free(segs[0]._ds_mlist, M_DEVBUF);
1262 } else { 1277 } else {
1263 extent_free(dma24_ex, segs[0]._ds_va, segs[0].ds_len, 1278 extent_free(dma24_ex, segs[0]._ds_va, segs[0].ds_len,
1264 EX_NOWAIT); 1279 EX_NOWAIT);
1265 } 1280 }
1266} 1281}
1267 1282
1268/* 1283/*
1269 * Common function for mapping DMA-safe memory. May be called by 1284 * Common function for mapping DMA-safe memory. May be called by
1270 * bus-specific DMA memory map functions. 1285 * bus-specific DMA memory map functions.
1271 */ 1286 */
1272int 1287int
1273mbus_dmamem_map(void *v, bus_dma_segment_t *segs, int nsegs, size_t size, 1288mbus_dmamem_map(void *v, bus_dma_segment_t *segs, int nsegs, size_t size,
1274 void **kvap, int flags) 1289 void **kvap, int flags)
1275{ 1290{
1276 struct vm_page *pg; 1291 struct vm_page *pg;
1277 struct pglist *pglist; 1292 struct pglist *pglist;
1278 vaddr_t va; 1293 vaddr_t va;
1279 paddr_t pa; 1294 paddr_t pa;
1280 const uvm_flag_t kmflags = 1295 const uvm_flag_t kmflags =
1281 (flags & BUS_DMA_NOWAIT) != 0 ? UVM_KMF_NOWAIT : 0; 1296 (flags & BUS_DMA_NOWAIT) != 0 ? UVM_KMF_NOWAIT : 0;
1282 1297
1283 size = round_page(size); 1298 size = round_page(size);
1284 1299
1285 /* 24-bit memory needs no mapping. */ 1300 /* 24-bit memory needs no mapping. */
1286 if (segs[0]._ds_mlist == NULL) { 1301 if (segs[0]._ds_mlist == NULL) {
1287 if (size > segs[0].ds_len) 1302 if (size > segs[0].ds_len)
1288 panic("mbus_dmamem_map: size botch"); 1303 panic("mbus_dmamem_map: size botch");
1289 *kvap = (void *)segs[0]._ds_va; 1304 *kvap = (void *)segs[0]._ds_va;
1290 return (0); 1305 return (0);
1291 } 1306 }
1292 1307
1293 /* Get a chunk of kernel virtual space. */ 1308 /* Get a chunk of kernel virtual space. */
1294 va = uvm_km_alloc(kernel_map, size, 0, UVM_KMF_VAONLY | kmflags); 1309 va = uvm_km_alloc(kernel_map, size, 0, UVM_KMF_VAONLY | kmflags);
1295 if (va == 0) 1310 if (va == 0)
1296 return (ENOMEM); 1311 return (ENOMEM);
1297 1312
1298 /* Stash that in the first segment. */ 1313 /* Stash that in the first segment. */
1299 segs[0]._ds_va = va; 1314 segs[0]._ds_va = va;
1300 *kvap = (void *)va; 1315 *kvap = (void *)va;
1301 1316
1302 /* Map the allocated pages into the chunk. */ 1317 /* Map the allocated pages into the chunk. */
1303 pglist = segs[0]._ds_mlist; 1318 pglist = segs[0]._ds_mlist;
1304 TAILQ_FOREACH(pg, pglist, pageq.queue) { 1319 TAILQ_FOREACH(pg, pglist, pageq.queue) {
1305 KASSERT(size != 0); 1320 KASSERT(size != 0);
1306 pa = VM_PAGE_TO_PHYS(pg); 1321 pa = VM_PAGE_TO_PHYS(pg);
1307 pmap_kenter_pa(va, pa, VM_PROT_READ | VM_PROT_WRITE, PMAP_NOCACHE); 1322 pmap_kenter_pa(va, pa, VM_PROT_READ | VM_PROT_WRITE, PMAP_NOCACHE);
1308 va += PAGE_SIZE; 1323 va += PAGE_SIZE;
1309 size -= PAGE_SIZE; 1324 size -= PAGE_SIZE;
1310 } 1325 }
1311 pmap_update(); 1326 pmap_update();
1312 return (0); 1327 return (0);
1313} 1328}
1314 1329
1315/* 1330/*
1316 * Common function for unmapping DMA-safe memory. May be called by 1331 * Common function for unmapping DMA-safe memory. May be called by
1317 * bus-specific DMA memory unmapping functions. 1332 * bus-specific DMA memory unmapping functions.
1318 */ 1333 */
1319void 1334void
1320mbus_dmamem_unmap(void *v, void *kva, size_t size) 1335mbus_dmamem_unmap(void *v, void *kva, size_t size)
1321{ 1336{
1322 1337
1323#ifdef DIAGNOSTIC 1338#ifdef DIAGNOSTIC
1324 if ((u_long)kva & PAGE_MASK) 1339 if ((u_long)kva & PAGE_MASK)
1325 panic("mbus_dmamem_unmap"); 1340 panic("mbus_dmamem_unmap");
1326#endif 1341#endif
1327 1342
1328 /* 1343 /*
1329 * XXX fredette - this is gross, but it is needed 1344 * XXX fredette - this is gross, but it is needed
1330 * to support the 24-bit DMA address stuff. 1345 * to support the 24-bit DMA address stuff.
1331 */ 1346 */
1332 if (dma24_ex != NULL && kva < (void *) (1 << 24)) 1347 if (dma24_ex != NULL && kva < (void *) (1 << 24))
1333 return; 1348 return;
1334 1349
1335 size = round_page(size); 1350 size = round_page(size);
1336 pmap_kremove((vaddr_t)kva, size); 1351 pmap_kremove((vaddr_t)kva, size);
1337 pmap_update(pmap_kernel()); 1352 pmap_update(pmap_kernel());
1338 uvm_km_free(kernel_map, (vaddr_t)kva, size, UVM_KMF_VAONLY); 1353 uvm_km_free(kernel_map, (vaddr_t)kva, size, UVM_KMF_VAONLY);
1339} 1354}
1340 1355
1341/* 1356/*
1342 * Common functin for mmap(2)'ing DMA-safe memory. May be called by 1357 * Common functin for mmap(2)'ing DMA-safe memory. May be called by
1343 * bus-specific DMA mmap(2)'ing functions. 1358 * bus-specific DMA mmap(2)'ing functions.
1344 */ 1359 */
1345paddr_t 1360paddr_t
1346mbus_dmamem_mmap(void *v, bus_dma_segment_t *segs, int nsegs, 1361mbus_dmamem_mmap(void *v, bus_dma_segment_t *segs, int nsegs,
1347 off_t off, int prot, int flags) 1362 off_t off, int prot, int flags)
1348{ 1363{
1349 int i; 1364 int i;
1350 1365
1351 for (i = 0; i < nsegs; i++) { 1366 for (i = 0; i < nsegs; i++) {
1352#ifdef DIAGNOSTIC 1367#ifdef DIAGNOSTIC
1353 if (off & PGOFSET) 1368 if (off & PGOFSET)
1354 panic("_bus_dmamem_mmap: offset unaligned"); 1369 panic("_bus_dmamem_mmap: offset unaligned");
1355 if (segs[i].ds_addr & PGOFSET) 1370 if (segs[i].ds_addr & PGOFSET)
1356 panic("_bus_dmamem_mmap: segment unaligned"); 1371 panic("_bus_dmamem_mmap: segment unaligned");
1357 if (segs[i].ds_len & PGOFSET) 1372 if (segs[i].ds_len & PGOFSET)
1358 panic("_bus_dmamem_mmap: segment size not multiple" 1373 panic("_bus_dmamem_mmap: segment size not multiple"
1359 " of page size"); 1374 " of page size");
1360#endif /* DIAGNOSTIC */ 1375#endif /* DIAGNOSTIC */
1361 if (off >= segs[i].ds_len) { 1376 if (off >= segs[i].ds_len) {
1362 off -= segs[i].ds_len; 1377 off -= segs[i].ds_len;
1363 continue; 1378 continue;
1364 } 1379 }
1365 1380
1366 return (btop((u_long)segs[i].ds_addr + off)); 1381 return (btop((u_long)segs[i].ds_addr + off));
1367 } 1382 }
1368 1383
1369 /* Page not found. */ 1384 /* Page not found. */
1370 return (-1); 1385 return (-1);
1371} 1386}
1372 1387
1373int 1388int
1374_bus_dmamap_load_buffer(bus_dma_tag_t t, bus_dmamap_t map, void *buf, 1389_bus_dmamap_load_buffer(bus_dma_tag_t t, bus_dmamap_t map, void *buf,
1375 bus_size_t buflen, struct vmspace *vm, int flags, paddr_t *lastaddrp, 1390 bus_size_t buflen, struct vmspace *vm, int flags, paddr_t *lastaddrp,
1376 int *segp, int first) 1391 int *segp, int first)
1377{ 1392{
1378 bus_size_t sgsize; 1393 bus_size_t sgsize;
1379 bus_addr_t curaddr, lastaddr, baddr, bmask; 1394 bus_addr_t curaddr, lastaddr, baddr, bmask;
1380 vaddr_t vaddr = (vaddr_t)buf; 1395 vaddr_t vaddr = (vaddr_t)buf;
1381 int seg; 1396 int seg;
1382 pmap_t pmap; 1397 pmap_t pmap;
1383 1398
1384 pmap = vm_map_pmap(&vm->vm_map); 1399 pmap = vm_map_pmap(&vm->vm_map);
1385 1400
1386 lastaddr = *lastaddrp; 1401 lastaddr = *lastaddrp;
1387 bmask = ~(map->_dm_boundary - 1); 1402 bmask = ~(map->_dm_boundary - 1);
1388 1403
1389 for (seg = *segp; buflen > 0; ) { 1404 for (seg = *segp; buflen > 0; ) {
1390 bool ok; 1405 bool ok;
1391 /* 1406 /*
1392 * Get the physical address for this segment. 1407 * Get the physical address for this segment.
1393 */ 1408 */
1394 ok = pmap_extract(pmap, vaddr, &curaddr); 1409 ok = pmap_extract(pmap, vaddr, &curaddr);
1395 KASSERT(ok == true); 1410 KASSERT(ok == true);
1396 1411
1397 /* 1412 /*
1398 * Compute the segment size, and adjust counts. 1413 * Compute the segment size, and adjust counts.
1399 */ 1414 */
1400 sgsize = PAGE_SIZE - ((u_long)vaddr & PGOFSET); 1415 sgsize = PAGE_SIZE - ((u_long)vaddr & PGOFSET);
1401 if (buflen < sgsize) 1416 if (buflen < sgsize)
1402 sgsize = buflen; 1417 sgsize = buflen;
1403 1418
1404 /* 1419 /*
1405 * Make sure we don't cross any boundaries. 1420 * Make sure we don't cross any boundaries.
1406 */ 1421 */
1407 if (map->_dm_boundary > 0) { 1422 if (map->_dm_boundary > 0) {
1408 baddr = (curaddr + map->_dm_boundary) & bmask; 1423 baddr = (curaddr + map->_dm_boundary) & bmask;
1409 if (sgsize > (baddr - curaddr)) 1424 if (sgsize > (baddr - curaddr))