Mon Dec 14 07:18:55 2009 UTC ()
- replace single bus space with two (big & little endian) bus spaces for obio
- use comcnspeed instead of CONSPEED
- use comcnfreq instead of CONFREQ


(cliff)
diff -r1.1.2.8 -r1.1.2.9 src/sys/arch/mips/rmi/rmixl_com.c

cvs diff -r1.1.2.8 -r1.1.2.9 src/sys/arch/mips/rmi/rmixl_com.c (expand / switch to unified diff)

--- src/sys/arch/mips/rmi/rmixl_com.c 2009/12/12 01:45:01 1.1.2.8
+++ src/sys/arch/mips/rmi/rmixl_com.c 2009/12/14 07:18:55 1.1.2.9
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $Id: rmixl_com.c,v 1.1.2.8 2009/12/12 01:45:01 cliff Exp $ */ 1/* $Id: rmixl_com.c,v 1.1.2.9 2009/12/14 07:18:55 cliff Exp $ */
2/*- 2/*-
3 * Copyright (c) 2006 Urbana-Champaign Independent Media Center. 3 * Copyright (c) 2006 Urbana-Champaign Independent Media Center.
4 * Copyright (c) 2006 Garrett D'Amore. 4 * Copyright (c) 2006 Garrett D'Amore.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Portions of this code were written by Garrett D'Amore for the 7 * Portions of this code were written by Garrett D'Amore for the
8 * Champaign-Urbana Community Wireless Network Project. 8 * Champaign-Urbana Community Wireless Network Project.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or 10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following 11 * without modification, are permitted provided that the following
12 * conditions are met: 12 * conditions are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -91,27 +91,27 @@ @@ -91,27 +91,27 @@
91 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 91 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
92 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 92 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
93 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 93 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
94 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 94 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
95 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 95 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
96 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 96 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
97 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 97 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
98 * SUCH DAMAGE. 98 * SUCH DAMAGE.
99 * 99 *
100 * @(#)com.c 7.5 (Berkeley) 5/16/91 100 * @(#)com.c 7.5 (Berkeley) 5/16/91
101 */ 101 */
102 102
103#include <sys/cdefs.h> 103#include <sys/cdefs.h>
104__KERNEL_RCSID(0, "$NetBSD: rmixl_com.c,v 1.1.2.8 2009/12/12 01:45:01 cliff Exp $"); 104__KERNEL_RCSID(0, "$NetBSD: rmixl_com.c,v 1.1.2.9 2009/12/14 07:18:55 cliff Exp $");
105 105
106#include <sys/param.h> 106#include <sys/param.h>
107#include <sys/systm.h> 107#include <sys/systm.h>
108#include <sys/device.h> 108#include <sys/device.h>
109#include <sys/kernel.h> 109#include <sys/kernel.h>
110#include <sys/termios.h> 110#include <sys/termios.h>
111#include <sys/ttydefaults.h> 111#include <sys/ttydefaults.h>
112#include <sys/types.h> 112#include <sys/types.h>
113 113
114#include <machine/bus.h> 114#include <machine/bus.h>
115 115
116#include <dev/cons.h> 116#include <dev/cons.h>
117#include <dev/ic/comreg.h> 117#include <dev/ic/comreg.h>
@@ -133,37 +133,40 @@ static void rmixl_com_initmap(struct com @@ -133,37 +133,40 @@ static void rmixl_com_initmap(struct com
133static int rmixl_com_match(device_t, cfdata_t , void *); 133static int rmixl_com_match(device_t, cfdata_t , void *);
134static void rmixl_com_attach(device_t, device_t, void *); 134static void rmixl_com_attach(device_t, device_t, void *);
135 135
136CFATTACH_DECL_NEW(rmixl_com, sizeof(struct rmixl_com_softc), 136CFATTACH_DECL_NEW(rmixl_com, sizeof(struct rmixl_com_softc),
137 rmixl_com_match, rmixl_com_attach, NULL, NULL); 137 rmixl_com_match, rmixl_com_attach, NULL, NULL);
138 138
139#ifndef COM_REGMAP 139#ifndef COM_REGMAP
140#error COM_REGMAP not defined! 140#error COM_REGMAP not defined!
141#endif 141#endif
142 142
143volatile uint32_t *com0addr = (uint32_t *) 143volatile uint32_t *com0addr = (uint32_t *)
144 MIPS_PHYS_TO_KSEG1(RMIXL_IO_DEV_PBASE + RMIXL_IO_DEV_UART_1); 144 MIPS_PHYS_TO_KSEG1(RMIXL_IO_DEV_PBASE + RMIXL_IO_DEV_UART_1);
145 145
 146extern int comcnfreq;
 147extern int comcnspeed;
 148
146void 149void
147rmixl_putchar_init(uint64_t io_pbase) 150rmixl_putchar_init(uint64_t io_pbase)
148{ 151{
149 int rate; 152 int rate;
150 extern int comspeed(long, long, int); 153 extern int comspeed(long, long, int);
151 154
152 com0addr = (uint32_t *) 155 com0addr = (uint32_t *)
153 MIPS_PHYS_TO_KSEG1(io_pbase + RMIXL_IO_DEV_UART_1); 156 MIPS_PHYS_TO_KSEG1(io_pbase + RMIXL_IO_DEV_UART_1);
154 157
155 if (CONSFREQ != -1) { 158 if (comcnfreq != -1) {
156 rate = comspeed(CONSPEED, CONSFREQ, COM_TYPE_NORMAL); 159 rate = comspeed(comcnspeed, comcnfreq, COM_TYPE_NORMAL);
157 if (rate < 0) 160 if (rate < 0)
158 return; /* XXX */ 161 return; /* XXX */
159 162
160 com0addr[com_ier] = 0; 163 com0addr[com_ier] = 0;
161 com0addr[com_lctl] = htobe32(LCR_DLAB); 164 com0addr[com_lctl] = htobe32(LCR_DLAB);
162 com0addr[com_dlbl] = htobe32(rate & 0xff); 165 com0addr[com_dlbl] = htobe32(rate & 0xff);
163 com0addr[com_dlbh] = htobe32(rate >> 8); 166 com0addr[com_dlbh] = htobe32(rate >> 8);
164 com0addr[com_lctl] = htobe32(LCR_8BITS); /* XXX */ 167 com0addr[com_lctl] = htobe32(LCR_8BITS); /* XXX */
165 com0addr[com_mcr] = htobe32(MCR_DTR|MCR_RTS); 168 com0addr[com_mcr] = htobe32(MCR_DTR|MCR_RTS);
166 com0addr[com_fifo] = htobe32( 169 com0addr[com_fifo] = htobe32(
167 FIFO_ENABLE|FIFO_RCV_RST|FIFO_XMT_RST|FIFO_TRIGGER_1); 170 FIFO_ENABLE|FIFO_RCV_RST|FIFO_XMT_RST|FIFO_TRIGGER_1);
168 } 171 }
169} 172}
@@ -217,27 +220,27 @@ rmixl_puthex64(uint64_t val) @@ -217,27 +220,27 @@ rmixl_puthex64(uint64_t val)
217 RMIXL_PUTHEX; 220 RMIXL_PUTHEX;
218} 221}
219 222
220int 223int
221rmixl_com_match(device_t parent, cfdata_t cf, void *aux) 224rmixl_com_match(device_t parent, cfdata_t cf, void *aux)
222{ 225{
223 struct obio_attach_args *obio = aux; 226 struct obio_attach_args *obio = aux;
224 bus_space_tag_t bst; 227 bus_space_tag_t bst;
225 bus_addr_t addr; 228 bus_addr_t addr;
226 bus_size_t size; 229 bus_size_t size;
227 struct com_regs regs; 230 struct com_regs regs;
228 int rv; 231 int rv;
229 232
230 bst = obio->obio_bst; 233 bst = obio->obio_eb_bst;
231 addr = obio->obio_addr; 234 addr = obio->obio_addr;
232 size = obio->obio_size; 235 size = obio->obio_size;
233 236
234 if (com_is_console(bst, addr, &regs.cr_ioh)) 237 if (com_is_console(bst, addr, &regs.cr_ioh))
235 return 1; 238 return 1;
236 239
237 if (bus_space_map(bst, addr, size, 0, &regs.cr_ioh)) 240 if (bus_space_map(bst, addr, size, 0, &regs.cr_ioh))
238 return 0; /* FAIL */ 241 return 0; /* FAIL */
239 242
240 memset(&regs, 0, sizeof(regs)); 243 memset(&regs, 0, sizeof(regs));
241 regs.cr_iot = bst; 244 regs.cr_iot = bst;
242 regs.cr_iobase = addr; 245 regs.cr_iobase = addr;
243 regs.cr_nports = size; 246 regs.cr_nports = size;
@@ -252,29 +255,29 @@ rmixl_com_match(device_t parent, cfdata_ @@ -252,29 +255,29 @@ rmixl_com_match(device_t parent, cfdata_
252 255
253void 256void
254rmixl_com_attach(device_t parent, device_t self, void *aux) 257rmixl_com_attach(device_t parent, device_t self, void *aux)
255{ 258{
256 struct rmixl_com_softc *rsc = device_private(self); 259 struct rmixl_com_softc *rsc = device_private(self);
257 struct com_softc *sc = &rsc->sc_com; 260 struct com_softc *sc = &rsc->sc_com;
258 struct obio_attach_args *obio = aux; 261 struct obio_attach_args *obio = aux;
259 bus_space_tag_t bst; 262 bus_space_tag_t bst;
260 bus_space_handle_t ioh; 263 bus_space_handle_t ioh;
261 bus_addr_t addr; 264 bus_addr_t addr;
262 bus_size_t size; 265 bus_size_t size;
263 266
264 sc->sc_dev = self; 267 sc->sc_dev = self;
265 sc->sc_frequency = CONSFREQ; 268 sc->sc_frequency = comcnfreq;
266 269
267 bst = obio->obio_bst; 270 bst = obio->obio_eb_bst;
268 addr = obio->obio_addr; 271 addr = obio->obio_addr;
269 size = obio->obio_size; 272 size = obio->obio_size;
270 273
271 if (!com_is_console(bst, addr, &ioh) 274 if (!com_is_console(bst, addr, &ioh)
272 && bus_space_map(bst, addr, size, 0, &ioh) != 0) { 275 && bus_space_map(bst, addr, size, 0, &ioh) != 0) {
273 aprint_error(": can't map registers\n"); 276 aprint_error(": can't map registers\n");
274 return; 277 return;
275 } 278 }
276 279
277 memset(&sc->sc_regs, 0, sizeof(sc->sc_regs)); 280 memset(&sc->sc_regs, 0, sizeof(sc->sc_regs));
278 COM_INIT_REGS(sc->sc_regs, bst, ioh, addr); 281 COM_INIT_REGS(sc->sc_regs, bst, ioh, addr);
279 sc->sc_regs.cr_nports = size; 282 sc->sc_regs.cr_nports = size;
280 rmixl_com_initmap(&sc->sc_regs); 283 rmixl_com_initmap(&sc->sc_regs);
@@ -298,24 +301,24 @@ rmixl_com_initmap(struct com_regs *regsp @@ -298,24 +301,24 @@ rmixl_com_initmap(struct com_regs *regsp
298 sz = sizeof(regsp->cr_map) / sizeof(regsp->cr_map[0]); 301 sz = sizeof(regsp->cr_map) / sizeof(regsp->cr_map[0]);
299 for (i = 0; i < 16; i++) 302 for (i = 0; i < 16; i++)
300 regsp->cr_map[i] = com_std_map[i] * 4; 303 regsp->cr_map[i] = com_std_map[i] * 4;
301} 304}
302 305
303void 306void
304rmixl_com_cnattach(bus_addr_t addr, int speed, int freq, 307rmixl_com_cnattach(bus_addr_t addr, int speed, int freq,
305 int type, tcflag_t mode) 308 int type, tcflag_t mode)
306{ 309{
307 bus_space_tag_t bst; 310 bus_space_tag_t bst;
308 bus_size_t sz; 311 bus_size_t sz;
309 struct com_regs regs; 312 struct com_regs regs;
310 313
311 bst = (bus_space_tag_t)&rmixl_configuration.rc_obio_memt; 314 bst = (bus_space_tag_t)&rmixl_configuration.rc_obio_eb_memt;
312 sz = COM_NPORTS * sizeof(uint32_t); /* span of UART regs in bytes */ 315 sz = COM_NPORTS * sizeof(uint32_t); /* span of UART regs in bytes */
313 316
314 memset(&regs, 0, sizeof(regs)); 317 memset(&regs, 0, sizeof(regs));
315 rmixl_com_initmap(&regs); 318 rmixl_com_initmap(&regs);
316 regs.cr_iot = bst; 319 regs.cr_iot = bst;
317 regs.cr_iobase = addr; 320 regs.cr_iobase = addr;
318 regs.cr_nports = sz; 321 regs.cr_nports = sz;
319 322
320 comcnattach1(&regs, speed, freq, type, mode); 323 comcnattach1(&regs, speed, freq, type, mode);
321} 324}