 @@ -1,88 +1,88 @@
-/*	$NetBSD: interrupt.c,v 1.12 2009/12/14 00:46:02 matt Exp $	*/
+/*	$NetBSD: interrupt.c,v 1.13 2009/12/15 06:01:43 mrg Exp $	*/
 /*-
  * Copyright (c) 2001 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Jason R. Thorpe.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: interrupt.c,v 1.12 2009/12/14 00:46:02 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: interrupt.c,v 1.13 2009/12/15 06:01:43 mrg Exp $");
 #include <sys/param.h>
 #include <sys/device.h>
 #include <sys/cpu.h>
 #include <sys/intr.h>
 #include <uvm/uvm_extern.h>
 #include <mips/mips3_clock.h>
 #include <machine/locore.h>
 void
 intr_init(void)
+{
 	evbmips_intr_init();	/* board specific stuff */
+}
 void
-cpu_intr(u_int32_t status, u_int32_t cause, vaddr_t pc, u_int32_t ipending)
+cpu_intr(uint32_t status, uint32_t cause, vaddr_t pc, uint32_t ipending)
+{
 	struct clockframe cf;
 	struct cpu_info *ci;
 	ci = curcpu();
 	ci->ci_idepth++;
 	uvmexp.intrs++;
 	if (ipending & MIPS_INT_MASK_5) {
 		/* call the common MIPS3 clock interrupt handler */
 		cf.pc = pc;
 		cf.sr = status;
 		mips3_clockintr(&cf);
 		/* Re-enable clock interrupts. */
 		cause &= ~MIPS_INT_MASK_5;
 		_splset(MIPS_SR_INT_IE |
 		    ((status & ~cause) & MIPS_HARD_INT_MASK));
+	}
 	if (ipending & (MIPS_INT_MASK_0|MIPS_INT_MASK_1|MIPS_INT_MASK_2|
 			MIPS_INT_MASK_3|MIPS_INT_MASK_4)) {
 		/* Process I/O and error interrupts. */
 		evbmips_iointr(status, cause, pc, ipending);
+	}
 	ci->ci_idepth--;
 #ifdef __HAVE_FAST_SOFTINTS
 	ipending &= (MIPS_SOFT_INT_MASK_1|MIPS_SOFT_INT_MASK_0);
 	if (ipending == 0)
 		return;
 	_clrsoftintr(ipending);
 	softintr_dispatch(ipending);
 #endif
+}

 @@ -1,72 +1,72 @@
-/*	$NetBSD: interrupt.c,v 1.15 2009/12/14 00:46:04 matt Exp $	*/
+/*	$NetBSD: interrupt.c,v 1.16 2009/12/15 06:01:43 mrg Exp $	*/
 /*-
  * Copyright (c) 2001 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Jason R. Thorpe.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: interrupt.c,v 1.15 2009/12/14 00:46:04 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: interrupt.c,v 1.16 2009/12/15 06:01:43 mrg Exp $");
 #include "opt_vr41xx.h"
 #include "opt_tx39xx.h"
 #include <sys/param.h>
 #include <sys/malloc.h>
 #include <uvm/uvm_extern.h>
 #include <machine/sysconf.h>
 extern const u_int32_t __ipl_sr_bits_vr[];
 extern const u_int32_t __ipl_sr_bits_tx[];
 const u_int32_t *ipl_sr_bits;
 void
 intr_init(void)
+{
 	ipl_sr_bits = CPUISMIPS3 ? __ipl_sr_bits_vr : __ipl_sr_bits_tx;
+}
 #if defined(VR41XX) && defined(TX39XX)
 /*
  * cpu_intr:
+ *
  *	handle MIPS CPU interrupt.
  *	if VR41XX only or TX39XX only kernel, directly jump to each handler
  *	(tx/tx39icu.c, vr/vr.c), don't use this dispather.
+ *
  */
 void
-cpu_intr(u_int32_t status, u_int32_t cause, vaddr_t pc, u_int32_t ipending)
+cpu_intr(uint32_t status, uint32_t cause, vaddr_t pc, uint32_t ipending)
+{
 	(*platform.cpu_intr)(status, cause, pc, ipending);
+}
 #endif /* VR41XX && TX39XX */

 @@ -1,84 +1,84 @@
-/*	$NetBSD: sysconf.h,v 1.14 2009/12/14 00:46:04 matt Exp $	*/
+/*	$NetBSD: sysconf.h,v 1.15 2009/12/15 06:01:43 mrg Exp $	*/
 /*
  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
  * 3. All advertising materials mentioning features or use of this software
  *    must display the following acknowledgement:
  *      This product includes software developed by Christopher G. Demetriou
  *	for the NetBSD Project.
  * 4. The name of the author may not be used to endorse or promote products
  *    derived from this software without specific prior written permission
+ *
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 /*
  * Additional reworking by Matthew Jacob for NASA/Ames Research Center.
  * Copyright (c) 1997
  */
 /*
  * Copyright (c) 1998 Jonathan Stone.  All rights reserved.
  */
 /*
  * Copyright (c) 1999 Shin Takemura.  All rights reserved.
  */
 #ifndef	_HPCMIPS_SYSCONF_H_
 #define	_HPCMIPS_SYSCONF_H_
 #ifdef _KERNEL
 /*
  * Platform(VR/TX) Specific Information and Function Hooks.
  */
 struct platform_clock;
 struct clock_ymdhms;
 extern struct platform {
 	/*
 	 *	cpu_intr	-	interrupt handler
 	 *	cpu_idle	-	CPU dependend idle routine.
 	 *	cons_init 	-	console initialization
 	 *	fb_init         -       frame buffer initialization
 	 *      mem_init        -       Count available memory
 	 *	reboot		-	reboot or powerdown
 	 *	clock		-
 	 */
-	void	(*cpu_intr)(u_int32_t, u_int32_t, vaddr_t, u_int32_t);
+	void	(*cpu_intr)(uint32_t, uint32_t, vaddr_t, uint32_t);
 	void	(*cpu_idle)(void);
 	void	(*cons_init)(void);
 	void	(*fb_init)(void **);
 	void	(*mem_init)(paddr_t);
 	void	(*reboot)(int, char *);
 	struct platform_clock *clock;
 } platform;
 struct platform_clock {
 	int	hz;
 	void	(*init)(struct device *);
 	void	*self;
 	int	start;
 };
 void platform_clock_attach(void *, struct platform_clock *);
 #endif /* _KERNEL */
 #endif /* !_HPCMIPS_SYSCONF_H_ */

 @@ -1,80 +1,80 @@
-/*	$NetBSD: interrupt.c,v 1.8 2009/12/14 00:46:09 matt Exp $	*/
+/*	$NetBSD: interrupt.c,v 1.9 2009/12/15 06:01:43 mrg Exp $	*/
 /*
  * Copyright (c) 2001 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Wayne Knowles
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: interrupt.c,v 1.8 2009/12/14 00:46:09 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: interrupt.c,v 1.9 2009/12/15 06:01:43 mrg Exp $");
 #include <sys/param.h>
 #include <sys/malloc.h>
 #include <sys/intr.h>
 #include <sys/cpu.h>
 #include <uvm/uvm_extern.h>
 #include <machine/sysconf.h>
 void
-cpu_intr(u_int32_t status, u_int32_t cause, vaddr_t pc, u_int32_t ipending)
+cpu_intr(uint32_t status, uint32_t cause, vaddr_t pc, uint32_t ipending)
+{
 	struct cpu_info *ci;
 	ci = curcpu();
 	uvmexp.intrs++;
 	/* device interrupts */
 	ci->ci_idepth++;
 	(*platform.iointr)(status, cause, pc, ipending);
 	ci->ci_idepth--;
 #ifdef __HAVE_FAST_SOFTINTS
 	/* software simulated interrupt */
 	if ((ipending & MIPS_SOFT_INT_MASK_1)
 		    || (ssir && (status & MIPS_SOFT_INT_MASK_1))) {
 	    _clrsoftintr(MIPS_SOFT_INT_MASK_1);
 	    softintr_dispatch();
+	}
 #endif
+}
 static const int ipl_sr_bits[] = {
 	[IPL_NONE] = 0,
 	[IPL_SOFTCLOCK] = MIPS_INT_MASK_SPL_SOFT0,
 	[IPL_SOFTNET] = MIPS_INT_MASK_SPL_SOFT1,
 	[IPL_VM] = MIPS_INT_MASK_SPL2,
 	[IPL_SCHED] = MIPS_INT_MASK_SPL2,
 };
 ipl_cookie_t
 makeiplcookie(ipl_t ipl)
+{
 	return (ipl_cookie_t){._sr = ipl_sr_bits[ipl]};
+}

 @@ -1,187 +1,187 @@
-/*	$NetBSD: cpu.c,v 1.22 2009/12/14 00:46:13 matt Exp $	*/
+/*	$NetBSD: cpu.c,v 1.23 2009/12/15 06:01:43 mrg Exp $	*/
 /*
  * Copyright (c) 2000 Soren S. Jorvang
  * Copyright (c) 2001 Jason R. Thorpe.
  * Copyright (c) 2004 Christopher SEKIYA
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
  * 3. All advertising materials mentioning features or use of this software
  *    must display the following acknowledgement:
  *          This product includes software developed for the
  *          NetBSD Project.  See http://www.NetBSD.org/ for
  *          information about NetBSD.
  * 4. The name of the author may not be used to endorse or promote products
  *    derived from this software without specific prior written permission.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.22 2009/12/14 00:46:13 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.23 2009/12/15 06:01:43 mrg Exp $");
 #include <sys/param.h>
 #include <sys/device.h>
 #include <sys/systm.h>
 #include <sys/cpu.h>
 #include <uvm/uvm_extern.h>
 #include <machine/locore.h>
 #include <machine/psl.h>
 #include <machine/autoconf.h>
 #include <machine/machtype.h>
 #include <machine/sysconf.h>
 #include <dev/arcbios/arcbios.h>
 #include <dev/arcbios/arcbiosvar.h>
 static int	cpu_match(struct device *, struct cfdata *, void *);
 static void	cpu_attach(struct device *, struct device *, void *);
-void		cpu_intr(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
+void		cpu_intr(uint32_t, uint32_t, vaddr_t, uint32_t);
 void *cpu_intr_establish(int, int, int (*func)(void *), void *);
 void		mips1_fpu_intr(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
 extern void	MachFPInterrupt(u_int32_t, u_int32_t, u_int32_t, struct frame *);
 static struct evcnt mips_int0_evcnt =
 	EVCNT_INITIALIZER(EVCNT_TYPE_INTR, NULL, "mips", "int 0");
 static struct evcnt mips_int1_evcnt =
 	EVCNT_INITIALIZER(EVCNT_TYPE_INTR, NULL, "mips", "int 1");
 static struct evcnt mips_int2_evcnt =
 	EVCNT_INITIALIZER(EVCNT_TYPE_INTR, NULL, "mips", "int 2");
 static struct evcnt mips_int3_evcnt =
 	EVCNT_INITIALIZER(EVCNT_TYPE_INTR, NULL, "mips", "int 3");
 static struct evcnt mips_int4_evcnt =
 	EVCNT_INITIALIZER(EVCNT_TYPE_INTR, NULL, "mips", "int 4");
 static struct evcnt mips_int5_evcnt =
 	EVCNT_INITIALIZER(EVCNT_TYPE_INTR, NULL, "mips", "int 5");
 static struct evcnt mips_spurint_evcnt =
 	EVCNT_INITIALIZER(EVCNT_TYPE_INTR, NULL, "mips", "spurious interrupts");
 CFATTACH_DECL(cpu, sizeof(struct device),
     cpu_match, cpu_attach, NULL, NULL);
 static int
 cpu_match(struct device *parent, struct cfdata *match, void *aux)
+{
 	return 1;
+}
 static void
 cpu_attach(struct device *parent, struct device *self, void *aux)
+{
 	printf(": ");
 	cpu_identify();
+}
 /*
  * NB: Do not re-enable interrupts here -- reentrancy here can cause all
  * sorts of Bad Things(tm) to happen, including kernel stack overflows.
  */
 void
-cpu_intr(u_int32_t status, u_int32_t cause, vaddr_t pc, u_int32_t ipending)
+cpu_intr(uint32_t status, uint32_t cause, vaddr_t pc, uint32_t ipending)
+{
 	struct cpu_info *ci;
 	ci = curcpu();
 	ci->ci_idepth++;
 	uvmexp.intrs++;
 	(void)(*platform.watchdog_reset)();
 	if (ipending & MIPS_HARD_INT_MASK) {
         	if (ipending & MIPS_INT_MASK_5) {
                		(void)(*platform.intr5)(status, cause, pc, ipending);
 			mips_int5_evcnt.ev_count++;
 			cause &= ~MIPS_INT_MASK_5;
+        	}
 		if (ipending & MIPS_INT_MASK_4) {
 			(void)(*platform.intr4)(status, cause, pc, ipending);
 			mips_int4_evcnt.ev_count++;
 			cause &= ~MIPS_INT_MASK_4;
+		}
 		if (ipending & MIPS_INT_MASK_3) {
 			(void)(*platform.intr3)(status, cause, pc, ipending);
 			mips_int3_evcnt.ev_count++;
 			cause &= ~MIPS_INT_MASK_3;
+		}
 	        if (ipending & MIPS_INT_MASK_2) {
 			(void)(*platform.intr2)(status, cause, pc, ipending);
 			mips_int2_evcnt.ev_count++;
 			cause &= ~MIPS_INT_MASK_2;
+		}
 		if (ipending & MIPS_INT_MASK_1) {
 			(void)(*platform.intr1)(status, cause, pc, ipending);
 			mips_int1_evcnt.ev_count++;
 			cause &= ~MIPS_INT_MASK_1;
+		}
 		if (ipending & MIPS_INT_MASK_0) {
 			(void)(*platform.intr0)(status, cause, pc, ipending);
 			mips_int0_evcnt.ev_count++;
 			cause &= ~MIPS_INT_MASK_0;
+		}
 		if (cause & status & MIPS_HARD_INT_MASK)
 			mips_spurint_evcnt.ev_count++;
+	}
 	ci->ci_idepth--;
 #ifdef __HAVE_FAST_SOFTINTS
 	/* software interrupt */
 	ipending &= (MIPS_SOFT_INT_MASK_1|MIPS_SOFT_INT_MASK_0);
 	if (ipending == 0)
 		return;
 	_clrsoftintr(ipending);
 	softintr_dispatch(ipending);
 #endif
+}
 void *
 cpu_intr_establish(int level, int ipl, int (*func)(void *), void *arg)
+{
 	(*platform.intr_establish)(level, ipl, func, arg);
 	return (void *) -1;
+}
 void
 mips1_fpu_intr(u_int32_t status, u_int32_t cause, u_int32_t pc,
     u_int32_t ipending)
+{
 	if (!USERMODE(status))
 		panic("kernel used FPU: PC 0x%08x, CR 0x%08x, SR 0x%08x",
 		    pc, cause, status);
 #if !defined(NOFPU) && !defined(SOFTFLOAT)
 	MachFPInterrupt(status, cause, pc, curlwp->l_md.md_regs);
 #endif
+}