Tue Jan 12 18:21:17 2010 UTC ()
Change some devices to use CFATTACH_DECL_NEW/device_t/cfdata_t/device_*


(matt)
diff -r1.18.16.1 -r1.18.16.2 src/sys/arch/sbmips/sbmips/cpu.c
diff -r1.16.38.1 -r1.16.38.2 src/sys/arch/sbmips/sbmips/rtc.c
diff -r1.11 -r1.11.96.1 src/sys/arch/sbmips/sbmips/zbbus.c

cvs diff -r1.18.16.1 -r1.18.16.2 src/sys/arch/sbmips/sbmips/cpu.c (expand / switch to unified diff)

--- src/sys/arch/sbmips/sbmips/cpu.c 2009/11/23 18:28:47 1.18.16.1
+++ src/sys/arch/sbmips/sbmips/cpu.c 2010/01/12 18:21:17 1.18.16.2
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: cpu.c,v 1.18.16.1 2009/11/23 18:28:47 matt Exp $ */ 1/* $NetBSD: cpu.c,v 1.18.16.2 2010/01/12 18:21:17 matt Exp $ */
2 2
3/* 3/*
4 * Copyright 2000, 2001 4 * Copyright 2000, 2001
5 * Broadcom Corporation. All rights reserved. 5 * Broadcom Corporation. All rights reserved.
6 * 6 *
7 * This software is furnished under license and may be used and copied only 7 * This software is furnished under license and may be used and copied only
8 * in accordance with the following terms and conditions. Subject to these 8 * in accordance with the following terms and conditions. Subject to these
9 * conditions, you may download, copy, install, use, modify and distribute 9 * conditions, you may download, copy, install, use, modify and distribute
10 * modified or unmodified copies of this software in source and/or binary 10 * modified or unmodified copies of this software in source and/or binary
11 * form. No title or ownership is transferred hereby. 11 * form. No title or ownership is transferred hereby.
12 * 12 *
13 * 1) Any source code used, modified or distributed must reproduce and 13 * 1) Any source code used, modified or distributed must reproduce and
14 * retain this copyright notice and list of conditions as they appear in 14 * retain this copyright notice and list of conditions as they appear in
@@ -23,76 +23,78 @@ @@ -23,76 +23,78 @@
23 * WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF 23 * WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF
24 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR 24 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR
25 * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM BE LIABLE 25 * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM BE LIABLE
26 * FOR ANY DAMAGES WHATSOEVER, AND IN PARTICULAR, BROADCOM SHALL NOT BE 26 * FOR ANY DAMAGES WHATSOEVER, AND IN PARTICULAR, BROADCOM SHALL NOT BE
27 * LIABLE FOR DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * LIABLE FOR DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
30 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 30 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
31 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 31 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
32 * OR OTHERWISE), EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * OR OTHERWISE), EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */ 33 */
34 34
35#include <sys/cdefs.h> 35#include <sys/cdefs.h>
36__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.18.16.1 2009/11/23 18:28:47 matt Exp $"); 36__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.18.16.2 2010/01/12 18:21:17 matt Exp $");
37 37
38#include "opt_multiprocessor.h" 38#include "opt_multiprocessor.h"
39 39
40#include <sys/param.h> 40#include <sys/param.h>
41#include <sys/device.h> 41#include <sys/device.h>
42#include <sys/kernel.h> 42#include <sys/kernel.h>
43#include <sys/systm.h> 43#include <sys/systm.h>
44#include <sys/cpu.h> 44#include <sys/cpu.h>
45 45
46#include <mips/locore.h> 46#include <mips/locore.h>
47#include <mips/cache.h> 47#include <mips/cache.h>
48 48
49#include <machine/cpu.h> 49#include <machine/cpu.h>
50 50
51#include <mips/sibyte/include/zbbusvar.h> 51#include <mips/sibyte/include/zbbusvar.h>
52#include <mips/sibyte/include/sb1250_regs.h> 52#include <mips/sibyte/include/sb1250_regs.h>
53#include <mips/sibyte/include/sb1250_scd.h> 53#include <mips/sibyte/include/sb1250_scd.h>
54#include <mips/sibyte/dev/sbscdvar.h> 54#include <mips/sibyte/dev/sbscdvar.h>
55 55
56#define READ_REG(rp) (mips3_ld((volatile uint64_t *)(rp))) 56#define READ_REG(rp) (mips3_ld((volatile uint64_t *)(rp)))
57 57
58static int cpu_match(struct device *, struct cfdata *, void *); 58static int cpu_match(device_t, cfdata_t, void *);
59static void cpu_attach(struct device *, struct device *, void *); 59static void cpu_attach(device_t, device_t, void *);
60 60
61CFATTACH_DECL(cpu, sizeof(struct device), 61CFATTACH_DECL_NEW(cpu, 0,
62 cpu_match, cpu_attach, NULL, NULL); 62 cpu_match, cpu_attach, NULL, NULL);
63 63
64static int found = 0; 64static int found = 0;
65 65
66static int 66static int
67cpu_match(struct device *parent, struct cfdata *match, void *aux) 67cpu_match(device_t parent, cfdata_t match, void *aux)
68{ 68{
69 struct zbbus_attach_args *zap = aux; 69 struct zbbus_attach_args *zap = aux;
70 int part; 70 int part;
71 71
72 if (zap->za_locs.za_type != ZBBUS_ENTTYPE_CPU) 72 if (zap->za_locs.za_type != ZBBUS_ENTTYPE_CPU)
73 return (0); 73 return (0);
74 74
75 /* 75 /*
76 * The 3rd hex digit of the part number is the number of CPUs; 76 * The 3rd hex digit of the part number is the number of CPUs;
77 * ref Table 26, p38 1250-UM101-R. 77 * ref Table 26, p38 1250-UM101-R.
78 */ 78 */
79 part = G_SYS_PART(READ_REG(MIPS_PHYS_TO_KSEG1(A_SCD_SYSTEM_REVISION))); 79 part = G_SYS_PART(READ_REG(MIPS_PHYS_TO_KSEG1(A_SCD_SYSTEM_REVISION)));
80 return (found < ((part >> 8) & 0xf)); 80 return (found < ((part >> 8) & 0xf));
81} 81}
82 82
83static void 83static void
84cpu_attach(struct device *parent, struct device *self, void *aux) 84cpu_attach(device_t parent, device_t self, void *aux)
85{ 85{
 86 struct cpu_info * const ci = curcpu();
 87 const char * const xname = device_xname(self);
86 int plldiv; 88 int plldiv;
87 uint32_t config; 89 uint32_t config;
88 90
89 /* XXX this code must run on the target CPU */ 91 /* XXX this code must run on the target CPU */
90 config = mips3_cp0_config_read(); 92 config = mips3_cp0_config_read();
91 config &= ~MIPS3_CONFIG_K0_MASK; 93 config &= ~MIPS3_CONFIG_K0_MASK;
92 config |= 0x05; /* XXX. cacheable coherent */ 94 config |= 0x05; /* XXX. cacheable coherent */
93 mips3_cp0_config_write(config); 95 mips3_cp0_config_write(config);
94 96
95 found++; 97 found++;
96 98
97 /* 99 /*
98 * Flush all of the caches, so that any lines marked non-coherent will 100 * Flush all of the caches, so that any lines marked non-coherent will
@@ -100,46 +102,46 @@ cpu_attach(struct device *parent, struct @@ -100,46 +102,46 @@ cpu_attach(struct device *parent, struct
100 * coherent (XXX???). 102 * coherent (XXX???).
101 */ 103 */
102 mips_icache_sync_all(); 104 mips_icache_sync_all();
103 mips_dcache_wbinv_all(); 105 mips_dcache_wbinv_all();
104 106
105 /* Determine CPU frequency */ 107 /* Determine CPU frequency */
106 108
107 /* XXX: We should determine the CPU frequency from a time source 109 /* XXX: We should determine the CPU frequency from a time source
108 * not coupled with the CPU crystal, like the RTC. Unfortunately 110 * not coupled with the CPU crystal, like the RTC. Unfortunately
109 * we don't attach that yet... 111 * we don't attach that yet...
110 */ 112 */
111 plldiv = G_SYS_PLL_DIV(READ_REG(MIPS_PHYS_TO_KSEG1(A_SCD_SYSTEM_CFG))); 113 plldiv = G_SYS_PLL_DIV(READ_REG(MIPS_PHYS_TO_KSEG1(A_SCD_SYSTEM_CFG)));
112 if (plldiv == 0) { 114 if (plldiv == 0) {
113 printf("PLL_DIV of zero found, assuming 6 (300MHz)\n"); 115 aprint_normal(": PLL_DIV of zero found, assuming 6 (300MHz)\n");
114 plldiv = 6; 116 plldiv = 6;
115 117
116 printf("%s", self->dv_xname); 118 aprint_normal("%s", xname);
117 } 119 }
118 120
119 curcpu()->ci_cpu_freq = 50000000 * plldiv; 121 ci->ci_cpu_freq = 50000000 * plldiv;
120 /* Compute the delay divisor. */ 122 /* Compute the delay divisor. */
121 curcpu()->ci_divisor_delay = (curcpu()->ci_cpu_freq + 500000) / 1000000; 123 ci->ci_divisor_delay = (ci->ci_cpu_freq + 500000) / 1000000;
122 /* Compute clock cycles per hz */ 124 /* Compute clock cycles per hz */
123 curcpu()->ci_cycles_per_hz = (curcpu()->ci_cpu_freq + hz / 2 ) / hz; 125 ci->ci_cycles_per_hz = (ci->ci_cpu_freq + hz / 2 ) / hz;
124 126
125 printf(": %lu.%02luMHz (hz cycles = %lu, delay divisor = %lu)\n", 127 aprint_normal(": %lu.%02luMHz (hz cycles = %lu, delay divisor = %lu)\n",
126 curcpu()->ci_cpu_freq / 1000000, 128 ci->ci_cpu_freq / 1000000,
127 (curcpu()->ci_cpu_freq % 1000000) / 10000, 129 (ci->ci_cpu_freq % 1000000) / 10000,
128 curcpu()->ci_cycles_per_hz, curcpu()->ci_divisor_delay); 130 ci->ci_cycles_per_hz, ci->ci_divisor_delay);
129 131
130 /* 132 /*
131 * If we're the primary CPU, no more work to do; we're already 133 * If we're the primary CPU, no more work to do; we're already
132 * running! 134 * running!
133 */ 135 */
134 if (found == 1) { 136 if (found == 1) {
135 printf("%s: ", self->dv_xname); 137 aprint_normal("%s: ", xname);
136 cpu_identify(); 138 cpu_identify();
137 } else { 139 } else {
138#if defined(MULTIPROCESSOR) 140#if defined(MULTIPROCESSOR)
139# error! 141# error!
140#else 142#else
141 printf("%s: processor off-line; multiprocessor support " 143 printf("%s: processor off-line; multiprocessor support "
142 "not present in kernel\n", /* sc->sc_dev. */self->dv_xname); 144 "not present in kernel\n", xname);
143#endif 145#endif
144 } 146 }
145} 147}

cvs diff -r1.16.38.1 -r1.16.38.2 src/sys/arch/sbmips/sbmips/rtc.c (expand / switch to unified diff)

--- src/sys/arch/sbmips/sbmips/rtc.c 2009/11/23 18:28:47 1.16.38.1
+++ src/sys/arch/sbmips/sbmips/rtc.c 2010/01/12 18:21:17 1.16.38.2
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: rtc.c,v 1.16.38.1 2009/11/23 18:28:47 matt Exp $ */ 1/* $NetBSD: rtc.c,v 1.16.38.2 2010/01/12 18:21:17 matt Exp $ */
2 2
3/* 3/*
4 * Copyright 2002 Wasabi Systems, Inc. 4 * Copyright 2002 Wasabi Systems, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Written by Simon Burge for Wasabi Systems, Inc. 7 * Written by Simon Burge for Wasabi Systems, Inc.
8 * 8 *
9 * Redistribution and use in source and binary forms, with or without 9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions 10 * modification, are permitted provided that the following conditions
11 * are met: 11 * are met:
12 * 1. Redistributions of source code must retain the above copyright 12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer. 13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright 14 * 2. Redistributions in binary form must reproduce the above copyright
@@ -26,133 +26,134 @@ @@ -26,133 +26,134 @@
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE. 35 * POSSIBILITY OF SUCH DAMAGE.
36 */ 36 */
37 37
38#include <sys/cdefs.h> 38#include <sys/cdefs.h>
39__KERNEL_RCSID(0, "$NetBSD: rtc.c,v 1.16.38.1 2009/11/23 18:28:47 matt Exp $"); 39__KERNEL_RCSID(0, "$NetBSD: rtc.c,v 1.16.38.2 2010/01/12 18:21:17 matt Exp $");
40 40
41#include <sys/param.h> 41#include <sys/param.h>
42#include <sys/device.h> 42#include <sys/device.h>
43#include <sys/kernel.h> 43#include <sys/kernel.h>
44#include <sys/systm.h> 44#include <sys/systm.h>
45#include <sys/cpu.h> 45#include <sys/cpu.h>
46 46
47#include <dev/clock_subr.h> 47#include <dev/clock_subr.h>
48 48
49#include <machine/swarm.h> 49#include <machine/swarm.h>
50#include <machine/systemsw.h> 50#include <machine/systemsw.h>
51 51
52#include <mips/locore.h> 52#include <mips/locore.h>
53#include <mips/sibyte/dev/sbsmbusvar.h> 53#include <mips/sibyte/dev/sbsmbusvar.h>
54 54
55#include <dev/smbus/m41t81reg.h> 55#include <dev/smbus/m41t81reg.h>
56#include <dev/smbus/x1241reg.h> 56#include <dev/smbus/x1241reg.h>
57 57
58struct rtc_softc { 58struct rtc_softc {
59 struct device sc_dev; 59 device_t sc_dev;
60 int sc_smbus_chan; 60 int sc_smbus_chan;
61 int sc_smbus_addr; 61 int sc_smbus_addr;
62 int sc_type; 62 int sc_type;
63 struct todr_chip_handle sc_ct; 63 struct todr_chip_handle sc_ct;
64}; 64};
65 65
66/* "types" for RTCs we support */ 66/* "types" for RTCs we support */
67#define SMB_1BYTE_ADDR 1 67#define SMB_1BYTE_ADDR 1
68#define SMB_2BYTE_ADDR 2 68#define SMB_2BYTE_ADDR 2
69 69
70static int xirtc_match(struct device *, struct cfdata *, void *); 70static int xirtc_match(device_t, cfdata_t , void *);
71static void xirtc_attach(struct device *, struct device *, void *); 71static void xirtc_attach(device_t, device_t, void *);
72static int xirtc_gettime(todr_chip_handle_t, struct clock_ymdhms *); 72static int xirtc_gettime(todr_chip_handle_t, struct clock_ymdhms *);
73static int xirtc_settime(todr_chip_handle_t, struct clock_ymdhms *); 73static int xirtc_settime(todr_chip_handle_t, struct clock_ymdhms *);
74 74
75static int strtc_match(struct device *, struct cfdata *, void *); 75static int strtc_match(device_t, cfdata_t , void *);
76static void strtc_attach(struct device *, struct device *, void *); 76static void strtc_attach(device_t, device_t, void *);
77static int strtc_gettime(todr_chip_handle_t, struct clock_ymdhms *); 77static int strtc_gettime(todr_chip_handle_t, struct clock_ymdhms *);
78static int strtc_settime(todr_chip_handle_t, struct clock_ymdhms *); 78static int strtc_settime(todr_chip_handle_t, struct clock_ymdhms *);
79 79
80static void rtc_cal_timer(void); 80static void rtc_cal_timer(void);
81 81
82static void time_smbus_init(int); 82static void time_smbus_init(int);
83static int time_waitready(int); 83static int time_waitready(int);
84static int time_readrtc(int, int, int, int); 84static int time_readrtc(int, int, int, int);
85static int time_writertc(int, int, int, int, int); 85static int time_writertc(int, int, int, int, int);
86 86
87#define WRITERTC(sc, dev, val) \ 87#define WRITERTC(sc, dev, val) \
88 time_writertc((sc)->sc_smbus_chan, (sc)->sc_smbus_addr, (dev), (sc)->sc_type, (val)) 88 time_writertc((sc)->sc_smbus_chan, (sc)->sc_smbus_addr, (dev), (sc)->sc_type, (val))
89#define READRTC(sc, dev) \ 89#define READRTC(sc, dev) \
90 time_readrtc((sc)->sc_smbus_chan, (sc)->sc_smbus_addr, (dev), (sc)->sc_type) 90 time_readrtc((sc)->sc_smbus_chan, (sc)->sc_smbus_addr, (dev), (sc)->sc_type)
91 91
92 92
93CFATTACH_DECL(xirtc, sizeof(struct rtc_softc), 93CFATTACH_DECL_NEW(xirtc, sizeof(struct rtc_softc),
94 xirtc_match, xirtc_attach, NULL, NULL); 94 xirtc_match, xirtc_attach, NULL, NULL);
95 95
96CFATTACH_DECL(m41t81rtc, sizeof(struct rtc_softc), 96CFATTACH_DECL_NEW(m41t81rtc, sizeof(struct rtc_softc),
97 strtc_match, strtc_attach, NULL, NULL); 97 strtc_match, strtc_attach, NULL, NULL);
98 98
99static int rtcfound = 0; 99static int rtcfound = 0;
100struct rtc_softc *the_rtc; 100struct rtc_softc *the_rtc;
101 101
102/* 102/*
103 * Xicor X1241 RTC support. 103 * Xicor X1241 RTC support.
104 */ 104 */
105static int 105static int
106xirtc_match(struct device *parent, struct cfdata *cf, void *aux) 106xirtc_match(device_t parent, cfdata_t cf, void *aux)
107{ 107{
108 struct smbus_attach_args *sa = aux; 108 struct smbus_attach_args *sa = aux;
109 int ret; 109 int ret;
110 110
111 time_smbus_init(sa->sa_interface); 111 time_smbus_init(sa->sa_interface);
112 112
113 if ((sa->sa_interface != X1241_SMBUS_CHAN) || 113 if ((sa->sa_interface != X1241_SMBUS_CHAN) ||
114 (sa->sa_device != X1241_RTC_SLAVEADDR)) 114 (sa->sa_device != X1241_RTC_SLAVEADDR))
115 return (0); 115 return (0);
116  116
117 ret = time_readrtc(sa->sa_interface, sa->sa_device, SMB_2BYTE_ADDR, X1241REG_SC); 117 ret = time_readrtc(sa->sa_interface, sa->sa_device, SMB_2BYTE_ADDR, X1241REG_SC);
118 if (ret < 0) 118 if (ret < 0)
119 return (0); 119 return (0);
120 120
121 return (!rtcfound); 121 return (!rtcfound);
122} 122}
123 123
124static void 124static void
125xirtc_attach(struct device *parent, struct device *self, void *aux) 125xirtc_attach(device_t parent, device_t self, void *aux)
126{ 126{
127 struct smbus_attach_args *sa = aux; 127 struct smbus_attach_args *sa = aux;
128 struct rtc_softc *sc = (void *)self; 128 struct rtc_softc *sc = device_private(self);
129 129
130 rtcfound = 1; 130 rtcfound = 1;
131 the_rtc = sc; 131 the_rtc = sc;
132 132
 133 sc->sc_dev = self;
133 sc->sc_smbus_chan = sa->sa_interface; 134 sc->sc_smbus_chan = sa->sa_interface;
134 sc->sc_smbus_addr = sa->sa_device; 135 sc->sc_smbus_addr = sa->sa_device;
135 sc->sc_type = SMB_2BYTE_ADDR; /* Two-byte register addresses on the Xicor */ 136 sc->sc_type = SMB_2BYTE_ADDR; /* Two-byte register addresses on the Xicor */
136 137
137 138
138 /* Set up MI todr(9) stuff */ 139 /* Set up MI todr(9) stuff */
139 sc->sc_ct.cookie = sc; 140 sc->sc_ct.cookie = sc;
140 sc->sc_ct.todr_settime_ymdhms = xirtc_settime; 141 sc->sc_ct.todr_settime_ymdhms = xirtc_settime;
141 sc->sc_ct.todr_gettime_ymdhms = xirtc_gettime; 142 sc->sc_ct.todr_gettime_ymdhms = xirtc_gettime;
142 143
143 todr_attach(&sc->sc_ct); 144 todr_attach(&sc->sc_ct);
144 145
145 printf("\n"); 146 aprint_normal("\n");
146 rtc_cal_timer(); /* XXX */ 147 rtc_cal_timer(); /* XXX */
147} 148}
148 149
149static int 150static int
150xirtc_settime(todr_chip_handle_t handle, struct clock_ymdhms *ymdhms) 151xirtc_settime(todr_chip_handle_t handle, struct clock_ymdhms *ymdhms)
151{ 152{
152 struct rtc_softc *sc = handle->cookie; 153 struct rtc_softc *sc = handle->cookie;
153 uint8_t year, y2k; 154 uint8_t year, y2k;
154 155
155 time_smbus_init(sc->sc_smbus_chan); 156 time_smbus_init(sc->sc_smbus_chan);
156 157
157 /* unlock writes to the CCR */ 158 /* unlock writes to the CCR */
158 WRITERTC(sc, X1241REG_SR, X1241REG_SR_WEL); 159 WRITERTC(sc, X1241REG_SR, X1241REG_SR_WEL);
@@ -192,76 +193,77 @@ xirtc_gettime(todr_chip_handle_t handle, @@ -192,76 +193,77 @@ xirtc_gettime(todr_chip_handle_t handle,
192 y2k = READRTC(sc, X1241REG_Y2K); 193 y2k = READRTC(sc, X1241REG_Y2K);
193 ymdhms->dt_year = FROMBCD(y2k) * 100 + FROMBCD(year); 194 ymdhms->dt_year = FROMBCD(y2k) * 100 + FROMBCD(year);
194 195
195 196
196 ymdhms->dt_sec = FROMBCD(READRTC(sc, X1241REG_SC)); 197 ymdhms->dt_sec = FROMBCD(READRTC(sc, X1241REG_SC));
197 ymdhms->dt_min = FROMBCD(READRTC(sc, X1241REG_MN)); 198 ymdhms->dt_min = FROMBCD(READRTC(sc, X1241REG_MN));
198 hour = READRTC(sc, X1241REG_HR); 199 hour = READRTC(sc, X1241REG_HR);
199 ymdhms->dt_hour = FROMBCD(hour & ~X1241REG_HR_MIL); 200 ymdhms->dt_hour = FROMBCD(hour & ~X1241REG_HR_MIL);
200 201
201 status = READRTC(sc, X1241REG_SR); 202 status = READRTC(sc, X1241REG_SR);
202 203
203 if (status & X1241REG_SR_RTCF) { 204 if (status & X1241REG_SR_RTCF) {
204 printf("%s: battery has failed, clock setting is not accurate\n", 205 printf("%s: battery has failed, clock setting is not accurate\n",
205 sc->sc_dev.dv_xname); 206 device_xname(sc->sc_dev));
206 return (EIO); 207 return (EIO);
207 } 208 }
208 209
209 return (0); 210 return (0);
210} 211}
211 212
212/* 213/*
213 * ST M41T81 RTC support. 214 * ST M41T81 RTC support.
214 */ 215 */
215static int 216static int
216strtc_match(struct device *parent, struct cfdata *cf, void *aux) 217strtc_match(device_t parent, cfdata_t cf, void *aux)
217{ 218{
218 struct smbus_attach_args *sa = aux; 219 struct smbus_attach_args *sa = aux;
219 int ret; 220 int ret;
220 221
221 if ((sa->sa_interface != M41T81_SMBUS_CHAN) || 222 if ((sa->sa_interface != M41T81_SMBUS_CHAN) ||
222 (sa->sa_device != M41T81_SLAVEADDR)) 223 (sa->sa_device != M41T81_SLAVEADDR))
223 return (0); 224 return (0);
224 225
225 time_smbus_init(sa->sa_interface); 226 time_smbus_init(sa->sa_interface);
226  227
227 ret = time_readrtc(sa->sa_interface, sa->sa_device, SMB_1BYTE_ADDR, M41T81_SEC); 228 ret = time_readrtc(sa->sa_interface, sa->sa_device, SMB_1BYTE_ADDR, M41T81_SEC);
228 if (ret < 0) 229 if (ret < 0)
229 return (0); 230 return (0);
230 231
231 return (!rtcfound); 232 return (!rtcfound);
232} 233}
233 234
234static void 235static void
235strtc_attach(struct device *parent, struct device *self, void *aux) 236strtc_attach(device_t parent, device_t self, void *aux)
236{ 237{
237 struct smbus_attach_args *sa = aux; 238 struct smbus_attach_args *sa = aux;
238 struct rtc_softc *sc = (void *)self; 239 struct rtc_softc *sc = device_private(self);
239 240
240 rtcfound = 1; 241 rtcfound = 1;
241 the_rtc = sc; 242 the_rtc = sc;
242 243
 244 sc->sc_dev = self;
243 sc->sc_smbus_chan = sa->sa_interface; 245 sc->sc_smbus_chan = sa->sa_interface;
244 sc->sc_smbus_addr = sa->sa_device; 246 sc->sc_smbus_addr = sa->sa_device;
245 sc->sc_type = SMB_1BYTE_ADDR; /* One-byte register addresses on the ST */ 247 sc->sc_type = SMB_1BYTE_ADDR; /* One-byte register addresses on the ST */
246 248
247 /* Set up MI todr(9) stuff */ 249 /* Set up MI todr(9) stuff */
248 sc->sc_ct.cookie = sc; 250 sc->sc_ct.cookie = sc;
249 sc->sc_ct.todr_settime_ymdhms = strtc_settime; 251 sc->sc_ct.todr_settime_ymdhms = strtc_settime;
250 sc->sc_ct.todr_gettime_ymdhms = strtc_gettime; 252 sc->sc_ct.todr_gettime_ymdhms = strtc_gettime;
251 253
252 todr_attach(&sc->sc_ct); 254 todr_attach(&sc->sc_ct);
253 255
254 printf("\n"); 256 aprint_normal("\n");
255 rtc_cal_timer(); /* XXX */ 257 rtc_cal_timer(); /* XXX */
256} 258}
257 259
258static int 260static int
259strtc_settime(todr_chip_handle_t handle, struct clock_ymdhms *ymdhms) 261strtc_settime(todr_chip_handle_t handle, struct clock_ymdhms *ymdhms)
260{ 262{
261 struct rtc_softc *sc = handle->cookie; 263 struct rtc_softc *sc = handle->cookie;
262 uint8_t hour; 264 uint8_t hour;
263 265
264 time_smbus_init(sc->sc_smbus_chan); 266 time_smbus_init(sc->sc_smbus_chan);
265 267
266 hour = TOBCD(ymdhms->dt_hour); 268 hour = TOBCD(ymdhms->dt_hour);
267 if (ymdhms->dt_year >= 2000) /* Should be always true! */ 269 if (ymdhms->dt_year >= 2000) /* Should be always true! */
@@ -314,27 +316,27 @@ strtc_gettime(todr_chip_handle_t handle, @@ -314,27 +316,27 @@ strtc_gettime(todr_chip_handle_t handle,
314 */ 316 */
315static void 317static void
316rtc_cal_timer(void) 318rtc_cal_timer(void)
317{ 319{
318 uint32_t ctrdiff[NITERS], startctr, endctr; 320 uint32_t ctrdiff[NITERS], startctr, endctr;
319 int sec, lastsec, i; 321 int sec, lastsec, i;
320 322
321 if (rtcfound == 0) { 323 if (rtcfound == 0) {
322 printf("rtc_cal_timer before rtc attached\n"); 324 printf("rtc_cal_timer before rtc attached\n");
323 return; 325 return;
324 } 326 }
325return; /* XXX XXX */ 327return; /* XXX XXX */
326 328
327 printf("%s: calibrating CPU clock", the_rtc->sc_dev.dv_xname); 329 printf("%s: calibrating CPU clock", device_xname(the_rtc->sc_dev));
328 330
329 /* 331 /*
330 * Run the loop an extra time to wait for the second to tick over 332 * Run the loop an extra time to wait for the second to tick over
331 * and to prime the cache. 333 * and to prime the cache.
332 */ 334 */
333 time_smbus_init(the_rtc->sc_smbus_chan); 335 time_smbus_init(the_rtc->sc_smbus_chan);
334 sec = RTC_SECONDS(the_rtc); 336 sec = RTC_SECONDS(the_rtc);
335 endctr = mips3_cp0_count_read(); 337 endctr = mips3_cp0_count_read();
336 338
337 for (i = 0; i < NITERS; i++) { 339 for (i = 0; i < NITERS; i++) {
338 int diff; 340 int diff;
339 341
340 again: 342 again:
@@ -363,27 +365,27 @@ return; /* XXX XXX */ @@ -363,27 +365,27 @@ return; /* XXX XXX */
363 } 365 }
364 printf("\n"); 366 printf("\n");
365 367
366 /* Compute the number of cycles per second. */ 368 /* Compute the number of cycles per second. */
367 curcpu()->ci_cpu_freq = ((ctrdiff[1] + ctrdiff[2]) / 2); 369 curcpu()->ci_cpu_freq = ((ctrdiff[1] + ctrdiff[2]) / 2);
368 370
369 /* Compute the delay divisor. */ 371 /* Compute the delay divisor. */
370 curcpu()->ci_divisor_delay = curcpu()->ci_cpu_freq / 1000000; 372 curcpu()->ci_divisor_delay = curcpu()->ci_cpu_freq / 1000000;
371 373
372 /* Compute clock cycles per hz */ 374 /* Compute clock cycles per hz */
373 curcpu()->ci_cycles_per_hz = curcpu()->ci_cpu_freq / hz; 375 curcpu()->ci_cycles_per_hz = curcpu()->ci_cpu_freq / hz;
374 376
375 printf("%s: timer calibration: %lu cycles/sec [(%u, %u)]\n", 377 printf("%s: timer calibration: %lu cycles/sec [(%u, %u)]\n",
376 the_rtc->sc_dev.dv_xname, curcpu()->ci_cpu_freq, 378 device_xname(the_rtc->sc_dev), curcpu()->ci_cpu_freq,
377 ctrdiff[1], ctrdiff[2]); 379 ctrdiff[1], ctrdiff[2]);
378} 380}
379#undef RTC_SECONDS 381#undef RTC_SECONDS
380 382
381/* XXX eville direct-access-to-the-device code follows... */ 383/* XXX eville direct-access-to-the-device code follows... */
382 384
383/* 385/*
384 * Copyright 2000,2001 386 * Copyright 2000,2001
385 * Broadcom Corporation. All rights reserved. 387 * Broadcom Corporation. All rights reserved.
386 * 388 *
387 * This software is furnished under license and may be used and copied only 389 * This software is furnished under license and may be used and copied only
388 * in accordance with the following terms and conditions. Subject to these 390 * in accordance with the following terms and conditions. Subject to these
389 * conditions, you may download, copy, install, use, modify and distribute 391 * conditions, you may download, copy, install, use, modify and distribute

cvs diff -r1.11 -r1.11.96.1 src/sys/arch/sbmips/sbmips/zbbus.c (expand / switch to unified diff)

--- src/sys/arch/sbmips/sbmips/zbbus.c 2005/12/11 12:18:51 1.11
+++ src/sys/arch/sbmips/sbmips/zbbus.c 2010/01/12 18:21:17 1.11.96.1
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: zbbus.c,v 1.11 2005/12/11 12:18:51 christos Exp $ */ 1/* $NetBSD: zbbus.c,v 1.11.96.1 2010/01/12 18:21:17 matt Exp $ */
2 2
3/* 3/*
4 * Copyright 2000, 2001 4 * Copyright 2000, 2001
5 * Broadcom Corporation. All rights reserved. 5 * Broadcom Corporation. All rights reserved.
6 * 6 *
7 * This software is furnished under license and may be used and copied only 7 * This software is furnished under license and may be used and copied only
8 * in accordance with the following terms and conditions. Subject to these 8 * in accordance with the following terms and conditions. Subject to these
9 * conditions, you may download, copy, install, use, modify and distribute 9 * conditions, you may download, copy, install, use, modify and distribute
10 * modified or unmodified copies of this software in source and/or binary 10 * modified or unmodified copies of this software in source and/or binary
11 * form. No title or ownership is transferred hereby. 11 * form. No title or ownership is transferred hereby.
12 * 12 *
13 * 1) Any source code used, modified or distributed must reproduce and 13 * 1) Any source code used, modified or distributed must reproduce and
14 * retain this copyright notice and list of conditions as they appear in 14 * retain this copyright notice and list of conditions as they appear in
@@ -23,70 +23,69 @@ @@ -23,70 +23,69 @@
23 * WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF 23 * WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF
24 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR 24 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR
25 * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM BE LIABLE 25 * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM BE LIABLE
26 * FOR ANY DAMAGES WHATSOEVER, AND IN PARTICULAR, BROADCOM SHALL NOT BE 26 * FOR ANY DAMAGES WHATSOEVER, AND IN PARTICULAR, BROADCOM SHALL NOT BE
27 * LIABLE FOR DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * LIABLE FOR DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
30 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 30 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
31 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 31 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
32 * OR OTHERWISE), EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * OR OTHERWISE), EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */ 33 */
34 34
35#include <sys/cdefs.h> 35#include <sys/cdefs.h>
36__KERNEL_RCSID(0, "$NetBSD: zbbus.c,v 1.11 2005/12/11 12:18:51 christos Exp $"); 36__KERNEL_RCSID(0, "$NetBSD: zbbus.c,v 1.11.96.1 2010/01/12 18:21:17 matt Exp $");
37 37
38#include <sys/param.h> 38#include <sys/param.h>
39#include <sys/systm.h> 39#include <sys/systm.h>
40#include <sys/device.h> 40#include <sys/device.h>
41 41
42#include <mips/sibyte/include/zbbusvar.h> 42#include <mips/sibyte/include/zbbusvar.h>
43 43
44#include "locators.h" 44#include "locators.h"
45 45
46static int zbbus_match(struct device *, struct cfdata *, void *); 46static int zbbus_match(device_t, cfdata_t, void *);
47static void zbbus_attach(struct device *, struct device *, void *); 47static void zbbus_attach(device_t, device_t, void *);
48 48
49CFATTACH_DECL(zbbus, sizeof(struct device), 49CFATTACH_DECL_NEW(zbbus, 0,
50 zbbus_match, zbbus_attach, NULL, NULL); 50 zbbus_match, zbbus_attach, NULL, NULL);
51 51
52static int zbbus_print(void *, const char *); 52static int zbbus_print(void *, const char *);
53static int zbbus_submatch(struct device *, struct cfdata *, 53static int zbbus_submatch(device_t, cfdata_t, const int *, void *);
54 const int *, void *); 
55static const char *zbbus_entity_type_name(enum zbbus_entity_type type); 54static const char *zbbus_entity_type_name(enum zbbus_entity_type type);
56 55
57static int zbbus_attached; 56static int zbbus_attached;
58 57
59static const struct zbbus_attach_locs sb1250_zbbus_devs[] = { 58static const struct zbbus_attach_locs sb1250_zbbus_devs[] = {
60 { 0, ZBBUS_ENTTYPE_CPU }, 59 { 0, ZBBUS_ENTTYPE_CPU },
61 { 1, ZBBUS_ENTTYPE_CPU }, 60 { 1, ZBBUS_ENTTYPE_CPU },
62 { 4, ZBBUS_ENTTYPE_SCD }, 61 { 4, ZBBUS_ENTTYPE_SCD },
63 { 2, ZBBUS_ENTTYPE_BRZ }, 62 { 2, ZBBUS_ENTTYPE_BRZ },
64 { 3, ZBBUS_ENTTYPE_OBIO }, 63 { 3, ZBBUS_ENTTYPE_OBIO },
65}; 64};
66static const int sb1250_zbbus_dev_count = 65static const int sb1250_zbbus_dev_count =
67 sizeof sb1250_zbbus_devs / sizeof sb1250_zbbus_devs[0]; 66 sizeof sb1250_zbbus_devs / sizeof sb1250_zbbus_devs[0];
68 67
69static int 68static int
70zbbus_match(struct device *parent, struct cfdata *match, void *aux) 69zbbus_match(device_t parent, cfdata_t match, void *aux)
71{ 70{
72 71
73 if (zbbus_attached) 72 if (zbbus_attached)
74 return (0); 73 return (0);
75 return 1; 74 return 1;
76} 75}
77 76
78static void 77static void
79zbbus_attach(struct device *parent, struct device *self, void *aux) 78zbbus_attach(device_t parent, device_t self, void *aux)
80{ 79{
81 struct zbbus_attach_args za; 80 struct zbbus_attach_args za;
82 int i; 81 int i;
83 82
84 printf("\n"); 83 printf("\n");
85 zbbus_attached = 1; 84 zbbus_attached = 1;
86 85
87 sb1250_icu_init(); 86 sb1250_icu_init();
88 87
89 for (i = 0; i < sb1250_zbbus_dev_count; i++) { 88 for (i = 0; i < sb1250_zbbus_dev_count; i++) {
90 memset(&za, 0, sizeof za); 89 memset(&za, 0, sizeof za);
91 za.za_locs = sb1250_zbbus_devs[i]; 90 za.za_locs = sb1250_zbbus_devs[i];
92 config_found_sm_loc(self, "zbbus", NULL, &za, zbbus_print, 91 config_found_sm_loc(self, "zbbus", NULL, &za, zbbus_print,
@@ -99,28 +98,27 @@ zbbus_attach(struct device *parent, stru @@ -99,28 +98,27 @@ zbbus_attach(struct device *parent, stru
99int 98int
100zbbus_print(void *aux, const char *pnp) 99zbbus_print(void *aux, const char *pnp)
101{ 100{
102 struct zbbus_attach_args *zap = aux; 101 struct zbbus_attach_args *zap = aux;
103 102
104 if (pnp) 103 if (pnp)
105 aprint_normal("%s at %s", 104 aprint_normal("%s at %s",
106 zbbus_entity_type_name(zap->za_locs.za_type), pnp); 105 zbbus_entity_type_name(zap->za_locs.za_type), pnp);
107 aprint_normal(" busid %d", zap->za_locs.za_busid); 106 aprint_normal(" busid %d", zap->za_locs.za_busid);
108 return (UNCONF); 107 return (UNCONF);
109} 108}
110 109
111static int 110static int
112zbbus_submatch(struct device *parent, struct cfdata *cf, 111zbbus_submatch(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
113 const int *ldesc, void *aux) 
114{ 112{
115 struct zbbus_attach_args *zap = aux; 113 struct zbbus_attach_args *zap = aux;
116 114
117 if (cf->cf_loc[ZBBUSCF_BUSID] != ZBBUSCF_BUSID_DEFAULT && 115 if (cf->cf_loc[ZBBUSCF_BUSID] != ZBBUSCF_BUSID_DEFAULT &&
118 cf->cf_loc[ZBBUSCF_BUSID] != zap->za_locs.za_busid) 116 cf->cf_loc[ZBBUSCF_BUSID] != zap->za_locs.za_busid)
119 return (0); 117 return (0);
120 118
121 return (config_match(parent, cf, aux)); 119 return (config_match(parent, cf, aux));
122} 120}
123 121
124static const char * 122static const char *
125zbbus_entity_type_name(enum zbbus_entity_type type) 123zbbus_entity_type_name(enum zbbus_entity_type type)
126{ 124{