Thu Jan 21 08:50:00 2010 UTC ()
Define PCI bus spaces as little endian


(matt)
diff -r1.1.2.1 -r1.1.2.2 src/sys/arch/mips/sibyte/pci/sbbrz_bus_io.c
diff -r1.1.2.1 -r1.1.2.2 src/sys/arch/mips/sibyte/pci/sbbrz_bus_mem.c
cvs diff -r1.1.2.1 -r1.1.2.2 src/sys/arch/mips/sibyte/pci/sbbrz_bus_io.c (expand / switch to unified diff)

--- src/sys/arch/mips/sibyte/pci/sbbrz_bus_io.c 2010/01/21 04:22:33 1.1.2.1
+++ src/sys/arch/mips/sibyte/pci/sbbrz_bus_io.c 2010/01/21 08:50:00 1.1.2.2
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: sbbrz_bus_io.c,v 1.1.2.1 2010/01/21 04:22:33 matt Exp $ */ 1/* $NetBSD: sbbrz_bus_io.c,v 1.1.2.2 2010/01/21 08:50:00 matt Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2001, 2010 The NetBSD Foundation, Inc. 4 * Copyright (c) 2001, 2010 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe. 8 * by Jason R. Thorpe.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -24,33 +24,34 @@ @@ -24,33 +24,34 @@
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE. 29 * POSSIBILITY OF SUCH DAMAGE.
30 */ 30 */
31 31
32/* 32/*
33 * Platform-specific PCI bus I/O support for the BCM1250/BCM1125. 33 * Platform-specific PCI bus I/O support for the BCM1250/BCM1125.
34 */ 34 */
35 35
36#include <sys/cdefs.h> 36#include <sys/cdefs.h>
37__KERNEL_RCSID(0, "$NetBSD: sbbrz_bus_io.c,v 1.1.2.1 2010/01/21 04:22:33 matt Exp $"); 37__KERNEL_RCSID(0, "$NetBSD: sbbrz_bus_io.c,v 1.1.2.2 2010/01/21 08:50:00 matt Exp $");
38 38
39#include <sys/param.h> 39#include <sys/param.h>
40 40
41#include <mips/sibyte/include/sb1250_regs.h> 41#include <mips/sibyte/include/sb1250_regs.h>
42#include <mips/sibyte/pci/sbbrzvar.h> 42#include <mips/sibyte/pci/sbbrzvar.h>
43 43
44#define CHIP sbbrz 44#define CHIP sbbrz
45#define CHIP_IO /* defined */ 45#define CHIP_IO /* defined */
 46#define CHIP_LITTLE_ENDIAN
46 47
47#define CHIP_EX_MALLOC_SAFE(v) true 48#define CHIP_EX_MALLOC_SAFE(v) true
48#define CHIP_EXTENT(v) (((struct sbbrz_softc *)(v))->sc_io_ex) 49#define CHIP_EXTENT(v) (((struct sbbrz_softc *)(v))->sc_io_ex)
49 50
50/* IO region 1 */ 51/* IO region 1 */
51#define CHIP_W1_BUS_START(v) 0x00008000UL 52#define CHIP_W1_BUS_START(v) 0x00008000UL
52#define CHIP_W1_BUS_END(v) 0x02000000UL 53#define CHIP_W1_BUS_END(v) 0x02000000UL
53#define CHIP_W1_SYS_START(v) (A_PHYS_LDTPCI_IO_MATCH_BYTES + CHIP_W1_BUS_START(v)) 54#define CHIP_W1_SYS_START(v) (A_PHYS_LDTPCI_IO_MATCH_BYTES + CHIP_W1_BUS_START(v))
54#define CHIP_W1_SYS_END(v) (A_PHYS_LDTPCI_IO_MATCH_BYTES + CHIP_W1_BUS_END(v)) 55#define CHIP_W1_SYS_END(v) (A_PHYS_LDTPCI_IO_MATCH_BYTES + CHIP_W1_BUS_END(v))
55 56
56#include <mips/mips/bus_space_alignstride_chipdep.c> 57#include <mips/mips/bus_space_alignstride_chipdep.c>
cvs diff -r1.1.2.1 -r1.1.2.2 src/sys/arch/mips/sibyte/pci/sbbrz_bus_mem.c (expand / switch to unified diff)

--- src/sys/arch/mips/sibyte/pci/sbbrz_bus_mem.c 2010/01/21 04:22:33 1.1.2.1
+++ src/sys/arch/mips/sibyte/pci/sbbrz_bus_mem.c 2010/01/21 08:50:00 1.1.2.2
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: sbbrz_bus_mem.c,v 1.1.2.1 2010/01/21 04:22:33 matt Exp $ */ 1/* $NetBSD: sbbrz_bus_mem.c,v 1.1.2.2 2010/01/21 08:50:00 matt Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 4 * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe. 8 * by Jason R. Thorpe.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -24,33 +24,34 @@ @@ -24,33 +24,34 @@
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE. 29 * POSSIBILITY OF SUCH DAMAGE.
30 */ 30 */
31 31
32/* 32/*
33 * Platform-specific PCI bus memory support for the BCM1250/1125. 33 * Platform-specific PCI bus memory support for the BCM1250/1125.
34 */ 34 */
35 35
36#include <sys/cdefs.h> 36#include <sys/cdefs.h>
37__KERNEL_RCSID(0, "$NetBSD: sbbrz_bus_mem.c,v 1.1.2.1 2010/01/21 04:22:33 matt Exp $"); 37__KERNEL_RCSID(0, "$NetBSD: sbbrz_bus_mem.c,v 1.1.2.2 2010/01/21 08:50:00 matt Exp $");
38 38
39#include <sys/param.h> 39#include <sys/param.h>
40 40
41#include <mips/sibyte/include/sb1250_regs.h> 41#include <mips/sibyte/include/sb1250_regs.h>
42#include <mips/sibyte/pci/sbbrzvar.h> 42#include <mips/sibyte/pci/sbbrzvar.h>
43 43
44#define CHIP sbbrz 44#define CHIP sbbrz
45#define CHIP_MEM /* defined */ 45#define CHIP_MEM /* defined */
 46#define CHIP_LITTLE_ENDIAN
46 47
47#define CHIP_EX_MALLOC_SAFE(v) true 48#define CHIP_EX_MALLOC_SAFE(v) true
48#define CHIP_EXTENT(v) (((struct sbbrz_softc *)(v))->sc_mem_ex) 49#define CHIP_EXTENT(v) (((struct sbbrz_softc *)(v))->sc_mem_ex)
49 50
50/* MEM region 1 */ 51/* MEM region 1 */
51#define CHIP_W1_BUS_START(v) (A_PHYS_LDTPCI_IO_MATCH_BYTES_32 + 0x01000000) 52#define CHIP_W1_BUS_START(v) (A_PHYS_LDTPCI_IO_MATCH_BYTES_32 + 0x01000000)
52#define CHIP_W1_BUS_END(v) (A_PHYS_LDTPCI_IO_MATCH_BYTES_32 + 0x20000000) 53#define CHIP_W1_BUS_END(v) (A_PHYS_LDTPCI_IO_MATCH_BYTES_32 + 0x20000000)
53#define CHIP_W1_SYS_START(v) CHIP_W1_BUS_START(v) 54#define CHIP_W1_SYS_START(v) CHIP_W1_BUS_START(v)
54#define CHIP_W1_SYS_END(v) CHIP_W1_BUS_END(v) 55#define CHIP_W1_SYS_END(v) CHIP_W1_BUS_END(v)
55 56
56#include <mips/mips/bus_space_alignstride_chipdep.c> 57#include <mips/mips/bus_space_alignstride_chipdep.c>