 @@ -1,14 +1,14 @@
-#	$NetBSD: genassym.cf,v 1.22 2010/03/30 19:38:52 skrll Exp $
+#	$NetBSD: genassym.cf,v 1.23 2010/03/31 12:56:14 skrll Exp $
 #	$OpenBSD: genassym.cf,v 1.18 2001/09/20 18:31:14 mickey Exp $
+#
 # Copyright (c) 1982, 1990, 1993
 #	The Regents of the University of California.  All rights reserved.
+#
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions
 # are met:
 # 1. Redistributions of source code must retain the above copyright
 #    notice, this list of conditions and the following disclaimer.
 # 2. Redistributions in binary form must reproduce the above copyright
 @@ -75,27 +75,28 @@ export	HPPA_LDCW_ALIGN
 # `break' entry points
 export	HPPA_BREAK_KERNEL
 export	HPPA_BREAK_GET_PSW
 export	HPPA_BREAK_SET_PSW
 # hp700_int_reg fields
 struct	hp700_int_reg
 member	INT_REG_REQ		int_reg_req
 member	INT_REG_BITS_MAP	int_reg_bits_map
 export	INT_REG_BIT_REG
 # struct cpu_info fields
-#define	CI_CPL			offsetof(struct cpu_info, ci_cpl)
+define	CI_CPL			offsetof(struct cpu_info, ci_cpl)
 define	CI_IPENDING		offsetof(struct cpu_info, ci_ipending)
 #define	CI_INTR_DEPTH		offsetof(struct cpu_info, ci_intr_depth)
 #define	CI_SOFTLWPS		offsetof(struct cpu_info, ci_softlwps)
 define	CI_MTX_COUNT		offsetof(struct cpu_info, ci_mtx_count)
 #define	CI_CURLWP		offsetof(struct cpu_info, ci_curlwp)
 define	MTX_IPL			offsetof(struct kmutex, mtx_ipl)
 define	MTX_LOCK		offsetof(struct kmutex, mtx_lock)
 define	MTX_OWNER		offsetof(struct kmutex, mtx_owner)
 define	MTX_WAITERS		offsetof(struct kmutex, mtx_waiters)
 define	RW_OWNER		offsetof(struct krwlock, rw_owner)
 define	RW_WRITE_LOCKED		RW_WRITE_LOCKED
 define	RW_WRITE_WANTED		RW_WRITE_WANTED

 @@ -1,14 +1,16 @@
-/*	$NetBSD: intr.c,v 1.23 2010/03/24 12:38:55 skrll Exp $	*/
+/*	$NetBSD: intr.c,v 1.24 2010/03/31 12:56:14 skrll Exp $	*/
 /*	$NetBSD: intr.c,v 1.24 2010/03/31 12:56:14 skrll Exp $	*/
 /*	$OpenBSD: intr.c,v 1.27 2009/12/31 12:52:35 jsing Exp $	*/
 /*
  * Copyright (c) 2002 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Matthew Fredette.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
 @@ -24,61 +26,52 @@
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 /*
  * Interrupt handling for NetBSD/hp700.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.23 2010/03/24 12:38:55 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.24 2010/03/31 12:56:14 skrll Exp $");
 #define __MUTEX_PRIVATE
 #include <sys/param.h>
 #include <sys/malloc.h>
 #include <sys/cpu.h>
 #include <machine/autoconf.h>
 #include <machine/cpufunc.h>
 #include <machine/intr.h>
 #include <machine/reg.h>
 #include <hp700/hp700/intr.h>
 #include <hp700/hp700/machdep.h>
 #include <uvm/uvm_extern.h>
 #include <machine/mutex.h>
 /* The priority level masks. */
 int imask[NIPL];
 /* The current priority level. */
 volatile int cpl;
 /* The pending interrupts. */
 volatile int ipending;
 /* Shared interrupts */
 int ishared;
 /* Nonzero iff we are running an interrupt. */
 u_int hppa_intr_depth;
 /* The list of all interrupt registers. */
 struct hp700_int_reg *hp700_int_regs[HP700_INT_BITS];
 /*
  * The array of interrupt handler structures, one per bit.
  */
 static struct hp700_int_bit {
 	/* The interrupt register this bit is in. */
 	struct hp700_int_reg *int_bit_reg;
 	/*
 	 * The priority level associated with this bit, e.g, IPL_BIO, IPL_NET,
 @@ -127,40 +120,41 @@ hp700_intr_reg_establish(struct hp700_in
 		if (hp700_int_regs[idx] == NULL)
 			break;
 	if (idx == HP700_INT_BITS)
 		panic("hp700_intr_reg_establish: too many regs");
 	hp700_int_regs[idx] = int_reg;
+}
 /*
  * This bootstraps interrupts.
  */
 void
 hp700_intr_bootstrap(void)
+{
 	struct cpu_info *ci = curcpu();
 	int i;
 	/* Initialize all prority level masks to mask everything. */
 	for (i = 0; i < NIPL; i++)
 		imask[i] = -1;
 	/* We are now at the highest priority level. */
-	cpl = -1;
+	ci->ci_cpl = -1;
 	/* There are no pending interrupts. */
-	ipending = 0;
+	ci->ci_ipending = 0;
 	/* We are not running an interrupt. */
-	hppa_intr_depth = 0;
+	ci->ci_intr_depth = 0;
 	/* There are no interrupt handlers. */
 	memset(hp700_int_bits, 0, sizeof(hp700_int_bits));
 	/* There are no interrupt registers. */
 	memset(hp700_int_regs, 0, sizeof(hp700_int_regs));
 	/* Initialize the CPU interrupt register description. */
 	hp700_intr_reg_establish(&int_reg_cpu);
 	int_reg_cpu.int_reg_dev = "cpu0";	/* XXX */
+}
 /*
 @@ -267,30 +261,31 @@ _hp700_intr_ipl_next(void)
  */
 int
 _hp700_intr_spl_mask(void *_int_bit)
+{
 	return ((struct hp700_int_bit *) _int_bit)->int_bit_spl;
+}
 /*
  * This finally initializes interrupts.
  */
 void
 hp700_intr_init(void)
+{
 	int idx, bit_pos;
 	struct hp700_int_bit *int_bit;
 	int mask;
 	struct hp700_int_reg *int_reg;
 	struct cpu_info *ci = curcpu();
 	int idx, bit_pos;
 	int mask;
 	int eiem;
 	/*
 	 * Put together the initial imask for each level.
 	 */
 	memset(imask, 0, sizeof(imask));
 	for (bit_pos = 0; bit_pos < HP700_INT_BITS; bit_pos++) {
 		int_bit = hp700_int_bits + bit_pos;
 		if (int_bit->int_bit_reg == NULL)
 			continue;
 		imask[int_bit->int_bit_ipl] |= int_bit->int_bit_spl;
+	}
 @@ -329,28 +324,28 @@ hp700_intr_init(void)
 	for (bit_pos = 0; bit_pos < NIPL; bit_pos++)
 		printf("imask[%d] == %08x\n", bit_pos, imask[bit_pos]);
 #endif
 	/*
 	 * Load all mask registers, loading %eiem last.  This will finally
 	 * enable interrupts, but since cpl and ipending should be -1 and 0,
 	 * respectively, no interrupts will get dispatched until the priority
 	 * level is lowered.
+	 *
 	 * Because we're paranoid, we force these values for cpl and ipending,
 	 * even though they should be unchanged since hp700_intr_bootstrap().
 	 */
-	cpl = -1;
+	ci->ci_cpl = -1;
-	ipending = 0;
+	ci->ci_ipending = 0;
 	eiem = 0;
 	for (idx = 0; idx < HP700_INT_BITS; idx++) {
 		int_reg = hp700_int_regs[idx];
 		if (int_reg == NULL)
 			continue;
 		mask = 0;
 		for (bit_pos = 0; bit_pos < HP700_INT_BITS; bit_pos++) {
 			if (int_reg->int_reg_bits_map[31 ^ bit_pos] !=
 			    INT_REG_BIT_UNUSED)
 				mask |= (1 << bit_pos);
+		}
 		if (int_reg == &int_reg_cpu)
 			eiem = mask;
 @@ -364,26 +359,27 @@ hp700_intr_init(void)
  * Service interrupts.  This doesn't necessarily dispatch them.  This is called
  * with %eiem loaded with zero.  It's named hppa_intr instead of hp700_intr
  * because trap.c calls it.
  */
 void
 hppa_intr(struct trapframe *frame)
+{
 	int eirr;
 	int ipending_new;
 	int pending;
 	int i;
 	struct hp700_int_reg *int_reg;
 	int hp700_intr_ipending_new(struct hp700_int_reg *, int);
 	struct cpu_info *ci = curcpu();
 	extern char ucas_ras_start[];
 	extern char ucas_ras_end[];
 #ifndef LOCKDEBUG
 	extern char mutex_enter_crit_start[];
 	extern char mutex_enter_crit_end[];
 	extern char _lock_cas_ras_start[];
 	extern char _lock_cas_ras_end[];
 	if (frame->tf_iisq_head == HPPA_SID_KERNEL &&
 	    frame->tf_iioq_head >= (u_int)_lock_cas_ras_start &&
 @@ -408,81 +404,83 @@ hppa_intr(struct trapframe *frame)
 	    frame->tf_iioq_head >= (u_int)ucas_ras_start &&
 	    frame->tf_iioq_head <= (u_int)ucas_ras_end) {
 		frame->tf_iioq_head = (u_int)ucas_ras_start;
 		frame->tf_iioq_tail = (u_int)ucas_ras_start + 4;
+	}
 	/*
 	 * Read the CPU interrupt register and acknowledge all interrupts.
 	 * Starting with this value, get our set of new pending interrupts and
 	 * add these new bits to ipending.
 	 */
 	mfctl(CR_EIRR, eirr);
 	mtctl(eirr, CR_EIRR);
 	ipending |= hp700_intr_ipending_new(&int_reg_cpu, eirr);
 	ci->ci_ipending |= hp700_intr_ipending_new(&int_reg_cpu, eirr);
 	/* If we have interrupts to dispatch, do so. */
-	if (ipending & ~cpl)
+	if (ci->ci_ipending & ~ci->ci_cpl)
-		hp700_intr_dispatch(cpl, frame->tf_eiem, frame);
+		hp700_intr_dispatch(ci->ci_cpl, frame->tf_eiem, frame);
 	/* We are done if there are no shared interrupts. */
 	if (ishared == 0)
 		return;
 	for (i = 0; i < HP700_INT_BITS; i++) {
 		int_reg = hp700_int_regs[i];
 		if (int_reg == NULL || int_reg->int_reg_level == NULL)
 			continue;
 		/*
 		 * For shared interrupts look if the interrupt line is still
 		 * asserted. If it is, reschedule the corresponding interrupt.
 		 */
 		ipending_new = *int_reg->int_reg_level;
 		while (ipending_new != 0) {
 			pending = ffs(ipending_new) - 1;
-			ipending |= int_reg->int_reg_bits_map[31 ^ pending]
+			ci->ci_ipending |=
-			    & ishared;
+			    int_reg->int_reg_bits_map[31 ^ pending] & ishared;
 			ipending_new &= ~(1 << pending);
+		}
+	}
 	/* If we still have interrupts to dispatch, do so. */
-	if (ipending & ~cpl)
+	if (ci->ci_ipending & ~ci->ci_cpl)
-		hp700_intr_dispatch(cpl, frame->tf_eiem, frame);
+		hp700_intr_dispatch(ci->ci_cpl, frame->tf_eiem, frame);
+}
 /*
  * Dispatch interrupts.  This dispatches at least one interrupt.
  * This is called with %eiem loaded with zero.
  */
 void
 hp700_intr_dispatch(int ncpl, int eiem, struct trapframe *frame)
+{
 	struct cpu_info *ci = curcpu();
 	int ipending_run;
 	u_int old_hppa_intr_depth;
 	int bit_pos;
 	struct hp700_int_bit *int_bit;
 	void *arg;
 	struct clockframe clkframe;
 	int handled;
 	/* Increment our depth, grabbing the previous value. */
-	old_hppa_intr_depth = hppa_intr_depth++;
+	old_hppa_intr_depth = ci->ci_intr_depth++;
 	/* Loop while we have interrupts to dispatch. */
 	for (;;) {
 		/* Read ipending and mask it with ncpl. */
-		ipending_run = (ipending & ~ncpl);
+		ipending_run = (ci->ci_ipending & ~ncpl);
 		if (ipending_run == 0)
 			break;
 		/* Choose one of the resulting bits to dispatch. */
 		bit_pos = ffs(ipending_run) - 1;
 		/*
 		 * If this interrupt handler takes the clockframe
 		 * as an argument, conjure one up.
 		 */
 		int_bit = hp700_int_bits + bit_pos;
 		int_bit->int_bit_evcnt.ev_count++;
 		arg = int_bit->int_bit_arg;
 @@ -492,45 +490,46 @@ hp700_intr_dispatch(int ncpl, int eiem,
 			clkframe.cf_spl = ncpl;
 			if (frame != NULL) {
 				clkframe.cf_flags |= frame->tf_flags;
 				clkframe.cf_pc = frame->tf_iioq_head;
+			}
 			arg = &clkframe;
+		}
 		/*
 		 * Remove this bit from ipending, raise spl to
 		 * the level required to run this interrupt,
 		 * and reenable interrupts.
 		 */
-		ipending &= ~(1 << bit_pos);
+		ci->ci_ipending &= ~(1 << bit_pos);
-		cpl = ncpl | int_bit->int_bit_spl;
+		ci->ci_cpl = ncpl | int_bit->int_bit_spl;
 		mtctl(eiem, CR_EIEM);
 		/* Count and dispatch the interrupt. */
 		uvmexp.intrs++;
 		handled = (*int_bit->int_bit_handler)(arg);
 #if 0
 		if (!handled)
 			printf("%s: can't handle interrupt\n",
 				int_bit->int_bit_evcnt.ev_name);
 #endif
 		/* Disable interrupts and loop. */
 		mtctl(0, CR_EIEM);
+	}
 	/* Interrupts are disabled again, restore cpl and the depth. */
-	cpl = ncpl;
+	ci->ci_cpl = ncpl;
-	hppa_intr_depth = old_hppa_intr_depth;
+	ci->ci_intr_depth = old_hppa_intr_depth;
+}
 bool
 cpu_intr_p(void)
+{
 	struct cpu_info *ci = curcpu();
 #ifdef __HAVE_FAST_SOFTINTS
 #error this should not count fast soft interrupts
 #else
-	return hppa_intr_depth != 0;
+	return ci->ci_intr_depth != 0;
 #endif
+}

 @@ -1,14 +1,14 @@
-/*	$NetBSD: locore.S,v 1.44 2010/03/16 16:20:19 skrll Exp $	*/
+/*	$NetBSD: locore.S,v 1.45 2010/03/31 12:56:14 skrll Exp $	*/
 /*	$OpenBSD: locore.S,v 1.158 2008/07/28 19:08:46 miod Exp $	*/
 /*
  * Copyright (c) 1998-2004 Michael Shalayeff
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
 @@ -524,49 +524,61 @@ pdc_call_unmapped2:
 	ldw	HPPA_FRAME_ARG(23)(%sp), %arg0
 	break	HPPA_BREAK_KERNEL, HPPA_BREAK_SET_PSW
 	nop
 	copy	%t3, %ret0
 pdc_call_unmapped3:
 	ldw	HPPA_FRAME_PSP(%sp), %sp
 	ldw	HPPA_FRAME_CRP(%sp), %rp
 	bv	%r0(%rp)
 	mtctl	%t2, %eiem
 EXIT(pdc_call)
 /*
  * int splraise(int ncpl);
  */
 LEAF_ENTRY(splraise)
 	mfctl	CR_CURLWP, %t1
 	ldw	L_CPU(%t1),%t1
 	ldw	CI_CPL(%t1), %ret0
 	or	%ret0, %arg0, %arg0
 	bv	%r0(%rp)
 	stw	%arg0, CI_CPL(%t1)
 EXIT(splraise)
 /*
  * int spllower(int ncpl);
  */
-ENTRY(spllower,64)
+ENTRY(spllower,HPPA_FRAME_SIZE)
-	ldil	L%ipending, %r1
+	mfctl	CR_CURLWP, %t1
-	ldw	R%ipending(%r1), %r1	; load ipending
+	ldw	L_CPU(%t1),%t1
 	ldil	L%cpl, %t1
 	ldw	CI_IPENDING(%t1), %r1	; load ipending
 	andcm,<> %r1, %arg0, %r1	; and with complement of new cpl
 	bv	%r0(%rp)
-	stw	%arg0, R%cpl(%t1)	; store new cpl
+	stw	%arg0, CI_CPL(%t1)	; store new cpl
 	/*
 	 * Dispatch interrupts.  There's a chance
 	 * that we may end up not dispatching anything;
 	 * in between our load of ipending and this
 	 * disabling of interrupts, something else may
 	 * have come in and dispatched some or all
 	 * of what we previously saw in ipending.
 	 */
 	mfctl	%eiem, %arg1
 	mtctl	%r0, %eiem		; disable interrupts
-	ldil	L%ipending, %r1
+	ldw	CI_IPENDING(%t1), %r1	; load ipending
 	ldw	R%ipending(%r1), %r1	; load ipending
 	andcm,<> %r1, %arg0, %r1	; and with complement of new cpl
 	b,n	spllower_out		; branch if we got beaten
 spllower_dispatch:
 	/* start stack calling convention */
 	stw	%rp, HPPA_FRAME_CRP(%sp)
 	copy	%r3, %r1
 	copy	%sp, %r3
 	stw,ma	%r1, HPPA_FRAME_SIZE(%sp)
 	/* save ncpl and %eiem */
 	stw	%arg0, HPPA_FRAME_ARG(0)(%r3)
 	stw	%arg1, HPPA_FRAME_ARG(1)(%r3)
 @@ -593,34 +605,34 @@ spllower_out:
 	 * (hp700_intr_dispatch leaves it zero).  I think
 	 * doing this in the delay slot is important to
 	 * prevent recursion, but I might be being too
 	 * paranoid.
 	 */
 	bv	%r0(%rp)
 	mtctl	%arg1, %eiem
 EXIT(spllower)
 /*
  * void hp700_intr_schedule(int mask);
  */
 ENTRY(hp700_intr_schedule,0)
-	ldil	L%ipending, %t1
+	mfctl	CR_CURLWP, %t1
-	ldil	L%cpl, %t2
+	ldw	L_CPU(%t1),%t2
 	mfctl	%eiem, %arg1
 	mtctl	%r0, %eiem			; disable interrupts
-	ldw	R%ipending(%t1), %r1		; load ipending
+	ldw	CI_IPENDING(%t1), %r1		; load ipending
 	or	%r1, %arg0, %r1			; or in mask
-	stw	%r1, R%ipending(%t1)		; store ipending
+	stw	%r1, CI_IPENDING(%t1)		; store ipending
-	ldw	R%cpl(%t2), %arg0		; load cpl
+	ldw	CI_CPL(%t2), %arg0		; load cpl
 	andcm,= %r1, %arg0, %r1			; and ipending with ~cpl
 	b,n	spllower_dispatch		; dispatch if we can
 	bv	%r0(%rp)
 	mtctl	%arg1, %eiem
 EXIT(hp700_intr_schedule)
 /*
+ *
  * int hp700_intr_ipending_new(struct hp700_int_reg *int_reg, int int_req);
+ *
  * This assembles the mask of new pending interrupts.
+ *
  */

 @@ -1,14 +1,14 @@
-/*	$NetBSD: cpu.h,v 1.41 2010/03/31 06:35:12 skrll Exp $	*/
+/*	$NetBSD: cpu.h,v 1.42 2010/03/31 12:56:14 skrll Exp $	*/
 /*	$OpenBSD: cpu.h,v 1.55 2008/07/23 17:39:35 kettenis Exp $	*/
 /*
  * Copyright (c) 2000-2004 Michael Shalayeff
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
 @@ -218,29 +218,31 @@ struct clockframe {
 #define	cpu_signotify(l)	(setsoftast())
 #define	cpu_need_proftick(l)	((l)->l_pflag |= LP_OWEUPC, setsoftast())
 #include <sys/cpu_data.h>
 struct cpu_info {
 	struct cpu_data ci_data;	/* MI per-cpu data */
 	struct	lwp	*ci_curlwp;	/* CPU owner */
 	int		ci_cpuid;	/* CPU index (see cpus[] array) */
 	int		ci_mtx_count;
 	int		ci_mtx_oldspl;
 	int		ci_want_resched;
 };
-#include <machine/intr.h>
+	volatile int	ci_cpl;
 	volatile int	ci_ipending;	/* The pending interrupts. */
 	u_int		ci_intr_depth;	/* Nonzero iff running an interrupt. */
 };
 extern struct cpu_info cpu_info_store;
 /*
  * definitions of cpu-dependent requirements
  * referenced in generic code
  */
 #define	curcpu()			(&cpu_info_store)
 #define	cpu_number()			0
 #define	cpu_proc_fork(p1, p2)

 @@ -1,14 +1,15 @@
-/*	$NetBSD: intr.h,v 1.15 2009/05/08 09:33:58 skrll Exp $	*/
+/*	$NetBSD: intr.h,v 1.16 2010/03/31 12:56:14 skrll Exp $	*/
 /*	$OpenBSD: intr.h,v 1.26 2009/12/29 13:11:40 jsing Exp $	*/
 /*-
  * Copyright (c) 1998, 2001, 2002 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Charles M. Hannum, and by Jason R. Thorpe, and by Matthew Fredette.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
 @@ -46,50 +47,31 @@
 #define	NIPL		8
 /* Interrupt sharing types. */
 #define	IST_NONE	0	/* none */
 #define	IST_PULSE	1	/* pulsed */
 #define	IST_EDGE	2	/* edge-triggered */
 #define	IST_LEVEL	3	/* level-triggered */
 #ifndef _LOCORE
 /* The priority level masks. */
 extern int imask[NIPL];
 /* The current priority level. */
 extern volatile int cpl;
 /* The asynchronous system trap flag. */
 extern volatile int astpending;
-/* The softnet mask. */
+/* splraise()/spllower() are in locore.S */
-extern int softnetmask;
+int splraise(int);
 /*
  * Add a mask to cpl, and return the old value of cpl.
  */
 static __inline int
 splraise(register int ncpl)
 	register int ocpl = cpl;
 	cpl = ocpl | ncpl;
 	__insn_barrier();
 	return (ocpl);
 /* spllower() is in locore.S */
 void spllower(int);
 /*
  * Miscellaneous
  */
 #define	spl0()		spllower(0)
 #define	splx(x)		spllower(x)
 typedef int ipl_t;
 typedef struct {
 	ipl_t _ipl;
 } ipl_cookie_t;

 @@ -1,14 +1,14 @@
-/*	$NetBSD: machdep.h,v 1.12 2009/08/11 17:04:18 matt Exp $	*/
+/*	$NetBSD: machdep.h,v 1.13 2010/03/31 12:56:14 skrll Exp $	*/
 /*
  * Copyright (c) 2002 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Matthew Fredette.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
 @@ -66,27 +66,26 @@ extern int resvmem;
 extern u_int hppa_btlb_size_min;
 extern u_int hppa_btlb_size_max;
 /* FPU variables and functions. */
 extern int fpu_present;
 extern u_int fpu_version;
 extern u_int fpu_csw;
 extern paddr_t fpu_cur_uspace;
 void hppa_fpu_bootstrap(u_int);
 void hppa_fpu_flush(struct lwp *);
 void hppa_fpu_emulate(struct trapframe *, struct lwp *, u_int);
 /* Interrupt dispatching. */
 extern u_int hppa_intr_depth;
 void hppa_intr(struct trapframe *);
 /* Special pmap functions. */
 void pmap_redzone(vaddr_t, vaddr_t, int);
 /* Functions to write low memory and the kernel text. */
 void hppa_ktext_stw(vaddr_t, int);
 void hppa_ktext_stb(vaddr_t, char);
 /* Machine check handling. */
 extern u_int os_hpmc;
 extern u_int os_hpmc_cont;
 extern u_int os_hpmc_cont_end;

 @@ -1,14 +1,14 @@
-/*	$NetBSD: trap.c,v 1.84 2010/03/24 12:56:30 skrll Exp $	*/
+/*	$NetBSD: trap.c,v 1.85 2010/03/31 12:56:14 skrll Exp $	*/
 /*-
  * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Matthew Fredette.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
 @@ -48,27 +48,27 @@
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  * THE POSSIBILITY OF SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.84 2010/03/24 12:56:30 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.85 2010/03/31 12:56:14 skrll Exp $");
 /* #define INTRDEBUG */
 /* #define TRAPDEBUG */
 /* #define USERTRACE */
 #include "opt_kgdb.h"
 #include "opt_ptrace.h"
 #include "opt_sa.h"
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/kernel.h>
 #include <sys/syscall.h>
 @@ -483,27 +483,28 @@ trap(int type, struct trapframe *frame)
 	struct pcb *pcb;
 	vaddr_t va;
 	struct vm_map *map;
 	struct vmspace *vm;
 	vm_prot_t vftype;
 	pa_space_t space;
 	ksiginfo_t ksi;
 	u_int opcode, onfault;
 	int ret;
 	const char *tts = "reserved";
 	int trapnum;
 #ifdef DIAGNOSTIC
 	extern int emergency_stack_start, emergency_stack_end;
-	int oldcpl = cpl;
+	struct cpu_info *ci = curcpu();
 	int oldcpl = ci->ci_cpl;
 #endif
 	trapnum = type & ~T_USER;
 	opcode = frame->tf_iir;
 	if (trapnum <= T_EXCEPTION || trapnum == T_HIGHERPL ||
 	    trapnum == T_LOWERPL || trapnum == T_TAKENBR ||
 	    trapnum == T_IDEBUG || trapnum == T_PERFMON) {
 		va = frame->tf_iioq_head;
 		space = frame->tf_iisq_head;
 		vftype = VM_PROT_EXECUTE;
 	} else {
 		va = frame->tf_ior;
 @@ -857,27 +858,27 @@ do_onfault:
 		va = trunc_page(va);
 		if (map->pmap->pm_space != space) {
 #ifdef TRAPDEBUG
 			printf("trap: space mismatch %d != %d\n",
 			    space, map->pmap->pm_space);
 #endif
 			/* actually dump the user, crap the kernel */
 			goto dead_end;
+		}
 		/* Never call uvm_fault in interrupt context. */
-		KASSERT(hppa_intr_depth == 0);
+		KASSERT(curcpu()->ci_cpl == 0);
 		onfault = pcb->pcb_onfault;
 		pcb->pcb_onfault = 0;
 		ret = uvm_fault(map, va, vftype);
 		pcb->pcb_onfault = onfault;
 #ifdef TRAPDEBUG
 		printf("uvm_fault(%p, %x, %d)=%d\n",
 		    map, (u_int)va, vftype, ret);
 #endif
 		if (map != kernel_map)
 			l->l_pflag &= ~LP_SA_PAGEFAULT;
 @@ -947,29 +948,29 @@ do_onfault:
 	case T_POWERFAIL:
 	case T_LPMC:
 	case T_PAGEREF:
 	case T_DATAPID:  	case T_DATAPID  | T_USER:
 		if (0 /* T-chip */) {
 			break;
+		}
 		/* FALLTHROUGH to unimplemented */
 	default:
 		panic ("trap: unimplemented \'%s\' (%d)", tts, type);
+	}
 #ifdef DIAGNOSTIC
-	if (cpl != oldcpl)
+	if (ci->ci_cpl != oldcpl)
 		printf("WARNING: SPL (%d) NOT LOWERED ON TRAP (%d) EXIT\n",
-		    cpl, trapnum);
+		    ci->ci_cpl, trapnum);
 #endif
 	if (type & T_USER)
 		userret(l, l->l_md.md_regs->tf_iioq_head, 0);
 #ifdef DEBUG
 	frame_sanity_check(__func__, __LINE__, type, frame, l);
 	if (frame->tf_flags & TFF_LAST && (curlwp->l_flag & LW_IDLE) == 0)
 		frame_sanity_check(__func__, __LINE__, type,
 		    curlwp->l_md.md_regs, curlwp);
 #endif /* DEBUG */
+}
 @@ -1095,27 +1096,28 @@ process_sstep(struct lwp *l, int sstep)
  * - register args are copied onto stack too
  */
 void
 syscall(struct trapframe *frame, int *args)
+{
 	struct lwp *l;
 	struct proc *p;
 	const struct sysent *callp;
 	size_t nargs64;
 	int nsys, code, error;
 	int tmp;
 	int rval[2];
 #ifdef DIAGNOSTIC
-	int oldcpl = cpl;
+	struct cpu_info *ci = curcpu();
 	int oldcpl = ci->ci_cpl;
 #endif
 	uvmexp.syscalls++;
 #ifdef DEBUG
 	frame_sanity_check(__func__, __LINE__, 0, frame, curlwp);
 #endif /* DEBUG */
 	if (!USERMODE(frame->tf_iioq_head))
 		panic("syscall");
 	KASSERT(curlwp != NULL);
 	l = curlwp;
 @@ -1264,31 +1266,31 @@ out:
 	default:
 		if (p->p_emul->e_errno)
 			error = p->p_emul->e_errno[error];
 		frame->tf_t1 = error;
 		break;
+	}
 	if (__predict_false(p->p_trace_enabled))
 		trace_exit(code, rval, error);
 	userret(l, frame->tf_iioq_head, 0);
 #ifdef DIAGNOSTIC
-	if (cpl != oldcpl) {
+	if (ci->ci_cpl != oldcpl) {
 		printf("WARNING: SPL (0x%x) NOT LOWERED ON "
 		    "syscall(0x%x, 0x%x, 0x%x, 0x%x...) EXIT, PID %d\n",
-		    cpl, code, args[0], args[1], args[2], p->p_pid);
+		    ci->ci_cpl, code, args[0], args[1], args[2], p->p_pid);
-		cpl = oldcpl;
+		ci->ci_cpl = oldcpl;
+	}
 #endif
 #ifdef DEBUG
 	frame_sanity_check(__func__, __LINE__, 0, frame, l);
 #endif /* DEBUG */
+}
 /*
  * Start a new LWP
  */
 void
 startlwp(void *arg)