Wed Jul 7 01:17:27 2010 UTC ()
implement ucas_* for arm.


(chs)
diff -r1.24 -r1.25 src/sys/arch/acorn26/acorn26/except.c
diff -r1.28 -r1.29 src/sys/arch/arm/arm/arm_machdep.c
diff -r1.6 -r1.7 src/sys/arch/arm/arm/lock_cas.S
diff -r1.4 -r1.5 src/sys/arch/arm/arm32/atomic.S
diff -r1.76 -r1.77 src/sys/arch/arm/arm32/fault.c
diff -r1.59 -r1.60 src/sys/arch/arm/include/cpu.h

cvs diff -r1.24 -r1.25 src/sys/arch/acorn26/acorn26/Attic/except.c (expand / switch to unified diff)

--- src/sys/arch/acorn26/acorn26/Attic/except.c 2010/03/20 23:31:27 1.24
+++ src/sys/arch/acorn26/acorn26/Attic/except.c 2010/07/07 01:17:26 1.25
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: except.c,v 1.24 2010/03/20 23:31:27 chs Exp $ */ 1/* $NetBSD: except.c,v 1.25 2010/07/07 01:17:26 chs Exp $ */
2/*- 2/*-
3 * Copyright (c) 1998, 1999, 2000 Ben Harris 3 * Copyright (c) 1998, 1999, 2000 Ben Harris
4 * All rights reserved. 4 * All rights reserved.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions 7 * modification, are permitted provided that the following conditions
8 * are met: 8 * are met:
9 * 1. Redistributions of source code must retain the above copyright 9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer. 10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright 11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the 12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution. 13 * documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products 14 * 3. The name of the author may not be used to endorse or promote products
@@ -21,27 +21,27 @@ @@ -21,27 +21,27 @@
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */ 27 */
28/* 28/*
29 * except.c -- ARM exception handling. 29 * except.c -- ARM exception handling.
30 */ 30 */
31 31
32#include <sys/param.h> 32#include <sys/param.h>
33 33
34__KERNEL_RCSID(0, "$NetBSD: except.c,v 1.24 2010/03/20 23:31:27 chs Exp $"); 34__KERNEL_RCSID(0, "$NetBSD: except.c,v 1.25 2010/07/07 01:17:26 chs Exp $");
35 35
36#include "opt_ddb.h" 36#include "opt_ddb.h"
37 37
38#include <sys/errno.h> 38#include <sys/errno.h>
39#include <sys/kauth.h> 39#include <sys/kauth.h>
40#include <sys/kernel.h> 40#include <sys/kernel.h>
41#include <sys/syslog.h> 41#include <sys/syslog.h>
42#include <sys/systm.h> 42#include <sys/systm.h>
43#include <sys/cpu.h> 43#include <sys/cpu.h>
44 44
45#include <uvm/uvm_extern.h> 45#include <uvm/uvm_extern.h>
46 46
47#include <arm/armreg.h> 47#include <arm/armreg.h>
@@ -192,84 +192,88 @@ data_abort_handler(struct trapframe *tf) @@ -192,84 +192,88 @@ data_abort_handler(struct trapframe *tf)
192 userret(l); 192 userret(l);
193} 193}
194 194
195/* 195/*
196 * General page fault handler. 196 * General page fault handler.
197 */ 197 */
198void 198void
199do_fault(struct trapframe *tf, struct lwp *l, 199do_fault(struct trapframe *tf, struct lwp *l,
200 struct vm_map *map, vaddr_t va, vm_prot_t atype) 200 struct vm_map *map, vaddr_t va, vm_prot_t atype)
201{ 201{
202 int error; 202 int error;
203 struct pcb *pcb; 203 struct pcb *pcb;
204 void *onfault; 204 void *onfault;
 205 bool user;
205 206
206 if (pmap_fault(map->pmap, va, atype)) 207 if (pmap_fault(map->pmap, va, atype))
207 return; 208 return;
208 209
209 pcb = lwp_getpcb(l); 210 pcb = lwp_getpcb(l);
210 onfault = pcb->pcb_onfault; 211 onfault = pcb->pcb_onfault;
 212 user = (tf->tf_r15 & R15_MODE) == R15_MODE_USR;
211 213
212 if (cpu_intr_p()) { 214 if (cpu_intr_p()) {
213 KASSERT((tf->tf_r15 & R15_MODE) != R15_MODE_USR); 215 KASSERT(!user);
214 error = EFAULT; 216 error = EFAULT;
215 } else { 217 } else {
216 pcb->pcb_onfault = NULL; 218 pcb->pcb_onfault = NULL;
217 error = uvm_fault(map, va, atype); 219 error = uvm_fault(map, va, atype);
218 pcb->pcb_onfault = onfault; 220 pcb->pcb_onfault = onfault;
219 } 221 }
220 222
221 if (error != 0) { 223 if (error != 0) {
222 ksiginfo_t ksi; 224 ksiginfo_t ksi;
223 225
224 if (onfault != NULL) { 226 if (onfault != NULL) {
225 tf->tf_r0 = error; 227 tf->tf_r0 = error;
226 tf->tf_r15 = (tf->tf_r15 & ~R15_PC) | 228 tf->tf_r15 = (tf->tf_r15 & ~R15_PC) |
227 (register_t)onfault; 229 (register_t)onfault;
228 return; 230 return;
229 } 231 }
230#ifdef DDB 232#ifdef DDB
231 if (db_validating) { 233 if (db_validating) {
232 db_faulted = true; 234 db_faulted = true;
233 tf->tf_r15 += INSN_SIZE; 235 tf->tf_r15 += INSN_SIZE;
234 return; 236 return;
235 } 237 }
236#endif 238#endif
237 if ((tf->tf_r15 & R15_MODE) != R15_MODE_USR) { 239 if (!user) {
238#ifdef DDB 240#ifdef DDB
239 db_printf("Unhandled data abort in kernel mode\n"); 241 db_printf("Unhandled data abort in kernel mode\n");
240 kdb_trap(T_FAULT, tf); 242 kdb_trap(T_FAULT, tf);
241#else 243#else
242#ifdef DEBUG 244#ifdef DEBUG
243 printf("Unhandled data abort:\n"); 245 printf("Unhandled data abort:\n");
244 printregs(tf); 246 printregs(tf);
245#endif 247#endif
246 panic("unhandled data abort in kernel mode"); 248 panic("unhandled data abort in kernel mode");
247#endif 249#endif
248 } 250 }
249 251
250 KSI_INIT_TRAP(&ksi); 252 KSI_INIT_TRAP(&ksi);
251 253
252 if (error == ENOMEM) { 254 if (error == ENOMEM) {
253 printf("UVM: pid %d (%s), uid %d killed: " 255 printf("UVM: pid %d (%s), uid %d killed: "
254 "out of swap\n", 256 "out of swap\n",
255 l->l_proc->p_pid, l->l_proc->p_comm, 257 l->l_proc->p_pid, l->l_proc->p_comm,
256 l->l_cred ? kauth_cred_geteuid(l->l_cred) : -1); 258 l->l_cred ? kauth_cred_geteuid(l->l_cred) : -1);
257 ksi.ksi_signo = SIGKILL; 259 ksi.ksi_signo = SIGKILL;
258 } else 260 } else
259 ksi.ksi_signo = SIGSEGV; 261 ksi.ksi_signo = SIGSEGV;
260 ksi.ksi_code = (error == EPERM) ? SEGV_ACCERR : SEGV_MAPERR; 262 ksi.ksi_code = (error == EPERM) ? SEGV_ACCERR : SEGV_MAPERR;
261 ksi.ksi_addr = (void *) va; 263 ksi.ksi_addr = (void *) va;
262 trapsignal(l, &ksi); 264 trapsignal(l, &ksi);
 265 } else if (!user) {
 266 ucas_ras_check(tf);
263 } 267 }
264} 268}
265 269
266/* 270/*
267 * In order for the following macro to work, any function using it 271 * In order for the following macro to work, any function using it
268 * must ensure that tf->r15 is copied into getreg(15). This is safe 272 * must ensure that tf->r15 is copied into getreg(15). This is safe
269 * with the current trapframe layout on arm26, but be careful. 273 * with the current trapframe layout on arm26, but be careful.
270 */ 274 */
271#define getreg(r) (((register_t *)&tf->tf_r0)[r]) 275#define getreg(r) (((register_t *)&tf->tf_r0)[r])
272 276
273/* 277/*
274 * Undo any effects of the aborted instruction that need to be undone 278 * Undo any effects of the aborted instruction that need to be undone
275 * in order for us to restart it. This is just a case of spotting 279 * in order for us to restart it. This is just a case of spotting

cvs diff -r1.28 -r1.29 src/sys/arch/arm/arm/arm_machdep.c (expand / switch to unified diff)

--- src/sys/arch/arm/arm/arm_machdep.c 2010/04/23 19:18:09 1.28
+++ src/sys/arch/arm/arm/arm_machdep.c 2010/07/07 01:17:26 1.29
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: arm_machdep.c,v 1.28 2010/04/23 19:18:09 rmind Exp $ */ 1/* $NetBSD: arm_machdep.c,v 1.29 2010/07/07 01:17:26 chs Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 2001 Wasabi Systems, Inc. 4 * Copyright (c) 2001 Wasabi Systems, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 7 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8 * 8 *
9 * Redistribution and use in source and binary forms, with or without 9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions 10 * modification, are permitted provided that the following conditions
11 * are met: 11 * are met:
12 * 1. Redistributions of source code must retain the above copyright 12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer. 13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright 14 * 2. Redistributions in binary form must reproduce the above copyright
@@ -69,27 +69,27 @@ @@ -69,27 +69,27 @@
69 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 69 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
70 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 70 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
71 * SUCH DAMAGE. 71 * SUCH DAMAGE.
72 */ 72 */
73 73
74#include "opt_execfmt.h" 74#include "opt_execfmt.h"
75#include "opt_cpuoptions.h" 75#include "opt_cpuoptions.h"
76#include "opt_cputypes.h" 76#include "opt_cputypes.h"
77#include "opt_arm_debug.h" 77#include "opt_arm_debug.h"
78#include "opt_sa.h" 78#include "opt_sa.h"
79 79
80#include <sys/param.h> 80#include <sys/param.h>
81 81
82__KERNEL_RCSID(0, "$NetBSD: arm_machdep.c,v 1.28 2010/04/23 19:18:09 rmind Exp $"); 82__KERNEL_RCSID(0, "$NetBSD: arm_machdep.c,v 1.29 2010/07/07 01:17:26 chs Exp $");
83 83
84#include <sys/exec.h> 84#include <sys/exec.h>
85#include <sys/proc.h> 85#include <sys/proc.h>
86#include <sys/systm.h> 86#include <sys/systm.h>
87#include <sys/kmem.h> 87#include <sys/kmem.h>
88#include <sys/ucontext.h> 88#include <sys/ucontext.h>
89#include <sys/evcnt.h> 89#include <sys/evcnt.h>
90#include <sys/cpu.h> 90#include <sys/cpu.h>
91#include <sys/savar.h> 91#include <sys/savar.h>
92 92
93#ifdef EXEC_AOUT 93#ifdef EXEC_AOUT
94#include <sys/exec_aout.h> 94#include <sys/exec_aout.h>
95#endif 95#endif
@@ -267,13 +267,25 @@ cpu_need_resched(struct cpu_info *ci, in @@ -267,13 +267,25 @@ cpu_need_resched(struct cpu_info *ci, in
267 if (ci->ci_want_resched && !immed) 267 if (ci->ci_want_resched && !immed)
268 return; 268 return;
269 269
270 ci->ci_want_resched = 1; 270 ci->ci_want_resched = 1;
271 if (curlwp != ci->ci_data.cpu_idlelwp) 271 if (curlwp != ci->ci_data.cpu_idlelwp)
272 setsoftast(); 272 setsoftast();
273} 273}
274 274
275bool 275bool
276cpu_intr_p(void) 276cpu_intr_p(void)
277{ 277{
278 return curcpu()->ci_intr_depth != 0; 278 return curcpu()->ci_intr_depth != 0;
279} 279}
 280
 281void
 282ucas_ras_check(trapframe_t *tf)
 283{
 284 extern char ucas_32_ras_start[];
 285 extern char ucas_32_ras_end[];
 286
 287 if (tf->tf_pc > (vaddr_t)ucas_32_ras_start &&
 288 tf->tf_pc < (vaddr_t)ucas_32_ras_end) {
 289 tf->tf_pc = (vaddr_t)ucas_32_ras_start;
 290 }
 291}

cvs diff -r1.6 -r1.7 src/sys/arch/arm/arm/lock_cas.S (expand / switch to unified diff)

--- src/sys/arch/arm/arm/lock_cas.S 2009/01/16 10:28:24 1.6
+++ src/sys/arch/arm/arm/lock_cas.S 2010/07/07 01:17:26 1.7
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: lock_cas.S,v 1.6 2009/01/16 10:28:24 bjh21 Exp $ */ 1/* $NetBSD: lock_cas.S,v 1.7 2010/07/07 01:17:26 chs Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2007 The NetBSD Foundation, Inc. 4 * Copyright (c) 2007 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe. 8 * by Jason R. Thorpe.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -19,29 +19,36 @@ @@ -19,29 +19,36 @@
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE. 29 * POSSIBILITY OF SUCH DAMAGE.
30 */ 30 */
31 31
 32#include "opt_multiprocessor.h"
 33#if defined(MULTIPROCESSOR)
 34#error need to write MP support for ucas_* functions
 35#endif
 36
32#include "opt_arm_debug.h" 37#include "opt_arm_debug.h"
33 38
 39#include "assym.h"
34#include <machine/asm.h> 40#include <machine/asm.h>
 41#include <machine/cpu.h>
35 42
36 .text 43 .text
37 .align 0 44 .align 0
38 45
39#if defined(ARM_LOCK_CAS_DEBUG) 46#if defined(ARM_LOCK_CAS_DEBUG)
40.L_lock_cas_success: 47.L_lock_cas_success:
41 .word _C_LABEL(_lock_cas_success) 48 .word _C_LABEL(_lock_cas_success)
42.L_lock_cas_fail: 49.L_lock_cas_fail:
43 .word _C_LABEL(_lock_cas_fail) 50 .word _C_LABEL(_lock_cas_fail)
44#endif /* ARM_LOCK_CAS_DEBUG */ 51#endif /* ARM_LOCK_CAS_DEBUG */
45 52
46/* 53/*
47 * _lock_cas: 54 * _lock_cas:
@@ -57,54 +64,94 @@ @@ -57,54 +64,94 @@
57 * r1 Old value to compare. 64 * r1 Old value to compare.
58 * r2 New value. 65 * r2 New value.
59 */ 66 */
60 .globl _C_LABEL(_lock_cas_end) 67 .globl _C_LABEL(_lock_cas_end)
61ENTRY_NP(_lock_cas) 68ENTRY_NP(_lock_cas)
62#ifdef _ARCH_ARM_6 69#ifdef _ARCH_ARM_6
63 mov ip, r0 70 mov ip, r0
641: ldrex r0, [ip] /* eventual return value */ 711: ldrex r0, [ip] /* eventual return value */
65 cmp r1, r0 72 cmp r1, r0
66 RETc(ne) 73 RETc(ne)
67 strex r3, r2, [ip] 74 strex r3, r2, [ip]
68 cmp r3, #0 75 cmp r3, #0
69 bne 1b 76 bne 1b
70 RET 
71 END(_lock_cas) 
72#else 77#else
73 ldr r3, [r0] 78 ldr r3, [r0]
74 teq r3, r1 79 teq r3, r1
75 streq r2, [r0] 80 streq r2, [r0]
76_C_LABEL(_lock_cas_end): 81_C_LABEL(_lock_cas_end):
77 mov r0, r3 82 mov r0, r3
78#if defined(ARM_LOCK_CAS_DEBUG) 83#if defined(ARM_LOCK_CAS_DEBUG)
79 ldreq r3, .L_lock_cas_success 84 ldreq r3, .L_lock_cas_success
80 ldrne r3, .L_lock_cas_fail 85 ldrne r3, .L_lock_cas_fail
81 ldmia r3, {r1-r2} /* load ev_count */ 86 ldmia r3, {r1-r2} /* load ev_count */
82#if defined(__ARMEB__) 87#if defined(__ARMEB__)
83 adds r2, r2, #1 /* 64-bit incr (lo) */ 88 adds r2, r2, #1 /* 64-bit incr (lo) */
84 adc r1, r1, #0 /* 64-bit incr (hi) */ 89 adc r1, r1, #0 /* 64-bit incr (hi) */
85#else 90#else
86 adds r1, r1, #1 /* 64-bit incr (lo) */ 91 adds r1, r1, #1 /* 64-bit incr (lo) */
87 adc r2, r2, #0 /* 64-bit incr (hi) */ 92 adc r2, r2, #0 /* 64-bit incr (hi) */
88#endif /* __ARMEB__ */ 93#endif /* __ARMEB__ */
89 stmia r3, {r1-r2} /* store ev_count */ 94 stmia r3, {r1-r2} /* store ev_count */
90#endif /* ARM_LOCK_CAS_DEBUG */ 95#endif /* ARM_LOCK_CAS_DEBUG */
91 RET 
92#endif 96#endif
 97 RET
 98END(_lock_cas)
93 99
94STRONG_ALIAS(_atomic_cas_ulong,_lock_cas) 100STRONG_ALIAS(_atomic_cas_ulong,_lock_cas)
95STRONG_ALIAS(atomic_cas_ulong,_lock_cas) 101STRONG_ALIAS(atomic_cas_ulong,_lock_cas)
96STRONG_ALIAS(_atomic_cas_32,_lock_cas) 102STRONG_ALIAS(_atomic_cas_32,_lock_cas)
97STRONG_ALIAS(atomic_cas_32,_lock_cas) 103STRONG_ALIAS(atomic_cas_32,_lock_cas)
98STRONG_ALIAS(_atomic_cas_uint,_lock_cas) 104STRONG_ALIAS(_atomic_cas_uint,_lock_cas)
99STRONG_ALIAS(atomic_cas_uint,_lock_cas) 105STRONG_ALIAS(atomic_cas_uint,_lock_cas)
100STRONG_ALIAS(_atomic_cas_ptr,_lock_cas) 106STRONG_ALIAS(_atomic_cas_ptr,_lock_cas)
101STRONG_ALIAS(atomic_cas_ptr,_lock_cas) 107STRONG_ALIAS(atomic_cas_ptr,_lock_cas)
102 108
103STRONG_ALIAS(_atomic_cas_ulong_ni,_lock_cas) 109STRONG_ALIAS(_atomic_cas_ulong_ni,_lock_cas)
104STRONG_ALIAS(atomic_cas_ulong_ni,_lock_cas) 110STRONG_ALIAS(atomic_cas_ulong_ni,_lock_cas)
105STRONG_ALIAS(_atomic_cas_32_ni,_lock_cas) 111STRONG_ALIAS(_atomic_cas_32_ni,_lock_cas)
106STRONG_ALIAS(atomic_cas_32_ni,_lock_cas) 112STRONG_ALIAS(atomic_cas_32_ni,_lock_cas)
107STRONG_ALIAS(_atomic_cas_uint_ni,_lock_cas) 113STRONG_ALIAS(_atomic_cas_uint_ni,_lock_cas)
108STRONG_ALIAS(atomic_cas_uint_ni,_lock_cas) 114STRONG_ALIAS(atomic_cas_uint_ni,_lock_cas)
109STRONG_ALIAS(_atomic_cas_ptr_ni,_lock_cas) 115STRONG_ALIAS(_atomic_cas_ptr_ni,_lock_cas)
110STRONG_ALIAS(atomic_cas_ptr_ni,_lock_cas) 116STRONG_ALIAS(atomic_cas_ptr_ni,_lock_cas)
 117
 118#ifdef __PROG32
 119#define SAVE_REGS stmfd sp!, {r4-r6}
 120#define RESTORE_REGS ldmfd sp!, {r4-r6}
 121#else
 122/* Need to save R14_svc because it'll get trampled if we take a page fault. */
 123#define SAVE_REGS stmfd sp!, {r4-r6, r14}
 124#define RESTORE_REGS ldmfd sp!, {r4-r6, r14}
 125#endif
 126
 127/*
 128 * int ucas_32(volatile int32_t *uptr, int32_t old, int32_t new, int32_t *ret);
 129 */
 130ENTRY(ucas_32)
 131 SAVE_REGS
 132 GET_CURPCB(r4)
 133 adr r5, .Lucasfault
 134 str r5, [r4, #PCB_ONFAULT]
 135
 136 .globl _C_LABEL(ucas_32_ras_start)
 137_C_LABEL(ucas_32_ras_start):
 138 ldrt r5, [r0]
 139 cmp r1, r5
 140 streqt r2, [r0]
 141 .globl _C_LABEL(ucas_32_ras_end)
 142_C_LABEL(ucas_32_ras_end):
 143
 144 str r5, [r3]
 145 mov r0, #0
 146 str r0, [r4, #PCB_ONFAULT]
 147 RESTORE_REGS
 148 RET
 149
 150.Lucasfault:
 151 mov r5, #0
 152 str r5, [r4, #PCB_ONFAULT]
 153 RESTORE_REGS
 154 RET
 155END(ucas_32)
 156STRONG_ALIAS(ucas_int,ucas_32)
 157STRONG_ALIAS(ucas_ptr,ucas_32)

cvs diff -r1.4 -r1.5 src/sys/arch/arm/arm32/Attic/atomic.S (expand / switch to unified diff)

--- src/sys/arch/arm/arm32/Attic/atomic.S 2008/11/19 06:32:10 1.4
+++ src/sys/arch/arm/arm32/Attic/atomic.S 2010/07/07 01:17:27 1.5
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: atomic.S,v 1.4 2008/11/19 06:32:10 matt Exp $ */ 1/* $NetBSD: atomic.S,v 1.5 2010/07/07 01:17:27 chs Exp $ */
2 2
3/* 3/*
4 * Copyright (C) 1994-1997 Mark Brinicombe 4 * Copyright (C) 1994-1997 Mark Brinicombe
5 * Copyright (C) 1994 Brini 5 * Copyright (C) 1994 Brini
6 * All rights reserved. 6 * All rights reserved.
7 * 7 *
8 * Redistribution and use in source and binary forms, with or without 8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions 9 * modification, are permitted provided that the following conditions
10 * are met: 10 * are met:
11 * 1. Redistributions of source code must retain the above copyright 11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer. 12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright 13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the 14 * notice, this list of conditions and the following disclaimer in the
@@ -43,73 +43,74 @@ @@ -43,73 +43,74 @@
43 43
44#undef atomic_set_bit 44#undef atomic_set_bit
45ENTRY(atomic_set_bit) 45ENTRY(atomic_set_bit)
46 mrs r2, cpsr 46 mrs r2, cpsr
47 orr r3, r2, #(IF32_bits) 47 orr r3, r2, #(IF32_bits)
48 msr cpsr_c, r3 48 msr cpsr_c, r3
49 49
50 ldr r3, [r0] 50 ldr r3, [r0]
51 orr r3, r3, r1 51 orr r3, r3, r1
52 str r3, [r0] 52 str r3, [r0]
53 53
54 msr cpsr_c, r2 54 msr cpsr_c, r2
55 mov pc, lr 55 mov pc, lr
56 56END(atomic_set_bit)
57 57
58#undef atomic_clear_bit 58#undef atomic_clear_bit
59ENTRY(atomic_clear_bit) 59ENTRY(atomic_clear_bit)
60 mrs r2, cpsr 60 mrs r2, cpsr
61 orr r3, r2, #(IF32_bits) 61 orr r3, r2, #(IF32_bits)
62 msr cpsr_c, r3 62 msr cpsr_c, r3
63 63
64 ldr r3, [r0] 64 ldr r3, [r0]
65 bic r3, r3, r1 65 bic r3, r3, r1
66 str r3, [r0] 66 str r3, [r0]
67 67
68 msr cpsr_c, r2 68 msr cpsr_c, r2
69 mov pc, lr 69 mov pc, lr
 70END(atomic_clear_bit)
70 71
71#endif /* ATOMIC_SET_BIT_NONINLINE_REQUIRED */ 72#endif /* ATOMIC_SET_BIT_NONINLINE_REQUIRED */
72 73
73#if 0 && defined(_ARM_ARCH_6) 74#if 0 && defined(_ARM_ARCH_6)
74 75
75#define ATOMIC_OP(NAME, OP, ARG) \ 76#define ATOMIC_OP(NAME, OP, ARG) \
76ENTRY_NP(atomic_##NAME##_32) ;\ 77ENTRY_NP(atomic_##NAME##_32) ;\
77 mov ip, r0 ;\ 78 mov ip, r0 ;\
781: ldrex r0, [ip] ;\ 791: ldrex r0, [ip] ;\
79 OP r2, r0, ARG ;\ 80 OP r2, r0, ARG ;\
80 strex r3, r2, [ip] ;\ 81 strex r3, r2, [ip] ;\
81 cmp r3, #0 ;\ 82 cmp r3, #0 ;\
82 bne 1b ;\ 83 bne 1b ;\
83 RET ;\ 84 RET ;\
84 END(atomic_##NAME##_32) 85END(atomic_##NAME##_32)
85 86
86ATOMIC_OP(and, and, r1) 87ATOMIC_OP(and, and, r1)
87ATOMIC_OP(nand, bic, r1) 88ATOMIC_OP(nand, bic, r1)
88ATOMIC_OP(or, orr, r1) 89ATOMIC_OP(or, orr, r1)
89ATOMIC_OP(xor, eor, r1) 90ATOMIC_OP(xor, eor, r1)
90ATOMIC_OP(add, add, r1) 91ATOMIC_OP(add, add, r1)
91ATOMIC_OP(inc, add, #1) 92ATOMIC_OP(inc, add, #1)
92ATOMIC_OP(sub, sub, r1) 93ATOMIC_OP(sub, sub, r1)
93ATOMIC_OP(dec, sub, #1) 94ATOMIC_OP(dec, sub, #1)
94 95
95#define ATOMIC_OP_NV(NAME, OP, ARG) \ 96#define ATOMIC_OP_NV(NAME, OP, ARG) \
96ENTRY_NP(atomic_##NAME##_32_nv) ;\ 97ENTRY_NP(atomic_##NAME##_32_nv) ;\
97 mov ip, r0 ;\ 98 mov ip, r0 ;\
981: ldrex r0, [ip] ;\ 991: ldrex r0, [ip] ;\
99 OP r0, r0, ARG ;\ 100 OP r0, r0, ARG ;\
100 strex r3, r0, [ip] ;\ 101 strex r3, r0, [ip] ;\
101 cmp r3, #0 ;\ 102 cmp r3, #0 ;\
102 bne 1b ;\ 103 bne 1b ;\
103 RET ;\ 104 RET ;\
104 END(atomic_##NAME##_32_nv) 105END(atomic_##NAME##_32_nv)
105 106
106ATOMIC_OP_NV(and, and, r1) 107ATOMIC_OP_NV(and, and, r1)
107ATOMIC_OP_NV(nand, bic, r1) 108ATOMIC_OP_NV(nand, bic, r1)
108ATOMIC_OP_NV(or, orr, r1) 109ATOMIC_OP_NV(or, orr, r1)
109ATOMIC_OP_NV(xor, eor, r1) 110ATOMIC_OP_NV(xor, eor, r1)
110ATOMIC_OP_NV(add, add, r1) 111ATOMIC_OP_NV(add, add, r1)
111ATOMIC_OP_NV(inc, add, #1) 112ATOMIC_OP_NV(inc, add, #1)
112ATOMIC_OP_NV(sub, sub, r1) 113ATOMIC_OP_NV(sub, sub, r1)
113ATOMIC_OP_NV(dec, sub, #1) 114ATOMIC_OP_NV(dec, sub, #1)
114 115
115#endif /* _ARM_ARCH_6 */ 116#endif /* _ARM_ARCH_6 */

cvs diff -r1.76 -r1.77 src/sys/arch/arm/arm32/fault.c (expand / switch to unified diff)

--- src/sys/arch/arm/arm32/fault.c 2010/03/21 00:10:14 1.76
+++ src/sys/arch/arm/arm32/fault.c 2010/07/07 01:17:27 1.77
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: fault.c,v 1.76 2010/03/21 00:10:14 chs Exp $ */ 1/* $NetBSD: fault.c,v 1.77 2010/07/07 01:17:27 chs Exp $ */
2 2
3/* 3/*
4 * Copyright 2003 Wasabi Systems, Inc. 4 * Copyright 2003 Wasabi Systems, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Written by Steve C. Woodford for Wasabi Systems, Inc. 7 * Written by Steve C. Woodford for Wasabi Systems, Inc.
8 * 8 *
9 * Redistribution and use in source and binary forms, with or without 9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions 10 * modification, are permitted provided that the following conditions
11 * are met: 11 * are met:
12 * 1. Redistributions of source code must retain the above copyright 12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer. 13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright 14 * 2. Redistributions in binary form must reproduce the above copyright
@@ -72,27 +72,27 @@ @@ -72,27 +72,27 @@
72 * 72 *
73 * fault.c 73 * fault.c
74 * 74 *
75 * Fault handlers 75 * Fault handlers
76 * 76 *
77 * Created : 28/11/94 77 * Created : 28/11/94
78 */ 78 */
79 79
80#include "opt_ddb.h" 80#include "opt_ddb.h"
81#include "opt_kgdb.h" 81#include "opt_kgdb.h"
82#include "opt_sa.h" 82#include "opt_sa.h"
83 83
84#include <sys/types.h> 84#include <sys/types.h>
85__KERNEL_RCSID(0, "$NetBSD: fault.c,v 1.76 2010/03/21 00:10:14 chs Exp $"); 85__KERNEL_RCSID(0, "$NetBSD: fault.c,v 1.77 2010/07/07 01:17:27 chs Exp $");
86 86
87#include <sys/param.h> 87#include <sys/param.h>
88#include <sys/systm.h> 88#include <sys/systm.h>
89#include <sys/proc.h> 89#include <sys/proc.h>
90#include <sys/kernel.h> 90#include <sys/kernel.h>
91#include <sys/kauth.h> 91#include <sys/kauth.h>
92 92
93#include <sys/savar.h> 93#include <sys/savar.h>
94#include <sys/cpu.h> 94#include <sys/cpu.h>
95 95
96#include <uvm/uvm_extern.h> 96#include <uvm/uvm_extern.h>
97#include <uvm/uvm_stat.h> 97#include <uvm/uvm_stat.h>
98#ifdef UVMHIST 98#ifdef UVMHIST
@@ -470,26 +470,28 @@ data_abort_handler(trapframe_t *tf) @@ -470,26 +470,28 @@ data_abort_handler(trapframe_t *tf)
470 onfault = pcb->pcb_onfault; 470 onfault = pcb->pcb_onfault;
471 pcb->pcb_onfault = NULL; 471 pcb->pcb_onfault = NULL;
472 error = uvm_fault(map, va, ftype); 472 error = uvm_fault(map, va, ftype);
473 pcb->pcb_onfault = onfault; 473 pcb->pcb_onfault = onfault;
474 474
475#ifdef KERN_SA 475#ifdef KERN_SA
476 if (map != kernel_map) 476 if (map != kernel_map)
477 l->l_pflag &= ~LP_SA_PAGEFAULT; 477 l->l_pflag &= ~LP_SA_PAGEFAULT;
478#endif 478#endif
479 479
480 if (__predict_true(error == 0)) { 480 if (__predict_true(error == 0)) {
481 if (user) 481 if (user)
482 uvm_grow(l->l_proc, va); /* Record any stack growth */ 482 uvm_grow(l->l_proc, va); /* Record any stack growth */
 483 else
 484 ucas_ras_check(tf);
483 UVMHIST_LOG(maphist, " <- uvm", 0, 0, 0, 0); 485 UVMHIST_LOG(maphist, " <- uvm", 0, 0, 0, 0);
484 goto out; 486 goto out;
485 } 487 }
486 488
487 if (user == 0) { 489 if (user == 0) {
488 if (pcb->pcb_onfault) { 490 if (pcb->pcb_onfault) {
489 tf->tf_r0 = error; 491 tf->tf_r0 = error;
490 tf->tf_pc = (register_t)(intptr_t) pcb->pcb_onfault; 492 tf->tf_pc = (register_t)(intptr_t) pcb->pcb_onfault;
491 return; 493 return;
492 } 494 }
493 495
494 printf("\nuvm_fault(%p, %lx, %x) -> %x\n", map, va, ftype, 496 printf("\nuvm_fault(%p, %lx, %x) -> %x\n", map, va, ftype,
495 error); 497 error);

cvs diff -r1.59 -r1.60 src/sys/arch/arm/include/cpu.h (expand / switch to unified diff)

--- src/sys/arch/arm/include/cpu.h 2009/12/10 05:10:01 1.59
+++ src/sys/arch/arm/include/cpu.h 2010/07/07 01:17:27 1.60
@@ -374,27 +374,30 @@ void cpu_attach(struct device *); @@ -374,27 +374,30 @@ void cpu_attach(struct device *);
374struct lwp; 374struct lwp;
375 375
376/* locore.S */ 376/* locore.S */
377void atomic_set_bit(u_int *, u_int); 377void atomic_set_bit(u_int *, u_int);
378void atomic_clear_bit(u_int *, u_int); 378void atomic_clear_bit(u_int *, u_int);
379 379
380/* cpuswitch.S */ 380/* cpuswitch.S */
381struct pcb; 381struct pcb;
382void savectx(struct pcb *); 382void savectx(struct pcb *);
383 383
384/* ast.c */ 384/* ast.c */
385void userret(register struct lwp *); 385void userret(register struct lwp *);
386 386
387/* machdep.h */ 387/* *_machdep.c */
388void bootsync(void); 388void bootsync(void);
389 389
390/* fault.c */ 390/* fault.c */
391int badaddr_read(void *, size_t, void *); 391int badaddr_read(void *, size_t, void *);
392 392
393/* syscall.c */ 393/* syscall.c */
394void swi_handler(trapframe_t *); 394void swi_handler(trapframe_t *);
395 395
 396/* arm_machdep.c */
 397void ucas_ras_check(trapframe_t *);
 398
396#endif /* !_LOCORE */ 399#endif /* !_LOCORE */
397 400
398#endif /* _KERNEL */ 401#endif /* _KERNEL */
399 402
400#endif /* !_ARM_CPU_H_ */ 403#endif /* !_ARM_CPU_H_ */