 @@ -1,14 +1,14 @@
-/* $NetBSD: pxa2x0_lcd.c,v 1.29 2010/08/08 09:33:35 kiyohara Exp $ */
+/* $NetBSD: pxa2x0_lcd.c,v 1.30 2010/08/08 11:24:52 tsutsui Exp $ */
 /*
  * Copyright (c) 2002  Genetec Corporation.  All rights reserved.
  * Written by Hiroyuki Bessho for Genetec Corporation.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
 @@ -28,27 +28,27 @@
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 /*
  * Support PXA2[15]0's integrated LCD controller.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pxa2x0_lcd.c,v 1.29 2010/08/08 09:33:35 kiyohara Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pxa2x0_lcd.c,v 1.30 2010/08/08 11:24:52 tsutsui Exp $");
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/conf.h>
 #include <sys/uio.h>
 #include <sys/malloc.h>
 #include <sys/kernel.h>			/* for cold */
 #include <uvm/uvm_extern.h>
 #include <dev/cons.h>
 #include <dev/wscons/wsconsio.h>
 #include <dev/wscons/wsdisplayvar.h>
 @@ -68,26 +68,32 @@ __KERNEL_RCSID(0, "$NetBSD: pxa2x0_lcd.c
 #include "wsdisplay.h"
 /*
  * Console variables. These are necessary since console is setup very early,
  * before devices get attached.
  */
 struct {
 	int				is_console;
 	struct pxa2x0_wsscreen_descr	*descr;
 	const struct lcd_panel_geometry *geom;
 } pxa2x0_lcd_console;
 #ifdef PXA2X0_LCD_WRITETHROUGH
 int pxa2x0_lcd_writethrough = 1;	/* patchable */
 #else
 int pxa2x0_lcd_writethrough = 0;
 #endif
 int		lcdintr(void *);
 static void	pxa2x0_lcd_initialize(struct pxa2x0_lcd_softc *,
 		    const struct lcd_panel_geometry *);
 #if NWSDISPLAY > 0
 static void	pxa2x0_lcd_setup_rasops(struct pxa2x0_lcd_softc *,
 		    struct rasops_info *, struct pxa2x0_wsscreen_descr *,
 		    const struct lcd_panel_geometry *);
 #endif
 void
 pxa2x0_lcd_geometry(struct pxa2x0_lcd_softc *sc,
     const struct lcd_panel_geometry *info)
 @@ -323,26 +329,29 @@ lcdintr(void *arg)
  */
 void
 pxa2x0_lcd_start_dma(struct pxa2x0_lcd_softc *sc,
     struct pxa2x0_lcd_screen *scr)
+{
 	bus_space_tag_t iot;
 	bus_space_handle_t ioh;
 	uint32_t tmp;
 	int val, save;
 	iot = sc->iot;
 	ioh = sc->ioh;
 	bus_dmamap_sync(sc->dma_tag, scr->dma, 0, scr->buf_size,
 	    BUS_DMASYNC_PREWRITE);
 	save = disable_interrupts(I32_bit);
 	switch (scr->depth) {
 	case 1: val = 0; break;
 	case 2: val = 1; break;
 	case 4: val = 2; break;
 	case 8: val = 3; break;
 	case 16: val = 4; break;
 	case 18: val = 5; break;
 	case 24: val = 33; break;
 	default:
 		val = 4; break;
+	}
 @@ -526,30 +535,51 @@ pxa2x0_lcd_new_screen(struct pxa2x0_lcd_
 	if (error || scr->nsegs != 1) {
 		/* XXX:
 		 * Actually we can handle nsegs>1 case by means
 		 * of multiple DMA descriptors for a panel.  It
 		 * will make code here a bit hairly.
 		 */
 		if (error == 0)
 			error = E2BIG;
 		goto bad;
+	}
 	error = bus_dmamem_map(dma_tag, scr->segs, scr->nsegs, size,
-	    (void **)&scr->buf_va, busdma_flag | BUS_DMA_COHERENT);
+	    (void **)&scr->buf_va,
 	    busdma_flag | (pxa2x0_lcd_writethrough ? 0 : BUS_DMA_COHERENT));
 	if (error)
 		goto bad;
 	/* XXX: should we have BUS_DMA_WRITETHROUGH in MI bus_dma(9) API? */
 	if (pxa2x0_lcd_writethrough) {
 		pt_entry_t *ptep;
 		vaddr_t va, eva;
 		va = (vaddr_t)scr->buf_va;
 		eva = va + size;
 		while (va < eva) {
 			/* taken from arm/arm32/bus_dma.c:_bus_dmamem_map() */
 			cpu_dcache_wbinv_range(va, PAGE_SIZE);
 			cpu_drain_writebuf();
 			ptep = vtopte(va);
 			*ptep &= ~L2_S_CACHE_MASK;
 			*ptep |= L2_C;
 			PTE_SYNC(ptep);
 			tlb_flush();
 			va += PAGE_SIZE;
+		}
+	}
 	memset(scr->buf_va, 0, scr->buf_size);
 	/* map memory for DMA */
 	error = bus_dmamap_create(dma_tag, 1024*1024*2, 1, 1024*1024*2, 0,
 	    busdma_flag, &scr->dma);
 	if (error)
 		goto bad;
 	error = bus_dmamap_load(dma_tag, scr->dma, scr->buf_va, size,
 	    NULL, busdma_flag);
 	if (error)
 		goto bad;
 @@ -889,27 +919,28 @@ paddr_t
 pxa2x0_lcd_mmap(void *v, void *vs, off_t offset, int prot)
+{
 	struct pxa2x0_lcd_softc *sc = v;
 	struct pxa2x0_lcd_screen *scr = sc->active;  /* ??? */
 	if (scr == NULL)
 		return -1;
 	if (offset < 0 ||
 	    offset >= scr->rinfo.ri_stride * scr->rinfo.ri_height)
 		return -1;
 	return bus_dmamem_mmap(sc->dma_tag, scr->segs, scr->nsegs,
-	    offset, prot, BUS_DMA_WAITOK|BUS_DMA_COHERENT);
+	    offset, prot,
 	    BUS_DMA_WAITOK | (pxa2x0_lcd_writethrough ? 0 : BUS_DMA_COHERENT));
+}
 static void
 pxa2x0_lcd_cursor(void *cookie, int on, int row, int col)
+{
 	struct pxa2x0_lcd_screen *scr = cookie;
 	(*scr->rinfo.ri_ops.cursor)(&scr->rinfo, on, row, col);
+}
 static int
 pxa2x0_lcd_mapchar(void *cookie, int c, unsigned int *cp)