| @@ -1,14 +1,14 @@ | | | @@ -1,14 +1,14 @@ |
1 | /* $NetBSD: cpu.c,v 1.49 2010/08/20 06:34:33 jruoho Exp $ */ | | 1 | /* $NetBSD: cpu.c,v 1.50 2010/11/03 04:34:51 jruoho Exp $ */ |
2 | /* NetBSD: cpu.c,v 1.18 2004/02/20 17:35:01 yamt Exp */ | | 2 | /* NetBSD: cpu.c,v 1.18 2004/02/20 17:35:01 yamt Exp */ |
3 | | | 3 | |
4 | /*- | | 4 | /*- |
5 | * Copyright (c) 2000 The NetBSD Foundation, Inc. | | 5 | * Copyright (c) 2000 The NetBSD Foundation, Inc. |
6 | * Copyright (c) 2002, 2006, 2007 YAMAMOTO Takashi, | | 6 | * Copyright (c) 2002, 2006, 2007 YAMAMOTO Takashi, |
7 | * All rights reserved. | | 7 | * All rights reserved. |
8 | * | | 8 | * |
9 | * This code is derived from software contributed to The NetBSD Foundation | | 9 | * This code is derived from software contributed to The NetBSD Foundation |
10 | * by RedBack Networks Inc. | | 10 | * by RedBack Networks Inc. |
11 | * | | 11 | * |
12 | * Author: Bill Sommerfeld | | 12 | * Author: Bill Sommerfeld |
13 | * | | 13 | * |
14 | * Redistribution and use in source and binary forms, with or without | | 14 | * Redistribution and use in source and binary forms, with or without |
| @@ -56,27 +56,27 @@ | | | @@ -56,27 +56,27 @@ |
56 | * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | | 56 | * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
57 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | | 57 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
58 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR AND CONTRIBUTORS BE LIABLE | | 58 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR AND CONTRIBUTORS BE LIABLE |
59 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | | 59 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
60 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | | 60 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
61 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | | 61 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
62 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | | 62 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
63 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | | 63 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
64 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | | 64 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
65 | * SUCH DAMAGE. | | 65 | * SUCH DAMAGE. |
66 | */ | | 66 | */ |
67 | | | 67 | |
68 | #include <sys/cdefs.h> | | 68 | #include <sys/cdefs.h> |
69 | __KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.49 2010/08/20 06:34:33 jruoho Exp $"); | | 69 | __KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.50 2010/11/03 04:34:51 jruoho Exp $"); |
70 | | | 70 | |
71 | #include "opt_ddb.h" | | 71 | #include "opt_ddb.h" |
72 | #include "opt_multiprocessor.h" | | 72 | #include "opt_multiprocessor.h" |
73 | #include "opt_mpbios.h" /* for MPDEBUG */ | | 73 | #include "opt_mpbios.h" /* for MPDEBUG */ |
74 | #include "opt_mtrr.h" | | 74 | #include "opt_mtrr.h" |
75 | #include "opt_xen.h" | | 75 | #include "opt_xen.h" |
76 | | | 76 | |
77 | #include "lapic.h" | | 77 | #include "lapic.h" |
78 | #include "ioapic.h" | | 78 | #include "ioapic.h" |
79 | | | 79 | |
80 | #include <sys/param.h> | | 80 | #include <sys/param.h> |
81 | #include <sys/proc.h> | | 81 | #include <sys/proc.h> |
82 | #include <sys/systm.h> | | 82 | #include <sys/systm.h> |
| @@ -246,26 +246,27 @@ cpu_attach(device_t parent, device_t sel | | | @@ -246,26 +246,27 @@ cpu_attach(device_t parent, device_t sel |
246 | KM_SLEEP); | | 246 | KM_SLEEP); |
247 | ci = (struct cpu_info *)roundup2(ptr, CACHE_LINE_SIZE); | | 247 | ci = (struct cpu_info *)roundup2(ptr, CACHE_LINE_SIZE); |
248 | ci->ci_curldt = -1; | | 248 | ci->ci_curldt = -1; |
249 | } else { | | 249 | } else { |
250 | aprint_naive(": %s Processor\n", | | 250 | aprint_naive(": %s Processor\n", |
251 | caa->cpu_role == CPU_ROLE_SP ? "Single" : "Boot"); | | 251 | caa->cpu_role == CPU_ROLE_SP ? "Single" : "Boot"); |
252 | ci = &phycpu_info_primary; | | 252 | ci = &phycpu_info_primary; |
253 | } | | 253 | } |
254 | | | 254 | |
255 | ci->ci_self = ci; | | 255 | ci->ci_self = ci; |
256 | sc->sc_info = ci; | | 256 | sc->sc_info = ci; |
257 | | | 257 | |
258 | ci->ci_dev = self; | | 258 | ci->ci_dev = self; |
| | | 259 | ci->ci_acpiid = caa->cpu_id; |
259 | ci->ci_cpuid = caa->cpu_number; | | 260 | ci->ci_cpuid = caa->cpu_number; |
260 | ci->ci_vcpu = NULL; | | 261 | ci->ci_vcpu = NULL; |
261 | | | 262 | |
262 | /* | | 263 | /* |
263 | * Boot processor may not be attached first, but the below | | 264 | * Boot processor may not be attached first, but the below |
264 | * must be done to allow booting other processors. | | 265 | * must be done to allow booting other processors. |
265 | */ | | 266 | */ |
266 | if (!again) { | | 267 | if (!again) { |
267 | atomic_or_32(&ci->ci_flags, CPUF_PRESENT | CPUF_PRIMARY); | | 268 | atomic_or_32(&ci->ci_flags, CPUF_PRESENT | CPUF_PRIMARY); |
268 | /* Basic init */ | | 269 | /* Basic init */ |
269 | again = true; | | 270 | again = true; |
270 | } | | 271 | } |
271 | | | 272 | |