Sat Dec 11 14:28:38 2010 UTC ()
Sanitize names a bit, still could use more namespace cleanup


(martin)
diff -r1.38 -r1.39 src/sys/dev/pci/if_bnx.c
diff -r1.12 -r1.13 src/sys/dev/pci/if_bnxreg.h

cvs diff -r1.38 -r1.39 src/sys/dev/pci/if_bnx.c (expand / switch to unified diff)

--- src/sys/dev/pci/if_bnx.c 2010/12/11 14:19:29 1.38
+++ src/sys/dev/pci/if_bnx.c 2010/12/11 14:28:38 1.39
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: if_bnx.c,v 1.38 2010/12/11 14:19:29 pgoyette Exp $ */ 1/* $NetBSD: if_bnx.c,v 1.39 2010/12/11 14:28:38 martin Exp $ */
2/* $OpenBSD: if_bnx.c,v 1.85 2009/11/09 14:32:41 dlg Exp $ */ 2/* $OpenBSD: if_bnx.c,v 1.85 2009/11/09 14:32:41 dlg Exp $ */
3 3
4/*- 4/*-
5 * Copyright (c) 2006 Broadcom Corporation 5 * Copyright (c) 2006 Broadcom Corporation
6 * David Christensen <davidch@broadcom.com>. All rights reserved. 6 * David Christensen <davidch@broadcom.com>. All rights reserved.
7 * 7 *
8 * Redistribution and use in source and binary forms, with or without 8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions 9 * modification, are permitted provided that the following conditions
10 * are met: 10 * are met:
11 * 11 *
12 * 1. Redistributions of source code must retain the above copyright 12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer. 13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright 14 * 2. Redistributions in binary form must reproduce the above copyright
@@ -25,27 +25,27 @@ @@ -25,27 +25,27 @@
25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
31 * THE POSSIBILITY OF SUCH DAMAGE. 31 * THE POSSIBILITY OF SUCH DAMAGE.
32 */ 32 */
33 33
34#include <sys/cdefs.h> 34#include <sys/cdefs.h>
35#if 0 35#if 0
36__FBSDID("$FreeBSD: src/sys/dev/bce/if_bce.c,v 1.3 2006/04/13 14:12:26 ru Exp $"); 36__FBSDID("$FreeBSD: src/sys/dev/bce/if_bce.c,v 1.3 2006/04/13 14:12:26 ru Exp $");
37#endif 37#endif
38__KERNEL_RCSID(0, "$NetBSD: if_bnx.c,v 1.38 2010/12/11 14:19:29 pgoyette Exp $"); 38__KERNEL_RCSID(0, "$NetBSD: if_bnx.c,v 1.39 2010/12/11 14:28:38 martin Exp $");
39 39
40/* 40/*
41 * The following controllers are supported by this driver: 41 * The following controllers are supported by this driver:
42 * BCM5706C A2, A3 42 * BCM5706C A2, A3
43 * BCM5706S A2, A3 43 * BCM5706S A2, A3
44 * BCM5708C B1, B2 44 * BCM5708C B1, B2
45 * BCM5708S B1, B2 45 * BCM5708S B1, B2
46 * BCM5709C A1, C0 46 * BCM5709C A1, C0
47 * BCM5716 C0 47 * BCM5716 C0
48 * 48 *
49 * The following controllers are not supported by this driver: 49 * The following controllers are not supported by this driver:
50 *  50 *
51 * BCM5706C A0, A1 51 * BCM5706C A0, A1
@@ -3095,32 +3095,32 @@ bnx_init_context(struct bnx_softc *sc) @@ -3095,32 +3095,32 @@ bnx_init_context(struct bnx_softc *sc)
3095 } 3095 }
3096 } else { 3096 } else {
3097 u_int32_t vcid_addr, offset; 3097 u_int32_t vcid_addr, offset;
3098 3098
3099 /* 3099 /*
3100 * For the 5706/5708, context memory is local to 3100 * For the 5706/5708, context memory is local to
3101 * the controller, so initialize the controller 3101 * the controller, so initialize the controller
3102 * context memory. 3102 * context memory.
3103 */ 3103 */
3104 3104
3105 vcid_addr = GET_CID_ADDR(96); 3105 vcid_addr = GET_CID_ADDR(96);
3106 while (vcid_addr) { 3106 while (vcid_addr) {
3107 3107
3108 vcid_addr -= PHY_BNX_CTX_SIZE; 3108 vcid_addr -= BNX_PHY_CTX_SIZE;
3109 3109
3110 REG_WR(sc, BNX_CTX_VIRT_ADDR, 0); 3110 REG_WR(sc, BNX_CTX_VIRT_ADDR, 0);
3111 REG_WR(sc, BNX_CTX_PAGE_TBL, vcid_addr); 3111 REG_WR(sc, BNX_CTX_PAGE_TBL, vcid_addr);
3112 3112
3113 for(offset = 0; offset < PHY_BNX_CTX_SIZE; offset += 4) { 3113 for(offset = 0; offset < BNX_PHY_CTX_SIZE; offset += 4) {
3114 CTX_WR(sc, 0x00, offset, 0); 3114 CTX_WR(sc, 0x00, offset, 0);
3115 } 3115 }
3116 3116
3117 REG_WR(sc, BNX_CTX_VIRT_ADDR, vcid_addr); 3117 REG_WR(sc, BNX_CTX_VIRT_ADDR, vcid_addr);
3118 REG_WR(sc, BNX_CTX_PAGE_TBL, vcid_addr); 3118 REG_WR(sc, BNX_CTX_PAGE_TBL, vcid_addr);
3119 } 3119 }
3120 } 3120 }
3121} 3121}
3122 3122
3123/****************************************************************************/ 3123/****************************************************************************/
3124/* Fetch the permanent MAC address of the controller. */ 3124/* Fetch the permanent MAC address of the controller. */
3125/* */ 3125/* */
3126/* Returns: */ 3126/* Returns: */
@@ -3401,27 +3401,27 @@ bnx_chipinit(struct bnx_softc *sc) @@ -3401,27 +3401,27 @@ bnx_chipinit(struct bnx_softc *sc)
3401 val = REG_RD(sc, BNX_MQ_CONFIG); 3401 val = REG_RD(sc, BNX_MQ_CONFIG);
3402 val &= ~BNX_MQ_CONFIG_KNL_BYP_BLK_SIZE; 3402 val &= ~BNX_MQ_CONFIG_KNL_BYP_BLK_SIZE;
3403 val |= BNX_MQ_CONFIG_KNL_BYP_BLK_SIZE_256; 3403 val |= BNX_MQ_CONFIG_KNL_BYP_BLK_SIZE_256;
3404 3404
3405 /* Enable bins used on the 5709. */ 3405 /* Enable bins used on the 5709. */
3406 if (BNX_CHIP_NUM(sc) == BNX_CHIP_NUM_5709) { 3406 if (BNX_CHIP_NUM(sc) == BNX_CHIP_NUM_5709) {
3407 val |= BNX_MQ_CONFIG_BIN_MQ_MODE; 3407 val |= BNX_MQ_CONFIG_BIN_MQ_MODE;
3408 if (BNX_CHIP_ID(sc) == BNX_CHIP_ID_5709_A1) 3408 if (BNX_CHIP_ID(sc) == BNX_CHIP_ID_5709_A1)
3409 val |= BNX_MQ_CONFIG_HALT_DIS; 3409 val |= BNX_MQ_CONFIG_HALT_DIS;
3410 } 3410 }
3411 3411
3412 REG_WR(sc, BNX_MQ_CONFIG, val); 3412 REG_WR(sc, BNX_MQ_CONFIG, val);
3413 3413
3414 val = 0x10000 + (MAX_CID_CNT * MB_KERNEL_BNX_CTX_SIZE); 3414 val = 0x10000 + (MAX_CID_CNT * BNX_MB_KERNEL_CTX_SIZE);
3415 REG_WR(sc, BNX_MQ_KNL_BYP_WIND_START, val); 3415 REG_WR(sc, BNX_MQ_KNL_BYP_WIND_START, val);
3416 REG_WR(sc, BNX_MQ_KNL_WIND_END, val); 3416 REG_WR(sc, BNX_MQ_KNL_WIND_END, val);
3417 3417
3418 val = (BCM_PAGE_BITS - 8) << 24; 3418 val = (BCM_PAGE_BITS - 8) << 24;
3419 REG_WR(sc, BNX_RV2P_CONFIG, val); 3419 REG_WR(sc, BNX_RV2P_CONFIG, val);
3420 3420
3421 /* Configure page size. */ 3421 /* Configure page size. */
3422 val = REG_RD(sc, BNX_TBDR_CONFIG); 3422 val = REG_RD(sc, BNX_TBDR_CONFIG);
3423 val &= ~BNX_TBDR_CONFIG_PAGE_SIZE; 3423 val &= ~BNX_TBDR_CONFIG_PAGE_SIZE;
3424 val |= (BCM_PAGE_BITS - 8) << 24 | 0x40; 3424 val |= (BCM_PAGE_BITS - 8) << 24 | 0x40;
3425 REG_WR(sc, BNX_TBDR_CONFIG, val); 3425 REG_WR(sc, BNX_TBDR_CONFIG, val);
3426 3426
3427#if 0 3427#if 0

cvs diff -r1.12 -r1.13 src/sys/dev/pci/if_bnxreg.h (expand / switch to unified diff)

--- src/sys/dev/pci/if_bnxreg.h 2010/12/11 12:14:06 1.12
+++ src/sys/dev/pci/if_bnxreg.h 2010/12/11 14:28:38 1.13
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: if_bnxreg.h,v 1.12 2010/12/11 12:14:06 martin Exp $ */ 1/* $NetBSD: if_bnxreg.h,v 1.13 2010/12/11 14:28:38 martin Exp $ */
2/* $OpenBSD: if_bnxreg.h,v 1.33 2009/09/05 16:02:28 claudio Exp $ */ 2/* $OpenBSD: if_bnxreg.h,v 1.33 2009/09/05 16:02:28 claudio Exp $ */
3 3
4/*- 4/*-
5 * Copyright (c) 2006 Broadcom Corporation 5 * Copyright (c) 2006 Broadcom Corporation
6 * David Christensen <davidch@broadcom.com>. All rights reserved. 6 * David Christensen <davidch@broadcom.com>. All rights reserved.
7 * 7 *
8 * Redistribution and use in source and binary forms, with or without 8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions 9 * modification, are permitted provided that the following conditions
10 * are met: 10 * are met:
11 * 1. Redistributions of source code must retain the above copyright 11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer. 12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright 13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the 14 * notice, this list of conditions and the following disclaimer in the
@@ -4580,46 +4580,46 @@ struct l2_fhdr { @@ -4580,46 +4580,46 @@ struct l2_fhdr {
4580 4580
4581#define RX_CHAIN_IDX(x) ((x) & MAX_RX_BD) 4581#define RX_CHAIN_IDX(x) ((x) & MAX_RX_BD)
4582 4582
4583#define RX_PAGE(x) (((x) & ~USABLE_RX_BD_PER_PAGE) >> (BCM_PAGE_BITS - 4)) 4583#define RX_PAGE(x) (((x) & ~USABLE_RX_BD_PER_PAGE) >> (BCM_PAGE_BITS - 4))
4584#define RX_IDX(x) ((x) & USABLE_RX_BD_PER_PAGE) 4584#define RX_IDX(x) ((x) & USABLE_RX_BD_PER_PAGE)
4585 4585
4586/* Context size. */ 4586/* Context size. */
4587#define BNX_CTX_SHIFT 7 4587#define BNX_CTX_SHIFT 7
4588#define BNX_CTX_SIZE (1 << BNX_CTX_SHIFT) 4588#define BNX_CTX_SIZE (1 << BNX_CTX_SHIFT)
4589#define BNX_CTX_MASK (BNX_CTX_SIZE - 1) 4589#define BNX_CTX_MASK (BNX_CTX_SIZE - 1)
4590#define GET_CID_ADDR(_cid) ((_cid) << BNX_CTX_SHIFT) 4590#define GET_CID_ADDR(_cid) ((_cid) << BNX_CTX_SHIFT)
4591#define GET_CID(_cid_addr) ((_cid_addr) >> BNX_CTX_SHIFT) 4591#define GET_CID(_cid_addr) ((_cid_addr) >> BNX_CTX_SHIFT)
4592 4592
4593#define PHY_BNX_CTX_SHIFT 6 4593#define BNX_PHY_CTX_SHIFT 6
4594#define PHY_BNX_CTX_SIZE (1 << PHY_BNX_CTX_SHIFT) 4594#define BNX_PHY_CTX_SIZE (1 << BNX_PHY_CTX_SHIFT)
4595#define PHY_BNX_CTX_MASK (PHY_BNX_CTX_SIZE - 1) 4595#define BNX_PHY_CTX_MASK (BNX_PHY_CTX_SIZE - 1)
4596#define GET_PCID_ADDR(_pcid) ((_pcid) << PHY_BNX_CTX_SHIFT) 4596#define GET_PCID_ADDR(_pcid) ((_pcid) << PHY_BNX_CTX_SHIFT)
4597#define GET_PCID(_pcid_addr) ((_pcid_addr) >> PHY_BNX_CTX_SHIFT) 4597#define GET_PCID(_pcid_addr) ((_pcid_addr) >> PHY_BNX_CTX_SHIFT)
4598 4598
4599#define MB_KERNEL_BNX_CTX_SHIFT 8 4599#define BNX_MB_KERNEL_CTX_SHIFT 8
4600#define MB_KERNEL_BNX_CTX_SIZE (1 << MB_KERNEL_BNX_CTX_SHIFT) 4600#define BNX_MB_KERNEL_CTX_SIZE (1 << BNX_MB_KERNEL_CTX_SHIFT)
4601#define MB_KERNEL_BNX_CTX_MASK (MB_KERNEL_BNX_CTX_SIZE - 1) 4601#define BNX_MB_KERNEL_CTX_MASK (BNX_MB_KERNEL_CTX_SIZE - 1)
4602#define MB_GET_CID_ADDR(_cid) (0x10000 + ((_cid) << MB_KERNEL_BNX_CTX_SHIFT)) 4602#define BNX_MB_GET_CID_ADDR(_cid) (0x10000 + ((_cid) << BNX_MB_KERNEL_CTX_SHIFT))
4603 4603
4604#define MAX_CID_CNT 0x4000 4604#define MAX_CID_CNT 0x4000
4605#define MAX_CID_ADDR (GET_CID_ADDR(MAX_CID_CNT)) 4605#define MAX_CID_ADDR (GET_CID_ADDR(MAX_CID_CNT))
4606#define INVALID_CID_ADDR 0xffffffff 4606#define INVALID_CID_ADDR 0xffffffff
4607 4607
4608#define TX_CID 16 4608#define TX_CID 16
4609#define RX_CID 0 4609#define RX_CID 0
4610 4610
4611#define MB_TX_CID_ADDR MB_GET_CID_ADDR(TX_CID) 4611#define MB_TX_CID_ADDR BNX_MB_GET_CID_ADDR(TX_CID)
4612#define MB_RX_CID_ADDR MB_GET_CID_ADDR(RX_CID) 4612#define MB_RX_CID_ADDR BNX_MB_GET_CID_ADDR(RX_CID)
4613 4613
4614/****************************************************************************/ 4614/****************************************************************************/
4615/* BNX Processor Firmwware Load Definitions */ 4615/* BNX Processor Firmwware Load Definitions */
4616/****************************************************************************/ 4616/****************************************************************************/
4617 4617
4618struct cpu_reg { 4618struct cpu_reg {
4619 u_int32_t mode; 4619 u_int32_t mode;
4620 u_int32_t mode_value_halt; 4620 u_int32_t mode_value_halt;
4621 u_int32_t mode_value_sstep; 4621 u_int32_t mode_value_sstep;
4622 4622
4623 u_int32_t state; 4623 u_int32_t state;
4624 u_int32_t state_value_clear; 4624 u_int32_t state_value_clear;
4625 4625