Mon Dec 13 06:40:13 2010 UTC ()
add definitions for T_DATA_MMU_MISS, T_FAST_ECC_ERROR, T_DC_PAR_ERR
and T_IC_PAR_ERR, all are >= USIII only.


(mrg)
diff -r1.6 -r1.7 src/sys/arch/sparc64/include/trap.h
cvs diff -r1.6 -r1.7 src/sys/arch/sparc64/include/trap.h (expand / switch to unified diff)

--- src/sys/arch/sparc64/include/trap.h 2006/09/19 00:55:35 1.6
+++ src/sys/arch/sparc64/include/trap.h 2010/12/13 06:40:13 1.7
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: trap.h,v 1.6 2006/09/19 00:55:35 mrg Exp $ */ 1/* $NetBSD: trap.h,v 1.7 2010/12/13 06:40:13 mrg Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 1996-1999 Eduardo Horvath 4 * Copyright (c) 1996-1999 Eduardo Horvath
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions 7 * modification, are permitted provided that the following conditions
8 * are met: 8 * are met:
9 * 1. Redistributions of source code must retain the above copyright 9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer. 10 * notice, this list of conditions and the following disclaimer.
11 *  11 *
12 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND 12 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
13 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 13 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
14 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 14 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
@@ -42,32 +42,32 @@ @@ -42,32 +42,32 @@
42/* 0x00b unused */ 42/* 0x00b unused */
43/* through 0x00f unused */ 43/* through 0x00f unused */
44#define T_ILLINST 0x010 /* (7) illegal instruction */ 44#define T_ILLINST 0x010 /* (7) illegal instruction */
45#define T_PRIVINST 0x011 /* (6) privileged opcode */ 45#define T_PRIVINST 0x011 /* (6) privileged opcode */
46/* 0x012 unused */ 46/* 0x012 unused */
47/* through 0x01f unused */ 47/* through 0x01f unused */
48#define T_FPDISABLED 0x020 /* (8) fpu disabled */ 48#define T_FPDISABLED 0x020 /* (8) fpu disabled */
49#define T_FP_IEEE_754 0x021 /* (11) ieee 754 exception */ 49#define T_FP_IEEE_754 0x021 /* (11) ieee 754 exception */
50#define T_FP_OTHER 0x022 /* (11) other fp exception */ 50#define T_FP_OTHER 0x022 /* (11) other fp exception */
51#define T_TAGOF 0x023 /* (14) tag overflow */ 51#define T_TAGOF 0x023 /* (14) tag overflow */
52#define T_CLEAN_WINDOW 0x024 /* (10) clean window exception */ 52#define T_CLEAN_WINDOW 0x024 /* (10) clean window exception */
53/* through 0x027 unused */ 53/* through 0x027 unused */
54#define T_IDIV0 0x028 /* (15) division by 0 */ 54#define T_IDIV0 0x028 /* (15) division by 0 */
55/* 0x02a unused */ 55/* 0x029 unused */
56/* through 0x02f unused */ 56/* through 0x02f unused */
57#define T_DATAFAULT 0x030 /* (12) address fault during data fetch */ 57#define T_DATAFAULT 0x030 /* (12) address fault during data fetch */
58/* 0x031 unused */ 58#define T_DATA_MMU_MISS 0x031 /* (N/A) address fault during data fetch [USIII] */
59#define T_DATA_ERROR 0x032 59#define T_DATA_ERROR 0x032 /* (12) data access error */
60#define T_DATA_PROT 0x033 /* Data protection ??? */ 60#define T_DATA_PROT 0x033 /* (12) Data protection ??? */
61#define T_ALIGN 0x034 /* (10) address not properly aligned */ 61#define T_ALIGN 0x034 /* (10) address not properly aligned */
62#define T_LDDF_ALIGN 0x035 /* (10) LDDF address not properly aligned */ 62#define T_LDDF_ALIGN 0x035 /* (10) LDDF address not properly aligned */
63#define T_STDF_ALIGN 0x036 /* (10) STDF address not properly aligned */ 63#define T_STDF_ALIGN 0x036 /* (10) STDF address not properly aligned */
64#define T_PRIVACT 0x037 /* (11) privileged action */ 64#define T_PRIVACT 0x037 /* (11) privileged action */
65/* 0x038 unused */ 65/* 0x038 unused */
66/* through 0x03f unused */ 66/* through 0x03f unused */
67#define T_ASYNC_ERROR 0x040 /* ???? */ 67#define T_ASYNC_ERROR 0x040 /* ???? */
68#define T_L1INT 0x041 /* (31) level 1 interrupt */ 68#define T_L1INT 0x041 /* (31) level 1 interrupt */
69#define T_L2INT 0x042 /* (30) level 2 interrupt */ 69#define T_L2INT 0x042 /* (30) level 2 interrupt */
70#define T_L3INT 0x043 /* (29) level 3 interrupt */ 70#define T_L3INT 0x043 /* (29) level 3 interrupt */
71#define T_L4INT 0x044 /* (28) level 4 interrupt */ 71#define T_L4INT 0x044 /* (28) level 4 interrupt */
72#define T_L5INT 0x045 /* (27) level 5 interrupt */ 72#define T_L5INT 0x045 /* (27) level 5 interrupt */
73#define T_L6INT 0x046 /* (26) level 6 interrupt */ 73#define T_L6INT 0x046 /* (26) level 6 interrupt */
@@ -83,26 +83,29 @@ @@ -83,26 +83,29 @@
83/* 0x050 unused */ 83/* 0x050 unused */
84/* through 0x05f unused */ 84/* through 0x05f unused */
85#define T_INTVEC 0x060 /* (16) interrupt vector [Interrupt Global Regs]*/ 85#define T_INTVEC 0x060 /* (16) interrupt vector [Interrupt Global Regs]*/
86#define T_PA_WATCHPT 0x061 /* (12) Physical addr data watchpoint */ 86#define T_PA_WATCHPT 0x061 /* (12) Physical addr data watchpoint */
87#define T_VA_WATCHPT 0x062 /* (11) Virtual addr data watchpoint */ 87#define T_VA_WATCHPT 0x062 /* (11) Virtual addr data watchpoint */
88#define T_ECCERR 0x063 /* (33) ECC correction error */ 88#define T_ECCERR 0x063 /* (33) ECC correction error */
89#define T_FIMMU_MISS 0x064 /* (2) fast instruction access MMU miss */ 89#define T_FIMMU_MISS 0x064 /* (2) fast instruction access MMU miss */
90/* through 0x067 unused */ 90/* through 0x067 unused */
91#define T_FDMMU_MISS 0x068 /* (2) fast data access MMU miss */ 91#define T_FDMMU_MISS 0x068 /* (2) fast data access MMU miss */
92/* through 0x06b unused */ 92/* through 0x06b unused */
93#define T_FDMMU_PROT 0x06c /* (2) fast data access protection */ 93#define T_FDMMU_PROT 0x06c /* (2) fast data access protection */
94/* through 0x06f unused */ 94/* through 0x06f unused */
95/* 0x070...0x07f implementation dependent exceptions */ 95/* 0x070...0x07f implementation dependent exceptions */
 96#define T_FAST_ECC_ERROR 0x070 /* (2) fast ECC error [USIII] */
 97#define T_DC_PAR_ERR 0x071 /* (2) dcache parity error [USIII] */
 98#define T_IC_PAR_ERR 0x072 /* (2) icache parity error [USIII] */
96#define T_SPILL_N_NORM 0x080 /* (9) spill (n=0..7) normal */ 99#define T_SPILL_N_NORM 0x080 /* (9) spill (n=0..7) normal */
97/* through 0x09f unused */ 100/* through 0x09f unused */
98#define T_SPILL_N_OTHER 0x0a0 /* (9) spill (n=0..7) other */ 101#define T_SPILL_N_OTHER 0x0a0 /* (9) spill (n=0..7) other */
99/* through 0x0bF unused */ 102/* through 0x0bF unused */
100#define T_FILL_N_NORM 0x0c0 /* (9) fill (n=0..7) normal */ 103#define T_FILL_N_NORM 0x0c0 /* (9) fill (n=0..7) normal */
101/* through 0x0dF unused */ 104/* through 0x0dF unused */
102#define T_FILL_N_OTHER 0x0e0 /* (9) fill (n=0..7) other */ 105#define T_FILL_N_OTHER 0x0e0 /* (9) fill (n=0..7) other */
103/* through 0x0fF unused */ 106/* through 0x0fF unused */
104 107
105/* beginning of `user' vectors (from trap instructions) - all priority 16 */ 108/* beginning of `user' vectors (from trap instructions) - all priority 16 */
106#define T_SUN_SYSCALL 0x100 /* system call */ 109#define T_SUN_SYSCALL 0x100 /* system call */
107#define T_BREAKPOINT 0x101 /* breakpoint `instruction' */ 110#define T_BREAKPOINT 0x101 /* breakpoint `instruction' */
108#define T_DIV0 0x102 /* division routine was handed 0 */ 111#define T_DIV0 0x102 /* division routine was handed 0 */