Sun Jan 23 09:44:59 2011 UTC ()
Make some more information (psw/fpu_state) per cpu.


(skrll)
diff -r1.38 -r1.39 src/sys/arch/hp700/hp700/autoconf.c
diff -r1.29 -r1.30 src/sys/arch/hp700/hp700/genassym.cf
diff -r1.51 -r1.52 src/sys/arch/hp700/hp700/locore.S
diff -r1.96 -r1.97 src/sys/arch/hp700/hp700/machdep.c
diff -r1.58 -r1.59 src/sys/arch/hp700/include/cpu.h
diff -r1.22 -r1.23 src/sys/arch/hppa/hppa/fpu.c
diff -r1.13 -r1.14 src/sys/arch/hppa/hppa/machdep.h
diff -r1.52 -r1.53 src/sys/arch/hppa/hppa/trap.S
diff -r1.95 -r1.96 src/sys/arch/hppa/hppa/trap.c
diff -r1.45 -r1.46 src/sys/arch/hppa/hppa/vm_machdep.c

cvs diff -r1.38 -r1.39 src/sys/arch/hp700/hp700/Attic/autoconf.c (expand / switch to unified diff)

--- src/sys/arch/hp700/hp700/Attic/autoconf.c 2011/01/14 16:48:15 1.38
+++ src/sys/arch/hp700/hp700/Attic/autoconf.c 2011/01/23 09:44:58 1.39
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: autoconf.c,v 1.38 2011/01/14 16:48:15 skrll Exp $ */ 1/* $NetBSD: autoconf.c,v 1.39 2011/01/23 09:44:58 skrll Exp $ */
2 2
3/* $OpenBSD: autoconf.c,v 1.15 2001/06/25 00:43:10 mickey Exp $ */ 3/* $OpenBSD: autoconf.c,v 1.15 2001/06/25 00:43:10 mickey Exp $ */
4 4
5/* 5/*
6 * Copyright (c) 1992, 1993 6 * Copyright (c) 1992, 1993
7 * The Regents of the University of California. All rights reserved. 7 * The Regents of the University of California. All rights reserved.
8 * 8 *
9 * This software was developed by the Computer Systems Engineering group 9 * This software was developed by the Computer Systems Engineering group
10 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 10 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
11 * contributed to Berkeley. 11 * contributed to Berkeley.
12 * 12 *
13 * All advertising materials mentioning features or use of this software 13 * All advertising materials mentioning features or use of this software
14 * must display the following acknowledgement: 14 * must display the following acknowledgement:
@@ -76,27 +76,27 @@ @@ -76,27 +76,27 @@
76 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 76 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
77 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 77 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
78 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 78 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
79 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 79 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
80 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 80 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
81 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 81 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
82 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 82 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
83 * SUCH DAMAGE. 83 * SUCH DAMAGE.
84 * 84 *
85 * @(#)autoconf.c 8.4 (Berkeley) 10/1/93 85 * @(#)autoconf.c 8.4 (Berkeley) 10/1/93
86 */ 86 */
87 87
88#include <sys/cdefs.h> 88#include <sys/cdefs.h>
89__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.38 2011/01/14 16:48:15 skrll Exp $"); 89__KERNEL_RCSID(0, "$NetBSD: autoconf.c,v 1.39 2011/01/23 09:44:58 skrll Exp $");
90 90
91#include "opt_kgdb.h" 91#include "opt_kgdb.h"
92#include "opt_useleds.h" 92#include "opt_useleds.h"
93 93
94#include <sys/param.h> 94#include <sys/param.h>
95#include <sys/systm.h> 95#include <sys/systm.h>
96#include <sys/buf.h> 96#include <sys/buf.h>
97#include <sys/disklabel.h> 97#include <sys/disklabel.h>
98#include <sys/conf.h> 98#include <sys/conf.h>
99#include <sys/kernel.h> 99#include <sys/kernel.h>
100#include <sys/reboot.h> 100#include <sys/reboot.h>
101#include <sys/device.h> 101#include <sys/device.h>
102#include <sys/callout.h> 102#include <sys/callout.h>
@@ -112,32 +112,26 @@ __KERNEL_RCSID(0, "$NetBSD: autoconf.c,v @@ -112,32 +112,26 @@ __KERNEL_RCSID(0, "$NetBSD: autoconf.c,v
112 112
113#include <dev/pci/pcivar.h> 113#include <dev/pci/pcivar.h>
114 114
115#include <dev/scsipi/scsi_all.h> 115#include <dev/scsipi/scsi_all.h>
116#include <dev/scsipi/scsipi_all.h> 116#include <dev/scsipi/scsipi_all.h>
117#include <dev/scsipi/scsiconf.h> 117#include <dev/scsipi/scsiconf.h>
118 118
119#include <dev/cons.h> 119#include <dev/cons.h>
120 120
121#include <hp700/hp700/machdep.h> 121#include <hp700/hp700/machdep.h>
122#include <hp700/dev/cpudevs.h> 122#include <hp700/dev/cpudevs.h>
123#include <hp700/gsc/gscbusvar.h> 123#include <hp700/gsc/gscbusvar.h>
124 124
125register_t kpsw =  
126 PSW_Q | /* Interrupt State Collection Enable */ 
127 PSW_P | /* Protection Identifier Validation Enable */ 
128 PSW_C | /* Instruction Address Translation Enable */ 
129 PSW_D; /* Data Address Translation Enable */ 
130 
131static TAILQ_HEAD(hppa_pdcmodule_head, hppa_pdcmodule) hppa_pdcmodule_list = 125static TAILQ_HEAD(hppa_pdcmodule_head, hppa_pdcmodule) hppa_pdcmodule_list =
132 TAILQ_HEAD_INITIALIZER(hppa_pdcmodule_list); 126 TAILQ_HEAD_INITIALIZER(hppa_pdcmodule_list);
133 127
134struct hppa_pdcmodule { 128struct hppa_pdcmodule {
135 TAILQ_ENTRY(hppa_pdcmodule) hm_link; 129 TAILQ_ENTRY(hppa_pdcmodule) hm_link;
136 bool hm_registered; 130 bool hm_registered;
137 struct pdc_iodc_read hm_pir; 131 struct pdc_iodc_read hm_pir;
138 struct iodc_data hm_type; 132 struct iodc_data hm_type;
139 struct device_path hm_dp; 133 struct device_path hm_dp;
140 hppa_hpa_t hm_hpa; 134 hppa_hpa_t hm_hpa;
141 u_int hm_hpasz; 135 u_int hm_hpasz;
142 u_int hm_naddrs; /* only PDC_SYSTEM_MAP */ 136 u_int hm_naddrs; /* only PDC_SYSTEM_MAP */
143 u_int hm_modindex; /* only PDC_SYSTEM_MAP */ 137 u_int hm_modindex; /* only PDC_SYSTEM_MAP */
@@ -182,27 +176,27 @@ cpu_configure(void) @@ -182,27 +176,27 @@ cpu_configure(void)
182 kgdb_connect(1); 176 kgdb_connect(1);
183#elif defined(DDB) 177#elif defined(DDB)
184 Debugger(); 178 Debugger();
185#endif /* DDB */ 179#endif /* DDB */
186 } 180 }
187 181
188 splhigh(); 182 splhigh();
189 if (config_rootfound("mainbus", NULL) == NULL) 183 if (config_rootfound("mainbus", NULL) == NULL)
190 panic("no mainbus found"); 184 panic("no mainbus found");
191 185
192 /* in spl*() we trust */ 186 /* in spl*() we trust */
193 hp700_intr_init(); 187 hp700_intr_init();
194 __asm volatile("ssm %0, %%r0" :: "i" (PSW_I)); 188 __asm volatile("ssm %0, %%r0" :: "i" (PSW_I));
195 kpsw |= PSW_I; 189 curcpu()->ci_psw |= PSW_I;
196 spl0(); 190 spl0();
197 191
198 if (cold_hook) 192 if (cold_hook)
199 (*cold_hook)(HPPA_COLD_HOT); 193 (*cold_hook)(HPPA_COLD_HOT);
200 194
201#ifdef USELEDS 195#ifdef USELEDS
202 memset(_hp700_led_on_cycles, 0, sizeof(_hp700_led_on_cycles)); 196 memset(_hp700_led_on_cycles, 0, sizeof(_hp700_led_on_cycles));
203 callout_init(&hp700_led_callout, 0); 197 callout_init(&hp700_led_callout, 0);
204 hp700_led_blinker((void *) 0); 198 hp700_led_blinker((void *) 0);
205#endif 199#endif
206} 200}
207 201
208#ifdef USELEDS 202#ifdef USELEDS

cvs diff -r1.29 -r1.30 src/sys/arch/hp700/hp700/Attic/genassym.cf (expand / switch to unified diff)

--- src/sys/arch/hp700/hp700/Attic/genassym.cf 2011/01/23 09:18:29 1.29
+++ src/sys/arch/hp700/hp700/Attic/genassym.cf 2011/01/23 09:44:58 1.30
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1# $NetBSD: genassym.cf,v 1.29 2011/01/23 09:18:29 skrll Exp $ 1# $NetBSD: genassym.cf,v 1.30 2011/01/23 09:44:58 skrll Exp $
2 2
3# $OpenBSD: genassym.cf,v 1.18 2001/09/20 18:31:14 mickey Exp $ 3# $OpenBSD: genassym.cf,v 1.18 2001/09/20 18:31:14 mickey Exp $
4 4
5# 5#
6# Copyright (c) 1982, 1990, 1993 6# Copyright (c) 1982, 1990, 1993
7# The Regents of the University of California. All rights reserved. 7# The Regents of the University of California. All rights reserved.
8# 8#
9# Redistribution and use in source and binary forms, with or without 9# Redistribution and use in source and binary forms, with or without
10# modification, are permitted provided that the following conditions 10# modification, are permitted provided that the following conditions
11# are met: 11# are met:
12# 1. Redistributions of source code must retain the above copyright 12# 1. Redistributions of source code must retain the above copyright
13# notice, this list of conditions and the following disclaimer. 13# notice, this list of conditions and the following disclaimer.
14# 2. Redistributions in binary form must reproduce the above copyright 14# 2. Redistributions in binary form must reproduce the above copyright
@@ -87,26 +87,28 @@ export HPPA_BREAK_SET_PSW @@ -87,26 +87,28 @@ export HPPA_BREAK_SET_PSW
87# hp700_int_reg fields 87# hp700_int_reg fields
88struct hp700_int_reg 88struct hp700_int_reg
89member INT_REG_REQ int_reg_req 89member INT_REG_REQ int_reg_req
90member INT_REG_BITS_MAP int_reg_bits_map 90member INT_REG_BITS_MAP int_reg_bits_map
91export INT_REG_BIT_REG 91export INT_REG_BIT_REG
92 92
93# struct cpu_info fields 93# struct cpu_info fields
94define CI_CPL offsetof(struct cpu_info, ci_cpl) 94define CI_CPL offsetof(struct cpu_info, ci_cpl)
95define CI_IPENDING offsetof(struct cpu_info, ci_ipending) 95define CI_IPENDING offsetof(struct cpu_info, ci_ipending)
96#define CI_INTR_DEPTH offsetof(struct cpu_info, ci_intr_depth) 96#define CI_INTR_DEPTH offsetof(struct cpu_info, ci_intr_depth)
97#define CI_SOFTLWPS offsetof(struct cpu_info, ci_softlwps) 97#define CI_SOFTLWPS offsetof(struct cpu_info, ci_softlwps)
98define CI_MTX_COUNT offsetof(struct cpu_info, ci_mtx_count) 98define CI_MTX_COUNT offsetof(struct cpu_info, ci_mtx_count)
99define CI_TRAPSAVE offsetof(struct cpu_info, ci_trapsave) 99define CI_TRAPSAVE offsetof(struct cpu_info, ci_trapsave)
 100define CI_PSW offsetof(struct cpu_info, ci_psw)
 101define CI_FPU_STATE offsetof(struct cpu_info, ci_fpu_state)
100ifdef MULTIPROCESSOR 102ifdef MULTIPROCESSOR
101define CI_CURLWP offsetof(struct cpu_info, ci_curlwp) 103define CI_CURLWP offsetof(struct cpu_info, ci_curlwp)
102endif 104endif
103 105
104 106
105define MTX_IPL offsetof(struct kmutex, mtx_ipl) 107define MTX_IPL offsetof(struct kmutex, mtx_ipl)
106define MTX_LOCK offsetof(struct kmutex, mtx_lock) 108define MTX_LOCK offsetof(struct kmutex, mtx_lock)
107define MTX_OWNER offsetof(struct kmutex, mtx_owner) 109define MTX_OWNER offsetof(struct kmutex, mtx_owner)
108define MTX_WAITERS offsetof(struct kmutex, mtx_waiters) 110define MTX_WAITERS offsetof(struct kmutex, mtx_waiters)
109 111
110define RW_OWNER offsetof(struct krwlock, rw_owner) 112define RW_OWNER offsetof(struct krwlock, rw_owner)
111define RW_WRITE_LOCKED RW_WRITE_LOCKED 113define RW_WRITE_LOCKED RW_WRITE_LOCKED
112define RW_WRITE_WANTED RW_WRITE_WANTED 114define RW_WRITE_WANTED RW_WRITE_WANTED

cvs diff -r1.51 -r1.52 src/sys/arch/hp700/hp700/Attic/locore.S (expand / switch to unified diff)

--- src/sys/arch/hp700/hp700/Attic/locore.S 2011/01/23 08:52:02 1.51
+++ src/sys/arch/hp700/hp700/Attic/locore.S 2011/01/23 09:44:58 1.52
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: locore.S,v 1.51 2011/01/23 08:52:02 skrll Exp $ */ 1/* $NetBSD: locore.S,v 1.52 2011/01/23 09:44:58 skrll Exp $ */
2/* $OpenBSD: locore.S,v 1.158 2008/07/28 19:08:46 miod Exp $ */ 2/* $OpenBSD: locore.S,v 1.158 2008/07/28 19:08:46 miod Exp $ */
3 3
4/* 4/*
5 * Copyright (c) 1998-2004 Michael Shalayeff 5 * Copyright (c) 1998-2004 Michael Shalayeff
6 * All rights reserved. 6 * All rights reserved.
7 * 7 *
8 * Redistribution and use in source and binary forms, with or without 8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions 9 * modification, are permitted provided that the following conditions
10 * are met: 10 * are met:
11 * 1. Redistributions of source code must retain the above copyright 11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer. 12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright 13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the 14 * notice, this list of conditions and the following disclaimer in the
@@ -140,30 +140,28 @@ @@ -140,30 +140,28 @@
140#define MTCPU_C(x,t) .word 0x14000240 | ((t) << 21) | ((x) << 16) 140#define MTCPU_C(x,t) .word 0x14000240 | ((t) << 21) | ((x) << 16)
141#define MFCPU_C(r,x) .word 0x14000600 | ((r) << 21) | ((x) << 16) 141#define MFCPU_C(r,x) .word 0x14000600 | ((r) << 21) | ((x) << 16)
142#define MFCPU_U(r,x) .word 0x140008a0 | ((r) << 21) | ((x)) 142#define MFCPU_U(r,x) .word 0x140008a0 | ((r) << 21) | ((x))
143#define MTCPU_U(x,r) .word 0x14001840 | ((r) << 21) | ((x) << 16) 143#define MTCPU_U(x,r) .word 0x14001840 | ((r) << 21) | ((x) << 16)
144#endif 144#endif
145 145
146 .import $global$, data 146 .import $global$, data
147 .import pdc, data 147 .import pdc, data
148 .import boothowto, data 148 .import boothowto, data
149 .import bootdev, data 149 .import bootdev, data
150 .import esym, data 150 .import esym, data
151 .import virtual_avail, data 151 .import virtual_avail, data
152 .import lwp0, data 152 .import lwp0, data
153 .import kpsw, data 
154 .import panic, code 153 .import panic, code
155 .import fpu_csw, data 154 .import fpu_csw, data
156 .import fpu_cur_uspace, data 
157 .import hp700_int_regs, data 155 .import hp700_int_regs, data
158 156
159 BSS(pdc_stack, 4) /* temp stack for PDC call */ 157 BSS(pdc_stack, 4) /* temp stack for PDC call */
160 BSS(kernelmapped, 4) /* set when kernel is mapped */ 158 BSS(kernelmapped, 4) /* set when kernel is mapped */
161 BSS(hppa_vtop, 4) /* a vtop translation table addr (pa=va) */ 159 BSS(hppa_vtop, 4) /* a vtop translation table addr (pa=va) */
162 160
163 .text 161 .text
164 .import kernel_setup, entry 162 .import kernel_setup, entry
165 163
166/* 164/*
167 * This is the starting location for the kernel 165 * This is the starting location for the kernel
168 */ 166 */
169ENTRY_NOPROFILE(start,0) 167ENTRY_NOPROFILE(start,0)
@@ -286,28 +284,28 @@ qisnowon: @@ -286,28 +284,28 @@ qisnowon:
286 rsm RESET_PSW, %r0 284 rsm RESET_PSW, %r0
287 nop ! nop ! nop ! nop ! nop ! nop ! nop 285 nop ! nop ! nop ! nop ! nop ! nop ! nop
288 286
289 /* 287 /*
290 * We need to do an rfi to get the C bit set 288 * We need to do an rfi to get the C bit set
291 */ 289 */
292 mtctl %r0, %pcsq 290 mtctl %r0, %pcsq
293 mtctl %r0, %pcsq 291 mtctl %r0, %pcsq
294 ldil L%virtual_mode, %t1 292 ldil L%virtual_mode, %t1
295 ldo R%virtual_mode(%t1), %t1 293 ldo R%virtual_mode(%t1), %t1
296 mtctl %t1, %pcoq 294 mtctl %t1, %pcoq
297 ldo 4(%t1), %t1 295 ldo 4(%t1), %t1
298 mtctl %t1, %pcoq 296 mtctl %t1, %pcoq
299 ldil L%kpsw, %t1 297 GET_CURCPU(%t1)
300 ldw R%kpsw(%t1), %t2 298 ldw CI_PSW(%t1), %t2
301 mtctl %t2, %ipsw 299 mtctl %t2, %ipsw
302 rfi 300 rfi
303 nop 301 nop
304 nop 302 nop
305 nop 303 nop
306 nop 304 nop
307 nop 305 nop
308 nop 306 nop
309 nop 307 nop
310 308
311virtual_mode: 309virtual_mode:
312 310
313 ldil L%kernelmapped, %t1 311 ldil L%kernelmapped, %t1
@@ -922,30 +920,30 @@ noras: @@ -922,30 +920,30 @@ noras:
922 * nop if there is a hardware FPU. 920 * nop if there is a hardware FPU.
923 */ 921 */
924ALTENTRY(hppa_fpu_nop1) 922ALTENTRY(hppa_fpu_nop1)
925 b,n switch_return 923 b,n switch_return
926 924
927 /* 925 /*
928 * We do have a hardware FPU. If the LWP 926 * We do have a hardware FPU. If the LWP
929 * that we just switched to has its state in the 927 * that we just switched to has its state in the
930 * FPU, enable the FPU, else disable it, so if 928 * FPU, enable the FPU, else disable it, so if
931 * the LWP does try to use the coprocessor 929 * the LWP does try to use the coprocessor
932 * we'll get an assist emulation trap to swap 930 * we'll get an assist emulation trap to swap
933 * states. 931 * states.
934 */ 932 */
935 ldil L%fpu_cur_uspace, %t1 933 GET_CURCPU(%t1)
936 mfctl %ccr, %r1 934 mfctl %ccr, %r1
937 mfctl CR_FPPADDR, %t2 935 mfctl CR_FPPADDR, %t2
938 ldw R%fpu_cur_uspace(%t1), %t1 936 ldw CI_FPU_STATE(%t1), %t1
939 depi 0, 25, 2, %r1 ; disables the FPU 937 depi 0, 25, 2, %r1 ; disables the FPU
940 comb,<>,n %t1, %t2, 0 ; nullify if LWPs different 938 comb,<>,n %t1, %t2, 0 ; nullify if LWPs different
941 depi 3, 25, 2, %r1 ; enables the FPU 939 depi 3, 25, 2, %r1 ; enables the FPU
942 mtctl %r1, %ccr 940 mtctl %r1, %ccr
943 941
944switch_return: 942switch_return:
945 copy %arg0, %ret0 943 copy %arg0, %ret0
946 944
947 ldw HPPA_FRAME_CRP(%r3), %rp 945 ldw HPPA_FRAME_CRP(%r3), %rp
948 bv 0(%rp) 946 bv 0(%rp)
949 ldwm -(HPPA_FRAME_SIZE+16*4)(%sp), %r3 947 ldwm -(HPPA_FRAME_SIZE+16*4)(%sp), %r3
950EXIT(cpu_switchto) 948EXIT(cpu_switchto)
951 949

cvs diff -r1.96 -r1.97 src/sys/arch/hp700/hp700/Attic/machdep.c (expand / switch to unified diff)

--- src/sys/arch/hp700/hp700/Attic/machdep.c 2011/01/13 21:15:15 1.96
+++ src/sys/arch/hp700/hp700/Attic/machdep.c 2011/01/23 09:44:58 1.97
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: machdep.c,v 1.96 2011/01/13 21:15:15 skrll Exp $ */ 1/* $NetBSD: machdep.c,v 1.97 2011/01/23 09:44:58 skrll Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc. 4 * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Matthew Fredette. 8 * by Matthew Fredette.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -48,27 +48,27 @@ @@ -48,27 +48,27 @@
48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
50 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 50 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
51 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 51 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
52 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 52 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
53 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 53 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
55 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 55 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
56 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 56 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
57 * THE POSSIBILITY OF SUCH DAMAGE. 57 * THE POSSIBILITY OF SUCH DAMAGE.
58 */ 58 */
59 59
60#include <sys/cdefs.h> 60#include <sys/cdefs.h>
61__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.96 2011/01/13 21:15:15 skrll Exp $"); 61__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.97 2011/01/23 09:44:58 skrll Exp $");
62 62
63#include "opt_cputype.h" 63#include "opt_cputype.h"
64#include "opt_ddb.h" 64#include "opt_ddb.h"
65#include "opt_kgdb.h" 65#include "opt_kgdb.h"
66#include "opt_modular.h" 66#include "opt_modular.h"
67#include "opt_useleds.h" 67#include "opt_useleds.h"
68 68
69#include <sys/param.h> 69#include <sys/param.h>
70#include <sys/systm.h> 70#include <sys/systm.h>
71#include <sys/signalvar.h> 71#include <sys/signalvar.h>
72#include <sys/kernel.h> 72#include <sys/kernel.h>
73#include <sys/proc.h> 73#include <sys/proc.h>
74#include <sys/buf.h> 74#include <sys/buf.h>
@@ -415,38 +415,48 @@ const struct hppa_cpu_info cpu_types[] = @@ -415,38 +415,48 @@ const struct hppa_cpu_info cpu_types[] =
415extern kmutex_t vmmap_lock; 415extern kmutex_t vmmap_lock;
416 416
417void 417void
418hppa_init(paddr_t start, void *bi) 418hppa_init(paddr_t start, void *bi)
419{ 419{
420 vaddr_t vstart; 420 vaddr_t vstart;
421 vaddr_t v; 421 vaddr_t v;
422 int error; 422 int error;
423 u_int *p, *q; 423 u_int *p, *q;
424 struct btlb_slot *btlb_slot; 424 struct btlb_slot *btlb_slot;
425 int btlb_slot_i; 425 int btlb_slot_i;
426 struct btinfo_symtab *bi_sym; 426 struct btinfo_symtab *bi_sym;
427 struct pcb *pcb0; 427 struct pcb *pcb0;
 428 struct cpu_info *ci;
428 429
429#ifdef KGDB 430#ifdef KGDB
430 boothowto |= RB_KDB; /* go to kgdb early if compiled in. */ 431 boothowto |= RB_KDB; /* go to kgdb early if compiled in. */
431#endif 432#endif
432 /* Setup curlwp/curcpu early for LOCKDEBUG and spl* */ 433 /* Setup curlwp/curcpu early for LOCKDEBUG and spl* */
433#ifdef MULTIPROCESSOR 434#ifdef MULTIPROCESSOR
434 mtctl(&cpus[0], CR_CURCPU); 435 mtctl(&cpus[0], CR_CURCPU);
435#else 436#else
436 mtctl(&lwp0, CR_CURLWP); 437 mtctl(&lwp0, CR_CURLWP);
437#endif 438#endif
438 lwp0.l_cpu = &cpus[0]; 439 lwp0.l_cpu = &cpus[0];
439 440
 441 /* curcpu() is now valid */
 442 ci = curcpu();
 443
 444 ci->ci_psw =
 445 PSW_Q | /* Interrupt State Collection Enable */
 446 PSW_P | /* Protection Identifier Validation Enable */
 447 PSW_C | /* Instruction Address Translation Enable */
 448 PSW_D; /* Data Address Translation Enable */
 449
440 /* Copy bootinfo */ 450 /* Copy bootinfo */
441 if (bi != NULL) 451 if (bi != NULL)
442 memcpy(&bootinfo, bi, sizeof(struct bootinfo)); 452 memcpy(&bootinfo, bi, sizeof(struct bootinfo));
443 453
444 pdc_init(); /* init PDC iface, so we can call em easy */ 454 pdc_init(); /* init PDC iface, so we can call em easy */
445 455
446 cpu_hzticks = (PAGE0->mem_10msec * 100) / hz; 456 cpu_hzticks = (PAGE0->mem_10msec * 100) / hz;
447 delay_init(); /* calculate CPU clock ratio */ 457 delay_init(); /* calculate CPU clock ratio */
448 458
449 /* cache parameters */ 459 /* cache parameters */
450 error = pdcproc_cache(&pdc_cache); 460 error = pdcproc_cache(&pdc_cache);
451 if (error < 0) { 461 if (error < 0) {
452#ifdef DEBUG 462#ifdef DEBUG
@@ -622,27 +632,26 @@ cpuid(void) @@ -622,27 +632,26 @@ cpuid(void)
622 * from locore.S 632 * from locore.S
623 */ 633 */
624 extern u_int trap_ep_T_TLB_DIRTY[]; 634 extern u_int trap_ep_T_TLB_DIRTY[];
625 extern u_int trap_ep_T_DTLBMISS[]; 635 extern u_int trap_ep_T_DTLBMISS[];
626 extern u_int trap_ep_T_DTLBMISSNA[]; 636 extern u_int trap_ep_T_DTLBMISSNA[];
627 extern u_int trap_ep_T_ITLBMISS[]; 637 extern u_int trap_ep_T_ITLBMISS[];
628 extern u_int trap_ep_T_ITLBMISSNA[]; 638 extern u_int trap_ep_T_ITLBMISSNA[];
629 639
630 struct pdc_cpuid pdc_cpuid; 640 struct pdc_cpuid pdc_cpuid;
631 const struct hppa_cpu_info *p = NULL; 641 const struct hppa_cpu_info *p = NULL;
632 const char *model; 642 const char *model;
633 u_int cpu_version, cpu_features; 643 u_int cpu_version, cpu_features;
634 int error; 644 int error;
635 extern int kpsw; 
636 645
637 /* may the scientific guessing begin */ 646 /* may the scientific guessing begin */
638 cpu_type = hpc_unknown; 647 cpu_type = hpc_unknown;
639 cpu_features = 0; 648 cpu_features = 0;
640 cpu_version = 0; 649 cpu_version = 0;
641 650
642 /* identify system type */ 651 /* identify system type */
643 error = pdcproc_model_info(&pdc_model); 652 error = pdcproc_model_info(&pdc_model);
644 if (error < 0) { 653 if (error < 0) {
645#ifdef DEBUG 654#ifdef DEBUG
646 printf("WARNING: PDC_MODEL_INFO error %d\n", error); 655 printf("WARNING: PDC_MODEL_INFO error %d\n", error);
647#endif 656#endif
648 pdc_model.hwmodel = 0; 657 pdc_model.hwmodel = 0;
@@ -799,27 +808,27 @@ cpuid(void) @@ -799,27 +808,27 @@ cpuid(void)
799 if (pmap_hptsize && p->hci_cputype != hpcxl && p->hci_cputype != hpcxl2) 808 if (pmap_hptsize && p->hci_cputype != hpcxl && p->hci_cputype != hpcxl2)
800 pmap_hptsize = 0; 809 pmap_hptsize = 0;
801 810
802 cpu_type = hppa_cpu_info->hci_cputype; 811 cpu_type = hppa_cpu_info->hci_cputype;
803 cpu_ibtlb_ins = hppa_cpu_info->ibtlbins; 812 cpu_ibtlb_ins = hppa_cpu_info->ibtlbins;
804 cpu_dbtlb_ins = hppa_cpu_info->dbtlbins; 813 cpu_dbtlb_ins = hppa_cpu_info->dbtlbins;
805 cpu_hpt_init = hppa_cpu_info->hptinit; 814 cpu_hpt_init = hppa_cpu_info->hptinit;
806 cpu_desidhash = hppa_cpu_info->desidhash; 815 cpu_desidhash = hppa_cpu_info->desidhash;
807 816
808 cpu_revision = (*cpu_desidhash)(); 817 cpu_revision = (*cpu_desidhash)();
809 818
810 /* force strong ordering for now */ 819 /* force strong ordering for now */
811 if (hppa_cpu_ispa20_p()) 820 if (hppa_cpu_ispa20_p())
812 kpsw |= PSW_O; 821 curcpu()->ci_psw |= PSW_O;
813 822
814 snprintf(cpu_model, sizeof(cpu_model), "HP9000/%s", model); 823 snprintf(cpu_model, sizeof(cpu_model), "HP9000/%s", model);
815 824
816#define LDILDO(t,f) ((t)[0] = (f)[0], (t)[1] = (f)[1]); 825#define LDILDO(t,f) ((t)[0] = (f)[0], (t)[1] = (f)[1]);
817 LDILDO(trap_ep_T_TLB_DIRTY , hppa_cpu_info->tlbdh); 826 LDILDO(trap_ep_T_TLB_DIRTY , hppa_cpu_info->tlbdh);
818 LDILDO(trap_ep_T_DTLBMISS , hppa_cpu_info->dtlbh); 827 LDILDO(trap_ep_T_DTLBMISS , hppa_cpu_info->dtlbh);
819 LDILDO(trap_ep_T_DTLBMISSNA, hppa_cpu_info->dtlbnah); 828 LDILDO(trap_ep_T_DTLBMISSNA, hppa_cpu_info->dtlbnah);
820 LDILDO(trap_ep_T_ITLBMISS , hppa_cpu_info->itlbh); 829 LDILDO(trap_ep_T_ITLBMISS , hppa_cpu_info->itlbh);
821 LDILDO(trap_ep_T_ITLBMISSNA, hppa_cpu_info->itlbnah); 830 LDILDO(trap_ep_T_ITLBMISSNA, hppa_cpu_info->itlbnah);
822#undef LDILDO 831#undef LDILDO
823 832
824 /* Bootstrap any FPU. */ 833 /* Bootstrap any FPU. */
825 hppa_fpu_bootstrap(pdc_coproc.ccr_enable); 834 hppa_fpu_bootstrap(pdc_coproc.ccr_enable);

cvs diff -r1.58 -r1.59 src/sys/arch/hp700/include/Attic/cpu.h (expand / switch to unified diff)

--- src/sys/arch/hp700/include/Attic/cpu.h 2011/01/22 10:57:07 1.58
+++ src/sys/arch/hp700/include/Attic/cpu.h 2011/01/23 09:44:58 1.59
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: cpu.h,v 1.58 2011/01/22 10:57:07 skrll Exp $ */ 1/* $NetBSD: cpu.h,v 1.59 2011/01/23 09:44:58 skrll Exp $ */
2 2
3/* $OpenBSD: cpu.h,v 1.55 2008/07/23 17:39:35 kettenis Exp $ */ 3/* $OpenBSD: cpu.h,v 1.55 2008/07/23 17:39:35 kettenis Exp $ */
4 4
5/* 5/*
6 * Copyright (c) 2000-2004 Michael Shalayeff 6 * Copyright (c) 2000-2004 Michael Shalayeff
7 * All rights reserved. 7 * All rights reserved.
8 * 8 *
9 * Redistribution and use in source and binary forms, with or without 9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions 10 * modification, are permitted provided that the following conditions
11 * are met: 11 * are met:
12 * 1. Redistributions of source code must retain the above copyright 12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer. 13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright 14 * 2. Redistributions in binary form must reproduce the above copyright
@@ -104,27 +104,26 @@ struct hppa_cpu_info { @@ -104,27 +104,26 @@ struct hppa_cpu_info {
104 104
105 int (*desidhash)(void); 105 int (*desidhash)(void);
106 const u_int *itlbh, *dtlbh, *itlbnah, *dtlbnah, *tlbdh; 106 const u_int *itlbh, *dtlbh, *itlbnah, *dtlbnah, *tlbdh;
107 int (*dbtlbins)(int, pa_space_t, vaddr_t, paddr_t, vsize_t, u_int); 107 int (*dbtlbins)(int, pa_space_t, vaddr_t, paddr_t, vsize_t, u_int);
108 int (*ibtlbins)(int, pa_space_t, vaddr_t, paddr_t, vsize_t, u_int); 108 int (*ibtlbins)(int, pa_space_t, vaddr_t, paddr_t, vsize_t, u_int);
109 int (*btlbprg)(int); 109 int (*btlbprg)(int);
110 int (*hptinit)(vaddr_t, vsize_t); 110 int (*hptinit)(vaddr_t, vsize_t);
111}; 111};
112 112
113#ifdef _KERNEL 113#ifdef _KERNEL
114extern const struct hppa_cpu_info *hppa_cpu_info; 114extern const struct hppa_cpu_info *hppa_cpu_info;
115extern int cpu_modelno; 115extern int cpu_modelno;
116extern int cpu_revision; 116extern int cpu_revision;
117extern register_t kpsw; 
118#endif 117#endif
119#endif 118#endif
120 119
121/* 120/*
122 * COPR/SFUs 121 * COPR/SFUs
123 */ 122 */
124#define HPPA_FPUS 0xc0 123#define HPPA_FPUS 0xc0
125#define HPPA_PMSFUS 0x20 /* ??? */ 124#define HPPA_PMSFUS 0x20 /* ??? */
126 125
127/* 126/*
128 * Exported definitions unique to hp700/PA-RISC cpu support. 127 * Exported definitions unique to hp700/PA-RISC cpu support.
129 */ 128 */
130 129
@@ -255,26 +254,30 @@ struct cpu_info { @@ -255,26 +254,30 @@ struct cpu_info {
255 254
256#ifndef _KMEMUSER 255#ifndef _KMEMUSER
257#ifdef MULTIPROCESSOR 256#ifdef MULTIPROCESSOR
258 struct lwp *ci_curlwp; /* CPU owner */ 257 struct lwp *ci_curlwp; /* CPU owner */
259#endif 258#endif
260 int ci_cpuid; /* CPU index (see cpus[] array) */ 259 int ci_cpuid; /* CPU index (see cpus[] array) */
261 int ci_mtx_count; 260 int ci_mtx_count;
262 int ci_mtx_oldspl; 261 int ci_mtx_oldspl;
263 int ci_want_resched; 262 int ci_want_resched;
264 263
265 volatile int ci_cpl; 264 volatile int ci_cpl;
266 volatile int ci_ipending; /* The pending interrupts. */ 265 volatile int ci_ipending; /* The pending interrupts. */
267 u_int ci_intr_depth; /* Nonzero iff running an interrupt. */ 266 u_int ci_intr_depth; /* Nonzero iff running an interrupt. */
 267
 268 register_t ci_psw; /* Processor Status Word. */
 269 paddr_t ci_fpu_state; /* LWP FPU state address, or zero. */
 270 u_long ci_itmr;
268#endif /* !_KMEMUSER */ 271#endif /* !_KMEMUSER */
269} __aligned(64); 272} __aligned(64);
270 273
271#endif /* _KERNEL || _KMEMUSER */ 274#endif /* _KERNEL || _KMEMUSER */
272 275
273#if defined(_KERNEL) 276#if defined(_KERNEL)
274 277
275/* 278/*
276 * definitions of cpu-dependent requirements 279 * definitions of cpu-dependent requirements
277 * referenced in generic code 280 * referenced in generic code
278 */ 281 */
279 282
280#define cpu_proc_fork(p1, p2) 283#define cpu_proc_fork(p1, p2)

cvs diff -r1.22 -r1.23 src/sys/arch/hppa/hppa/fpu.c (expand / switch to unified diff)

--- src/sys/arch/hppa/hppa/fpu.c 2011/01/14 02:06:26 1.22
+++ src/sys/arch/hppa/hppa/fpu.c 2011/01/23 09:44:59 1.23
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: fpu.c,v 1.22 2011/01/14 02:06:26 rmind Exp $ */ 1/* $NetBSD: fpu.c,v 1.23 2011/01/23 09:44:59 skrll Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 2002 The NetBSD Foundation, Inc. 4 * Copyright (c) 2002 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Matthew Fredette. 8 * by Matthew Fredette.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -24,27 +24,27 @@ @@ -24,27 +24,27 @@
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE. 29 * POSSIBILITY OF SUCH DAMAGE.
30 */ 30 */
31 31
32/* 32/*
33 * FPU handling for NetBSD/hppa. 33 * FPU handling for NetBSD/hppa.
34 */ 34 */
35 35
36#include <sys/cdefs.h> 36#include <sys/cdefs.h>
37__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.22 2011/01/14 02:06:26 rmind Exp $"); 37__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.23 2011/01/23 09:44:59 skrll Exp $");
38 38
39#include <sys/param.h> 39#include <sys/param.h>
40#include <sys/systm.h> 40#include <sys/systm.h>
41#include <sys/proc.h> 41#include <sys/proc.h>
42#include <sys/signalvar.h> 42#include <sys/signalvar.h>
43 43
44#include <uvm/uvm_extern.h> 44#include <uvm/uvm_extern.h>
45 45
46#include <machine/cpufunc.h> 46#include <machine/cpufunc.h>
47#include <machine/frame.h> 47#include <machine/frame.h>
48#include <machine/reg.h> 48#include <machine/reg.h>
49#include <machine/pcb.h> 49#include <machine/pcb.h>
50#include <machine/pmap.h> 50#include <machine/pmap.h>
@@ -68,29 +68,26 @@ __KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.22 @@ -68,29 +68,26 @@ __KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.22
68#define OPCODE_DOUBLE 0x08000000 68#define OPCODE_DOUBLE 0x08000000
69#define OPCODE_STORE 0x00000200 69#define OPCODE_STORE 0x00000200
70#define OPCODE_INDEXED 0x00001000 70#define OPCODE_INDEXED 0x00001000
71 71
72/* This is nonzero iff we're using a hardware FPU. */ 72/* This is nonzero iff we're using a hardware FPU. */
73int fpu_present; 73int fpu_present;
74 74
75/* If we have any FPU, this is its version. */ 75/* If we have any FPU, this is its version. */
76u_int fpu_version; 76u_int fpu_version;
77 77
78/* The number of times we have had to switch the FPU context. */ 78/* The number of times we have had to switch the FPU context. */
79u_int fpu_csw; 79u_int fpu_csw;
80 80
81/* The U-space physical address of the proc in the FPU, or zero. */ 
82paddr_t fpu_cur_uspace; 
83 
84/* In locore.S, this swaps states in and out of the FPU. */ 81/* In locore.S, this swaps states in and out of the FPU. */
85void hppa_fpu_swapout(struct pcb *); 82void hppa_fpu_swapout(struct pcb *);
86void hppa_fpu_swap(struct fpreg *, struct fpreg *); 83void hppa_fpu_swap(struct fpreg *, struct fpreg *);
87 84
88#ifdef FPEMUL 85#ifdef FPEMUL
89/* 86/*
90 * Given a trapframe and a general register number, the  87 * Given a trapframe and a general register number, the
91 * FRAME_REG macro returns a pointer to that general 88 * FRAME_REG macro returns a pointer to that general
92 * register. The _frame_reg_positions array is a lookup  89 * register. The _frame_reg_positions array is a lookup
93 * table, since the general registers aren't in order  90 * table, since the general registers aren't in order
94 * in a trapframe. 91 * in a trapframe.
95 *  92 *
96 * NB: this more or less assumes that all members of  93 * NB: this more or less assumes that all members of
@@ -183,65 +180,69 @@ hppa_fpu_bootstrap(u_int ccr_enable) @@ -183,65 +180,69 @@ hppa_fpu_bootstrap(u_int ccr_enable)
183 " fstds %%fr0, 0(%%r22) \n" 180 " fstds %%fr0, 0(%%r22) \n"
184 " ldo %1, %%r22 \n" 181 " ldo %1, %%r22 \n"
185 " copr,0,0 \n" 182 " copr,0,0 \n"
186 " fstds %%fr0, 0(%%r22) \n" 183 " fstds %%fr0, 0(%%r22) \n"
187 : "=m" (junk), "=m" (vers) : : "r22"); 184 : "=m" (junk), "=m" (vers) : : "r22");
188 185
189 /* 186 /*
190 * Now mark that no process has the FPU, 187 * Now mark that no process has the FPU,
191 * and disable it, so the first time it 188 * and disable it, so the first time it
192 * gets used the process' state gets 189 * gets used the process' state gets
193 * swapped in. 190 * swapped in.
194 */ 191 */
195 fpu_csw = 0; 192 fpu_csw = 0;
196 fpu_cur_uspace = 0; 193 curcpu()->ci_fpu_state = 0;
197 mtctl(ccr_enable & (CCR_MASK ^ HPPA_FPUS), CR_CCR);  194 mtctl(ccr_enable & (CCR_MASK ^ HPPA_FPUS), CR_CCR);
198 }  195 }
199#ifdef FPEMUL 196#ifdef FPEMUL
200 else 197 else
201 /* 198 /*
202 * XXX This is a hack - to avoid 199 * XXX This is a hack - to avoid
203 * having to set up the emulator so 200 * having to set up the emulator so
204 * it can work for one instruction for 201 * it can work for one instruction for
205 * proc0, we dispatch the copr,0,0 opcode  202 * proc0, we dispatch the copr,0,0 opcode
206 * into the emulator directly.  203 * into the emulator directly.
207 */ 204 */
208 decode_0c(OPCODE_COPR_0_0, 0, 0, vers); 205 decode_0c(OPCODE_COPR_0_0, 0, 0, vers);
209#endif /* FPEMUL */ 206#endif /* FPEMUL */
210 fpu_version = vers[0]; 207 fpu_version = vers[0];
211} 208}
212 209
213/* 210/*
214 * If the given LWP has its state in the FPU, 211 * If the given LWP has its state in the FPU,
215 * flush that state out into the LWP's PCB. 212 * flush that state out into the LWP's PCB.
216 */ 213 */
217void 214void
218hppa_fpu_flush(struct lwp *l) 215hppa_fpu_flush(struct lwp *l)
219{ 216{
220 struct trapframe *tf = l->l_md.md_regs; 217 struct trapframe *tf = l->l_md.md_regs;
221 struct pcb *pcb = lwp_getpcb(l); 218 struct pcb *pcb = lwp_getpcb(l);
 219 struct cpu_info *ci = curcpu();
 220
 221 if (!fpu_present)
 222 return;
222 223
223 /* 224 /*
224 * If we have a hardware FPU, and this process' 225 * If we have a hardware FPU, and this process'
225 * state is currently in it, swap it out. 226 * state is currently in it, swap it out.
226 */ 227 */
227 228
228 if (!fpu_present || fpu_cur_uspace == 0 || 229 if (ci->ci_fpu_state == 0 ||
229 fpu_cur_uspace != tf->tf_cr30) { 230 ci->ci_fpu_state != tf->tf_cr30) {
230 return; 231 return;
231 } 232 }
232 233
233 hppa_fpu_swapout(pcb); 234 hppa_fpu_swapout(pcb);
234 fpu_cur_uspace = 0; 235 ci->ci_fpu_state = 0;
235} 236}
236 237
237#ifdef FPEMUL 238#ifdef FPEMUL
238 239
239/* 240/*
240 * This emulates a coprocessor load/store instruction. 241 * This emulates a coprocessor load/store instruction.
241 */ 242 */
242static int hppa_fpu_ls(struct trapframe *, struct lwp *); 243static int hppa_fpu_ls(struct trapframe *, struct lwp *);
243static int  244static int
244hppa_fpu_ls(struct trapframe *frame, struct lwp *l) 245hppa_fpu_ls(struct trapframe *frame, struct lwp *l)
245{ 246{
246 struct pcb *pcb = lwp_getpcb(l); 247 struct pcb *pcb = lwp_getpcb(l);
247 u_int inst, inst_b, inst_x, inst_s, inst_t; 248 u_int inst, inst_b, inst_x, inst_s, inst_t;

cvs diff -r1.13 -r1.14 src/sys/arch/hppa/hppa/machdep.h (expand / switch to unified diff)

--- src/sys/arch/hppa/hppa/machdep.h 2010/03/31 12:56:14 1.13
+++ src/sys/arch/hppa/hppa/machdep.h 2011/01/23 09:44:59 1.14
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: machdep.h,v 1.13 2010/03/31 12:56:14 skrll Exp $ */ 1/* $NetBSD: machdep.h,v 1.14 2011/01/23 09:44:59 skrll Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 2002 The NetBSD Foundation, Inc. 4 * Copyright (c) 2002 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Matthew Fredette. 8 * by Matthew Fredette.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -60,27 +60,26 @@ extern vaddr_t virtual_start, virtual_en @@ -60,27 +60,26 @@ extern vaddr_t virtual_start, virtual_en
60/* Total physical pages, and low reserved physical pages. */ 60/* Total physical pages, and low reserved physical pages. */
61extern int totalphysmem; 61extern int totalphysmem;
62extern int availphysmem; 62extern int availphysmem;
63extern int resvmem; 63extern int resvmem;
64 64
65/* BTLB minimum and maximum sizes, in pages. */ 65/* BTLB minimum and maximum sizes, in pages. */
66extern u_int hppa_btlb_size_min; 66extern u_int hppa_btlb_size_min;
67extern u_int hppa_btlb_size_max; 67extern u_int hppa_btlb_size_max;
68 68
69/* FPU variables and functions. */ 69/* FPU variables and functions. */
70extern int fpu_present; 70extern int fpu_present;
71extern u_int fpu_version; 71extern u_int fpu_version;
72extern u_int fpu_csw; 72extern u_int fpu_csw;
73extern paddr_t fpu_cur_uspace; 
74void hppa_fpu_bootstrap(u_int); 73void hppa_fpu_bootstrap(u_int);
75void hppa_fpu_flush(struct lwp *); 74void hppa_fpu_flush(struct lwp *);
76void hppa_fpu_emulate(struct trapframe *, struct lwp *, u_int); 75void hppa_fpu_emulate(struct trapframe *, struct lwp *, u_int);
77 76
78/* Interrupt dispatching. */ 77/* Interrupt dispatching. */
79void hppa_intr(struct trapframe *); 78void hppa_intr(struct trapframe *);
80 79
81/* Special pmap functions. */ 80/* Special pmap functions. */
82void pmap_redzone(vaddr_t, vaddr_t, int); 81void pmap_redzone(vaddr_t, vaddr_t, int);
83 82
84/* Functions to write low memory and the kernel text. */ 83/* Functions to write low memory and the kernel text. */
85void hppa_ktext_stw(vaddr_t, int); 84void hppa_ktext_stw(vaddr_t, int);
86void hppa_ktext_stb(vaddr_t, char); 85void hppa_ktext_stb(vaddr_t, char);

cvs diff -r1.52 -r1.53 src/sys/arch/hppa/hppa/trap.S (expand / switch to unified diff)

--- src/sys/arch/hppa/hppa/trap.S 2011/01/22 19:35:48 1.52
+++ src/sys/arch/hppa/hppa/trap.S 2011/01/23 09:44:59 1.53
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: trap.S,v 1.52 2011/01/22 19:35:48 skrll Exp $ */ 1/* $NetBSD: trap.S,v 1.53 2011/01/23 09:44:59 skrll Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2002 The NetBSD Foundation, Inc. 4 * Copyright (c) 2002 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Matthew Fredette. 8 * by Matthew Fredette.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -232,28 +232,28 @@ syscall_entry: @@ -232,28 +232,28 @@ syscall_entry:
232 * Make space for the syscall arguments. 232 * Make space for the syscall arguments.
233 * 233 *
234 * Match the offset from %sp to the trapframe with the offset in 234 * Match the offset from %sp to the trapframe with the offset in
235 * TLABEL(all) for the benefit of ddb. 235 * TLABEL(all) for the benefit of ddb.
236 */ 236 */
237 stwm %r0, HPPA_FRAME_SIZE+HPPA_FRAME_MAXARGS(%sr1, %sp) 237 stwm %r0, HPPA_FRAME_SIZE+HPPA_FRAME_MAXARGS(%sr1, %sp)
238 238
239 /* Align correctly */ 239 /* Align correctly */
240 ldo HPPA_FRAME_SIZE-1(%sp),%sp 240 ldo HPPA_FRAME_SIZE-1(%sp),%sp
241 depi 0, 31, 6, %sp 241 depi 0, 31, 6, %sp
242 242
243 stw %r0, HPPA_FRAME_CRP(%sr1, %sp) 243 stw %r0, HPPA_FRAME_CRP(%sr1, %sp)
244 244
245 ldil L%kpsw, %t1 245 GET_CURCPU_SPACE(%sr1, %t1)
246 ldw R%kpsw(%sr1, %t1), %t1 246 ldw CI_PSW(%sr1, %t1), %t1
247 stw %r1, TF_CR15-TRAPFRAME_SIZEOF(%sr1, %t3) /* eiem ,bc */ 247 stw %r1, TF_CR15-TRAPFRAME_SIZEOF(%sr1, %t3) /* eiem ,bc */
248 stw %t1, TF_CR22-TRAPFRAME_SIZEOF(%sr1, %t3) /* ipsw */ 248 stw %t1, TF_CR22-TRAPFRAME_SIZEOF(%sr1, %t3) /* ipsw */
249  249
250 mfsp %sr3, %t1 250 mfsp %sr3, %t1
251 stw %t1, TF_SR3-TRAPFRAME_SIZEOF(%sr1, %t3) 251 stw %t1, TF_SR3-TRAPFRAME_SIZEOF(%sr1, %t3)
252 stw %ret0, TF_CR8-TRAPFRAME_SIZEOF(%sr1, %t3) /* pidr1 */ 252 stw %ret0, TF_CR8-TRAPFRAME_SIZEOF(%sr1, %t3) /* pidr1 */
253 253
254 /* now we can allow interrupts to happen */ 254 /* now we can allow interrupts to happen */
255 mtctl %r1, %eiem 255 mtctl %r1, %eiem
256 256
257 /* 257 /*
258 * Normally, we only have to save the caller-saved registers, because 258 * Normally, we only have to save the caller-saved registers, because
259 * the callee-saved registers will be naturally saved and restored by 259 * the callee-saved registers will be naturally saved and restored by
@@ -783,30 +783,30 @@ ALTENTRY(os_hpmc_cont) @@ -783,30 +783,30 @@ ALTENTRY(os_hpmc_cont)
783 mtsp %r1, %sr7 783 mtsp %r1, %sr7
784 784
785 /* Reload the Interruption Vector Address. */ 785 /* Reload the Interruption Vector Address. */
786 ldil L%ivaaddr, %r1 786 ldil L%ivaaddr, %r1
787 ldo R%ivaaddr(%r1), %r1 787 ldo R%ivaaddr(%r1), %r1
788 mtctl %r1, %iva 788 mtctl %r1, %iva
789 789
790 /* Reload the HPT base and mask. */ 790 /* Reload the HPT base and mask. */
791 ldil L%hppa_vtop, %r1 791 ldil L%hppa_vtop, %r1
792 ldw R%hppa_vtop(%r1), %r1 792 ldw R%hppa_vtop(%r1), %r1
793 mtctl %r1, CR_VTOP 793 mtctl %r1, CR_VTOP
794 794
795 /* Disable interrupts for the long haul. */ 795 /* Disable interrupts for the long haul. */
796 ldil L%kpsw, %t1 796 GET_CURCPU(%t1)
797 ldw R%kpsw(%t1), %r1 797 ldw CI_PSW(%t1), %r1
798 depi 0, PSW_I_POS, 1, %r1 798 depi 0, PSW_I_POS, 1, %r1
799 stw %r1, R%kpsw(%t1) 799 stw %r1, CI_PSW(%t1)
800 800
801 /* Reload the global data pointer. */ 801 /* Reload the global data pointer. */
802 ldil L%$global$, %dp 802 ldil L%$global$, %dp
803 ldo R%$global$(%dp), %dp 803 ldo R%$global$(%dp), %dp
804 804
805 /* Move onto the emergency stack. */ 805 /* Move onto the emergency stack. */
806 ldil L%emergency_stack_start, %sp 806 ldil L%emergency_stack_start, %sp
807 ldo R%emergency_stack_start(%sp), %sp 807 ldo R%emergency_stack_start(%sp), %sp
808 stwm %r0, HPPA_FRAME_SIZE(%sp) 808 stwm %r0, HPPA_FRAME_SIZE(%sp)
809 copy %sp, %r3 809 copy %sp, %r3
810 810
811 /* Start stack calling convention. */ 811 /* Start stack calling convention. */
812 stw %r0, HPPA_FRAME_CRP(%sp) 812 stw %r0, HPPA_FRAME_CRP(%sp)
@@ -832,28 +832,28 @@ ALTENTRY(os_hpmc_cont) @@ -832,28 +832,28 @@ ALTENTRY(os_hpmc_cont)
832 /* Set kernelmapped. */ 832 /* Set kernelmapped. */
833 ldil L%kernelmapped, %r1 833 ldil L%kernelmapped, %r1
834 stw %r1, R%kernelmapped(%r1) 834 stw %r1, R%kernelmapped(%r1)
835 835
836 /* Reload %arg0 (it may have been destroyed). */ 836 /* Reload %arg0 (it may have been destroyed). */
837 ldi T_INTERRUPT, %arg0 837 ldi T_INTERRUPT, %arg0
838 838
839 /* Disable the interrupt queues. */ 839 /* Disable the interrupt queues. */
840 rsm RESET_PSW, %r0 840 rsm RESET_PSW, %r0
841 841
842L$check_do_rfi: 842L$check_do_rfi:
843 843
844 /* Load IPSW. */ 844 /* Load IPSW. */
845 ldil L%kpsw, %r1 845 GET_CURCPU(%r1)
846 ldw R%kpsw(%r1), %r1 846 ldw CI_PSW(%r1), %r1
847 mtctl %r1, %ipsw 847 mtctl %r1, %ipsw
848 848
849 /* Get the address of hppa_machine_check. */ 849 /* Get the address of hppa_machine_check. */
850 ldil L%hppa_machine_check, %r1 850 ldil L%hppa_machine_check, %r1
851 ldo R%hppa_machine_check(%r1), %r1 851 ldo R%hppa_machine_check(%r1), %r1
852 852
853 /* Load the instruction address queues. */ 853 /* Load the instruction address queues. */
854 mtctl %r1, %pcoq 854 mtctl %r1, %pcoq
855 ldo 4(%r1), %r1 855 ldo 4(%r1), %r1
856 mtctl %r1, %pcoq 856 mtctl %r1, %pcoq
857 ldi HPPA_SID_KERNEL, %r1 857 ldi HPPA_SID_KERNEL, %r1
858 mtctl %r1, %pcsq 858 mtctl %r1, %pcsq
859 mtctl %r1, %pcsq 859 mtctl %r1, %pcsq
@@ -932,43 +932,43 @@ LEAF_ENTRY_NOPROFILE(TLABEL(emu)) @@ -932,43 +932,43 @@ LEAF_ENTRY_NOPROFILE(TLABEL(emu))
932ALTENTRY(hppa_fpu_nop0) 932ALTENTRY(hppa_fpu_nop0)
933 b,n L$emulate_fpu 933 b,n L$emulate_fpu
934 934
935 /* 935 /*
936 * We have a hardware FPU. If it is enabled, branch to emulate the 936 * We have a hardware FPU. If it is enabled, branch to emulate the
937 * instruction. 937 * instruction.
938 */ 938 */
939 mfctl %ccr, %arg0 939 mfctl %ccr, %arg0
940 extru,= %arg0, 25, 2, %r1 940 extru,= %arg0, 25, 2, %r1
941 b,n L$emulate_fpu 941 b,n L$emulate_fpu
942 942
943 /* 943 /*
944 * The hardware FPU is disabled, so we need to swap in the FPU state of 944 * The hardware FPU is disabled, so we need to swap in the FPU state of
945 * the process whose uspace physical address in CR_UPADDR. We may also 945 * the LWP whose uspace physical address in CR_UPADDR. We may also
946 * need to swap out the FPU state of any process whose uspace physical 946 * need to swap out the FPU state of any LWP whose uspace physical
947 * address is in the fpu_cur_uspace variable. 947 * address is in curcpu()->ci_fpu_state.
948 */ 948 */
949  949
950 /* 950 /*
951 * So far, the CTRAP() macro has saved %r1 in %tr7, and the dispatching 951 * So far, the CTRAP() macro has saved %r1 in %tr7, and the dispatching
952 * above has saved %arg0 in tr2. Save the other registers that we want 952 * above has saved %arg0 in tr2. Save the other registers that we want
953 * to use. hppa_fpu_swap deliberately uses only these registers and %r1 953 * to use. hppa_fpu_swap deliberately uses only these registers and %r1
954 * and %arg0. 954 * and %arg0.
955 */ 955 */
956 mtctl %arg1, %tr3 956 mtctl %arg1, %tr3
957 mtctl %rp, %tr5 957 mtctl %rp, %tr5
958 958
959 /* Call hppa_fpu_swap. */ 959 /* Call hppa_fpu_swap. */
960 ldil L%fpu_cur_uspace, %arg0 960 GET_CURCPU(%arg0)
961 ldw R%fpu_cur_uspace(%arg0), %arg0 961 ldw CI_FPU_STATE(%arg0), %arg0
962 mfctl CR_FPPADDR, %arg1 962 mfctl CR_FPPADDR, %arg1
963 blr 0, %rp 963 blr 0, %rp
964 b hppa_fpu_swap 964 b hppa_fpu_swap
965 nop 965 nop
966  966
967 /* Restore registers and rfi. */ 967 /* Restore registers and rfi. */
968 mfctl %tr5, %rp 968 mfctl %tr5, %rp
969 mfctl %tr3, %arg1 969 mfctl %tr3, %arg1
970 mfctl %tr2, %arg0 970 mfctl %tr2, %arg0
971 mfctl %tr7, %r1 971 mfctl %tr7, %r1
972 rfi 972 rfi
973 nop 973 nop
974 974
@@ -1099,38 +1099,38 @@ ALTENTRY(hppa_fpu_swap) @@ -1099,38 +1099,38 @@ ALTENTRY(hppa_fpu_swap)
1099 fdc,m %r1(%arg0) 1099 fdc,m %r1(%arg0)
1100 fdc,m %r1(%arg0) 1100 fdc,m %r1(%arg0)
1101 fdc,m %r1(%arg0) 1101 fdc,m %r1(%arg0)
1102 fdc,m %r1(%arg0) 1102 fdc,m %r1(%arg0)
1103 fdc,m %r1(%arg0) 1103 fdc,m %r1(%arg0)
1104 fdc,m %r1(%arg0) 1104 fdc,m %r1(%arg0)
1105 fdc,m %r1(%arg0) 1105 fdc,m %r1(%arg0)
1106 fdc,m %r1(%arg0) 1106 fdc,m %r1(%arg0)
1107 sync 1107 sync
1108 1108
1109L$fpu_swap_in: 1109L$fpu_swap_in:
1110 1110
1111 /* 1111 /*
1112 * Stash the incoming user structure in fpu_cur_uspace. Because this 1112 * Stash the incoming user structure in curcpu->ci_fpu_state. Because
1113 * variable holds a physical address, this means that hppa_fpu_swap can 1113 * this variable holds a physical address, this means that hppa_fpu_swap
1114 * only be called with a non-zero user_in from physical mode (i.e., from 1114 * can only be called with a non-zero user_in from physical mode (i.e.,
1115 * the emulation assist trap handler). And that's exactly what happens 1115 * from the emulation assist trap handler). And that's exactly what
1116 * now. 1116 * happens now.
1117 * 1117 *
1118 * So stash fpu_cur_uspace, branching past the swap-in code if it is 1118 * So stash ci->ci_fpu_state, branching past the swap-in code if it is
1119 * zero. 1119 * zero.
1120 */ 1120 */
1121 ldil L%fpu_cur_uspace, %r1 1121 GET_CURCPU(%r1)
1122 comb,= %r0, %arg1, L$fpu_no_swap_in 1122 comb,= %r0, %arg1, L$fpu_no_swap_in
1123 stw %arg1, R%fpu_cur_uspace(%r1) 1123 stw %arg1, CI_FPU_STATE(%r1)
1124 1124
1125 /* 1125 /*
1126 * Swap in the new FPU state. 1126 * Swap in the new FPU state.
1127 */ 1127 */
1128 ldo 31*8(%arg1), %arg1 1128 ldo 31*8(%arg1), %arg1
1129 fldds,ma -8(%arg1), %fr31 1129 fldds,ma -8(%arg1), %fr31
1130 fldds,ma -8(%arg1), %fr30 1130 fldds,ma -8(%arg1), %fr30
1131 fldds,ma -8(%arg1), %fr29 1131 fldds,ma -8(%arg1), %fr29
1132 fldds,ma -8(%arg1), %fr28 1132 fldds,ma -8(%arg1), %fr28
1133 fldds,ma -8(%arg1), %fr27 1133 fldds,ma -8(%arg1), %fr27
1134 fldds,ma -8(%arg1), %fr26 1134 fldds,ma -8(%arg1), %fr26
1135 fldds,ma -8(%arg1), %fr25 1135 fldds,ma -8(%arg1), %fr25
1136 fldds,ma -8(%arg1), %fr24 1136 fldds,ma -8(%arg1), %fr24
@@ -1936,28 +1936,28 @@ ENTRY_NOPROFILE(TLABEL(all),0) @@ -1936,28 +1936,28 @@ ENTRY_NOPROFILE(TLABEL(all),0)
1936 stw %t2, CI_TRAPSAVE + TF_CR22(%t3) 1936 stw %t2, CI_TRAPSAVE + TF_CR22(%t3)
1937 1937
1938 mfsp %sr3, %t1 1938 mfsp %sr3, %t1
1939 mfctl %pidr1, %t2 1939 mfctl %pidr1, %t2
1940 stw %t1, CI_TRAPSAVE + TF_SR3(%t3) 1940 stw %t1, CI_TRAPSAVE + TF_SR3(%t3)
1941 stw %t2, CI_TRAPSAVE + TF_CR8(%t3) 1941 stw %t2, CI_TRAPSAVE + TF_CR8(%t3)
1942 1942
1943 /* Setup kernel context */ 1943 /* Setup kernel context */
1944 ldi HPPA_PID_KERNEL,%t1 1944 ldi HPPA_PID_KERNEL,%t1
1945 mtctl %t1, %pidr1 1945 mtctl %t1, %pidr1
1946 mtsp %r0, %sr3 1946 mtsp %r0, %sr3
1947 1947
1948 /* this will enable interrupts after `cold' */ 1948 /* this will enable interrupts after `cold' */
1949 ldil L%kpsw, %t1 1949 GET_CURCPU(%t1)
1950 ldw R%kpsw(%t1), %t2 1950 ldw CI_PSW(%t1), %t2
1951 mtctl %r0, %eiem 1951 mtctl %r0, %eiem
1952 mtctl %t2, %ipsw 1952 mtctl %t2, %ipsw
1953 1953
1954 /* save interruption instruction address space queue */ 1954 /* save interruption instruction address space queue */
1955 mfctl %pcsq, %t1 1955 mfctl %pcsq, %t1
1956 mtctl %r0, %pcsq 1956 mtctl %r0, %pcsq
1957 mfctl %pcsq, %t2 1957 mfctl %pcsq, %t2
1958 stw %t1, CI_TRAPSAVE + TF_IISQH(%t3) /* use ,bc */ 1958 stw %t1, CI_TRAPSAVE + TF_IISQH(%t3) /* use ,bc */
1959 stw %t2, CI_TRAPSAVE + TF_IISQT(%t3) 1959 stw %t2, CI_TRAPSAVE + TF_IISQT(%t3)
1960 mtctl %r0, %pcsq 1960 mtctl %r0, %pcsq
1961 1961
1962 /* 1962 /*
1963 * Set up the kernel stack pointer. If the trap happened while we were 1963 * Set up the kernel stack pointer. If the trap happened while we were

cvs diff -r1.95 -r1.96 src/sys/arch/hppa/hppa/trap.c (expand / switch to unified diff)

--- src/sys/arch/hppa/hppa/trap.c 2010/12/20 00:25:34 1.95
+++ src/sys/arch/hppa/hppa/trap.c 2011/01/23 09:44:59 1.96
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: trap.c,v 1.95 2010/12/20 00:25:34 matt Exp $ */ 1/* $NetBSD: trap.c,v 1.96 2011/01/23 09:44:59 skrll Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc. 4 * Copyright (c) 2001, 2002 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Matthew Fredette. 8 * by Matthew Fredette.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions 11 * modification, are permitted provided that the following conditions
12 * are met: 12 * are met:
13 * 1. Redistributions of source code must retain the above copyright 13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer. 14 * notice, this list of conditions and the following disclaimer.
@@ -48,27 +48,27 @@ @@ -48,27 +48,27 @@
48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 48 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 49 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
50 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 50 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
51 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 51 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
52 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 52 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
53 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 53 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 54 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
55 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 55 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
56 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 56 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
57 * THE POSSIBILITY OF SUCH DAMAGE. 57 * THE POSSIBILITY OF SUCH DAMAGE.
58 */ 58 */
59 59
60#include <sys/cdefs.h> 60#include <sys/cdefs.h>
61__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.95 2010/12/20 00:25:34 matt Exp $"); 61__KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.96 2011/01/23 09:44:59 skrll Exp $");
62 62
63/* #define INTRDEBUG */ 63/* #define INTRDEBUG */
64/* #define TRAPDEBUG */ 64/* #define TRAPDEBUG */
65/* #define USERTRACE */ 65/* #define USERTRACE */
66 66
67#include "opt_kgdb.h" 67#include "opt_kgdb.h"
68#include "opt_ptrace.h" 68#include "opt_ptrace.h"
69#include "opt_sa.h" 69#include "opt_sa.h"
70 70
71#include <sys/param.h> 71#include <sys/param.h>
72#include <sys/systm.h> 72#include <sys/systm.h>
73#include <sys/kernel.h> 73#include <sys/kernel.h>
74#include <sys/syscall.h> 74#include <sys/syscall.h>
@@ -401,40 +401,40 @@ user_backtrace(struct trapframe *tf, str @@ -401,40 +401,40 @@ user_backtrace(struct trapframe *tf, str
401#ifdef DEBUG 401#ifdef DEBUG
402/* 402/*
403 * This sanity-checks a trapframe. It is full of various assumptions about 403 * This sanity-checks a trapframe. It is full of various assumptions about
404 * what a healthy CPU state should be, with some documented elsewhere, some not. 404 * what a healthy CPU state should be, with some documented elsewhere, some not.
405 */ 405 */
406void 406void
407frame_sanity_check(const char *func, int line, int type, struct trapframe *tf, 407frame_sanity_check(const char *func, int line, int type, struct trapframe *tf,
408 struct lwp *l) 408 struct lwp *l)
409{ 409{
410#if 0 410#if 0
411 extern int kernel_text; 411 extern int kernel_text;
412 extern int etext; 412 extern int etext;
413#endif 413#endif
414 extern register_t kpsw; 414 struct cpu_info *ci = curcpu();
415 415
416#define SANITY(e) \ 416#define SANITY(e) \
417do { \ 417do { \
418 if (sanity_frame == NULL && !(e)) { \ 418 if (sanity_frame == NULL && !(e)) { \
419 sanity_frame = tf; \ 419 sanity_frame = tf; \
420 sanity_lwp = l; \ 420 sanity_lwp = l; \
421 sanity_string = #e; \ 421 sanity_string = #e; \
422 } \ 422 } \
423} while (/* CONSTCOND */ 0) 423} while (/* CONSTCOND */ 0)
424 424
425 KASSERT(l != NULL); 425 KASSERT(l != NULL);
426 SANITY((tf->tf_ipsw & kpsw) == kpsw); 426 SANITY((tf->tf_ipsw & ci->ci_psw) == ci->ci_psw);
427 SANITY((kpsw & PSW_I) == 0 || tf->tf_eiem != 0); 427 SANITY((ci->ci_psw & PSW_I) == 0 || tf->tf_eiem != 0);
428 if (tf->tf_iisq_head == HPPA_SID_KERNEL) { 428 if (tf->tf_iisq_head == HPPA_SID_KERNEL) {
429 vaddr_t minsp, maxsp, uv; 429 vaddr_t minsp, maxsp, uv;
430 430
431 uv = uvm_lwp_getuarea(l); 431 uv = uvm_lwp_getuarea(l);
432 432
433 /* 433 /*
434 * If the trap happened in the gateway page, we take the easy 434 * If the trap happened in the gateway page, we take the easy
435 * way out and assume that the trapframe is okay. 435 * way out and assume that the trapframe is okay.
436 */ 436 */
437 if ((tf->tf_iioq_head & ~PAGE_MASK) == SYSCALLGATE) 437 if ((tf->tf_iioq_head & ~PAGE_MASK) == SYSCALLGATE)
438 goto out; 438 goto out;
439 439
440 SANITY(!USERMODE(tf->tf_iioq_head)); 440 SANITY(!USERMODE(tf->tf_iioq_head));

cvs diff -r1.45 -r1.46 src/sys/arch/hppa/hppa/vm_machdep.c (expand / switch to unified diff)

--- src/sys/arch/hppa/hppa/vm_machdep.c 2010/06/06 09:12:39 1.45
+++ src/sys/arch/hppa/hppa/vm_machdep.c 2011/01/23 09:44:59 1.46
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: vm_machdep.c,v 1.45 2010/06/06 09:12:39 skrll Exp $ */ 1/* $NetBSD: vm_machdep.c,v 1.46 2011/01/23 09:44:59 skrll Exp $ */
2 2
3/* $OpenBSD: vm_machdep.c,v 1.64 2008/09/30 18:54:26 miod Exp $ */ 3/* $OpenBSD: vm_machdep.c,v 1.64 2008/09/30 18:54:26 miod Exp $ */
4 4
5/* 5/*
6 * Copyright (c) 1999-2004 Michael Shalayeff 6 * Copyright (c) 1999-2004 Michael Shalayeff
7 * All rights reserved. 7 * All rights reserved.
8 * 8 *
9 * Redistribution and use in source and binary forms, with or without 9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions 10 * modification, are permitted provided that the following conditions
11 * are met: 11 * are met:
12 * 1. Redistributions of source code must retain the above copyright 12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer. 13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright 14 * 2. Redistributions in binary form must reproduce the above copyright
@@ -19,27 +19,27 @@ @@ -19,27 +19,27 @@
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 21 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
22 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 22 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
23 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 23 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
24 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
26 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 26 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
27 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
28 * THE POSSIBILITY OF SUCH DAMAGE. 28 * THE POSSIBILITY OF SUCH DAMAGE.
29 */ 29 */
30 30
31#include <sys/cdefs.h> 31#include <sys/cdefs.h>
32__KERNEL_RCSID(0, "$NetBSD: vm_machdep.c,v 1.45 2010/06/06 09:12:39 skrll Exp $"); 32__KERNEL_RCSID(0, "$NetBSD: vm_machdep.c,v 1.46 2011/01/23 09:44:59 skrll Exp $");
33 33
34#include <sys/param.h> 34#include <sys/param.h>
35#include <sys/systm.h> 35#include <sys/systm.h>
36#include <sys/proc.h> 36#include <sys/proc.h>
37#include <sys/signalvar.h> 37#include <sys/signalvar.h>
38#include <sys/malloc.h> 38#include <sys/malloc.h>
39#include <sys/buf.h> 39#include <sys/buf.h>
40#include <sys/vnode.h> 40#include <sys/vnode.h>
41#include <sys/ptrace.h> 41#include <sys/ptrace.h>
42#include <sys/exec.h> 42#include <sys/exec.h>
43#include <sys/core.h> 43#include <sys/core.h>
44#include <sys/pool.h> 44#include <sys/pool.h>
45 45
@@ -132,27 +132,27 @@ cpu_lwp_fork(struct lwp *l1, struct lwp  @@ -132,27 +132,27 @@ cpu_lwp_fork(struct lwp *l1, struct lwp
132 tf->tf_sr4 = tf->tf_sr5 = tf->tf_sr6 = space; 132 tf->tf_sr4 = tf->tf_sr5 = tf->tf_sr6 = space;
133 tf->tf_iisq_head = tf->tf_iisq_tail = space; 133 tf->tf_iisq_head = tf->tf_iisq_tail = space;
134 134
135 /* Load the protection registers */ 135 /* Load the protection registers */
136 tf->tf_pidr1 = tf->tf_pidr2 = pmap->pm_pid; 136 tf->tf_pidr1 = tf->tf_pidr2 = pmap->pm_pid;
137 137
138 /* 138 /*
139 * theoretically these could be inherited from the father, 139 * theoretically these could be inherited from the father,
140 * but just in case. 140 * but just in case.
141 */ 141 */
142 tf->tf_sr7 = HPPA_SID_KERNEL; 142 tf->tf_sr7 = HPPA_SID_KERNEL;
143 mfctl(CR_EIEM, tf->tf_eiem); 143 mfctl(CR_EIEM, tf->tf_eiem);
144 tf->tf_ipsw = PSW_C | PSW_Q | PSW_P | PSW_D | PSW_I /* | PSW_L */ | 144 tf->tf_ipsw = PSW_C | PSW_Q | PSW_P | PSW_D | PSW_I /* | PSW_L */ |
145 (kpsw & PSW_O); 145 (curcpu()->ci_psw & PSW_O);
146 146
147 /* 147 /*
148 * Set up return value registers as libc:fork() expects 148 * Set up return value registers as libc:fork() expects
149 */ 149 */
150 tf->tf_ret0 = l1->l_proc->p_pid; 150 tf->tf_ret0 = l1->l_proc->p_pid;
151 tf->tf_ret1 = 1; /* ischild */ 151 tf->tf_ret1 = 1; /* ischild */
152 tf->tf_t1 = 0; /* errno */ 152 tf->tf_t1 = 0; /* errno */
153 153
154 /* 154 /*
155 * If specified, give the child a different stack. 155 * If specified, give the child a different stack.
156 */ 156 */
157 if (stack != NULL) 157 if (stack != NULL)
158 tf->tf_sp = (register_t)stack; 158 tf->tf_sp = (register_t)stack;