| @@ -1,14 +1,14 @@ | | | @@ -1,14 +1,14 @@ |
1 | /* $NetBSD: mipsX_subr.S,v 1.38 2011/02/20 07:45:48 matt Exp $ */ | | 1 | /* $NetBSD: mipsX_subr.S,v 1.39 2011/02/22 08:19:47 matt Exp $ */ |
2 | | | 2 | |
3 | /* | | 3 | /* |
4 | * Copyright 2002 Wasabi Systems, Inc. | | 4 | * Copyright 2002 Wasabi Systems, Inc. |
5 | * All rights reserved. | | 5 | * All rights reserved. |
6 | * | | 6 | * |
7 | * Written by Simon Burge for Wasabi Systems, Inc. | | 7 | * Written by Simon Burge for Wasabi Systems, Inc. |
8 | * | | 8 | * |
9 | * Redistribution and use in source and binary forms, with or without | | 9 | * Redistribution and use in source and binary forms, with or without |
10 | * modification, are permitted provided that the following conditions | | 10 | * modification, are permitted provided that the following conditions |
11 | * are met: | | 11 | * are met: |
12 | * 1. Redistributions of source code must retain the above copyright | | 12 | * 1. Redistributions of source code must retain the above copyright |
13 | * notice, this list of conditions and the following disclaimer. | | 13 | * notice, this list of conditions and the following disclaimer. |
14 | * 2. Redistributions in binary form must reproduce the above copyright | | 14 | * 2. Redistributions in binary form must reproduce the above copyright |
| @@ -2432,27 +2432,26 @@ MIPSX(entry0set): | | | @@ -2432,27 +2432,26 @@ MIPSX(entry0set): |
2432 | nop | | 2432 | nop |
2433 | nop | | 2433 | nop |
2434 | _MTC0 t3, MIPS_COP_0_TLB_HI # restore TLB_HI | | 2434 | _MTC0 t3, MIPS_COP_0_TLB_HI # restore TLB_HI |
2435 | COP0_SYNC | | 2435 | COP0_SYNC |
2436 | nop | | 2436 | nop |
2437 | nop | | 2437 | nop |
2438 | | | 2438 | |
2439 | MIPSX(resume): | | 2439 | MIPSX(resume): |
2440 | #endif /* !ENABLE_MIPS_16KB_PAGE */ | | 2440 | #endif /* !ENABLE_MIPS_16KB_PAGE */ |
2441 | j ra | | 2441 | j ra |
2442 | nop | | 2442 | nop |
2443 | END(MIPSX(cpu_switch_resume)) | | 2443 | END(MIPSX(cpu_switch_resume)) |
2444 | | | 2444 | |
2445 | #if defined(ENABLE_MIPS3_WIRED_MAP) | | | |
2446 | /*-------------------------------------------------------------------------- | | 2445 | /*-------------------------------------------------------------------------- |
2447 | * | | 2446 | * |
2448 | * mipsN_tlb_write_indexed -- | | 2447 | * mipsN_tlb_write_indexed -- |
2449 | * | | 2448 | * |
2450 | * Write the given entry into the TLB at the given index. | | 2449 | * Write the given entry into the TLB at the given index. |
2451 | * Pass full R4000 style TLB info including variable page size mask. | | 2450 | * Pass full R4000 style TLB info including variable page size mask. |
2452 | * | | 2451 | * |
2453 | * mipsN_tlb_write_indexed(size_t tlb_index, const struct tlbmask *tlb) | | 2452 | * mipsN_tlb_write_indexed(size_t tlb_index, const struct tlbmask *tlb) |
2454 | * | | 2453 | * |
2455 | * Results: | | 2454 | * Results: |
2456 | * None. | | 2455 | * None. |
2457 | * | | 2456 | * |
2458 | * Side effects: | | 2457 | * Side effects: |
| @@ -2492,27 +2491,26 @@ LEAF(MIPSX(tlb_write_indexed)) | | | @@ -2492,27 +2491,26 @@ LEAF(MIPSX(tlb_write_indexed)) |
2492 | nop | | 2491 | nop |
2493 | nop # Delay for effect | | 2492 | nop # Delay for effect |
2494 | nop | | 2493 | nop |
2495 | | | 2494 | |
2496 | _MTC0 t0, MIPS_COP_0_TLB_HI # Restore the PID. | | 2495 | _MTC0 t0, MIPS_COP_0_TLB_HI # Restore the PID. |
2497 | COP0_SYNC | | 2496 | COP0_SYNC |
2498 | mtc0 v0, MIPS_COP_0_TLB_PG_MASK # Restore page mask. | | 2497 | mtc0 v0, MIPS_COP_0_TLB_PG_MASK # Restore page mask. |
2499 | COP0_SYNC | | 2498 | COP0_SYNC |
2500 | nop | | 2499 | nop |
2501 | nop | | 2500 | nop |
2502 | j ra | | 2501 | j ra |
2503 | mtc0 v1, MIPS_COP_0_STATUS # Restore the status register | | 2502 | mtc0 v1, MIPS_COP_0_STATUS # Restore the status register |
2504 | END(MIPSX(tlb_write_indexed)) | | 2503 | END(MIPSX(tlb_write_indexed)) |
2505 | #endif /* ENABLE_MIPS3_WIRED_MAP */ | | | |
2506 | | | 2504 | |
2507 | #if defined(MIPS3) | | 2505 | #if defined(MIPS3) |
2508 | /*---------------------------------------------------------------------------- | | 2506 | /*---------------------------------------------------------------------------- |
2509 | * | | 2507 | * |
2510 | * mipsN_VCED -- | | 2508 | * mipsN_VCED -- |
2511 | * | | 2509 | * |
2512 | * Handle virtual coherency exceptions. | | 2510 | * Handle virtual coherency exceptions. |
2513 | * Called directly from the mips3 exception-table code. | | 2511 | * Called directly from the mips3 exception-table code. |
2514 | * only k0, k1 are available on entry | | 2512 | * only k0, k1 are available on entry |
2515 | * | | 2513 | * |
2516 | * Results: | | 2514 | * Results: |
2517 | * None. | | 2515 | * None. |
2518 | * | | 2516 | * |
| @@ -2625,29 +2623,27 @@ _C_LABEL(MIPSX(locore_vec)): | | | @@ -2625,29 +2623,27 @@ _C_LABEL(MIPSX(locore_vec)): |
2625 | PTR_WORD _C_LABEL(MIPSX(cpu_switch_resume)) | | 2623 | PTR_WORD _C_LABEL(MIPSX(cpu_switch_resume)) |
2626 | PTR_WORD _C_LABEL(MIPSX(lwp_trampoline)) | | 2624 | PTR_WORD _C_LABEL(MIPSX(lwp_trampoline)) |
2627 | PTR_WORD _C_LABEL(MIPSX(setfunc_trampoline)) | | 2625 | PTR_WORD _C_LABEL(MIPSX(setfunc_trampoline)) |
2628 | PTR_WORD _C_LABEL(MIPSX(wbflush)) # wbflush | | 2626 | PTR_WORD _C_LABEL(MIPSX(wbflush)) # wbflush |
2629 | PTR_WORD _C_LABEL(MIPSX(tlb_set_asid)) | | 2627 | PTR_WORD _C_LABEL(MIPSX(tlb_set_asid)) |
2630 | PTR_WORD _C_LABEL(MIPSX(tlb_invalidate_asids)) | | 2628 | PTR_WORD _C_LABEL(MIPSX(tlb_invalidate_asids)) |
2631 | PTR_WORD _C_LABEL(MIPSX(tlb_invalidate_addr)) | | 2629 | PTR_WORD _C_LABEL(MIPSX(tlb_invalidate_addr)) |
2632 | PTR_WORD _C_LABEL(MIPSX(tlb_invalidate_globals)) | | 2630 | PTR_WORD _C_LABEL(MIPSX(tlb_invalidate_globals)) |
2633 | PTR_WORD _C_LABEL(MIPSX(tlb_invalidate_all)) | | 2631 | PTR_WORD _C_LABEL(MIPSX(tlb_invalidate_all)) |
2634 | PTR_WORD _C_LABEL(MIPSX(tlb_record_asids)) | | 2632 | PTR_WORD _C_LABEL(MIPSX(tlb_record_asids)) |
2635 | PTR_WORD _C_LABEL(MIPSX(tlb_update)) | | 2633 | PTR_WORD _C_LABEL(MIPSX(tlb_update)) |
2636 | PTR_WORD _C_LABEL(MIPSX(tlb_enter)) | | 2634 | PTR_WORD _C_LABEL(MIPSX(tlb_enter)) |
2637 | PTR_WORD _C_LABEL(MIPSX(tlb_read_indexed)) | | 2635 | PTR_WORD _C_LABEL(MIPSX(tlb_read_indexed)) |
2638 | #if defined(ENABLE_MIPS3_WIRED_MAP) | | | |
2639 | PTR_WORD _C_LABEL(MIPSX(tlb_write_indexed)) | | 2636 | PTR_WORD _C_LABEL(MIPSX(tlb_write_indexed)) |
2640 | #else | | | |
2641 | PTR_WORD _C_LABEL(nullop) | | 2637 | PTR_WORD _C_LABEL(nullop) |
2642 | #endif | | 2638 | #endif |
2643 | | | 2639 | |
2644 | .globl _C_LABEL(MIPSX(locoresw)) | | 2640 | .globl _C_LABEL(MIPSX(locoresw)) |
2645 | _C_LABEL(MIPSX(locoresw)): | | 2641 | _C_LABEL(MIPSX(locoresw)): |
2646 | PTR_WORD _C_LABEL(MIPSX(wbflush)) # wbflush | | 2642 | PTR_WORD _C_LABEL(MIPSX(wbflush)) # wbflush |
2647 | PTR_WORD _C_LABEL(nullop) # cpu_idle | | 2643 | PTR_WORD _C_LABEL(nullop) # cpu_idle |
2648 | PTR_WORD _C_LABEL(nullop) # send ipi | | 2644 | PTR_WORD _C_LABEL(nullop) # send ipi |
2649 | PTR_WORD _C_LABEL(nullop) # cpu_offline_md | | 2645 | PTR_WORD _C_LABEL(nullop) # cpu_offline_md |
2650 | PTR_WORD _C_LABEL(nullop) # cpu_init_md | | 2646 | PTR_WORD _C_LABEL(nullop) # cpu_init_md |
2651 | PTR_WORD _C_LABEL(nullop) # lsw_bus_error | | 2647 | PTR_WORD _C_LABEL(nullop) # lsw_bus_error |
2652 | | | 2648 | |
2653 | MIPSX(excpt_sw): | | 2649 | MIPSX(excpt_sw): |