device_t, cfdata_t, etc. CFATTACH_DECL -> CFATTACH_DECL_NEW for sizeof(struct device).diff -r1.92 -r1.93 src/sys/arch/vax/include/cpu.h
(matt)
--- src/sys/arch/vax/include/cpu.h 2011/04/14 08:17:27 1.92
+++ src/sys/arch/vax/include/cpu.h 2011/06/05 16:59:21 1.93
@@ -1,239 +1,239 @@ | @@ -1,239 +1,239 @@ | |||
1 | /* $NetBSD: cpu.h,v 1.92 2011/04/14 08:17:27 matt Exp $ */ | 1 | /* $NetBSD: cpu.h,v 1.93 2011/06/05 16:59:21 matt Exp $ */ | |
2 | 2 | |||
3 | /* | 3 | /* | |
4 | * Copyright (c) 1994 Ludd, University of Lule}, Sweden | 4 | * Copyright (c) 1994 Ludd, University of Lule}, Sweden | |
5 | * All rights reserved. | 5 | * All rights reserved. | |
6 | * | 6 | * | |
7 | * Redistribution and use in source and binary forms, with or without | 7 | * Redistribution and use in source and binary forms, with or without | |
8 | * modification, are permitted provided that the following conditions | 8 | * modification, are permitted provided that the following conditions | |
9 | * are met: | 9 | * are met: | |
10 | * 1. Redistributions of source code must retain the above copyright | 10 | * 1. Redistributions of source code must retain the above copyright | |
11 | * notice, this list of conditions and the following disclaimer. | 11 | * notice, this list of conditions and the following disclaimer. | |
12 | * 2. Redistributions in binary form must reproduce the above copyright | 12 | * 2. Redistributions in binary form must reproduce the above copyright | |
13 | * notice, this list of conditions and the following disclaimer in the | 13 | * notice, this list of conditions and the following disclaimer in the | |
14 | * documentation and/or other materials provided with the distribution. | 14 | * documentation and/or other materials provided with the distribution. | |
15 | * 3. All advertising materials mentioning features or use of this software | 15 | * 3. All advertising materials mentioning features or use of this software | |
16 | * must display the following acknowledgement: | 16 | * must display the following acknowledgement: | |
17 | * This product includes software developed at Ludd, University of Lule} | 17 | * This product includes software developed at Ludd, University of Lule} | |
18 | * 4. The name of the author may not be used to endorse or promote products | 18 | * 4. The name of the author may not be used to endorse or promote products | |
19 | * derived from this software without specific prior written permission | 19 | * derived from this software without specific prior written permission | |
20 | * | 20 | * | |
21 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR | 21 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR | |
22 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES | 22 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES | |
23 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. | 23 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. | |
24 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | 24 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | |
25 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | 25 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | |
26 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | 26 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
27 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | 27 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
28 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | 28 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
29 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | 29 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | |
30 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | 30 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
31 | */ | 31 | */ | |
32 | 32 | |||
33 | #ifndef _VAX_CPU_H_ | 33 | #ifndef _VAX_CPU_H_ | |
34 | #define _VAX_CPU_H_ | 34 | #define _VAX_CPU_H_ | |
35 | 35 | |||
36 | #if defined(_KERNEL_OPT) | 36 | #if defined(_KERNEL_OPT) | |
37 | #include "opt_multiprocessor.h" | 37 | #include "opt_multiprocessor.h" | |
38 | #include "opt_lockdebug.h" | 38 | #include "opt_lockdebug.h" | |
39 | #endif | 39 | #endif | |
40 | 40 | |||
41 | #define CPU_PRINTFATALTRAPS 1 | 41 | #define CPU_PRINTFATALTRAPS 1 | |
42 | #define CPU_CONSDEV 2 | 42 | #define CPU_CONSDEV 2 | |
43 | #define CPU_BOOTED_DEVICE 3 | 43 | #define CPU_BOOTED_DEVICE 3 | |
44 | #define CPU_BOOTED_KERNEL 4 | 44 | #define CPU_BOOTED_KERNEL 4 | |
45 | #define CPU_MAXID 5 | 45 | #define CPU_MAXID 5 | |
46 | 46 | |||
47 | #ifdef _KERNEL | 47 | #ifdef _KERNEL | |
48 | 48 | |||
49 | #include <sys/cdefs.h> | 49 | #include <sys/cdefs.h> | |
50 | #include <sys/queue.h> | 50 | #include <sys/queue.h> | |
51 | #include <sys/device_if.h> | 51 | #include <sys/device_if.h> | |
52 | #include <sys/cpu_data.h> | 52 | #include <sys/cpu_data.h> | |
53 | 53 | |||
54 | #include <machine/mtpr.h> | 54 | #include <machine/mtpr.h> | |
55 | #include <machine/pcb.h> | 55 | #include <machine/pcb.h> | |
56 | #include <machine/uvax.h> | 56 | #include <machine/uvax.h> | |
57 | #include <machine/psl.h> | 57 | #include <machine/psl.h> | |
58 | 58 | |||
59 | #define enablertclock() | 59 | #define enablertclock() | |
60 | 60 | |||
61 | /* | 61 | /* | |
62 | * All cpu-dependent info is kept in this struct. Pointer to the | 62 | * All cpu-dependent info is kept in this struct. Pointer to the | |
63 | * struct for the current cpu is set up in locore.c. | 63 | * struct for the current cpu is set up in locore.c. | |
64 | */ | 64 | */ | |
65 | struct cpu_info; | 65 | struct cpu_info; | |
66 | 66 | |||
67 | struct cpu_dep { | 67 | struct cpu_dep { | |
68 | void (*cpu_steal_pages)(void); /* pmap init before mm is on */ | 68 | void (*cpu_steal_pages)(void); /* pmap init before mm is on */ | |
69 | int (*cpu_mchk)(void *); /* Machine check handling */ | 69 | int (*cpu_mchk)(void *); /* Machine check handling */ | |
70 | void (*cpu_memerr)(void); /* Memory subsystem errors */ | 70 | void (*cpu_memerr)(void); /* Memory subsystem errors */ | |
71 | /* Autoconfiguration */ | 71 | /* Autoconfiguration */ | |
72 | void (*cpu_conf)(void); | 72 | void (*cpu_conf)(void); | |
73 | int (*cpu_gettime)(struct timeval *); /* Read cpu clock time */ | 73 | int (*cpu_gettime)(struct timeval *); /* Read cpu clock time */ | |
74 | void (*cpu_settime)(struct timeval *); /* Write system time to cpu */ | 74 | void (*cpu_settime)(struct timeval *); /* Write system time to cpu */ | |
75 | short cpu_vups; /* speed of cpu */ | 75 | short cpu_vups; /* speed of cpu */ | |
76 | short cpu_scbsz; /* (estimated) size of SCB */ | 76 | short cpu_scbsz; /* (estimated) size of SCB */ | |
77 | void (*cpu_halt)(void); /* Cpu dependent halt call */ | 77 | void (*cpu_halt)(void); /* Cpu dependent halt call */ | |
78 | void (*cpu_reboot)(int); /* Cpu dependent reboot call */ | 78 | void (*cpu_reboot)(int); /* Cpu dependent reboot call */ | |
79 | void (*cpu_clrf)(void); /* Clear cold/warm start flags */ | 79 | void (*cpu_clrf)(void); /* Clear cold/warm start flags */ | |
80 | const char * const *cpu_devs; /* mainbus devices */ | 80 | const char * const *cpu_devs; /* mainbus devices */ | |
81 | void (*cpu_attach_cpu)(device_t); /* print CPU info */ | 81 | void (*cpu_attach_cpu)(device_t); /* print CPU info */ | |
82 | int cpu_flags; | 82 | int cpu_flags; | |
83 | void (*cpu_badaddr)(void); /* cpu-specific badaddr() */ | 83 | void (*cpu_badaddr)(void); /* cpu-specific badaddr() */ | |
84 | }; | 84 | }; | |
85 | 85 | |||
86 | #if defined(MULTIPROCESSOR) | 86 | #if defined(MULTIPROCESSOR) | |
87 | /* | 87 | /* | |
88 | * All cpu-dependent calls for multicpu systems goes here. | 88 | * All cpu-dependent calls for multicpu systems goes here. | |
89 | */ | 89 | */ | |
90 | struct cpu_mp_dep { | 90 | struct cpu_mp_dep { | |
91 | void (*cpu_startslave)(struct cpu_info *); | 91 | void (*cpu_startslave)(struct cpu_info *); | |
92 | void (*cpu_send_ipi)(struct cpu_info *); | 92 | void (*cpu_send_ipi)(struct cpu_info *); | |
93 | void (*cpu_cnintr)(void); | 93 | void (*cpu_cnintr)(void); | |
94 | }; | 94 | }; | |
95 | /* | 95 | /* | |
96 | * NOTE: This is not bit mask, this is bit _number_. | 96 | * NOTE: This is not bit mask, this is bit _number_. | |
97 | */ | 97 | */ | |
98 | #define IPI_START_CNTX 1 /* Start console transmitter, proc out */ | 98 | #define IPI_START_CNTX 1 /* Start console transmitter, proc out */ | |
99 | #define IPI_SEND_CNCHAR 2 /* Write char to console, kernel printf */ | 99 | #define IPI_SEND_CNCHAR 2 /* Write char to console, kernel printf */ | |
100 | #define IPI_RUNNING 3 /* This CPU just started to run */ | 100 | #define IPI_RUNNING 3 /* This CPU just started to run */ | |
101 | #define IPI_TBIA 4 /* Flush the TLB */ | 101 | #define IPI_TBIA 4 /* Flush the TLB */ | |
102 | #define IPI_DDB 5 /* Jump into the DDB loop */ | 102 | #define IPI_DDB 5 /* Jump into the DDB loop */ | |
103 | #define IPI_XCALL 6 /* Helper for xcall(9) */ | 103 | #define IPI_XCALL 6 /* Helper for xcall(9) */ | |
104 | 104 | |||
105 | #define IPI_DEST_MASTER -1 /* Destination is mastercpu */ | 105 | #define IPI_DEST_MASTER -1 /* Destination is mastercpu */ | |
106 | #define IPI_DEST_ALL -2 /* Broadcast */ | 106 | #define IPI_DEST_ALL -2 /* Broadcast */ | |
107 | 107 | |||
108 | extern const struct cpu_mp_dep *mp_dep_call; | 108 | extern const struct cpu_mp_dep *mp_dep_call; | |
109 | #endif /* defined(MULTIPROCESSOR) */ | 109 | #endif /* defined(MULTIPROCESSOR) */ | |
110 | 110 | |||
111 | #define CPU_RAISEIPL 1 /* Must raise IPL until intr is handled */ | 111 | #define CPU_RAISEIPL 1 /* Must raise IPL until intr is handled */ | |
112 | 112 | |||
113 | extern const struct cpu_dep *dep_call; | 113 | extern const struct cpu_dep *dep_call; | |
114 | /* Holds pointer to current CPU struct. */ | 114 | /* Holds pointer to current CPU struct. */ | |
115 | 115 | |||
116 | struct clockframe { | 116 | struct clockframe { | |
117 | int pc; | 117 | int pc; | |
118 | int ps; | 118 | int ps; | |
119 | }; | 119 | }; | |
120 | 120 | |||
121 | struct cpu_info { | 121 | struct cpu_info { | |
122 | /* | 122 | /* | |
123 | * Public members. | 123 | * Public members. | |
124 | */ | 124 | */ | |
125 | struct cpu_data ci_data; /* MI per-cpu data */ | 125 | struct cpu_data ci_data; /* MI per-cpu data */ | |
126 | struct device *ci_dev; /* device struct for this cpu */ | 126 | device_t ci_dev; /* device struct for this cpu */ | |
127 | int ci_mtx_oldspl; /* saved spl */ | 127 | int ci_mtx_oldspl; /* saved spl */ | |
128 | int ci_mtx_count; /* negative count of mutexes */ | 128 | int ci_mtx_count; /* negative count of mutexes */ | |
129 | int ci_cpuid; /* h/w specific cpu id */ | 129 | int ci_cpuid; /* h/w specific cpu id */ | |
130 | int ci_want_resched; /* Should change process */ | 130 | int ci_want_resched; /* Should change process */ | |
131 | 131 | |||
132 | /* | 132 | /* | |
133 | * Private members. | 133 | * Private members. | |
134 | */ | 134 | */ | |
135 | #if defined(__HAVE_FAST_SOFTINTS) | 135 | #if defined(__HAVE_FAST_SOFTINTS) | |
136 | lwp_t *ci_softlwps[SOFTINT_COUNT]; | 136 | lwp_t *ci_softlwps[SOFTINT_COUNT]; | |
137 | #endif | 137 | #endif | |
138 | vaddr_t ci_istack; /* Interrupt stack location */ | 138 | vaddr_t ci_istack; /* Interrupt stack location */ | |
139 | const char *ci_cpustr; | 139 | const char *ci_cpustr; | |
140 | int ci_slotid; /* cpu slot */ | 140 | int ci_slotid; /* cpu slot */ | |
141 | #if defined(MULTIPROCESSOR) | 141 | #if defined(MULTIPROCESSOR) | |
142 | struct lwp *ci_curlwp; /* current lwp (for other cpus) */ | 142 | struct lwp *ci_curlwp; /* current lwp (for other cpus) */ | |
143 | volatile int ci_flags; /* See below */ | 143 | volatile int ci_flags; /* See below */ | |
144 | long ci_ipimsgs; /* Sent IPI bits */ | 144 | long ci_ipimsgs; /* Sent IPI bits */ | |
145 | struct trapframe *ci_ddb_regs; /* Used by DDB */ | 145 | struct trapframe *ci_ddb_regs; /* Used by DDB */ | |
146 | SIMPLEQ_ENTRY(cpu_info) ci_next; /* next cpu_info */ | 146 | SIMPLEQ_ENTRY(cpu_info) ci_next; /* next cpu_info */ | |
147 | #endif | 147 | #endif | |
148 | uintptr_t ci_cas_addr; /* current address doing CAS in a RAS */ | 148 | uintptr_t ci_cas_addr; /* current address doing CAS in a RAS */ | |
149 | }; | 149 | }; | |
150 | #define CI_MASTERCPU 1 /* Set if master CPU */ | 150 | #define CI_MASTERCPU 1 /* Set if master CPU */ | |
151 | #define CI_RUNNING 2 /* Set when a slave CPU is running */ | 151 | #define CI_RUNNING 2 /* Set when a slave CPU is running */ | |
152 | #define CI_STOPPED 4 /* Stopped (in debugger) */ | 152 | #define CI_STOPPED 4 /* Stopped (in debugger) */ | |
153 | 153 | |||
154 | extern int cpu_printfataltraps; | 154 | extern int cpu_printfataltraps; | |
155 | 155 | |||
156 | #define curcpu() (curlwp->l_cpu + 0) | 156 | #define curcpu() (curlwp->l_cpu + 0) | |
157 | #define curlwp ((struct lwp *)mfpr(PR_SSP)) | 157 | #define curlwp ((struct lwp *)mfpr(PR_SSP)) | |
158 | #define cpu_number() (curcpu()->ci_cpuid) | 158 | #define cpu_number() (curcpu()->ci_cpuid) | |
159 | #define cpu_need_resched(ci, flags) \ | 159 | #define cpu_need_resched(ci, flags) \ | |
160 | do { \ | 160 | do { \ | |
161 | (ci)->ci_want_resched = 1; \ | 161 | (ci)->ci_want_resched = 1; \ | |
162 | mtpr(AST_OK,PR_ASTLVL); \ | 162 | mtpr(AST_OK,PR_ASTLVL); \ | |
163 | } while (/*CONSTCOND*/ 0) | 163 | } while (/*CONSTCOND*/ 0) | |
164 | #define cpu_proc_fork(x, y) do { } while (/*CONSCOND*/0) | 164 | #define cpu_proc_fork(x, y) do { } while (/*CONSCOND*/0) | |
165 | #define cpu_idle() do { } while (/*CONSCOND*/0) | 165 | #define cpu_idle() do { } while (/*CONSCOND*/0) | |
166 | static inline bool | 166 | static inline bool | |
167 | cpu_intr_p(void) | 167 | cpu_intr_p(void) | |
168 | { | 168 | { | |
169 | register_t psl; | 169 | register_t psl; | |
170 | __asm("movpsl %0" : "=g"(psl)); | 170 | __asm("movpsl %0" : "=g"(psl)); | |
171 | return (psl & PSL_IS) != 0; | 171 | return (psl & PSL_IS) != 0; | |
172 | } | 172 | } | |
173 | #if defined(MULTIPROCESSOR) | 173 | #if defined(MULTIPROCESSOR) | |
174 | #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CI_MASTERCPU) | 174 | #define CPU_IS_PRIMARY(ci) ((ci)->ci_flags & CI_MASTERCPU) | |
175 | 175 | |||
176 | #define CPU_INFO_ITERATOR int | 176 | #define CPU_INFO_ITERATOR int | |
177 | #define CPU_INFO_FOREACH(cii, ci) cii = 0, ci = SIMPLEQ_FIRST(&cpus); \ | 177 | #define CPU_INFO_FOREACH(cii, ci) cii = 0, ci = SIMPLEQ_FIRST(&cpus); \ | |
178 | ci != NULL; \ | 178 | ci != NULL; \ | |
179 | ci = SIMPLEQ_NEXT(ci, ci_next) | 179 | ci = SIMPLEQ_NEXT(ci, ci_next) | |
180 | 180 | |||
181 | extern SIMPLEQ_HEAD(cpu_info_qh, cpu_info) cpus; | 181 | extern SIMPLEQ_HEAD(cpu_info_qh, cpu_info) cpus; | |
182 | extern char vax_mp_tramp; | 182 | extern char vax_mp_tramp; | |
183 | #endif | 183 | #endif | |
184 | 184 | |||
185 | /* | 185 | /* | |
186 | * Notify the current process (p) that it has a signal pending, | 186 | * Notify the current process (p) that it has a signal pending, | |
187 | * process as soon as possible. | 187 | * process as soon as possible. | |
188 | */ | 188 | */ | |
189 | 189 | |||
190 | #define cpu_signotify(l) mtpr(AST_OK,PR_ASTLVL) | 190 | #define cpu_signotify(l) mtpr(AST_OK,PR_ASTLVL) | |
191 | 191 | |||
192 | 192 | |||
193 | /* | 193 | /* | |
194 | * Give a profiling tick to the current process when the user profiling | 194 | * Give a profiling tick to the current process when the user profiling | |
195 | * buffer pages are invalid. On the hp300, request an ast to send us | 195 | * buffer pages are invalid. On the hp300, request an ast to send us | |
196 | * through trap, marking the proc as needing a profiling tick. | 196 | * through trap, marking the proc as needing a profiling tick. | |
197 | */ | 197 | */ | |
198 | #define cpu_need_proftick(l) do { (l)->l_pflag |= LP_OWEUPC; mtpr(AST_OK,PR_ASTLVL); } while (/*CONSTCOND*/ 0) | 198 | #define cpu_need_proftick(l) do { (l)->l_pflag |= LP_OWEUPC; mtpr(AST_OK,PR_ASTLVL); } while (/*CONSTCOND*/ 0) | |
199 | 199 | |||
200 | /* | 200 | /* | |
201 | * This defines the I/O device register space size in pages. | 201 | * This defines the I/O device register space size in pages. | |
202 | */ | 202 | */ | |
203 | #define IOSPSZ ((64*1024) / VAX_NBPG) /* 64k == 128 pages */ | 203 | #define IOSPSZ ((64*1024) / VAX_NBPG) /* 64k == 128 pages */ | |
204 | 204 | |||
205 | #define LWP_PC(l) cpu_lwp_pc(l) | 205 | #define LWP_PC(l) cpu_lwp_pc(l) | |
206 | 206 | |||
207 | struct device; | 207 | struct device; | |
208 | struct buf; | 208 | struct buf; | |
209 | struct pte; | 209 | struct pte; | |
210 | 210 | |||
211 | #include <sys/lwp.h> | 211 | #include <sys/lwp.h> | |
212 | 212 | |||
213 | /* Some low-level prototypes */ | 213 | /* Some low-level prototypes */ | |
214 | #if defined(MULTIPROCESSOR) | 214 | #if defined(MULTIPROCESSOR) | |
215 | void cpu_slavesetup(device_t, int); | 215 | void cpu_slavesetup(device_t, int); | |
216 | void cpu_boot_secondary_processors(void); | 216 | void cpu_boot_secondary_processors(void); | |
217 | void cpu_send_ipi(int, int); | 217 | void cpu_send_ipi(int, int); | |
218 | void cpu_handle_ipi(void); | 218 | void cpu_handle_ipi(void); | |
219 | #endif | 219 | #endif | |
220 | vaddr_t cpu_lwp_pc(struct lwp *); | 220 | vaddr_t cpu_lwp_pc(struct lwp *); | |
221 | int badaddr(volatile void *, int); | 221 | int badaddr(volatile void *, int); | |
222 | void dumpconf(void); | 222 | void dumpconf(void); | |
223 | void dumpsys(void); | 223 | void dumpsys(void); | |
224 | void swapconf(void); | 224 | void swapconf(void); | |
225 | void disk_printtype(int, int); | 225 | void disk_printtype(int, int); | |
226 | void disk_reallymapin(struct buf *, struct pte *, int, int); | 226 | void disk_reallymapin(struct buf *, struct pte *, int, int); | |
227 | vaddr_t vax_map_physmem(paddr_t, size_t); | 227 | vaddr_t vax_map_physmem(paddr_t, size_t); | |
228 | void vax_unmap_physmem(vaddr_t, size_t); | 228 | void vax_unmap_physmem(vaddr_t, size_t); | |
229 | void ioaccess(vaddr_t, paddr_t, size_t); | 229 | void ioaccess(vaddr_t, paddr_t, size_t); | |
230 | void iounaccess(vaddr_t, size_t); | 230 | void iounaccess(vaddr_t, size_t); | |
231 | void findcpu(void); | 231 | void findcpu(void); | |
232 | #ifdef DDB | 232 | #ifdef DDB | |
233 | int kdbrint(int); | 233 | int kdbrint(int); | |
234 | #endif | 234 | #endif | |
235 | #endif /* _KERNEL */ | 235 | #endif /* _KERNEL */ | |
236 | #ifdef _STANDALONE | 236 | #ifdef _STANDALONE | |
237 | void findcpu(void); | 237 | void findcpu(void); | |
238 | #endif | 238 | #endif | |
239 | #endif /* _VAX_CPU_H_ */ | 239 | #endif /* _VAX_CPU_H_ */ |
--- src/sys/arch/vax/include/nexus.h 2010/07/01 19:50:12 1.26
+++ src/sys/arch/vax/include/nexus.h 2011/06/05 16:59:21 1.27
@@ -1,199 +1,199 @@ | @@ -1,199 +1,199 @@ | |||
1 | /* $NetBSD: nexus.h,v 1.26 2010/07/01 19:50:12 ragge Exp $ */ | 1 | /* $NetBSD: nexus.h,v 1.27 2011/06/05 16:59:21 matt Exp $ */ | |
2 | 2 | |||
3 | /*- | 3 | /*- | |
4 | * Copyright (c) 1982, 1986 The Regents of the University of California. | 4 | * Copyright (c) 1982, 1986 The Regents of the University of California. | |
5 | * All rights reserved. | 5 | * All rights reserved. | |
6 | * | 6 | * | |
7 | * Redistribution and use in source and binary forms, with or without | 7 | * Redistribution and use in source and binary forms, with or without | |
8 | * modification, are permitted provided that the following conditions | 8 | * modification, are permitted provided that the following conditions | |
9 | * are met: | 9 | * are met: | |
10 | * 1. Redistributions of source code must retain the above copyright | 10 | * 1. Redistributions of source code must retain the above copyright | |
11 | * notice, this list of conditions and the following disclaimer. | 11 | * notice, this list of conditions and the following disclaimer. | |
12 | * 2. Redistributions in binary form must reproduce the above copyright | 12 | * 2. Redistributions in binary form must reproduce the above copyright | |
13 | * notice, this list of conditions and the following disclaimer in the | 13 | * notice, this list of conditions and the following disclaimer in the | |
14 | * documentation and/or other materials provided with the distribution. | 14 | * documentation and/or other materials provided with the distribution. | |
15 | * 3. Neither the name of the University nor the names of its contributors | 15 | * 3. Neither the name of the University nor the names of its contributors | |
16 | * may be used to endorse or promote products derived from this software | 16 | * may be used to endorse or promote products derived from this software | |
17 | * without specific prior written permission. | 17 | * without specific prior written permission. | |
18 | * | 18 | * | |
19 | * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND | 19 | * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND | |
20 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | 20 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
21 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | 21 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
22 | * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE | 22 | * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE | |
23 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | 23 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
24 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | 24 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | |
25 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | 25 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | |
26 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | 26 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | |
27 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | 27 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | |
28 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | 28 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | |
29 | * SUCH DAMAGE. | 29 | * SUCH DAMAGE. | |
30 | * | 30 | * | |
31 | * @(#)nexus.h 7.3 (Berkeley) 5/9/91 | 31 | * @(#)nexus.h 7.3 (Berkeley) 5/9/91 | |
32 | */ | 32 | */ | |
33 | 33 | |||
34 | /* | 34 | /* | |
35 | * ABus support added by Johnny Billquist 2010. | 35 | * ABus support added by Johnny Billquist 2010. | |
36 | */ | 36 | */ | |
37 | 37 | |||
38 | #ifndef _VAX_NEXUS_H_ | 38 | #ifndef _VAX_NEXUS_H_ | |
39 | #define _VAX_NEXUS_H_ | 39 | #define _VAX_NEXUS_H_ | |
40 | 40 | |||
41 | #include <machine/bus.h> | 41 | #include <machine/bus.h> | |
42 | 42 | |||
43 | #ifdef _KERNEL | 43 | #ifdef _KERNEL | |
44 | #include "opt_cputype.h" | 44 | #include "opt_cputype.h" | |
45 | #endif | 45 | #endif | |
46 | /* | 46 | /* | |
47 | * Different definitions for nicer autoconf probing. | 47 | * Different definitions for nicer autoconf probing. | |
48 | */ | 48 | */ | |
49 | enum bustypes { | 49 | enum bustypes { | |
50 | VAX_SBIBUS, /* SBI parent (780) */ | 50 | VAX_SBIBUS, /* SBI parent (780) */ | |
51 | VAX_CMIBUS, /* CMI backplane (750) */ | 51 | VAX_CMIBUS, /* CMI backplane (750) */ | |
52 | VAX_UNIBUS, /* Direct backplane (730) */ | 52 | VAX_UNIBUS, /* Direct backplane (730) */ | |
53 | VAX_ABUS, /* ABus (8600) */ | 53 | VAX_ABUS, /* ABus (8600) */ | |
54 | VAX_BIBUS, /* BI bus (8200) */ | 54 | VAX_BIBUS, /* BI bus (8200) */ | |
55 | VAX_NMIBUS, /* NMI backplane (8800) */ | 55 | VAX_NMIBUS, /* NMI backplane (8800) */ | |
56 | VAX_VSBUS, /* Virtual vaxstation bus */ | 56 | VAX_VSBUS, /* Virtual vaxstation bus */ | |
57 | VAX_IBUS, /* Internal Microvax bus */ | 57 | VAX_IBUS, /* Internal Microvax bus */ | |
58 | VAX_XMIBUS, /* XMI master bus (6000) */ | 58 | VAX_XMIBUS, /* XMI master bus (6000) */ | |
59 | }; | 59 | }; | |
60 | /* | 60 | /* | |
61 | * Information about nexus's. | 61 | * Information about nexus's. | |
62 | * | 62 | * | |
63 | * Each machine has an address of backplane slots (nexi). | 63 | * Each machine has an address of backplane slots (nexi). | |
64 | * Each nexus is some type of adapter, whose code is the low | 64 | * Each nexus is some type of adapter, whose code is the low | |
65 | * byte of the first word of the adapter address space. | 65 | * byte of the first word of the adapter address space. | |
66 | * At boot time the system looks through the array of available | 66 | * At boot time the system looks through the array of available | |
67 | * slots and finds the interconnects for the machine. | 67 | * slots and finds the interconnects for the machine. | |
68 | * | 68 | * | |
69 | * VAX8600 nexus information is located in ioa.h | 69 | * VAX8600 nexus information is located in ioa.h | |
70 | */ | 70 | */ | |
71 | #define IO_CMI750 2 | 71 | #define IO_CMI750 2 | |
72 | #define MAXNMCR 1 | 72 | #define MAXNMCR 1 | |
73 | 73 | |||
74 | #define NNEXSBI 16 | 74 | #define NNEXSBI 16 | |
75 | #if VAX780 || VAXANY | 75 | #if VAX780 || VAXANY | |
76 | #define NNEX780 NNEXSBI | 76 | #define NNEX780 NNEXSBI | |
77 | #define NEX780 ((struct nexus *)0x20000000) | 77 | #define NEX780 ((struct nexus *)0x20000000) | |
78 | #endif | 78 | #endif | |
79 | #if VAX730 || VAXANY | 79 | #if VAX730 || VAXANY | |
80 | #define NNEX730 NNEXSBI | 80 | #define NNEX730 NNEXSBI | |
81 | #define NEX730 ((struct nexus *)0xf20000) | 81 | #define NEX730 ((struct nexus *)0xf20000) | |
82 | #endif | 82 | #endif | |
83 | #define NEXSIZE 0x2000 | 83 | #define NEXSIZE 0x2000 | |
84 | 84 | |||
85 | #ifdef _KERNEL | 85 | #ifdef _KERNEL | |
86 | 86 | |||
87 | struct nexus { | 87 | struct nexus { | |
88 | union nexcsr { | 88 | union nexcsr { | |
89 | long nex_csr; | 89 | long nex_csr; | |
90 | u_char nex_type; | 90 | u_char nex_type; | |
91 | } nexcsr; | 91 | } nexcsr; | |
92 | long nex_pad[NEXSIZE / sizeof (long) - 1]; | 92 | long nex_pad[NEXSIZE / sizeof (long) - 1]; | |
93 | }; | 93 | }; | |
94 | 94 | |||
95 | struct abus_attach_args { | 95 | struct abus_attach_args { | |
96 | const char *aa_name; | 96 | const char *aa_name; | |
97 | int aa_type; | 97 | int aa_type; | |
98 | bus_addr_t aa_base; | 98 | bus_addr_t aa_base; | |
99 | int aa_num; | 99 | int aa_num; | |
100 | bus_space_tag_t aa_iot; | 100 | bus_space_tag_t aa_iot; | |
101 | bus_space_handle_t aa_ioh; | 101 | bus_space_handle_t aa_ioh; | |
102 | bus_dma_tag_t aa_dmat; | 102 | bus_dma_tag_t aa_dmat; | |
103 | }; | 103 | }; | |
104 | 104 | |||
105 | struct sbi_attach_args { | 105 | struct sbi_attach_args { | |
106 | int sa_nexnum; /* This nexus TR number */ | 106 | int sa_nexnum; /* This nexus TR number */ | |
107 | int sa_type; /* This nexus type */ | 107 | int sa_type; /* This nexus type */ | |
108 | int sa_sbinum; | 108 | int sa_sbinum; | |
109 | bus_space_tag_t sa_iot; | 109 | bus_space_tag_t sa_iot; | |
110 | bus_space_handle_t sa_ioh; | 110 | bus_space_handle_t sa_ioh; | |
111 | bus_dma_tag_t sa_dmat; | 111 | bus_dma_tag_t sa_dmat; | |
112 | bus_addr_t sa_base; | 112 | bus_addr_t sa_base; | |
113 | }; | 113 | }; | |
114 | 114 | |||
115 | /* Memory device struct. This should be somewhere else */ | 115 | /* Memory device struct. This should be somewhere else */ | |
116 | struct mem_softc { | 116 | struct mem_softc { | |
117 | struct device *sc_dev; | 117 | device_t sc_dev; | |
118 | void * sc_memaddr; | 118 | void * sc_memaddr; | |
119 | int sc_memtype; | 119 | int sc_memtype; | |
120 | int sc_memnr; | 120 | int sc_memnr; | |
121 | }; | 121 | }; | |
122 | 122 | |||
123 | struct ibus_attach_args { | 123 | struct ibus_attach_args { | |
124 | const char *ia_type; | 124 | const char *ia_type; | |
125 | int ia_num; | 125 | int ia_num; | |
126 | int ia_partyp; | 126 | int ia_partyp; | |
127 | paddr_t ia_addr; | 127 | paddr_t ia_addr; | |
128 | }; | 128 | }; | |
129 | #endif | 129 | #endif | |
130 | 130 | |||
131 | /* | 131 | /* | |
132 | * Bits in high word of nexus's. | 132 | * Bits in high word of nexus's. | |
133 | */ | 133 | */ | |
134 | #define SBI_PARFLT (1<<31) /* sbi parity fault */ | 134 | #define SBI_PARFLT (1<<31) /* sbi parity fault */ | |
135 | #define SBI_WSQFLT (1<<30) /* write sequence fault */ | 135 | #define SBI_WSQFLT (1<<30) /* write sequence fault */ | |
136 | #define SBI_URDFLT (1<<29) /* unexpected read data fault */ | 136 | #define SBI_URDFLT (1<<29) /* unexpected read data fault */ | |
137 | #define SBI_ISQFLT (1<<28) /* interlock sequence fault */ | 137 | #define SBI_ISQFLT (1<<28) /* interlock sequence fault */ | |
138 | #define SBI_MXTFLT (1<<27) /* multiple transmitter fault */ | 138 | #define SBI_MXTFLT (1<<27) /* multiple transmitter fault */ | |
139 | #define SBI_XMTFLT (1<<26) /* transmit fault */ | 139 | #define SBI_XMTFLT (1<<26) /* transmit fault */ | |
140 | 140 | |||
141 | #define NEX_CFGFLT (0xfc000000) | 141 | #define NEX_CFGFLT (0xfc000000) | |
142 | 142 | |||
143 | #ifndef _LOCORE | 143 | #ifndef _LOCORE | |
144 | #if VAX780 || VAX8600 || VAXANY | 144 | #if VAX780 || VAX8600 || VAXANY | |
145 | #define NEXFLT_BITS \ | 145 | #define NEXFLT_BITS \ | |
146 | "\20\40PARFLT\37WSQFLT\36URDFLT\35ISQFLT\34MXTFLT\33XMTFLT" | 146 | "\20\40PARFLT\37WSQFLT\36URDFLT\35ISQFLT\34MXTFLT\33XMTFLT" | |
147 | #endif | 147 | #endif | |
148 | #endif | 148 | #endif | |
149 | 149 | |||
150 | #define NEX_APD (1<<23) /* adaptor power down */ | 150 | #define NEX_APD (1<<23) /* adaptor power down */ | |
151 | #define NEX_APU (1<<22) /* adaptor power up */ | 151 | #define NEX_APU (1<<22) /* adaptor power up */ | |
152 | 152 | |||
153 | #define MBA_OT (1<<21) /* overtemperature */ | 153 | #define MBA_OT (1<<21) /* overtemperature */ | |
154 | 154 | |||
155 | #define UBA_UBINIT (1<<18) /* unibus init */ | 155 | #define UBA_UBINIT (1<<18) /* unibus init */ | |
156 | #define UBA_UBPDN (1<<17) /* unibus power down */ | 156 | #define UBA_UBPDN (1<<17) /* unibus power down */ | |
157 | #define UBA_UBIC (1<<16) /* unibus initialization complete */ | 157 | #define UBA_UBIC (1<<16) /* unibus initialization complete */ | |
158 | 158 | |||
159 | /* | 159 | /* | |
160 | * Types for nex_type. | 160 | * Types for nex_type. | |
161 | */ | 161 | */ | |
162 | #define NEX_ANY 0 /* pseudo for handling 11/750 */ | 162 | #define NEX_ANY 0 /* pseudo for handling 11/750 */ | |
163 | #define NEX_MEM4 0x08 /* 4K chips, non-interleaved mem */ | 163 | #define NEX_MEM4 0x08 /* 4K chips, non-interleaved mem */ | |
164 | #define NEX_MEM4I 0x09 /* 4K chips, interleaved mem */ | 164 | #define NEX_MEM4I 0x09 /* 4K chips, interleaved mem */ | |
165 | #define NEX_MEM16 0x10 /* 16K chips, non-interleaved mem */ | 165 | #define NEX_MEM16 0x10 /* 16K chips, non-interleaved mem */ | |
166 | #define NEX_MEM16I 0x11 /* 16K chips, interleaved mem */ | 166 | #define NEX_MEM16I 0x11 /* 16K chips, interleaved mem */ | |
167 | #define NEX_MBA 0x20 /* Massbus adaptor */ | 167 | #define NEX_MBA 0x20 /* Massbus adaptor */ | |
168 | #define NEX_UBA0 0x28 /* Unibus adaptor */ | 168 | #define NEX_UBA0 0x28 /* Unibus adaptor */ | |
169 | #define NEX_UBA1 0x29 /* 4 flavours for 4 addr spaces */ | 169 | #define NEX_UBA1 0x29 /* 4 flavours for 4 addr spaces */ | |
170 | #define NEX_UBA2 0x2a | 170 | #define NEX_UBA2 0x2a | |
171 | #define NEX_UBA3 0x2b | 171 | #define NEX_UBA3 0x2b | |
172 | #define NEX_DR32 0x30 /* DR32 user i'face to SBI */ | 172 | #define NEX_DR32 0x30 /* DR32 user i'face to SBI */ | |
173 | #define NEX_CI 0x38 /* CI adaptor */ | 173 | #define NEX_CI 0x38 /* CI adaptor */ | |
174 | #define NEX_MPM0 0x40 /* Multi-port mem */ | 174 | #define NEX_MPM0 0x40 /* Multi-port mem */ | |
175 | #define NEX_MPM1 0x41 /* Who knows why 4 different ones ? */ | 175 | #define NEX_MPM1 0x41 /* Who knows why 4 different ones ? */ | |
176 | #define NEX_MPM2 0x42 | 176 | #define NEX_MPM2 0x42 | |
177 | #define NEX_MPM3 0x43 | 177 | #define NEX_MPM3 0x43 | |
178 | #define NEX_MEM64L 0x68 /* 64K chips, non-interleaved, lower */ | 178 | #define NEX_MEM64L 0x68 /* 64K chips, non-interleaved, lower */ | |
179 | #define NEX_MEM64LI 0x69 /* 64K chips, ext-interleaved, lower */ | 179 | #define NEX_MEM64LI 0x69 /* 64K chips, ext-interleaved, lower */ | |
180 | #define NEX_MEM64U 0x6a /* 64K chips, non-interleaved, upper */ | 180 | #define NEX_MEM64U 0x6a /* 64K chips, non-interleaved, upper */ | |
181 | #define NEX_MEM64UI 0x6b /* 64K chips, ext-interleaved, upper */ | 181 | #define NEX_MEM64UI 0x6b /* 64K chips, ext-interleaved, upper */ | |
182 | #define NEX_MEM64I 0x6c /* 64K chips, interleaved */ | 182 | #define NEX_MEM64I 0x6c /* 64K chips, interleaved */ | |
183 | #define NEX_MEM256L 0x70 /* 256K chips, non-interleaved, lower */ | 183 | #define NEX_MEM256L 0x70 /* 256K chips, non-interleaved, lower */ | |
184 | #define NEX_MEM256LI 0x71 /* 256K chips, ext-interleaved, lower */ | 184 | #define NEX_MEM256LI 0x71 /* 256K chips, ext-interleaved, lower */ | |
185 | #define NEX_MEM256U 0x72 /* 256K chips, non-interleaved, upper */ | 185 | #define NEX_MEM256U 0x72 /* 256K chips, non-interleaved, upper */ | |
186 | #define NEX_MEM256UI 0x73 /* 256K chips, ext-interleaved, upper */ | 186 | #define NEX_MEM256UI 0x73 /* 256K chips, ext-interleaved, upper */ | |
187 | #define NEX_MEM256I 0x74 /* 256K chips, interleaved */ | 187 | #define NEX_MEM256I 0x74 /* 256K chips, interleaved */ | |
188 | 188 | |||
189 | /* Memory classes */ | 189 | /* Memory classes */ | |
190 | #define M_NONE 0 | 190 | #define M_NONE 0 | |
191 | #define M780C 1 | 191 | #define M780C 1 | |
192 | #define M780EL 2 | 192 | #define M780EL 2 | |
193 | #define M780EU 3 | 193 | #define M780EU 3 | |
194 | 194 | |||
195 | /* Memory recover defines */ | 195 | /* Memory recover defines */ | |
196 | #define MCHK_PANIC -1 | 196 | #define MCHK_PANIC -1 | |
197 | #define MCHK_RECOVERED 0 | 197 | #define MCHK_RECOVERED 0 | |
198 | 198 | |||
199 | #endif /* _VAX_NEXUS_H_ */ | 199 | #endif /* _VAX_NEXUS_H_ */ |
--- src/sys/arch/vax/include/types.h 2010/12/22 01:03:18 1.41
+++ src/sys/arch/vax/include/types.h 2011/06/05 16:59:21 1.42
@@ -1,80 +1,82 @@ | @@ -1,80 +1,82 @@ | |||
1 | /* $NetBSD: types.h,v 1.41 2010/12/22 01:03:18 matt Exp $ */ | 1 | /* $NetBSD: types.h,v 1.42 2011/06/05 16:59:21 matt Exp $ */ | |
2 | 2 | |||
3 | /*- | 3 | /*- | |
4 | * Copyright (c) 1990 The Regents of the University of California. | 4 | * Copyright (c) 1990 The Regents of the University of California. | |
5 | * All rights reserved. | 5 | * All rights reserved. | |
6 | * | 6 | * | |
7 | * Redistribution and use in source and binary forms, with or without | 7 | * Redistribution and use in source and binary forms, with or without | |
8 | * modification, are permitted provided that the following conditions | 8 | * modification, are permitted provided that the following conditions | |
9 | * are met: | 9 | * are met: | |
10 | * 1. Redistributions of source code must retain the above copyright | 10 | * 1. Redistributions of source code must retain the above copyright | |
11 | * notice, this list of conditions and the following disclaimer. | 11 | * notice, this list of conditions and the following disclaimer. | |
12 | * 2. Redistributions in binary form must reproduce the above copyright | 12 | * 2. Redistributions in binary form must reproduce the above copyright | |
13 | * notice, this list of conditions and the following disclaimer in the | 13 | * notice, this list of conditions and the following disclaimer in the | |
14 | * documentation and/or other materials provided with the distribution. | 14 | * documentation and/or other materials provided with the distribution. | |
15 | * 3. Neither the name of the University nor the names of its contributors | 15 | * 3. Neither the name of the University nor the names of its contributors | |
16 | * may be used to endorse or promote products derived from this software | 16 | * may be used to endorse or promote products derived from this software | |
17 | * without specific prior written permission. | 17 | * without specific prior written permission. | |
18 | * | 18 | * | |
19 | * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND | 19 | * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND | |
20 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | 20 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
21 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | 21 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
22 | * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE | 22 | * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE | |
23 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | 23 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
24 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | 24 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | |
25 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | 25 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | |
26 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | 26 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | |
27 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | 27 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | |
28 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | 28 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | |
29 | * SUCH DAMAGE. | 29 | * SUCH DAMAGE. | |
30 | * | 30 | * | |
31 | * @(#)types.h 7.5 (Berkeley) 3/9/91 | 31 | * @(#)types.h 7.5 (Berkeley) 3/9/91 | |
32 | */ | 32 | */ | |
33 | 33 | |||
34 | #ifndef _MACHTYPES_H_ | 34 | #ifndef _MACHTYPES_H_ | |
35 | #define _MACHTYPES_H_ | 35 | #define _MACHTYPES_H_ | |
36 | 36 | |||
37 | #include <sys/cdefs.h> | 37 | #include <sys/cdefs.h> | |
38 | #include <sys/featuretest.h> | 38 | #include <sys/featuretest.h> | |
39 | #include <machine/int_types.h> | 39 | #include <machine/int_types.h> | |
40 | 40 | |||
41 | #if defined(_KERNEL) | 41 | #if defined(_KERNEL) | |
42 | typedef struct label_t { | 42 | typedef struct label_t { | |
43 | int val[6]; | 43 | int val[6]; | |
44 | } label_t; | 44 | } label_t; | |
45 | #endif | 45 | #endif | |
46 | 46 | |||
47 | /* NB: This should probably be if defined(_KERNEL) */ | 47 | /* NB: This should probably be if defined(_KERNEL) */ | |
48 | #if defined(_NETBSD_SOURCE) | 48 | #if defined(_NETBSD_SOURCE) | |
49 | typedef unsigned long paddr_t; | 49 | typedef unsigned long paddr_t; | |
50 | typedef unsigned long psize_t; | 50 | typedef unsigned long psize_t; | |
51 | typedef unsigned long vaddr_t; | 51 | typedef unsigned long vaddr_t; | |
52 | typedef unsigned long vsize_t; | 52 | typedef unsigned long vsize_t; | |
53 | #define PRIxPADDR "lx" | 53 | #define PRIxPADDR "lx" | |
54 | #define PRIxPSIZE "lx" | 54 | #define PRIxPSIZE "lx" | |
55 | #define PRIuPSIZE "lu" | 55 | #define PRIuPSIZE "lu" | |
56 | #define PRIxVADDR "lx" | 56 | #define PRIxVADDR "lx" | |
57 | #define PRIxVSIZE "lx" | 57 | #define PRIxVSIZE "lx" | |
58 | #define PRIuVSIZE "lu" | 58 | #define PRIuVSIZE "lu" | |
59 | #endif | 59 | #endif | |
60 | 60 | |||
61 | typedef int register_t; | 61 | typedef int register_t; | |
62 | #define PRIxREGISTER "x" | 62 | #define PRIxREGISTER "x" | |
63 | 63 | |||
64 | /* | 64 | /* | |
65 | * BBCCI/BBSSI can operate on bytes so let's save some space. | 65 | * BBCCI/BBSSI can operate on bytes so let's save some space. | |
66 | */ | 66 | */ | |
67 | typedef volatile char __cpu_simple_lock_t; | 67 | typedef volatile char __cpu_simple_lock_t; | |
68 | 68 | |||
69 | #define __SIMPLELOCK_LOCKED 1 | 69 | #define __SIMPLELOCK_LOCKED 1 | |
70 | #define __SIMPLELOCK_UNLOCKED 0 | 70 | #define __SIMPLELOCK_UNLOCKED 0 | |
71 | 71 | |||
72 | /* The VAX does not have strict alignment requirements. */ | 72 | /* The VAX does not have strict alignment requirements. */ | |
73 | #define __NO_STRICT_ALIGNMENT | 73 | #define __NO_STRICT_ALIGNMENT | |
74 | 74 | |||
75 | #define __HAVE_DEVICE_REGISTER | 75 | #define __HAVE_DEVICE_REGISTER | |
76 | #define __HAVE_SYSCALL_INTERN | 76 | #define __HAVE_SYSCALL_INTERN | |
77 | #define __HAVE_FAST_SOFTINTS | 77 | #define __HAVE_FAST_SOFTINTS | |
78 | #define __HAVE_CPU_DATA_FIRST | 78 | #define __HAVE_CPU_DATA_FIRST | |
79 | 79 | |||
80 | #define __HAVE___LWP_GETPRIVATE_FAST | |||
81 | ||||
80 | #endif /* _MACHTYPES_H_ */ | 82 | #endif /* _MACHTYPES_H_ */ |
--- src/sys/arch/vax/uba/uba_ubi.c 2010/12/14 23:38:30 1.2
+++ src/sys/arch/vax/uba/uba_ubi.c 2011/06/05 16:59:21 1.3
@@ -1,175 +1,175 @@ | @@ -1,175 +1,175 @@ | |||
1 | /* $NetBSD: uba_ubi.c,v 1.2 2010/12/14 23:38:30 matt Exp $ */ | 1 | /* $NetBSD: uba_ubi.c,v 1.3 2011/06/05 16:59:21 matt Exp $ */ | |
2 | /* | 2 | /* | |
3 | * Copyright (c) 1982, 1986 The Regents of the University of California. | 3 | * Copyright (c) 1982, 1986 The Regents of the University of California. | |
4 | * All rights reserved. | 4 | * All rights reserved. | |
5 | * | 5 | * | |
6 | * Redistribution and use in source and binary forms, with or without | 6 | * Redistribution and use in source and binary forms, with or without | |
7 | * modification, are permitted provided that the following conditions | 7 | * modification, are permitted provided that the following conditions | |
8 | * are met: | 8 | * are met: | |
9 | * 1. Redistributions of source code must retain the above copyright | 9 | * 1. Redistributions of source code must retain the above copyright | |
10 | * notice, this list of conditions and the following disclaimer. | 10 | * notice, this list of conditions and the following disclaimer. | |
11 | * 2. Redistributions in binary form must reproduce the above copyright | 11 | * 2. Redistributions in binary form must reproduce the above copyright | |
12 | * notice, this list of conditions and the following disclaimer in the | 12 | * notice, this list of conditions and the following disclaimer in the | |
13 | * documentation and/or other materials provided with the distribution. | 13 | * documentation and/or other materials provided with the distribution. | |
14 | * 3. Neither the name of the University nor the names of its contributors | 14 | * 3. Neither the name of the University nor the names of its contributors | |
15 | * may be used to endorse or promote products derived from this software | 15 | * may be used to endorse or promote products derived from this software | |
16 | * without specific prior written permission. | 16 | * without specific prior written permission. | |
17 | * | 17 | * | |
18 | * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND | 18 | * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND | |
19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE | 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE | |
22 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | 22 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
23 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | 23 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | |
24 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | 24 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | |
25 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | 25 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | |
26 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | 26 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | |
27 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | 27 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | |
28 | * SUCH DAMAGE. | 28 | * SUCH DAMAGE. | |
29 | * | 29 | * | |
30 | * @(#)uba.c 7.10 (Berkeley) 12/16/90 | 30 | * @(#)uba.c 7.10 (Berkeley) 12/16/90 | |
31 | * @(#)autoconf.c 7.20 (Berkeley) 5/9/91 | 31 | * @(#)autoconf.c 7.20 (Berkeley) 5/9/91 | |
32 | */ | 32 | */ | |
33 | 33 | |||
34 | /* | 34 | /* | |
35 | * Copyright (c) 1996 Jonathan Stone. | 35 | * Copyright (c) 1996 Jonathan Stone. | |
36 | * Copyright (c) 1994, 1996 Ludd, University of Lule}, Sweden. | 36 | * Copyright (c) 1994, 1996 Ludd, University of Lule}, Sweden. | |
37 | * | 37 | * | |
38 | * Redistribution and use in source and binary forms, with or without | 38 | * Redistribution and use in source and binary forms, with or without | |
39 | * modification, are permitted provided that the following conditions | 39 | * modification, are permitted provided that the following conditions | |
40 | * are met: | 40 | * are met: | |
41 | * 1. Redistributions of source code must retain the above copyright | 41 | * 1. Redistributions of source code must retain the above copyright | |
42 | * notice, this list of conditions and the following disclaimer. | 42 | * notice, this list of conditions and the following disclaimer. | |
43 | * 2. Redistributions in binary form must reproduce the above copyright | 43 | * 2. Redistributions in binary form must reproduce the above copyright | |
44 | * notice, this list of conditions and the following disclaimer in the | 44 | * notice, this list of conditions and the following disclaimer in the | |
45 | * documentation and/or other materials provided with the distribution. | 45 | * documentation and/or other materials provided with the distribution. | |
46 | * 3. All advertising materials mentioning features or use of this software | 46 | * 3. All advertising materials mentioning features or use of this software | |
47 | * must display the following acknowledgement: | 47 | * must display the following acknowledgement: | |
48 | * This product includes software developed by the University of | 48 | * This product includes software developed by the University of | |
49 | * California, Berkeley and its contributors. | 49 | * California, Berkeley and its contributors. | |
50 | * 4. Neither the name of the University nor the names of its contributors | 50 | * 4. Neither the name of the University nor the names of its contributors | |
51 | * may be used to endorse or promote products derived from this software | 51 | * may be used to endorse or promote products derived from this software | |
52 | * without specific prior written permission. | 52 | * without specific prior written permission. | |
53 | * | 53 | * | |
54 | * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND | 54 | * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND | |
55 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | 55 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
56 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | 56 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
57 | * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE | 57 | * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE | |
58 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | 58 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
59 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | 59 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | |
60 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | 60 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | |
61 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | 61 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | |
62 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | 62 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | |
63 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | 63 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | |
64 | * SUCH DAMAGE. | 64 | * SUCH DAMAGE. | |
65 | * | 65 | * | |
66 | * @(#)uba.c 7.10 (Berkeley) 12/16/90 | 66 | * @(#)uba.c 7.10 (Berkeley) 12/16/90 | |
67 | * @(#)autoconf.c 7.20 (Berkeley) 5/9/91 | 67 | * @(#)autoconf.c 7.20 (Berkeley) 5/9/91 | |
68 | */ | 68 | */ | |
69 | 69 | |||
70 | #include <sys/cdefs.h> | 70 | #include <sys/cdefs.h> | |
71 | __KERNEL_RCSID(0, "$NetBSD: uba_ubi.c,v 1.2 2010/12/14 23:38:30 matt Exp $"); | 71 | __KERNEL_RCSID(0, "$NetBSD: uba_ubi.c,v 1.3 2011/06/05 16:59:21 matt Exp $"); | |
72 | 72 | |||
73 | #define _VAX_BUS_DMA_PRIVATE | 73 | #define _VAX_BUS_DMA_PRIVATE | |
74 | 74 | |||
75 | #include <sys/param.h> | 75 | #include <sys/param.h> | |
76 | #include <sys/systm.h> | 76 | #include <sys/systm.h> | |
77 | #include <sys/bus.h> | 77 | #include <sys/bus.h> | |
78 | #include <sys/cpu.h> | 78 | #include <sys/cpu.h> | |
79 | #include <sys/device.h> | 79 | #include <sys/device.h> | |
80 | 80 | |||
81 | #include <machine/nexus.h> | 81 | #include <machine/nexus.h> | |
82 | #include <machine/sgmap.h> | 82 | #include <machine/sgmap.h> | |
83 | 83 | |||
84 | #include <dev/qbus/ubavar.h> | 84 | #include <dev/qbus/ubavar.h> | |
85 | 85 | |||
86 | #include <vax/uba/uba_common.h> | 86 | #include <vax/uba/uba_common.h> | |
87 | 87 | |||
88 | #include "locators.h" | 88 | #include "locators.h" | |
89 | 89 | |||
90 | /* Some UBI-specific defines */ | 90 | /* Some UBI-specific defines */ | |
91 | #define UBASIZE ((UBAPAGES + UBAIOPAGES) * VAX_NBPG) | 91 | #define UBASIZE ((UBAPAGES + UBAIOPAGES) * VAX_NBPG) | |
92 | #define UMEM730 (0xfc0000) | 92 | #define UMEM730 (0xfc0000) | |
93 | #define UIOPAGE (UMEM730 + (UBAPAGES * VAX_NBPG)) | 93 | #define UIOPAGE (UMEM730 + (UBAPAGES * VAX_NBPG)) | |
94 | 94 | |||
95 | /* | 95 | /* | |
96 | * The DW780, DW750 and DW730 are quite similar to their function from | 96 | * The DW780, DW750 and DW730 are quite similar to their function from | |
97 | * a programmers point of view. Differencies are number of BDP's | 97 | * a programmers point of view. Differencies are number of BDP's | |
98 | * and bus status/command registers, the latter are (partly) IPR's | 98 | * and bus status/command registers, the latter are (partly) IPR's | |
99 | * on 750. | 99 | * on 750. | |
100 | */ | 100 | */ | |
101 | static int dw730_match(struct device *, struct cfdata *, void *); | 101 | static int dw730_match(device_t, cfdata_t, void *); | |
102 | static void dw730_attach(struct device *, struct device *, void *); | 102 | static void dw730_attach(device_t, device_t, void *); | |
103 | static void dw730_init(struct uba_softc*); | 103 | static void dw730_init(struct uba_softc*); | |
104 | #ifdef notyet | 104 | #ifdef notyet | |
105 | static void dw730_purge(struct uba_softc *, int); | 105 | static void dw730_purge(struct uba_softc *, int); | |
106 | #endif | 106 | #endif | |
107 | 107 | |||
108 | CFATTACH_DECL_NEW(uba_ubi, sizeof(struct uba_vsoftc), | 108 | CFATTACH_DECL_NEW(uba_ubi, sizeof(struct uba_vsoftc), | |
109 | dw730_match, dw730_attach, NULL, NULL); | 109 | dw730_match, dw730_attach, NULL, NULL); | |
110 | 110 | |||
111 | extern struct vax_bus_space vax_mem_bus_space; | 111 | extern struct vax_bus_space vax_mem_bus_space; | |
112 | 112 | |||
113 | int | 113 | int | |
114 | dw730_match(device_t parent, cfdata_t cf, void *aux) | 114 | dw730_match(device_t parent, cfdata_t cf, void *aux) | |
115 | { | 115 | { | |
116 | struct sbi_attach_args *sa = (struct sbi_attach_args *)aux; | 116 | struct sbi_attach_args *sa = (struct sbi_attach_args *)aux; | |
117 | 117 | |||
118 | if (cf->cf_loc[UBICF_TR] != sa->sa_nexnum && | 118 | if (cf->cf_loc[UBICF_TR] != sa->sa_nexnum && | |
119 | cf->cf_loc[UBICF_TR] != UBICF_TR_DEFAULT) | 119 | cf->cf_loc[UBICF_TR] != UBICF_TR_DEFAULT) | |
120 | return 0; | 120 | return 0; | |
121 | /* | 121 | /* | |
122 | * The uba type is actually only telling where the uba | 122 | * The uba type is actually only telling where the uba | |
123 | * space is in nexus space. | 123 | * space is in nexus space. | |
124 | */ | 124 | */ | |
125 | if ((sa->sa_type & ~3) != NEX_UBA0) | 125 | if ((sa->sa_type & ~3) != NEX_UBA0) | |
126 | return 0; | 126 | return 0; | |
127 | 127 | |||
128 | return 1; | 128 | return 1; | |
129 | } | 129 | } | |
130 | 130 | |||
131 | void | 131 | void | |
132 | dw730_attach(device_t parent, device_t self, void *aux) | 132 | dw730_attach(device_t parent, device_t self, void *aux) | |
133 | { | 133 | { | |
134 | struct uba_vsoftc *sc = device_private(self); | 134 | struct uba_vsoftc *sc = device_private(self); | |
135 | struct sbi_attach_args *sa = aux; | 135 | struct sbi_attach_args *sa = aux; | |
136 | 136 | |||
137 | printf(": DW730\n"); | 137 | printf(": DW730\n"); | |
138 | 138 | |||
139 | /* | 139 | /* | |
140 | * Fill in bus specific data. | 140 | * Fill in bus specific data. | |
141 | */ | 141 | */ | |
142 | sc->uv_sc.uh_dev = self; | 142 | sc->uv_sc.uh_dev = self; | |
143 | sc->uv_sc.uh_ubainit = dw730_init; | 143 | sc->uv_sc.uh_ubainit = dw730_init; | |
144 | #ifdef notyet | 144 | #ifdef notyet | |
145 | sc->uv_sc.uh_ubapurge = dw730_purge; | 145 | sc->uv_sc.uh_ubapurge = dw730_purge; | |
146 | #endif | 146 | #endif | |
147 | sc->uv_sc.uh_iot = &vax_mem_bus_space; | 147 | sc->uv_sc.uh_iot = &vax_mem_bus_space; | |
148 | sc->uv_sc.uh_dmat = &sc->uv_dmat; | 148 | sc->uv_sc.uh_dmat = &sc->uv_dmat; | |
149 | sc->uv_sc.uh_type = UBA_UBA; | 149 | sc->uv_sc.uh_type = UBA_UBA; | |
150 | sc->uv_sc.uh_nr = sa->sa_type == NEX_UBA1; | 150 | sc->uv_sc.uh_nr = sa->sa_type == NEX_UBA1; | |
151 | 151 | |||
152 | /* | 152 | /* | |
153 | * Fill in variables used by the sgmap system. | 153 | * Fill in variables used by the sgmap system. | |
154 | */ | 154 | */ | |
155 | sc->uv_size = UBAPAGES * VAX_NBPG; | 155 | sc->uv_size = UBAPAGES * VAX_NBPG; | |
156 | sc->uv_uba = (void *)sa->sa_ioh; /* Map registers is in adaptor */ | 156 | sc->uv_uba = (void *)sa->sa_ioh; /* Map registers is in adaptor */ | |
157 | 157 | |||
158 | uba_dma_init(sc); | 158 | uba_dma_init(sc); | |
159 | uba_attach(&sc->uv_sc, UIOPAGE); | 159 | uba_attach(&sc->uv_sc, UIOPAGE); | |
160 | } | 160 | } | |
161 | 161 | |||
162 | void | 162 | void | |
163 | dw730_init(struct uba_softc *sc) | 163 | dw730_init(struct uba_softc *sc) | |
164 | { | 164 | { | |
165 | mtpr(0, PR_IUR); | 165 | mtpr(0, PR_IUR); | |
166 | DELAY(500000); | 166 | DELAY(500000); | |
167 | } | 167 | } | |
168 | 168 | |||
169 | #ifdef notyet | 169 | #ifdef notyet | |
170 | void | 170 | void | |
171 | dw730_purge(struct uba_softc sc, int bdp) | 171 | dw730_purge(struct uba_softc sc, int bdp) | |
172 | { | 172 | { | |
173 | sc->uh_uba->uba_dpr[bdp] |= UBADPR_PURGE | UBADPR_NXM | UBADPR_UCE; | 173 | sc->uh_uba->uba_dpr[bdp] |= UBADPR_PURGE | UBADPR_NXM | UBADPR_UCE; | |
174 | } | 174 | } | |
175 | #endif | 175 | #endif |
--- src/sys/arch/vax/vax/ka6400.c 2010/12/14 23:44:49 1.15
+++ src/sys/arch/vax/vax/ka6400.c 2011/06/05 16:59:21 1.16
@@ -1,447 +1,447 @@ | @@ -1,447 +1,447 @@ | |||
1 | /* $NetBSD: ka6400.c,v 1.15 2010/12/14 23:44:49 matt Exp $ */ | 1 | /* $NetBSD: ka6400.c,v 1.16 2011/06/05 16:59:21 matt Exp $ */ | |
2 | 2 | |||
3 | /* | 3 | /* | |
4 | * Copyright (c) 2000 Ludd, University of Lule}, Sweden. All rights reserved. | 4 | * Copyright (c) 2000 Ludd, University of Lule}, Sweden. All rights reserved. | |
5 | * | 5 | * | |
6 | * Redistribution and use in source and binary forms, with or without | 6 | * Redistribution and use in source and binary forms, with or without | |
7 | * modification, are permitted provided that the following conditions | 7 | * modification, are permitted provided that the following conditions | |
8 | * are met: | 8 | * are met: | |
9 | * 1. Redistributions of source code must retain the above copyright | 9 | * 1. Redistributions of source code must retain the above copyright | |
10 | * notice, this list of conditions and the following disclaimer. | 10 | * notice, this list of conditions and the following disclaimer. | |
11 | * 2. Redistributions in binary form must reproduce the above copyright | 11 | * 2. Redistributions in binary form must reproduce the above copyright | |
12 | * notice, this list of conditions and the following disclaimer in the | 12 | * notice, this list of conditions and the following disclaimer in the | |
13 | * documentation and/or other materials provided with the distribution. | 13 | * documentation and/or other materials provided with the distribution. | |
14 | * 3. All advertising materials mentioning features or use of this software | 14 | * 3. All advertising materials mentioning features or use of this software | |
15 | * must display the following acknowledgement: | 15 | * must display the following acknowledgement: | |
16 | * This product includes software developed at Ludd, University of | 16 | * This product includes software developed at Ludd, University of | |
17 | * Lule}, Sweden and its contributors. | 17 | * Lule}, Sweden and its contributors. | |
18 | * 4. The name of the author may not be used to endorse or promote products | 18 | * 4. The name of the author may not be used to endorse or promote products | |
19 | * derived from this software without specific prior written permission | 19 | * derived from this software without specific prior written permission | |
20 | * | 20 | * | |
21 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR | 21 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR | |
22 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES | 22 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES | |
23 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. | 23 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. | |
24 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | 24 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | |
25 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | 25 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | |
26 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | 26 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
27 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | 27 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
28 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | 28 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
29 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | 29 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | |
30 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | 30 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
31 | */ | 31 | */ | |
32 | 32 | |||
33 | /* | 33 | /* | |
34 | * KA6400 specific CPU code. | 34 | * KA6400 specific CPU code. | |
35 | */ | 35 | */ | |
36 | /* | 36 | /* | |
37 | * TODO: | 37 | * TODO: | |
38 | * - Machine check code | 38 | * - Machine check code | |
39 | * - Vector processor code | 39 | * - Vector processor code | |
40 | */ | 40 | */ | |
41 | 41 | |||
42 | #include <sys/cdefs.h> | 42 | #include <sys/cdefs.h> | |
43 | __KERNEL_RCSID(0, "$NetBSD: ka6400.c,v 1.15 2010/12/14 23:44:49 matt Exp $"); | 43 | __KERNEL_RCSID(0, "$NetBSD: ka6400.c,v 1.16 2011/06/05 16:59:21 matt Exp $"); | |
44 | 44 | |||
45 | #include "opt_multiprocessor.h" | 45 | #include "opt_multiprocessor.h" | |
46 | 46 | |||
47 | #include <sys/param.h> | 47 | #include <sys/param.h> | |
48 | #include <sys/systm.h> | 48 | #include <sys/systm.h> | |
49 | #include <sys/bus.h> | 49 | #include <sys/bus.h> | |
50 | #include <sys/cpu.h> | 50 | #include <sys/cpu.h> | |
51 | #include <sys/device.h> | 51 | #include <sys/device.h> | |
52 | #include <sys/kernel.h> | 52 | #include <sys/kernel.h> | |
53 | #include <sys/time.h> | 53 | #include <sys/time.h> | |
54 | 54 | |||
55 | #include <machine/ka670.h> | 55 | #include <machine/ka670.h> | |
56 | #include <machine/nexus.h> | 56 | #include <machine/nexus.h> | |
57 | #include <machine/clock.h> | 57 | #include <machine/clock.h> | |
58 | #include <machine/scb.h> | 58 | #include <machine/scb.h> | |
59 | #include <machine/sid.h> | 59 | #include <machine/sid.h> | |
60 | #include <machine/cca.h> | 60 | #include <machine/cca.h> | |
61 | #include <machine/rpb.h> | 61 | #include <machine/rpb.h> | |
62 | 62 | |||
63 | #include <dev/xmi/xmireg.h> | 63 | #include <dev/xmi/xmireg.h> | |
64 | #include <dev/xmi/xmivar.h> | 64 | #include <dev/xmi/xmivar.h> | |
65 | 65 | |||
66 | #include "ioconf.h" | 66 | #include "ioconf.h" | |
67 | #include "locators.h" | 67 | #include "locators.h" | |
68 | 68 | |||
69 | static int *rssc; | 69 | static int *rssc; | |
70 | struct cca *cca; | 70 | struct cca *cca; | |
71 | int mastercpu; | 71 | int mastercpu; | |
72 | 72 | |||
73 | static int ka6400_match(device_t , cfdata_t, void *); | 73 | static int ka6400_match(device_t , cfdata_t, void *); | |
74 | static void ka6400_attach(device_t , device_t , void*); | 74 | static void ka6400_attach(device_t , device_t , void*); | |
75 | static void ka6400_memerr(void); | 75 | static void ka6400_memerr(void); | |
76 | static void ka6400_conf(void); | 76 | static void ka6400_conf(void); | |
77 | static int ka6400_mchk(void *); | 77 | static int ka6400_mchk(void *); | |
78 | static void ka6400_steal_pages(void); | 78 | static void ka6400_steal_pages(void); | |
79 | 79 | |||
80 | static const char * const ka6400_devs[] = { "xmi", NULL }; | 80 | static const char * const ka6400_devs[] = { "xmi", NULL }; | |
81 | 81 | |||
82 | const struct cpu_dep ka6400_calls = { | 82 | const struct cpu_dep ka6400_calls = { | |
83 | .cpu_steal_pages = ka6400_steal_pages, | 83 | .cpu_steal_pages = ka6400_steal_pages, | |
84 | .cpu_mchk = ka6400_mchk, | 84 | .cpu_mchk = ka6400_mchk, | |
85 | .cpu_memerr = ka6400_memerr, | 85 | .cpu_memerr = ka6400_memerr, | |
86 | .cpu_conf = ka6400_conf, | 86 | .cpu_conf = ka6400_conf, | |
87 | .cpu_gettime = generic_gettime, | 87 | .cpu_gettime = generic_gettime, | |
88 | .cpu_settime = generic_settime, | 88 | .cpu_settime = generic_settime, | |
89 | .cpu_vups = 12, /* ~VUPS */ | 89 | .cpu_vups = 12, /* ~VUPS */ | |
90 | .cpu_scbsz = 16, /* SCB pages */ | 90 | .cpu_scbsz = 16, /* SCB pages */ | |
91 | }; | 91 | }; | |
92 | 92 | |||
93 | #if defined(MULTIPROCESSOR) | 93 | #if defined(MULTIPROCESSOR) | |
94 | static void ka6400_startslave(struct cpu_info *); | 94 | static void ka6400_startslave(struct cpu_info *); | |
95 | static void ka6400_txrx(int, const char *, int); | 95 | static void ka6400_txrx(int, const char *, int); | |
96 | static void ka6400_sendstr(int, const char *); | 96 | static void ka6400_sendstr(int, const char *); | |
97 | static void ka6400_sergeant(int); | 97 | static void ka6400_sergeant(int); | |
98 | static int rxchar(void); | 98 | static int rxchar(void); | |
99 | static void ka6400_putc(int); | 99 | static void ka6400_putc(int); | |
100 | static void ka6400_cnintr(void); | 100 | static void ka6400_cnintr(void); | |
101 | 101 | |||
102 | #include <dev/cons.h> | 102 | #include <dev/cons.h> | |
103 | #include <vax/vax/gencons.h> | 103 | #include <vax/vax/gencons.h> | |
104 | cons_decl(gen); | 104 | cons_decl(gen); | |
105 | 105 | |||
106 | const struct cpu_mp_dep ka6400_mp_calls = { | 106 | const struct cpu_mp_dep ka6400_mp_calls = { | |
107 | .cpu_startslave = ka6400_startslave, | 107 | .cpu_startslave = ka6400_startslave, | |
108 | .cpu_cnintr = ka6400_cnintr, | 108 | .cpu_cnintr = ka6400_cnintr, | |
109 | }; | 109 | }; | |
110 | #endif | 110 | #endif | |
111 | 111 | |||
112 | CFATTACH_DECL_NEW(cpu_xmi, 0, | 112 | CFATTACH_DECL_NEW(cpu_xmi, 0, | |
113 | ka6400_match, ka6400_attach, NULL, NULL); | 113 | ka6400_match, ka6400_attach, NULL, NULL); | |
114 | 114 | |||
115 | static int | 115 | static int | |
116 | ka6400_match(device_t parent, cfdata_t cf, void *aux) | 116 | ka6400_match(device_t parent, cfdata_t cf, void *aux) | |
117 | { | 117 | { | |
118 | struct xmi_attach_args * const xa = aux; | 118 | struct xmi_attach_args * const xa = aux; | |
119 | 119 | |||
120 | if (bus_space_read_2(xa->xa_iot, xa->xa_ioh, XMI_TYPE) != XMIDT_KA64) | 120 | if (bus_space_read_2(xa->xa_iot, xa->xa_ioh, XMI_TYPE) != XMIDT_KA64) | |
121 | return 0; | 121 | return 0; | |
122 | 122 | |||
123 | if (cf->cf_loc[XMICF_NODE] != XMICF_NODE_DEFAULT && | 123 | if (cf->cf_loc[XMICF_NODE] != XMICF_NODE_DEFAULT && | |
124 | cf->cf_loc[XMICF_NODE] != xa->xa_nodenr) | 124 | cf->cf_loc[XMICF_NODE] != xa->xa_nodenr) | |
125 | return 0; | 125 | return 0; | |
126 | 126 | |||
127 | return 1; | 127 | return 1; | |
128 | } | 128 | } | |
129 | 129 | |||
130 | static void | 130 | static void | |
131 | ka6400_attach(device_t parent, device_t self, void *aux) | 131 | ka6400_attach(device_t parent, device_t self, void *aux) | |
132 | { | 132 | { | |
133 | struct cpu_info *ci; | 133 | struct cpu_info *ci; | |
134 | struct xmi_attach_args * const xa = aux; | 134 | struct xmi_attach_args * const xa = aux; | |
135 | int vp; | 135 | int vp; | |
136 | 136 | |||
137 | vp = (cca->cca_vecenab & (1 << xa->xa_nodenr)); | 137 | vp = (cca->cca_vecenab & (1 << xa->xa_nodenr)); | |
138 | aprint_normal("\n"); | 138 | aprint_normal("\n"); | |
139 | aprint_normal_dev(self, "KA6400 (%s) rev %d%s\n", | 139 | aprint_normal_dev(self, "KA6400 (%s) rev %d%s\n", | |
140 | mastercpu == xa->xa_nodenr ? "master" : "slave", | 140 | mastercpu == xa->xa_nodenr ? "master" : "slave", | |
141 | bus_space_read_4(xa->xa_iot, xa->xa_ioh, XMI_TYPE) >> 16, | 141 | bus_space_read_4(xa->xa_iot, xa->xa_ioh, XMI_TYPE) >> 16, | |
142 | (vp ? ", vector processor present" : "")); | 142 | (vp ? ", vector processor present" : "")); | |
143 | 143 | |||
144 | if (xa->xa_nodenr != mastercpu) { | 144 | if (xa->xa_nodenr != mastercpu) { | |
145 | #if defined(MULTIPROCESSOR) | 145 | #if defined(MULTIPROCESSOR) | |
146 | v_putc = ka6400_putc; /* Need special console handling */ | 146 | v_putc = ka6400_putc; /* Need special console handling */ | |
147 | cpu_slavesetup(self, xa->xa_nodenr); | 147 | cpu_slavesetup(self, xa->xa_nodenr); | |
148 | #endif | 148 | #endif | |
149 | return; | 149 | return; | |
150 | } | 150 | } | |
151 | 151 | |||
152 | mtpr(0, PR_VPSR); /* Can't use vector processor */ | 152 | mtpr(0, PR_VPSR); /* Can't use vector processor */ | |
153 | 153 | |||
154 | ci = curcpu(); | 154 | ci = curcpu(); | |
155 | self->dv_private = ci; | 155 | self->dv_private = ci; | |
156 | ci->ci_dev = self; | 156 | ci->ci_dev = self; | |
157 | ci->ci_cpuid = device_unit(self); | 157 | ci->ci_cpuid = device_unit(self); | |
158 | ci->ci_slotid = xa->xa_nodenr; | 158 | ci->ci_slotid = xa->xa_nodenr; | |
159 | } | 159 | } | |
160 | 160 | |||
161 | void | 161 | void | |
162 | ka6400_conf(void) | 162 | ka6400_conf(void) | |
163 | { | 163 | { | |
164 | int mapaddr; | 164 | int mapaddr; | |
165 | 165 | |||
166 | rssc = (void *)vax_map_physmem(RSSC_ADDR, 1); | 166 | rssc = (void *)vax_map_physmem(RSSC_ADDR, 1); | |
167 | mastercpu = rssc[RSSC_IPORT/4] & 15; | 167 | mastercpu = rssc[RSSC_IPORT/4] & 15; | |
168 | mapaddr = (cca ? (int)cca : rpb.cca_addr); | 168 | mapaddr = (cca ? (int)cca : rpb.cca_addr); | |
169 | cca = (void *)vax_map_physmem(mapaddr, vax_btoc(sizeof(struct cca))); | 169 | cca = (void *)vax_map_physmem(mapaddr, vax_btoc(sizeof(struct cca))); | |
170 | } | 170 | } | |
171 | 171 | |||
172 | /* | 172 | /* | |
173 | * MS62 support. | 173 | * MS62 support. | |
174 | * This code should: | 174 | * This code should: | |
175 | * 1: Be completed. | 175 | * 1: Be completed. | |
176 | * 2: (eventually) move to dev/xmi/; it is used by Mips also. | 176 | * 2: (eventually) move to dev/xmi/; it is used by Mips also. | |
177 | */ | 177 | */ | |
178 | #define MEMRD(reg) bus_space_read_4(sc->sc_iot, sc->sc_ioh, (reg)) | 178 | #define MEMRD(reg) bus_space_read_4(sc->sc_iot, sc->sc_ioh, (reg)) | |
179 | #define MEMWR(reg, val) bus_space_write_4(sc->sc_iot, sc->sc_ioh, (reg), (val)) | 179 | #define MEMWR(reg, val) bus_space_write_4(sc->sc_iot, sc->sc_ioh, (reg), (val)) | |
180 | 180 | |||
181 | #define MS62_TYPE 0 | 181 | #define MS62_TYPE 0 | |
182 | #define MS62_XBE 4 | 182 | #define MS62_XBE 4 | |
183 | #define MS62_SEADR 16 | 183 | #define MS62_SEADR 16 | |
184 | #define MS62_CTL1 20 | 184 | #define MS62_CTL1 20 | |
185 | #define MS62_ECCERR 24 | 185 | #define MS62_ECCERR 24 | |
186 | #define MS62_ECCEA 28 | 186 | #define MS62_ECCEA 28 | |
187 | #define MS62_ILK0 32 | 187 | #define MS62_ILK0 32 | |
188 | #define MS62_ILK1 36 | 188 | #define MS62_ILK1 36 | |
189 | #define MS62_ILK2 40 | 189 | #define MS62_ILK2 40 | |
190 | #define MS62_ILK3 44 | 190 | #define MS62_ILK3 44 | |
191 | #define MS62_CTL2 48 | 191 | #define MS62_CTL2 48 | |
192 | 192 | |||
193 | static int ms6400_match(device_t , cfdata_t, void *); | 193 | static int ms6400_match(device_t , cfdata_t, void *); | |
194 | static void ms6400_attach(device_t , device_t , void*); | 194 | static void ms6400_attach(device_t , device_t , void*); | |
195 | 195 | |||
196 | struct mem_xmi_softc { | 196 | struct mem_xmi_softc { | |
197 | struct device *sc_dev; | 197 | device_t sc_dev; | |
198 | bus_space_tag_t sc_iot; | 198 | bus_space_tag_t sc_iot; | |
199 | bus_space_handle_t sc_ioh; | 199 | bus_space_handle_t sc_ioh; | |
200 | }; | 200 | }; | |
201 | 201 | |||
202 | CFATTACH_DECL_NEW(mem_xmi, sizeof(struct mem_xmi_softc), | 202 | CFATTACH_DECL_NEW(mem_xmi, sizeof(struct mem_xmi_softc), | |
203 | ms6400_match, ms6400_attach, NULL, NULL); | 203 | ms6400_match, ms6400_attach, NULL, NULL); | |
204 | 204 | |||
205 | static int | 205 | static int | |
206 | ms6400_match(device_t parent, cfdata_t cf, void *aux) | 206 | ms6400_match(device_t parent, cfdata_t cf, void *aux) | |
207 | { | 207 | { | |
208 | struct xmi_attach_args * const xa = aux; | 208 | struct xmi_attach_args * const xa = aux; | |
209 | 209 | |||
210 | if (bus_space_read_2(xa->xa_iot, xa->xa_ioh, XMI_TYPE) != XMIDT_MS62) | 210 | if (bus_space_read_2(xa->xa_iot, xa->xa_ioh, XMI_TYPE) != XMIDT_MS62) | |
211 | return 0; | 211 | return 0; | |
212 | 212 | |||
213 | if (cf->cf_loc[XMICF_NODE] != XMICF_NODE_DEFAULT && | 213 | if (cf->cf_loc[XMICF_NODE] != XMICF_NODE_DEFAULT && | |
214 | cf->cf_loc[XMICF_NODE] != xa->xa_nodenr) | 214 | cf->cf_loc[XMICF_NODE] != xa->xa_nodenr) | |
215 | return 0; | 215 | return 0; | |
216 | 216 | |||
217 | return 1; | 217 | return 1; | |
218 | } | 218 | } | |
219 | 219 | |||
220 | static void | 220 | static void | |
221 | ms6400_attach(device_t parent, device_t self, void *aux) | 221 | ms6400_attach(device_t parent, device_t self, void *aux) | |
222 | { | 222 | { | |
223 | struct mem_xmi_softc * const sc = device_private(self); | 223 | struct mem_xmi_softc * const sc = device_private(self); | |
224 | struct xmi_attach_args * const xa = aux; | 224 | struct xmi_attach_args * const xa = aux; | |
225 | 225 | |||
226 | sc->sc_dev = self; | 226 | sc->sc_dev = self; | |
227 | sc->sc_iot = xa->xa_iot; | 227 | sc->sc_iot = xa->xa_iot; | |
228 | sc->sc_ioh = xa->xa_ioh; | 228 | sc->sc_ioh = xa->xa_ioh; | |
229 | aprint_normal(": MS62, rev %d, size 32MB\n", MEMRD(MS62_TYPE) >> 16); | 229 | aprint_normal(": MS62, rev %d, size 32MB\n", MEMRD(MS62_TYPE) >> 16); | |
230 | } | 230 | } | |
231 | 231 | |||
232 | static void | 232 | static void | |
233 | ka6400_memerr(void) | 233 | ka6400_memerr(void) | |
234 | { | 234 | { | |
235 | printf("ka6400_memerr\n"); | 235 | printf("ka6400_memerr\n"); | |
236 | } | 236 | } | |
237 | 237 | |||
238 | struct mc6400frame { | 238 | struct mc6400frame { | |
239 | int mc64_summary; /* summary parameter */ | 239 | int mc64_summary; /* summary parameter */ | |
240 | int mc64_va; /* va register */ | 240 | int mc64_va; /* va register */ | |
241 | int mc64_vb; /* memory address */ | 241 | int mc64_vb; /* memory address */ | |
242 | int mc64_sisr; /* status word */ | 242 | int mc64_sisr; /* status word */ | |
243 | int mc64_state; /* error pc */ | 243 | int mc64_state; /* error pc */ | |
244 | int mc64_sc; /* micro pc */ | 244 | int mc64_sc; /* micro pc */ | |
245 | int mc64_pc; /* current pc */ | 245 | int mc64_pc; /* current pc */ | |
246 | int mc64_psl; /* current psl */ | 246 | int mc64_psl; /* current psl */ | |
247 | }; | 247 | }; | |
248 | 248 | |||
249 | static int | 249 | static int | |
250 | ka6400_mchk(void *cmcf) | 250 | ka6400_mchk(void *cmcf) | |
251 | { | 251 | { | |
252 | return (MCHK_PANIC); | 252 | return (MCHK_PANIC); | |
253 | } | 253 | } | |
254 | 254 | |||
255 | #if defined(MULTIPROCESSOR) | 255 | #if defined(MULTIPROCESSOR) | |
256 | #define RXBUF 80 | 256 | #define RXBUF 80 | |
257 | static char rxbuf[RXBUF]; | 257 | static char rxbuf[RXBUF]; | |
258 | static int got = 0, taken = 0; | 258 | static int got = 0, taken = 0; | |
259 | static int expect = 0; | 259 | static int expect = 0; | |
260 | #endif | 260 | #endif | |
261 | #if 0 | 261 | #if 0 | |
262 | /* | 262 | /* | |
263 | * Receive a character from logical console. | 263 | * Receive a character from logical console. | |
264 | */ | 264 | */ | |
265 | static void | 265 | static void | |
266 | rxcdintr(void *arg) | 266 | rxcdintr(void *arg) | |
267 | { | 267 | { | |
268 | int c = mfpr(PR_RXCD); | 268 | int c = mfpr(PR_RXCD); | |
269 | 269 | |||
270 | if (c == 0) | 270 | if (c == 0) | |
271 | return; | 271 | return; | |
272 | 272 | |||
273 | #if defined(MULTIPROCESSOR) | 273 | #if defined(MULTIPROCESSOR) | |
274 | if ((c & 0xff) == 0) { | 274 | if ((c & 0xff) == 0) { | |
275 | if (curcpu()->ci_flags & CI_MASTERCPU) | 275 | if (curcpu()->ci_flags & CI_MASTERCPU) | |
276 | ka6400_cnintr(); | 276 | ka6400_cnintr(); | |
277 | return; | 277 | return; | |
278 | } | 278 | } | |
279 | 279 | |||
280 | if (expect == ((c >> 8) & 0xf)) | 280 | if (expect == ((c >> 8) & 0xf)) | |
281 | rxbuf[got++] = c & 0xff; | 281 | rxbuf[got++] = c & 0xff; | |
282 | 282 | |||
283 | if (got == RXBUF) | 283 | if (got == RXBUF) | |
284 | got = 0; | 284 | got = 0; | |
285 | #endif | 285 | #endif | |
286 | } | 286 | } | |
287 | #endif | 287 | #endif | |
288 | 288 | |||
289 | /* | 289 | /* | |
290 | * From ka670, which has the same cache structure. | 290 | * From ka670, which has the same cache structure. | |
291 | */ | 291 | */ | |
292 | static void | 292 | static void | |
293 | ka6400_enable_cache(void) | 293 | ka6400_enable_cache(void) | |
294 | { | 294 | { | |
295 | mtpr(KA670_PCS_REFRESH, PR_PCSTS); /* disable primary cache */ | 295 | mtpr(KA670_PCS_REFRESH, PR_PCSTS); /* disable primary cache */ | |
296 | mtpr(mfpr(PR_PCSTS), PR_PCSTS); /* clear error flags */ | 296 | mtpr(mfpr(PR_PCSTS), PR_PCSTS); /* clear error flags */ | |
297 | mtpr(8, PR_BCCTL); /* disable backup cache */ | 297 | mtpr(8, PR_BCCTL); /* disable backup cache */ | |
298 | mtpr(0, PR_BCFBTS); /* flush backup cache tag store */ | 298 | mtpr(0, PR_BCFBTS); /* flush backup cache tag store */ | |
299 | mtpr(0, PR_BCFPTS); /* flush primary cache tag store */ | 299 | mtpr(0, PR_BCFPTS); /* flush primary cache tag store */ | |
300 | mtpr(0x0e, PR_BCCTL); /* enable backup cache */ | 300 | mtpr(0x0e, PR_BCCTL); /* enable backup cache */ | |
301 | mtpr(KA670_PCS_FLUSH | KA670_PCS_REFRESH, PR_PCSTS); /* flush primary cache */ | 301 | mtpr(KA670_PCS_FLUSH | KA670_PCS_REFRESH, PR_PCSTS); /* flush primary cache */ | |
302 | mtpr(KA670_PCS_ENABLE | KA670_PCS_REFRESH, PR_PCSTS); /* flush primary cache */ | 302 | mtpr(KA670_PCS_ENABLE | KA670_PCS_REFRESH, PR_PCSTS); /* flush primary cache */ | |
303 | } | 303 | } | |
304 | 304 | |||
305 | void | 305 | void | |
306 | ka6400_steal_pages(void) | 306 | ka6400_steal_pages(void) | |
307 | { | 307 | { | |
308 | int i, ncpus; | 308 | int i, ncpus; | |
309 | 309 | |||
310 | ka6400_enable_cache(); /* Turn on cache early */ | 310 | ka6400_enable_cache(); /* Turn on cache early */ | |
311 | if (cca == 0) | 311 | if (cca == 0) | |
312 | cca = (void *)rpb.cca_addr; | 312 | cca = (void *)rpb.cca_addr; | |
313 | /* Is there any way to get number of CPUs easier??? */ | 313 | /* Is there any way to get number of CPUs easier??? */ | |
314 | for (i = ncpus = 0; i < cca->cca_maxcpu; i++) | 314 | for (i = ncpus = 0; i < cca->cca_maxcpu; i++) | |
315 | if (cca->cca_console & (1 << i)) | 315 | if (cca->cca_console & (1 << i)) | |
316 | ncpus++; | 316 | ncpus++; | |
317 | sprintf(cpu_model, "VAX 6000/4%x0", ncpus + 1); | 317 | sprintf(cpu_model, "VAX 6000/4%x0", ncpus + 1); | |
318 | } | 318 | } | |
319 | 319 | |||
320 | 320 | |||
321 | #if defined(MULTIPROCESSOR) | 321 | #if defined(MULTIPROCESSOR) | |
322 | int | 322 | int | |
323 | rxchar(void) | 323 | rxchar(void) | |
324 | { | 324 | { | |
325 | int ret; | 325 | int ret; | |
326 | 326 | |||
327 | if (got == taken) | 327 | if (got == taken) | |
328 | return 0; | 328 | return 0; | |
329 | 329 | |||
330 | ret = rxbuf[taken++]; | 330 | ret = rxbuf[taken++]; | |
331 | if (taken == RXBUF) | 331 | if (taken == RXBUF) | |
332 | taken = 0; | 332 | taken = 0; | |
333 | return ret; | 333 | return ret; | |
334 | } | 334 | } | |
335 | 335 | |||
336 | static void | 336 | static void | |
337 | ka6400_startslave(struct cpu_info *ci) | 337 | ka6400_startslave(struct cpu_info *ci) | |
338 | { | 338 | { | |
339 | const struct pcb *pcb = lwp_getpcb(ci->ci_data.cpu_onproc); | 339 | const struct pcb *pcb = lwp_getpcb(ci->ci_data.cpu_onproc); | |
340 | const int id = ci->ci_slotid; | 340 | const int id = ci->ci_slotid; | |
341 | int i; | 341 | int i; | |
342 | 342 | |||
343 | expect = id; | 343 | expect = id; | |
344 | /* First empty queue */ | 344 | /* First empty queue */ | |
345 | for (i = 0; i < 10000; i++) | 345 | for (i = 0; i < 10000; i++) | |
346 | if (rxchar()) | 346 | if (rxchar()) | |
347 | i = 0; | 347 | i = 0; | |
348 | ka6400_txrx(id, "\020", 0); /* Send ^P to get attention */ | 348 | ka6400_txrx(id, "\020", 0); /* Send ^P to get attention */ | |
349 | ka6400_txrx(id, "I\r", 0); /* Init other end */ | 349 | ka6400_txrx(id, "I\r", 0); /* Init other end */ | |
350 | ka6400_txrx(id, "D/I 4 %x\r", ci->ci_istack); /* Interrupt stack */ | 350 | ka6400_txrx(id, "D/I 4 %x\r", ci->ci_istack); /* Interrupt stack */ | |
351 | ka6400_txrx(id, "D/I C %x\r", mfpr(PR_SBR)); /* SBR */ | 351 | ka6400_txrx(id, "D/I C %x\r", mfpr(PR_SBR)); /* SBR */ | |
352 | ka6400_txrx(id, "D/I D %x\r", mfpr(PR_SLR)); /* SLR */ | 352 | ka6400_txrx(id, "D/I D %x\r", mfpr(PR_SLR)); /* SLR */ | |
353 | ka6400_txrx(id, "D/I 10 %x\r", pcb->pcb_paddr); /* PCB for idle proc */ | 353 | ka6400_txrx(id, "D/I 10 %x\r", pcb->pcb_paddr); /* PCB for idle proc */ | |
354 | ka6400_txrx(id, "D/I 11 %x\r", mfpr(PR_SCBB)); /* SCB */ | 354 | ka6400_txrx(id, "D/I 11 %x\r", mfpr(PR_SCBB)); /* SCB */ | |
355 | ka6400_txrx(id, "D/I 38 %x\r", mfpr(PR_MAPEN)); /* Enable MM */ | 355 | ka6400_txrx(id, "D/I 38 %x\r", mfpr(PR_MAPEN)); /* Enable MM */ | |
356 | ka6400_txrx(id, "S %x\r", (int)&vax_mp_tramp); /* Start! */ | 356 | ka6400_txrx(id, "S %x\r", (int)&vax_mp_tramp); /* Start! */ | |
357 | expect = 0; | 357 | expect = 0; | |
358 | for (i = 0; i < 10000; i++) | 358 | for (i = 0; i < 10000; i++) | |
359 | if (ci->ci_flags & CI_RUNNING) | 359 | if (ci->ci_flags & CI_RUNNING) | |
360 | break; | 360 | break; | |
361 | if (i == 10000) | 361 | if (i == 10000) | |
362 | aprint_error_dev(ci->ci_dev, "(ID %d) failed starting!\n", id); | 362 | aprint_error_dev(ci->ci_dev, "(ID %d) failed starting!\n", id); | |
363 | } | 363 | } | |
364 | 364 | |||
365 | void | 365 | void | |
366 | ka6400_txrx(int id, const char *fmt, int arg) | 366 | ka6400_txrx(int id, const char *fmt, int arg) | |
367 | { | 367 | { | |
368 | char buf[20]; | 368 | char buf[20]; | |
369 | 369 | |||
370 | sprintf(buf, fmt, arg); | 370 | sprintf(buf, fmt, arg); | |
371 | ka6400_sendstr(id, buf); | 371 | ka6400_sendstr(id, buf); | |
372 | ka6400_sergeant(id); | 372 | ka6400_sergeant(id); | |
373 | } | 373 | } | |
374 | 374 | |||
375 | void | 375 | void | |
376 | ka6400_sendstr(int id, const char *buf) | 376 | ka6400_sendstr(int id, const char *buf) | |
377 | { | 377 | { | |
378 | u_int utchr; | 378 | u_int utchr; | |
379 | int ch, i; | 379 | int ch, i; | |
380 | 380 | |||
381 | while (*buf) { | 381 | while (*buf) { | |
382 | utchr = *buf | id << 8; | 382 | utchr = *buf | id << 8; | |
383 | 383 | |||
384 | /* | 384 | /* | |
385 | * It seems like mtpr to TXCD sets the V flag if it fails. | 385 | * It seems like mtpr to TXCD sets the V flag if it fails. | |
386 | * Cannot check that flag in C... | 386 | * Cannot check that flag in C... | |
387 | */ | 387 | */ | |
388 | __asm("1:;mtpr %0,$92;bvs 1b" :: "g"(utchr)); | 388 | __asm("1:;mtpr %0,$92;bvs 1b" :: "g"(utchr)); | |
389 | buf++; | 389 | buf++; | |
390 | i = 30000; | 390 | i = 30000; | |
391 | while ((ch = rxchar()) == 0 && --i) | 391 | while ((ch = rxchar()) == 0 && --i) | |
392 | ; | 392 | ; | |
393 | if (ch == 0) | 393 | if (ch == 0) | |
394 | continue; /* failed */ | 394 | continue; /* failed */ | |
395 | } | 395 | } | |
396 | } | 396 | } | |
397 | 397 | |||
398 | void | 398 | void | |
399 | ka6400_sergeant(int id) | 399 | ka6400_sergeant(int id) | |
400 | { | 400 | { | |
401 | int i, ch, nserg; | 401 | int i, ch, nserg; | |
402 | 402 | |||
403 | nserg = 0; | 403 | nserg = 0; | |
404 | for (i = 0; i < 30000; i++) { | 404 | for (i = 0; i < 30000; i++) { | |
405 | if ((ch = rxchar()) == 0) | 405 | if ((ch = rxchar()) == 0) | |
406 | continue; | 406 | continue; | |
407 | if (ch == '>') | 407 | if (ch == '>') | |
408 | nserg++; | 408 | nserg++; | |
409 | else | 409 | else | |
410 | nserg = 0; | 410 | nserg = 0; | |
411 | i = 0; | 411 | i = 0; | |
412 | if (nserg == 3) | 412 | if (nserg == 3) | |
413 | break; | 413 | break; | |
414 | } | 414 | } | |
415 | /* What to do now??? */ | 415 | /* What to do now??? */ | |
416 | } | 416 | } | |
417 | 417 | |||
418 | /* | 418 | /* | |
419 | * Write to master console. | 419 | * Write to master console. | |
420 | * Need no locking here; done in the print functions. | 420 | * Need no locking here; done in the print functions. | |
421 | */ | 421 | */ | |
422 | static volatile int ch = 0; | 422 | static volatile int ch = 0; | |
423 | 423 | |||
424 | void | 424 | void | |
425 | ka6400_putc(int c) | 425 | ka6400_putc(int c) | |
426 | { | 426 | { | |
427 | if (curcpu()->ci_flags & CI_MASTERCPU) { | 427 | if (curcpu()->ci_flags & CI_MASTERCPU) { | |
428 | gencnputc(0, c); | 428 | gencnputc(0, c); | |
429 | return; | 429 | return; | |
430 | } | 430 | } | |
431 | ch = c; | 431 | ch = c; | |
432 | mtpr(mastercpu << 8, PR_RXCD); /* Send IPI to mastercpu */ | 432 | mtpr(mastercpu << 8, PR_RXCD); /* Send IPI to mastercpu */ | |
433 | while (ch != 0) | 433 | while (ch != 0) | |
434 | ; /* Wait for master to handle */ | 434 | ; /* Wait for master to handle */ | |
435 | } | 435 | } | |
436 | 436 | |||
437 | /* | 437 | /* | |
438 | * Got character IPI. | 438 | * Got character IPI. | |
439 | */ | 439 | */ | |
440 | void | 440 | void | |
441 | ka6400_cnintr(void) | 441 | ka6400_cnintr(void) | |
442 | { | 442 | { | |
443 | if (ch != 0) | 443 | if (ch != 0) | |
444 | gencnputc(0, ch); | 444 | gencnputc(0, ch); | |
445 | ch = 0; /* Release slavecpu */ | 445 | ch = 0; /* Release slavecpu */ | |
446 | } | 446 | } | |
447 | #endif | 447 | #endif |
--- src/sys/arch/vax/vax/ka88.c 2010/12/14 23:44:49 1.15
+++ src/sys/arch/vax/vax/ka88.c 2011/06/05 16:59:21 1.16
@@ -1,484 +1,484 @@ | @@ -1,484 +1,484 @@ | |||
1 | /* $NetBSD: ka88.c,v 1.15 2010/12/14 23:44:49 matt Exp $ */ | 1 | /* $NetBSD: ka88.c,v 1.16 2011/06/05 16:59:21 matt Exp $ */ | |
2 | 2 | |||
3 | /* | 3 | /* | |
4 | * Copyright (c) 2000 Ludd, University of Lule}, Sweden. All rights reserved. | 4 | * Copyright (c) 2000 Ludd, University of Lule}, Sweden. All rights reserved. | |
5 | * | 5 | * | |
6 | * Redistribution and use in source and binary forms, with or without | 6 | * Redistribution and use in source and binary forms, with or without | |
7 | * modification, are permitted provided that the following conditions | 7 | * modification, are permitted provided that the following conditions | |
8 | * are met: | 8 | * are met: | |
9 | * 1. Redistributions of source code must retain the above copyright | 9 | * 1. Redistributions of source code must retain the above copyright | |
10 | * notice, this list of conditions and the following disclaimer. | 10 | * notice, this list of conditions and the following disclaimer. | |
11 | * 2. Redistributions in binary form must reproduce the above copyright | 11 | * 2. Redistributions in binary form must reproduce the above copyright | |
12 | * notice, this list of conditions and the following disclaimer in the | 12 | * notice, this list of conditions and the following disclaimer in the | |
13 | * documentation and/or other materials provided with the distribution. | 13 | * documentation and/or other materials provided with the distribution. | |
14 | * 3. All advertising materials mentioning features or use of this software | 14 | * 3. All advertising materials mentioning features or use of this software | |
15 | * must display the following acknowledgement: | 15 | * must display the following acknowledgement: | |
16 | * This product includes software developed at Ludd, University of | 16 | * This product includes software developed at Ludd, University of | |
17 | * Lule}, Sweden and its contributors. | 17 | * Lule}, Sweden and its contributors. | |
18 | * 4. The name of the author may not be used to endorse or promote products | 18 | * 4. The name of the author may not be used to endorse or promote products | |
19 | * derived from this software without specific prior written permission | 19 | * derived from this software without specific prior written permission | |
20 | * | 20 | * | |
21 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR | 21 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR | |
22 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES | 22 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES | |
23 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. | 23 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. | |
24 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | 24 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | |
25 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | 25 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | |
26 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | 26 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
27 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | 27 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
28 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | 28 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
29 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | 29 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | |
30 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | 30 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
31 | */ | 31 | */ | |
32 | 32 | |||
33 | /* | 33 | /* | |
34 | * KA88 specific CPU code. | 34 | * KA88 specific CPU code. | |
35 | */ | 35 | */ | |
36 | /* | 36 | /* | |
37 | * TODO: | 37 | * TODO: | |
38 | * - Machine check code | 38 | * - Machine check code | |
39 | */ | 39 | */ | |
40 | 40 | |||
41 | #include <sys/cdefs.h> | 41 | #include <sys/cdefs.h> | |
42 | __KERNEL_RCSID(0, "$NetBSD: ka88.c,v 1.15 2010/12/14 23:44:49 matt Exp $"); | 42 | __KERNEL_RCSID(0, "$NetBSD: ka88.c,v 1.16 2011/06/05 16:59:21 matt Exp $"); | |
43 | 43 | |||
44 | #include "opt_multiprocessor.h" | 44 | #include "opt_multiprocessor.h" | |
45 | 45 | |||
46 | #include <sys/param.h> | 46 | #include <sys/param.h> | |
47 | #include <sys/systm.h> | 47 | #include <sys/systm.h> | |
48 | #include <sys/bus.h> | 48 | #include <sys/bus.h> | |
49 | #include <sys/cpu.h> | 49 | #include <sys/cpu.h> | |
50 | #include <sys/device.h> | 50 | #include <sys/device.h> | |
51 | #include <sys/kernel.h> | 51 | #include <sys/kernel.h> | |
52 | #include <sys/malloc.h> | 52 | #include <sys/malloc.h> | |
53 | #include <sys/lwp.h> | 53 | #include <sys/lwp.h> | |
54 | 54 | |||
55 | #include <machine/nexus.h> | 55 | #include <machine/nexus.h> | |
56 | #include <machine/clock.h> | 56 | #include <machine/clock.h> | |
57 | #include <machine/scb.h> | 57 | #include <machine/scb.h> | |
58 | #include <machine/sid.h> | 58 | #include <machine/sid.h> | |
59 | #include <machine/rpb.h> | 59 | #include <machine/rpb.h> | |
60 | #include <machine/ka88.h> | 60 | #include <machine/ka88.h> | |
61 | 61 | |||
62 | #include <dev/cons.h> | 62 | #include <dev/cons.h> | |
63 | #include <vax/vax/gencons.h> | 63 | #include <vax/vax/gencons.h> | |
64 | 64 | |||
65 | #include "ioconf.h" | 65 | #include "ioconf.h" | |
66 | #include "locators.h" | 66 | #include "locators.h" | |
67 | 67 | |||
68 | static void ka88_memerr(void); | 68 | static void ka88_memerr(void); | |
69 | static void ka88_conf(void); | 69 | static void ka88_conf(void); | |
70 | static int ka88_mchk(void *); | 70 | static int ka88_mchk(void *); | |
71 | static void ka88_steal_pages(void); | 71 | static void ka88_steal_pages(void); | |
72 | static int ka88_gettime(volatile struct timeval *); | 72 | static int ka88_gettime(volatile struct timeval *); | |
73 | static void ka88_settime(volatile struct timeval *); | 73 | static void ka88_settime(volatile struct timeval *); | |
74 | static void ka88_badaddr(void); | 74 | static void ka88_badaddr(void); | |
75 | 75 | |||
76 | static long *ka88_mcl; | 76 | static long *ka88_mcl; | |
77 | static int mastercpu; | 77 | static int mastercpu; | |
78 | 78 | |||
79 | static const char * const ka88_devs[] = { "nmi", NULL }; | 79 | static const char * const ka88_devs[] = { "nmi", NULL }; | |
80 | 80 | |||
81 | const struct cpu_dep ka88_calls = { | 81 | const struct cpu_dep ka88_calls = { | |
82 | .cpu_steal_pages = ka88_steal_pages, | 82 | .cpu_steal_pages = ka88_steal_pages, | |
83 | .cpu_mchk = ka88_mchk, | 83 | .cpu_mchk = ka88_mchk, | |
84 | .cpu_memerr = ka88_memerr, | 84 | .cpu_memerr = ka88_memerr, | |
85 | .cpu_conf = ka88_conf, | 85 | .cpu_conf = ka88_conf, | |
86 | .cpu_gettime = ka88_gettime, | 86 | .cpu_gettime = ka88_gettime, | |
87 | .cpu_settime = ka88_settime, | 87 | .cpu_settime = ka88_settime, | |
88 | .cpu_vups = 6, /* ~VUPS */ | 88 | .cpu_vups = 6, /* ~VUPS */ | |
89 | .cpu_scbsz = 64, /* SCB pages */ | 89 | .cpu_scbsz = 64, /* SCB pages */ | |
90 | .cpu_devs = ka88_devs, | 90 | .cpu_devs = ka88_devs, | |
91 | .cpu_badaddr = ka88_badaddr, | 91 | .cpu_badaddr = ka88_badaddr, | |
92 | }; | 92 | }; | |
93 | 93 | |||
94 | #if defined(MULTIPROCESSOR) | 94 | #if defined(MULTIPROCESSOR) | |
95 | static void ka88_startslave(struct cpu_info *); | 95 | static void ka88_startslave(struct cpu_info *); | |
96 | static void ka88_txrx(int, const char *, int); | 96 | static void ka88_txrx(int, const char *, int); | |
97 | static void ka88_sendstr(int, const char *); | 97 | static void ka88_sendstr(int, const char *); | |
98 | static void ka88_sergeant(int); | 98 | static void ka88_sergeant(int); | |
99 | static int rxchar(void); | 99 | static int rxchar(void); | |
100 | static void ka88_putc(int); | 100 | static void ka88_putc(int); | |
101 | static void ka88_cnintr(void); | 101 | static void ka88_cnintr(void); | |
102 | cons_decl(gen); | 102 | cons_decl(gen); | |
103 | 103 | |||
104 | const struct cpu_mp_dep ka88_mp_calls = { | 104 | const struct cpu_mp_dep ka88_mp_calls = { | |
105 | .cpu_startslave = ka88_startslave, | 105 | .cpu_startslave = ka88_startslave, | |
106 | .cpu_cnintr = ka88_cnintr, | 106 | .cpu_cnintr = ka88_cnintr, | |
107 | }; | 107 | }; | |
108 | #endif | 108 | #endif | |
109 | 109 | |||
110 | static void | 110 | static void | |
111 | ka88_conf(void) | 111 | ka88_conf(void) | |
112 | { | 112 | { | |
113 | ka88_mcl = (void *)vax_map_physmem(0x3e000000, 1); | 113 | ka88_mcl = (void *)vax_map_physmem(0x3e000000, 1); | |
114 | printf("Serial number %d, rev %d\n", | 114 | printf("Serial number %d, rev %d\n", | |
115 | mfpr(PR_SID) & 65535, (mfpr(PR_SID) >> 16) & 127); | 115 | mfpr(PR_SID) & 65535, (mfpr(PR_SID) >> 16) & 127); | |
116 | #ifdef MULTIPROCESSOR | 116 | #ifdef MULTIPROCESSOR | |
117 | mp_dep_call = &ka88_mp_calls; | 117 | mp_dep_call = &ka88_mp_calls; | |
118 | #endif | 118 | #endif | |
119 | } | 119 | } | |
120 | 120 | |||
121 | static int | 121 | static int | |
122 | ka88_cpu_match(device_t parent, cfdata_t cf, void *aux) | 122 | ka88_cpu_match(device_t parent, cfdata_t cf, void *aux) | |
123 | { | 123 | { | |
124 | struct nmi_attach_args * const na = aux; | 124 | struct nmi_attach_args * const na = aux; | |
125 | 125 | |||
126 | if (cf->cf_loc[NMICF_SLOT] != NMICF_SLOT_DEFAULT && | 126 | if (cf->cf_loc[NMICF_SLOT] != NMICF_SLOT_DEFAULT && | |
127 | cf->cf_loc[NMICF_SLOT] != na->na_slot) | 127 | cf->cf_loc[NMICF_SLOT] != na->na_slot) | |
128 | return 0; | 128 | return 0; | |
129 | if (na->na_slot >= 20) | 129 | if (na->na_slot >= 20) | |
130 | return 1; | 130 | return 1; | |
131 | return 0; | 131 | return 0; | |
132 | } | 132 | } | |
133 | 133 | |||
134 | static void | 134 | static void | |
135 | ka88_cpu_attach(device_t parent, device_t self, void *aux) | 135 | ka88_cpu_attach(device_t parent, device_t self, void *aux) | |
136 | { | 136 | { | |
137 | struct cpu_info *ci; | 137 | struct cpu_info *ci; | |
138 | struct nmi_attach_args * const na = aux; | 138 | struct nmi_attach_args * const na = aux; | |
139 | const char *ms, *lr; | 139 | const char *ms, *lr; | |
140 | const bool master = (na->na_slot == mastercpu); | 140 | const bool master = (na->na_slot == mastercpu); | |
141 | 141 | |||
142 | if (((ka88_confdata & KA88_LEFTPRIM) && master) || | 142 | if (((ka88_confdata & KA88_LEFTPRIM) && master) || | |
143 | ((ka88_confdata & KA88_LEFTPRIM) == 0 && !master)) | 143 | ((ka88_confdata & KA88_LEFTPRIM) == 0 && !master)) | |
144 | lr = "left"; | 144 | lr = "left"; | |
145 | else | 145 | else | |
146 | lr = "right"; | 146 | lr = "right"; | |
147 | ms = (master ? "master" : "slave"); | 147 | ms = (master ? "master" : "slave"); | |
148 | 148 | |||
149 | aprint_normal(": KA88 %s %s\n", lr, ms); | 149 | aprint_normal(": KA88 %s %s\n", lr, ms); | |
150 | if (!master) { | 150 | if (!master) { | |
151 | #if defined(MULTIPROCESSOR) | 151 | #if defined(MULTIPROCESSOR) | |
152 | v_putc = ka88_putc; /* Need special console handling */ | 152 | v_putc = ka88_putc; /* Need special console handling */ | |
153 | cpu_slavesetup(self, na->na_slot); | 153 | cpu_slavesetup(self, na->na_slot); | |
154 | #endif | 154 | #endif | |
155 | return; | 155 | return; | |
156 | } | 156 | } | |
157 | ci = curcpu(); | 157 | ci = curcpu(); | |
158 | self->dv_private = ci; | 158 | self->dv_private = ci; | |
159 | ci->ci_dev = self; | 159 | ci->ci_dev = self; | |
160 | ci->ci_cpuid = device_unit(self); | 160 | ci->ci_cpuid = device_unit(self); | |
161 | ci->ci_slotid = na->na_slot; | 161 | ci->ci_slotid = na->na_slot; | |
162 | } | 162 | } | |
163 | 163 | |||
164 | CFATTACH_DECL_NEW(cpu_nmi, 0, | 164 | CFATTACH_DECL_NEW(cpu_nmi, 0, | |
165 | ka88_cpu_match, ka88_cpu_attach, NULL, NULL); | 165 | ka88_cpu_match, ka88_cpu_attach, NULL, NULL); | |
166 | 166 | |||
167 | struct mem_nmi_softc { | 167 | struct mem_nmi_softc { | |
168 | struct device *sc_dev; | 168 | device_t sc_dev; | |
169 | bus_space_tag_t sc_iot; | 169 | bus_space_tag_t sc_iot; | |
170 | bus_space_handle_t sc_ioh; | 170 | bus_space_handle_t sc_ioh; | |
171 | }; | 171 | }; | |
172 | 172 | |||
173 | static int | 173 | static int | |
174 | ms88_match(device_t parent, cfdata_t cf, void *aux) | 174 | ms88_match(device_t parent, cfdata_t cf, void *aux) | |
175 | { | 175 | { | |
176 | struct nmi_attach_args * const na = aux; | 176 | struct nmi_attach_args * const na = aux; | |
177 | 177 | |||
178 | if (cf->cf_loc[NMICF_SLOT] != NMICF_SLOT_DEFAULT && | 178 | if (cf->cf_loc[NMICF_SLOT] != NMICF_SLOT_DEFAULT && | |
179 | cf->cf_loc[NMICF_SLOT] != na->na_slot) | 179 | cf->cf_loc[NMICF_SLOT] != na->na_slot) | |
180 | return 0; | 180 | return 0; | |
181 | if (na->na_slot != 10) | 181 | if (na->na_slot != 10) | |
182 | return 0; | 182 | return 0; | |
183 | return 1; | 183 | return 1; | |
184 | } | 184 | } | |
185 | 185 | |||
186 | static void | 186 | static void | |
187 | ms88_attach(device_t parent, device_t self, void *aux) | 187 | ms88_attach(device_t parent, device_t self, void *aux) | |
188 | { | 188 | { | |
189 | struct nmi_attach_args * const na = aux; | 189 | struct nmi_attach_args * const na = aux; | |
190 | struct mem_nmi_softc * const sc = device_private(self); | 190 | struct mem_nmi_softc * const sc = device_private(self); | |
191 | 191 | |||
192 | aprint_normal("\n"); | 192 | aprint_normal("\n"); | |
193 | 193 | |||
194 | sc->sc_dev = self; | 194 | sc->sc_dev = self; | |
195 | sc->sc_iot = na->na_iot; | 195 | sc->sc_iot = na->na_iot; | |
196 | } | 196 | } | |
197 | 197 | |||
198 | CFATTACH_DECL_NEW(mem_nmi, sizeof(struct mem_nmi_softc), | 198 | CFATTACH_DECL_NEW(mem_nmi, sizeof(struct mem_nmi_softc), | |
199 | ms88_match, ms88_attach, NULL, NULL); | 199 | ms88_match, ms88_attach, NULL, NULL); | |
200 | 200 | |||
201 | static void | 201 | static void | |
202 | ka88_badaddr(void) | 202 | ka88_badaddr(void) | |
203 | { | 203 | { | |
204 | volatile int hej; | 204 | volatile int hej; | |
205 | /* | 205 | /* | |
206 | * This is some magic to clear the NMI faults, described | 206 | * This is some magic to clear the NMI faults, described | |
207 | * in section 7.9 in the VAX 8800 System Maintenance Guide. | 207 | * in section 7.9 in the VAX 8800 System Maintenance Guide. | |
208 | */ | 208 | */ | |
209 | hej = ka88_mcl[5]; | 209 | hej = ka88_mcl[5]; | |
210 | hej = ka88_mcl[0]; | 210 | hej = ka88_mcl[0]; | |
211 | ka88_mcl[0] = 0x04000000; | 211 | ka88_mcl[0] = 0x04000000; | |
212 | mtpr(1, 0x88); | 212 | mtpr(1, 0x88); | |
213 | } | 213 | } | |
214 | 214 | |||
215 | static void | 215 | static void | |
216 | ka88_memerr(void) | 216 | ka88_memerr(void) | |
217 | { | 217 | { | |
218 | printf("ka88_memerr\n"); | 218 | printf("ka88_memerr\n"); | |
219 | } | 219 | } | |
220 | 220 | |||
221 | struct mc88frame { | 221 | struct mc88frame { | |
222 | int mc64_summary; /* summary parameter */ | 222 | int mc64_summary; /* summary parameter */ | |
223 | int mc64_va; /* va register */ | 223 | int mc64_va; /* va register */ | |
224 | int mc64_vb; /* memory address */ | 224 | int mc64_vb; /* memory address */ | |
225 | int mc64_sisr; /* status word */ | 225 | int mc64_sisr; /* status word */ | |
226 | int mc64_state; /* error pc */ | 226 | int mc64_state; /* error pc */ | |
227 | int mc64_sc; /* micro pc */ | 227 | int mc64_sc; /* micro pc */ | |
228 | int mc64_pc; /* current pc */ | 228 | int mc64_pc; /* current pc */ | |
229 | int mc64_psl; /* current psl */ | 229 | int mc64_psl; /* current psl */ | |
230 | }; | 230 | }; | |
231 | 231 | |||
232 | static int | 232 | static int | |
233 | ka88_mchk(void *cmcf) | 233 | ka88_mchk(void *cmcf) | |
234 | { | 234 | { | |
235 | return (MCHK_PANIC); | 235 | return (MCHK_PANIC); | |
236 | } | 236 | } | |
237 | 237 | |||
238 | #if defined(MULTIPROCESSOR) | 238 | #if defined(MULTIPROCESSOR) | |
239 | #define RXBUF 80 | 239 | #define RXBUF 80 | |
240 | static char rxbuf[RXBUF]; | 240 | static char rxbuf[RXBUF]; | |
241 | static int got = 0, taken = 0; | 241 | static int got = 0, taken = 0; | |
242 | static int expect = 0; | 242 | static int expect = 0; | |
243 | #endif | 243 | #endif | |
244 | #if 0 | 244 | #if 0 | |
245 | /* | 245 | /* | |
246 | * Receive a character from logical console. | 246 | * Receive a character from logical console. | |
247 | */ | 247 | */ | |
248 | static void | 248 | static void | |
249 | rxcdintr(void *arg) | 249 | rxcdintr(void *arg) | |
250 | { | 250 | { | |
251 | int c = mfpr(PR_RXCD); | 251 | int c = mfpr(PR_RXCD); | |
252 | 252 | |||
253 | if (c == 0) | 253 | if (c == 0) | |
254 | return; | 254 | return; | |
255 | 255 | |||
256 | #if defined(MULTIPROCESSOR) | 256 | #if defined(MULTIPROCESSOR) | |
257 | if ((c & 0xff) == 0) { | 257 | if ((c & 0xff) == 0) { | |
258 | if (curcpu()->ci_flags & CI_MASTERCPU) | 258 | if (curcpu()->ci_flags & CI_MASTERCPU) | |
259 | ka88_cnintr(); | 259 | ka88_cnintr(); | |
260 | return; | 260 | return; | |
261 | } | 261 | } | |
262 | 262 | |||
263 | if (expect == ((c >> 8) & 0xf)) | 263 | if (expect == ((c >> 8) & 0xf)) | |
264 | rxbuf[got++] = c & 0xff; | 264 | rxbuf[got++] = c & 0xff; | |
265 | 265 | |||
266 | if (got == RXBUF) | 266 | if (got == RXBUF) | |
267 | got = 0; | 267 | got = 0; | |
268 | #endif | 268 | #endif | |
269 | } | 269 | } | |
270 | #endif | 270 | #endif | |
271 | 271 | |||
272 | static void | 272 | static void | |
273 | tocons(int val) | 273 | tocons(int val) | |
274 | { | 274 | { | |
275 | int s = splhigh(); | 275 | int s = splhigh(); | |
276 | 276 | |||
277 | while ((mfpr(PR_TXCS) & GC_RDY) == 0) /* Wait until xmit ready */ | 277 | while ((mfpr(PR_TXCS) & GC_RDY) == 0) /* Wait until xmit ready */ | |
278 | ; | 278 | ; | |
279 | mtpr(val, PR_TXDB); /* xmit character */ | 279 | mtpr(val, PR_TXDB); /* xmit character */ | |
280 | splx(s); | 280 | splx(s); | |
281 | } | 281 | } | |
282 | 282 | |||
283 | static int | 283 | static int | |
284 | fromcons(int func) | 284 | fromcons(int func) | |
285 | { | 285 | { | |
286 | int ret, s = splhigh(); | 286 | int ret, s = splhigh(); | |
287 | 287 | |||
288 | while (1) { | 288 | while (1) { | |
289 | while ((mfpr(PR_RXCS) & GC_DON) == 0) | 289 | while ((mfpr(PR_RXCS) & GC_DON) == 0) | |
290 | ; | 290 | ; | |
291 | ret = mfpr(PR_RXDB); | 291 | ret = mfpr(PR_RXDB); | |
292 | if ((ret & 0xf00) == func) | 292 | if ((ret & 0xf00) == func) | |
293 | break; | 293 | break; | |
294 | } | 294 | } | |
295 | splx(s); | 295 | splx(s); | |
296 | return ret; | 296 | return ret; | |
297 | } | 297 | } | |
298 | 298 | |||
299 | static int | 299 | static int | |
300 | ka88_gettime(volatile struct timeval *tvp) | 300 | ka88_gettime(volatile struct timeval *tvp) | |
301 | { | 301 | { | |
302 | union {u_int ret;u_char r[4];} u; | 302 | union {u_int ret;u_char r[4];} u; | |
303 | int i, s = splhigh(); | 303 | int i, s = splhigh(); | |
304 | 304 | |||
305 | tocons(KA88_COMM|KA88_TOYREAD); | 305 | tocons(KA88_COMM|KA88_TOYREAD); | |
306 | for (i = 0; i < 4; i++) { | 306 | for (i = 0; i < 4; i++) { | |
307 | u.r[i] = fromcons(KA88_TOY) & 255; | 307 | u.r[i] = fromcons(KA88_TOY) & 255; | |
308 | } | 308 | } | |
309 | splx(s); | 309 | splx(s); | |
310 | tvp->tv_sec = u.ret; | 310 | tvp->tv_sec = u.ret; | |
311 | return 0; | 311 | return 0; | |
312 | } | 312 | } | |
313 | 313 | |||
314 | static void | 314 | static void | |
315 | ka88_settime(volatile struct timeval *tvp) | 315 | ka88_settime(volatile struct timeval *tvp) | |
316 | { | 316 | { | |
317 | union {u_int ret;u_char r[4];} u; | 317 | union {u_int ret;u_char r[4];} u; | |
318 | int i, s = splhigh(); | 318 | int i, s = splhigh(); | |
319 | 319 | |||
320 | u.ret = tvp->tv_sec - yeartonum(numtoyear(tvp->tv_sec)); | 320 | u.ret = tvp->tv_sec - yeartonum(numtoyear(tvp->tv_sec)); | |
321 | tocons(KA88_COMM|KA88_TOYWRITE); | 321 | tocons(KA88_COMM|KA88_TOYWRITE); | |
322 | for (i = 0; i < 4; i++) | 322 | for (i = 0; i < 4; i++) | |
323 | tocons(KA88_TOY|u.r[i]); | 323 | tocons(KA88_TOY|u.r[i]); | |
324 | splx(s); | 324 | splx(s); | |
325 | } | 325 | } | |
326 | 326 | |||
327 | void | 327 | void | |
328 | ka88_steal_pages(void) | 328 | ka88_steal_pages(void) | |
329 | { | 329 | { | |
330 | mtpr(1, PR_COR); /* Cache on */ | 330 | mtpr(1, PR_COR); /* Cache on */ | |
331 | strcpy(cpu_model, "VAX 8800"); | 331 | strcpy(cpu_model, "VAX 8800"); | |
332 | tocons(KA88_COMM|KA88_GETCONF); | 332 | tocons(KA88_COMM|KA88_GETCONF); | |
333 | ka88_confdata = fromcons(KA88_CONFDATA); | 333 | ka88_confdata = fromcons(KA88_CONFDATA); | |
334 | ka88_confdata = mfpr(PR_RXDB); | 334 | ka88_confdata = mfpr(PR_RXDB); | |
335 | mastercpu = 20; | 335 | mastercpu = 20; | |
336 | if (vax_cputype == VAX_TYP_8NN) { | 336 | if (vax_cputype == VAX_TYP_8NN) { | |
337 | if (ka88_confdata & KA88_SMALL) { | 337 | if (ka88_confdata & KA88_SMALL) { | |
338 | cpu_model[5] = '5'; | 338 | cpu_model[5] = '5'; | |
339 | if (ka88_confdata & KA88_SLOW) { | 339 | if (ka88_confdata & KA88_SLOW) { | |
340 | vax_boardtype = VAX_BTYP_8500; | 340 | vax_boardtype = VAX_BTYP_8500; | |
341 | cpu_model[6] = '3'; | 341 | cpu_model[6] = '3'; | |
342 | } else { | 342 | } else { | |
343 | vax_boardtype = VAX_BTYP_8550; | 343 | vax_boardtype = VAX_BTYP_8550; | |
344 | cpu_model[6] = '5'; | 344 | cpu_model[6] = '5'; | |
345 | } | 345 | } | |
346 | } else if (ka88_confdata & KA88_SINGLE) { | 346 | } else if (ka88_confdata & KA88_SINGLE) { | |
347 | vax_boardtype = VAX_BTYP_8700; | 347 | vax_boardtype = VAX_BTYP_8700; | |
348 | cpu_model[5] = '7'; | 348 | cpu_model[5] = '7'; | |
349 | } | 349 | } | |
350 | } | 350 | } | |
351 | } | 351 | } | |
352 | 352 | |||
353 | 353 | |||
354 | #if defined(MULTIPROCESSOR) | 354 | #if defined(MULTIPROCESSOR) | |
355 | int | 355 | int | |
356 | rxchar(void) | 356 | rxchar(void) | |
357 | { | 357 | { | |
358 | int ret; | 358 | int ret; | |
359 | 359 | |||
360 | if (got == taken) | 360 | if (got == taken) | |
361 | return 0; | 361 | return 0; | |
362 | 362 | |||
363 | ret = rxbuf[taken++]; | 363 | ret = rxbuf[taken++]; | |
364 | if (taken == RXBUF) | 364 | if (taken == RXBUF) | |
365 | taken = 0; | 365 | taken = 0; | |
366 | return ret; | 366 | return ret; | |
367 | } | 367 | } | |
368 | 368 | |||
369 | static void | 369 | static void | |
370 | ka88_startslave(struct cpu_info *ci) | 370 | ka88_startslave(struct cpu_info *ci) | |
371 | { | 371 | { | |
372 | const struct pcb *pcb = lwp_getpcb(ci->ci_data.cpu_onproc); | 372 | const struct pcb *pcb = lwp_getpcb(ci->ci_data.cpu_onproc); | |
373 | const int id = ci->ci_slotid; | 373 | const int id = ci->ci_slotid; | |
374 | int i; | 374 | int i; | |
375 | 375 | |||
376 | expect = id; | 376 | expect = id; | |
377 | /* First empty queue */ | 377 | /* First empty queue */ | |
378 | for (i = 0; i < 10000; i++) | 378 | for (i = 0; i < 10000; i++) | |
379 | if (rxchar()) | 379 | if (rxchar()) | |
380 | i = 0; | 380 | i = 0; | |
381 | ka88_txrx(id, "\020", 0); /* Send ^P to get attention */ | 381 | ka88_txrx(id, "\020", 0); /* Send ^P to get attention */ | |
382 | ka88_txrx(id, "I\r", 0); /* Init other end */ | 382 | ka88_txrx(id, "I\r", 0); /* Init other end */ | |
383 | ka88_txrx(id, "D/I 4 %x\r", ci->ci_istack); /* Interrupt stack */ | 383 | ka88_txrx(id, "D/I 4 %x\r", ci->ci_istack); /* Interrupt stack */ | |
384 | ka88_txrx(id, "D/I C %x\r", mfpr(PR_SBR)); /* SBR */ | 384 | ka88_txrx(id, "D/I C %x\r", mfpr(PR_SBR)); /* SBR */ | |
385 | ka88_txrx(id, "D/I D %x\r", mfpr(PR_SLR)); /* SLR */ | 385 | ka88_txrx(id, "D/I D %x\r", mfpr(PR_SLR)); /* SLR */ | |
386 | ka88_txrx(id, "D/I 10 %x\r", pcb->pcb_paddr); /* PCB for idle proc */ | 386 | ka88_txrx(id, "D/I 10 %x\r", pcb->pcb_paddr); /* PCB for idle proc */ | |
387 | ka88_txrx(id, "D/I 11 %x\r", mfpr(PR_SCBB)); /* SCB */ | 387 | ka88_txrx(id, "D/I 11 %x\r", mfpr(PR_SCBB)); /* SCB */ | |
388 | ka88_txrx(id, "D/I 38 %x\r", mfpr(PR_MAPEN)); /* Enable MM */ | 388 | ka88_txrx(id, "D/I 38 %x\r", mfpr(PR_MAPEN)); /* Enable MM */ | |
389 | ka88_txrx(id, "S %x\r", (int)&vax_mp_tramp); /* Start! */ | 389 | ka88_txrx(id, "S %x\r", (int)&vax_mp_tramp); /* Start! */ | |
390 | expect = 0; | 390 | expect = 0; | |
391 | for (i = 0; i < 10000; i++) | 391 | for (i = 0; i < 10000; i++) | |
392 | if (ci->ci_flags & CI_RUNNING) | 392 | if (ci->ci_flags & CI_RUNNING) | |
393 | break; | 393 | break; | |
394 | if (i == 10000) | 394 | if (i == 10000) | |
395 | aprint_error_dev(ci->ci_dev, "(ID %d) failed starting!!\n", id); | 395 | aprint_error_dev(ci->ci_dev, "(ID %d) failed starting!!\n", id); | |
396 | } | 396 | } | |
397 | 397 | |||
398 | void | 398 | void | |
399 | ka88_txrx(int id, const char *fmt, int arg) | 399 | ka88_txrx(int id, const char *fmt, int arg) | |
400 | { | 400 | { | |
401 | char buf[20]; | 401 | char buf[20]; | |
402 | 402 | |||
403 | sprintf(buf, fmt, arg); | 403 | sprintf(buf, fmt, arg); | |
404 | ka88_sendstr(id, buf); | 404 | ka88_sendstr(id, buf); | |
405 | ka88_sergeant(id); | 405 | ka88_sergeant(id); | |
406 | } | 406 | } | |
407 | 407 | |||
408 | void | 408 | void | |
409 | ka88_sendstr(int id, const char *buf) | 409 | ka88_sendstr(int id, const char *buf) | |
410 | { | 410 | { | |
411 | u_int utchr; /* Ends up in R11 with PCC */ | 411 | u_int utchr; /* Ends up in R11 with PCC */ | |
412 | int ch, i; | 412 | int ch, i; | |
413 | 413 | |||
414 | while (*buf) { | 414 | while (*buf) { | |
415 | utchr = *buf | id << 8; | 415 | utchr = *buf | id << 8; | |
416 | 416 | |||
417 | /* | 417 | /* | |
418 | * It seems like mtpr to TXCD sets the V flag if it fails. | 418 | * It seems like mtpr to TXCD sets the V flag if it fails. | |
419 | * Cannot check that flag in C... | 419 | * Cannot check that flag in C... | |
420 | */ | 420 | */ | |
421 | #ifdef __GNUC__ | 421 | #ifdef __GNUC__ | |
422 | __asm("1:;mtpr %0,$92;bvs 1b" :: "g"(utchr)); | 422 | __asm("1:;mtpr %0,$92;bvs 1b" :: "g"(utchr)); | |
423 | #else | 423 | #else | |
424 | __asm("1:;mtpr r11,$92;bvs 1b"); | 424 | __asm("1:;mtpr r11,$92;bvs 1b"); | |
425 | #endif | 425 | #endif | |
426 | buf++; | 426 | buf++; | |
427 | i = 30000; | 427 | i = 30000; | |
428 | while ((ch = rxchar()) == 0 && --i) | 428 | while ((ch = rxchar()) == 0 && --i) | |
429 | ; | 429 | ; | |
430 | if (ch == 0) | 430 | if (ch == 0) | |
431 | continue; /* failed */ | 431 | continue; /* failed */ | |
432 | } | 432 | } | |
433 | } | 433 | } | |
434 | 434 | |||
435 | void | 435 | void | |
436 | ka88_sergeant(int id) | 436 | ka88_sergeant(int id) | |
437 | { | 437 | { | |
438 | int i, ch, nserg; | 438 | int i, ch, nserg; | |
439 | 439 | |||
440 | nserg = 0; | 440 | nserg = 0; | |
441 | for (i = 0; i < 30000; i++) { | 441 | for (i = 0; i < 30000; i++) { | |
442 | if ((ch = rxchar()) == 0) | 442 | if ((ch = rxchar()) == 0) | |
443 | continue; | 443 | continue; | |
444 | if (ch == '>') | 444 | if (ch == '>') | |
445 | nserg++; | 445 | nserg++; | |
446 | else | 446 | else | |
447 | nserg = 0; | 447 | nserg = 0; | |
448 | i = 0; | 448 | i = 0; | |
449 | if (nserg == 3) | 449 | if (nserg == 3) | |
450 | break; | 450 | break; | |
451 | } | 451 | } | |
452 | /* What to do now??? */ | 452 | /* What to do now??? */ | |
453 | } | 453 | } | |
454 | 454 | |||
455 | /* | 455 | /* | |
456 | * Write to master console. | 456 | * Write to master console. | |
457 | * Need no locking here; done in the print functions. | 457 | * Need no locking here; done in the print functions. | |
458 | */ | 458 | */ | |
459 | static volatile int ch = 0; | 459 | static volatile int ch = 0; | |
460 | 460 | |||
461 | void | 461 | void | |
462 | ka88_putc(int c) | 462 | ka88_putc(int c) | |
463 | { | 463 | { | |
464 | if (curcpu()->ci_flags & CI_MASTERCPU) { | 464 | if (curcpu()->ci_flags & CI_MASTERCPU) { | |
465 | gencnputc(0, c); | 465 | gencnputc(0, c); | |
466 | return; | 466 | return; | |
467 | } | 467 | } | |
468 | ch = c; | 468 | ch = c; | |
469 | mtpr(mastercpu << 8, PR_RXCD); /* Send IPI to mastercpu */ | 469 | mtpr(mastercpu << 8, PR_RXCD); /* Send IPI to mastercpu */ | |
470 | while (ch != 0) | 470 | while (ch != 0) | |
471 | ; /* Wait for master to handle */ | 471 | ; /* Wait for master to handle */ | |
472 | } | 472 | } | |
473 | 473 | |||
474 | /* | 474 | /* | |
475 | * Got character IPI. | 475 | * Got character IPI. | |
476 | */ | 476 | */ | |
477 | void | 477 | void | |
478 | ka88_cnintr(void) | 478 | ka88_cnintr(void) | |
479 | { | 479 | { | |
480 | if (ch != 0) | 480 | if (ch != 0) | |
481 | gencnputc(0, ch); | 481 | gencnputc(0, ch); | |
482 | ch = 0; /* Release slavecpu */ | 482 | ch = 0; /* Release slavecpu */ | |
483 | } | 483 | } | |
484 | #endif | 484 | #endif |
--- src/sys/arch/vax/vax/ka730.c 2010/12/14 23:44:49 1.2
+++ src/sys/arch/vax/vax/ka730.c 2011/06/05 16:59:21 1.3
@@ -1,204 +1,204 @@ | @@ -1,204 +1,204 @@ | |||
1 | /* $NetBSD: ka730.c,v 1.2 2010/12/14 23:44:49 matt Exp $ */ | 1 | /* $NetBSD: ka730.c,v 1.3 2011/06/05 16:59:21 matt Exp $ */ | |
2 | /* | 2 | /* | |
3 | * Copyright (c) 1982, 1986, 1988 The Regents of the University of California. | 3 | * Copyright (c) 1982, 1986, 1988 The Regents of the University of California. | |
4 | * All rights reserved. | 4 | * All rights reserved. | |
5 | * | 5 | * | |
6 | * Redistribution and use in source and binary forms, with or without | 6 | * Redistribution and use in source and binary forms, with or without | |
7 | * modification, are permitted provided that the following conditions | 7 | * modification, are permitted provided that the following conditions | |
8 | * are met: | 8 | * are met: | |
9 | * 1. Redistributions of source code must retain the above copyright | 9 | * 1. Redistributions of source code must retain the above copyright | |
10 | * notice, this list of conditions and the following disclaimer. | 10 | * notice, this list of conditions and the following disclaimer. | |
11 | * 2. Redistributions in binary form must reproduce the above copyright | 11 | * 2. Redistributions in binary form must reproduce the above copyright | |
12 | * notice, this list of conditions and the following disclaimer in the | 12 | * notice, this list of conditions and the following disclaimer in the | |
13 | * documentation and/or other materials provided with the distribution. | 13 | * documentation and/or other materials provided with the distribution. | |
14 | * 3. Neither the name of the University nor the names of its contributors | 14 | * 3. Neither the name of the University nor the names of its contributors | |
15 | * may be used to endorse or promote products derived from this software | 15 | * may be used to endorse or promote products derived from this software | |
16 | * without specific prior written permission. | 16 | * without specific prior written permission. | |
17 | * | 17 | * | |
18 | * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND | 18 | * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND | |
19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | 19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | 20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE | 21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE | |
22 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | 22 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
23 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | 23 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | |
24 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | 24 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | |
25 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | 25 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | |
26 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | 26 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | |
27 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | 27 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | |
28 | * SUCH DAMAGE. | 28 | * SUCH DAMAGE. | |
29 | * | 29 | * | |
30 | * @(#)ka730.c 7.4 (Berkeley) 5/9/91 | 30 | * @(#)ka730.c 7.4 (Berkeley) 5/9/91 | |
31 | * @(#)autoconf.c 7.20 (Berkeley) 5/9/91 | 31 | * @(#)autoconf.c 7.20 (Berkeley) 5/9/91 | |
32 | */ | 32 | */ | |
33 | 33 | |||
34 | /* | 34 | /* | |
35 | * Copyright (c) 1994 Ludd, University of Lule}, Sweden. | 35 | * Copyright (c) 1994 Ludd, University of Lule}, Sweden. | |
36 | * All rights reserved. | 36 | * All rights reserved. | |
37 | * | 37 | * | |
38 | * Redistribution and use in source and binary forms, with or without | 38 | * Redistribution and use in source and binary forms, with or without | |
39 | * modification, are permitted provided that the following conditions | 39 | * modification, are permitted provided that the following conditions | |
40 | * are met: | 40 | * are met: | |
41 | * 1. Redistributions of source code must retain the above copyright | 41 | * 1. Redistributions of source code must retain the above copyright | |
42 | * notice, this list of conditions and the following disclaimer. | 42 | * notice, this list of conditions and the following disclaimer. | |
43 | * 2. Redistributions in binary form must reproduce the above copyright | 43 | * 2. Redistributions in binary form must reproduce the above copyright | |
44 | * notice, this list of conditions and the following disclaimer in the | 44 | * notice, this list of conditions and the following disclaimer in the | |
45 | * documentation and/or other materials provided with the distribution. | 45 | * documentation and/or other materials provided with the distribution. | |
46 | * 3. All advertising materials mentioning features or use of this software | 46 | * 3. All advertising materials mentioning features or use of this software | |
47 | * must display the following acknowledgement: | 47 | * must display the following acknowledgement: | |
48 | * This product includes software developed by the University of | 48 | * This product includes software developed by the University of | |
49 | * California, Berkeley and its contributors. | 49 | * California, Berkeley and its contributors. | |
50 | * 4. Neither the name of the University nor the names of its contributors | 50 | * 4. Neither the name of the University nor the names of its contributors | |
51 | * may be used to endorse or promote products derived from this software | 51 | * may be used to endorse or promote products derived from this software | |
52 | * without specific prior written permission. | 52 | * without specific prior written permission. | |
53 | * | 53 | * | |
54 | * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND | 54 | * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND | |
55 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | 55 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
56 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | 56 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
57 | * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE | 57 | * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE | |
58 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | 58 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
59 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | 59 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | |
60 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | 60 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | |
61 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | 61 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | |
62 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | 62 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | |
63 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | 63 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | |
64 | * SUCH DAMAGE. | 64 | * SUCH DAMAGE. | |
65 | * | 65 | * | |
66 | * @(#)ka730.c 7.4 (Berkeley) 5/9/91 | 66 | * @(#)ka730.c 7.4 (Berkeley) 5/9/91 | |
67 | * @(#)autoconf.c 7.20 (Berkeley) 5/9/91 | 67 | * @(#)autoconf.c 7.20 (Berkeley) 5/9/91 | |
68 | */ | 68 | */ | |
69 | 69 | |||
70 | #include <sys/cdefs.h> | 70 | #include <sys/cdefs.h> | |
71 | __KERNEL_RCSID(0, "$NetBSD: ka730.c,v 1.2 2010/12/14 23:44:49 matt Exp $"); | 71 | __KERNEL_RCSID(0, "$NetBSD: ka730.c,v 1.3 2011/06/05 16:59:21 matt Exp $"); | |
72 | 72 | |||
73 | #include <sys/param.h> | 73 | #include <sys/param.h> | |
74 | #include <sys/systm.h> | 74 | #include <sys/systm.h> | |
75 | #include <sys/bus.h> | 75 | #include <sys/bus.h> | |
76 | #include <sys/cpu.h> | 76 | #include <sys/cpu.h> | |
77 | #include <sys/device.h> | 77 | #include <sys/device.h> | |
78 | 78 | |||
79 | #include <machine/ka730.h> | 79 | #include <machine/ka730.h> | |
80 | #include <machine/clock.h> | 80 | #include <machine/clock.h> | |
81 | #include <machine/sid.h> | 81 | #include <machine/sid.h> | |
82 | 82 | |||
83 | #include <vax/vax/gencons.h> | 83 | #include <vax/vax/gencons.h> | |
84 | 84 | |||
85 | #include "locators.h" | 85 | #include "locators.h" | |
86 | 86 | |||
87 | void ctuattach(void); | 87 | void ctuattach(void); | |
88 | static void ka730_clrf(void); | 88 | static void ka730_clrf(void); | |
89 | static void ka730_conf(void); | 89 | static void ka730_conf(void); | |
90 | static void ka730_memerr(void); | 90 | static void ka730_memerr(void); | |
91 | static int ka730_mchk(void *t); | 91 | static int ka730_mchk(void *t); | |
92 | static void ka730_attach_cpu(device_t); | 92 | static void ka730_attach_cpu(device_t); | |
93 | 93 | |||
94 | static const char * const ka730_devs[] = { "cpu", "ubi", NULL }; | 94 | static const char * const ka730_devs[] = { "cpu", "ubi", NULL }; | |
95 | 95 | |||
96 | struct cpu_dep ka730_calls = { | 96 | struct cpu_dep ka730_calls = { | |
97 | .cpu_mchk = ka730_mchk, | 97 | .cpu_mchk = ka730_mchk, | |
98 | .cpu_memerr = ka730_memerr, | 98 | .cpu_memerr = ka730_memerr, | |
99 | .cpu_conf = ka730_conf, | 99 | .cpu_conf = ka730_conf, | |
100 | .cpu_gettime = generic_gettime, | 100 | .cpu_gettime = generic_gettime, | |
101 | .cpu_settime = generic_settime, | 101 | .cpu_settime = generic_settime, | |
102 | .cpu_vups = 1, /* ~VUPS */ | 102 | .cpu_vups = 1, /* ~VUPS */ | |
103 | .cpu_scbsz = 4, /* SCB pages */ | 103 | .cpu_scbsz = 4, /* SCB pages */ | |
104 | .cpu_clrf = ka730_clrf, | 104 | .cpu_clrf = ka730_clrf, | |
105 | .cpu_devs = ka730_devs, | 105 | .cpu_devs = ka730_devs, | |
106 | .cpu_attach_cpu = ka730_attach_cpu, | 106 | .cpu_attach_cpu = ka730_attach_cpu, | |
107 | 107 | |||
108 | }; | 108 | }; | |
109 | 109 | |||
110 | void | 110 | void | |
111 | ka730_conf() | 111 | ka730_conf() | |
112 | { | 112 | { | |
113 | /* Call ctuattach() here so it can setup its vectors. */ | 113 | /* Call ctuattach() here so it can setup its vectors. */ | |
114 | ctuattach(); | 114 | ctuattach(); | |
115 | } | 115 | } | |
116 | 116 | |||
117 | void | 117 | void | |
118 | ka730_attach_cpu(device_t self) | 118 | ka730_attach_cpu(device_t self) | |
119 | { | 119 | { | |
120 | aprint_normal("KA730, ucode rev %d\n", V730UCODE(vax_cpudata)); | 120 | aprint_normal("KA730, ucode rev %d\n", V730UCODE(vax_cpudata)); | |
121 | } | 121 | } | |
122 | 122 | |||
123 | static void ka730_memenable(struct device *, struct device *, void *); | 123 | static void ka730_memenable(device_t, device_t, void *); | |
124 | static int ka730_memmatch(struct device *, struct cfdata *, void *); | 124 | static int ka730_memmatch(device_t, cfdata_t, void *); | |
125 | 125 | |||
126 | CFATTACH_DECL(mem_ubi, sizeof(struct device), | 126 | CFATTACH_DECL_NEW(mem_ubi, 0, | |
127 | ka730_memmatch, ka730_memenable, NULL, NULL); | 127 | ka730_memmatch, ka730_memenable, NULL, NULL); | |
128 | 128 | |||
129 | int | 129 | int | |
130 | ka730_memmatch(struct device *parent, struct cfdata *cf, void *aux) | 130 | ka730_memmatch(device_t parent, cfdata_t cf, void *aux) | |
131 | { | 131 | { | |
132 | struct sbi_attach_args *sa = (struct sbi_attach_args *)aux; | 132 | struct sbi_attach_args *sa = aux; | |
133 | 133 | |||
134 | if (cf->cf_loc[UBICF_TR] != sa->sa_nexnum && | 134 | if (cf->cf_loc[UBICF_TR] != sa->sa_nexnum && | |
135 | cf->cf_loc[UBICF_TR] > UBICF_TR_DEFAULT) | 135 | cf->cf_loc[UBICF_TR] > UBICF_TR_DEFAULT) | |
136 | return 0; | 136 | return 0; | |
137 | 137 | |||
138 | if (sa->sa_type != NEX_MEM16) | 138 | if (sa->sa_type != NEX_MEM16) | |
139 | return 0; | 139 | return 0; | |
140 | 140 | |||
141 | return 1; | 141 | return 1; | |
142 | } | 142 | } | |
143 | 143 | |||
144 | struct mcr730 { | 144 | struct mcr730 { | |
145 | int mc_addr; /* address and syndrome */ | 145 | int mc_addr; /* address and syndrome */ | |
146 | int mc_err; /* error bits */ | 146 | int mc_err; /* error bits */ | |
147 | }; | 147 | }; | |
148 | 148 | |||
149 | /* enable crd interrupts */ | 149 | /* enable crd interrupts */ | |
150 | void | 150 | void | |
151 | ka730_memenable(struct device *parent, struct device *self, void *aux) | 151 | ka730_memenable(device_t parent, device_t self, void *aux) | |
152 | { | 152 | { | |
153 | } | 153 | } | |
154 | 154 | |||
155 | /* log crd errors */ | 155 | /* log crd errors */ | |
156 | void | 156 | void | |
157 | ka730_memerr() | 157 | ka730_memerr() | |
158 | { | 158 | { | |
159 | } | 159 | } | |
160 | 160 | |||
161 | #define NMC730 12 | 161 | #define NMC730 12 | |
162 | const char *mc730[]={"0","1","2","3","4","5","6","7","8","9","10","11","12","13", | 162 | const char *mc730[]={"0","1","2","3","4","5","6","7","8","9","10","11","12","13", | |
163 | "14","15"}; | 163 | "14","15"}; | |
164 | 164 | |||
165 | struct mc730frame { | 165 | struct mc730frame { | |
166 | int mc3_bcnt; /* byte count == 0xc */ | 166 | int mc3_bcnt; /* byte count == 0xc */ | |
167 | int mc3_summary; /* summary parameter (as above) */ | 167 | int mc3_summary; /* summary parameter (as above) */ | |
168 | int mc3_parm[2]; /* parameters */ | 168 | int mc3_parm[2]; /* parameters */ | |
169 | int mc3_pc; /* trapped pc */ | 169 | int mc3_pc; /* trapped pc */ | |
170 | int mc3_psl; /* trapped psl */ | 170 | int mc3_psl; /* trapped psl */ | |
171 | }; | 171 | }; | |
172 | 172 | |||
173 | int | 173 | int | |
174 | ka730_mchk(void *cmcf) | 174 | ka730_mchk(void *cmcf) | |
175 | { | 175 | { | |
176 | register struct mc730frame *mcf = (struct mc730frame *)cmcf; | 176 | register struct mc730frame *mcf = (struct mc730frame *)cmcf; | |
177 | register int type = mcf->mc3_summary; | 177 | register int type = mcf->mc3_summary; | |
178 | 178 | |||
179 | printf("machine check %x: %s\n", | 179 | printf("machine check %x: %s\n", | |
180 | type, type < NMC730 ? mc730[type] : "???"); | 180 | type, type < NMC730 ? mc730[type] : "???"); | |
181 | printf("\tparams %x %x pc %x psl %x mcesr %x\n", | 181 | printf("\tparams %x %x pc %x psl %x mcesr %x\n", | |
182 | mcf->mc3_parm[0], mcf->mc3_parm[1], | 182 | mcf->mc3_parm[0], mcf->mc3_parm[1], | |
183 | mcf->mc3_pc, mcf->mc3_psl, mfpr(PR_MCESR)); | 183 | mcf->mc3_pc, mcf->mc3_psl, mfpr(PR_MCESR)); | |
184 | mtpr(0xf, PR_MCESR); | 184 | mtpr(0xf, PR_MCESR); | |
185 | return (MCHK_PANIC); | 185 | return (MCHK_PANIC); | |
186 | } | 186 | } | |
187 | 187 | |||
188 | void | 188 | void | |
189 | ka730_clrf() | 189 | ka730_clrf() | |
190 | { | 190 | { | |
191 | int s = splhigh(); | 191 | int s = splhigh(); | |
192 | 192 | |||
193 | #define WAIT while ((mfpr(PR_TXCS) & GC_RDY) == 0) ; | 193 | #define WAIT while ((mfpr(PR_TXCS) & GC_RDY) == 0) ; | |
194 | 194 | |||
195 | WAIT; | 195 | WAIT; | |
196 | 196 | |||
197 | mtpr(GC_CWFL|GC_CONS, PR_TXDB); | 197 | mtpr(GC_CWFL|GC_CONS, PR_TXDB); | |
198 | 198 | |||
199 | WAIT; | 199 | WAIT; | |
200 | mtpr(GC_CCFL|GC_CONS, PR_TXDB); | 200 | mtpr(GC_CCFL|GC_CONS, PR_TXDB); | |
201 | 201 | |||
202 | WAIT; | 202 | WAIT; | |
203 | splx(s); | 203 | splx(s); | |
204 | } | 204 | } |
--- src/sys/arch/vax/vax/ka820.c 2010/12/14 23:44:49 1.53
+++ src/sys/arch/vax/vax/ka820.c 2011/06/05 16:59:21 1.54
@@ -1,658 +1,658 @@ | @@ -1,658 +1,658 @@ | |||
1 | /* $NetBSD: ka820.c,v 1.53 2010/12/14 23:44:49 matt Exp $ */ | 1 | /* $NetBSD: ka820.c,v 1.54 2011/06/05 16:59:21 matt Exp $ */ | |
2 | /* | 2 | /* | |
3 | * Copyright (c) 1988 Regents of the University of California. | 3 | * Copyright (c) 1988 Regents of the University of California. | |
4 | * All rights reserved. | 4 | * All rights reserved. | |
5 | * | 5 | * | |
6 | * This code is derived from software contributed to Berkeley by | 6 | * This code is derived from software contributed to Berkeley by | |
7 | * Chris Torek. | 7 | * Chris Torek. | |
8 | * | 8 | * | |
9 | * Redistribution and use in source and binary forms, with or without | 9 | * Redistribution and use in source and binary forms, with or without | |
10 | * modification, are permitted provided that the following conditions | 10 | * modification, are permitted provided that the following conditions | |
11 | * are met: | 11 | * are met: | |
12 | * 1. Redistributions of source code must retain the above copyright | 12 | * 1. Redistributions of source code must retain the above copyright | |
13 | * notice, this list of conditions and the following disclaimer. | 13 | * notice, this list of conditions and the following disclaimer. | |
14 | * 2. Redistributions in binary form must reproduce the above copyright | 14 | * 2. Redistributions in binary form must reproduce the above copyright | |
15 | * notice, this list of conditions and the following disclaimer in the | 15 | * notice, this list of conditions and the following disclaimer in the | |
16 | * documentation and/or other materials provided with the distribution. | 16 | * documentation and/or other materials provided with the distribution. | |
17 | * 3. Neither the name of the University nor the names of its contributors | 17 | * 3. Neither the name of the University nor the names of its contributors | |
18 | * may be used to endorse or promote products derived from this software | 18 | * may be used to endorse or promote products derived from this software | |
19 | * without specific prior written permission. | 19 | * without specific prior written permission. | |
20 | * | 20 | * | |
21 | * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND | 21 | * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND | |
22 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | 22 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
23 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | 23 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
24 | * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE | 24 | * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE | |
25 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | 25 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
26 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | 26 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | |
27 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | 27 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | |
28 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | 28 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | |
29 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | 29 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | |
30 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | 30 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | |
31 | * SUCH DAMAGE. | 31 | * SUCH DAMAGE. | |
32 | * | 32 | * | |
33 | * @(#)ka820.c 7.4 (Berkeley) 12/16/90 | 33 | * @(#)ka820.c 7.4 (Berkeley) 12/16/90 | |
34 | */ | 34 | */ | |
35 | 35 | |||
36 | /* | 36 | /* | |
37 | * KA820 specific CPU code. (Note that the VAX8200 uses a KA820, not | 37 | * KA820 specific CPU code. (Note that the VAX8200 uses a KA820, not | |
38 | * a KA8200. Sigh.) | 38 | * a KA8200. Sigh.) | |
39 | */ | 39 | */ | |
40 | 40 | |||
41 | #include <sys/cdefs.h> | 41 | #include <sys/cdefs.h> | |
42 | __KERNEL_RCSID(0, "$NetBSD: ka820.c,v 1.53 2010/12/14 23:44:49 matt Exp $"); | 42 | __KERNEL_RCSID(0, "$NetBSD: ka820.c,v 1.54 2011/06/05 16:59:21 matt Exp $"); | |
43 | 43 | |||
44 | #include "opt_multiprocessor.h" | 44 | #include "opt_multiprocessor.h" | |
45 | 45 | |||
46 | #include <sys/param.h> | 46 | #include <sys/param.h> | |
47 | #include <sys/systm.h> | 47 | #include <sys/systm.h> | |
48 | #include <sys/bus.h> | 48 | #include <sys/bus.h> | |
49 | #include <sys/cpu.h> | 49 | #include <sys/cpu.h> | |
50 | #include <sys/device.h> | 50 | #include <sys/device.h> | |
51 | #include <sys/kernel.h> | 51 | #include <sys/kernel.h> | |
52 | #include <sys/proc.h> | 52 | #include <sys/proc.h> | |
53 | 53 | |||
54 | #include <machine/ka820.h> | 54 | #include <machine/ka820.h> | |
55 | #include <machine/nexus.h> | 55 | #include <machine/nexus.h> | |
56 | #include <machine/clock.h> | 56 | #include <machine/clock.h> | |
57 | #include <machine/scb.h> | 57 | #include <machine/scb.h> | |
58 | #include <machine/mainbus.h> | 58 | #include <machine/mainbus.h> | |
59 | 59 | |||
60 | #include <dev/cons.h> | 60 | #include <dev/cons.h> | |
61 | 61 | |||
62 | #include <dev/bi/bireg.h> | 62 | #include <dev/bi/bireg.h> | |
63 | #include <dev/bi/bivar.h> | 63 | #include <dev/bi/bivar.h> | |
64 | 64 | |||
65 | #include <vax/vax/crx.h> | 65 | #include <vax/vax/crx.h> | |
66 | 66 | |||
67 | #include "ioconf.h" | 67 | #include "ioconf.h" | |
68 | #include "locators.h" | 68 | #include "locators.h" | |
69 | 69 | |||
70 | struct ka820port *ka820port_ptr; | 70 | struct ka820port *ka820port_ptr; | |
71 | struct rx50device *rx50device_ptr; | 71 | struct rx50device *rx50device_ptr; | |
72 | static volatile struct ka820clock *ka820_clkpage; | 72 | static volatile struct ka820clock *ka820_clkpage; | |
73 | static int mastercpu; | 73 | static int mastercpu; | |
74 | 74 | |||
75 | static int ka820_match(device_t, cfdata_t, void *); | 75 | static int ka820_match(device_t, cfdata_t, void *); | |
76 | static void ka820_attach(device_t, device_t, void*); | 76 | static void ka820_attach(device_t, device_t, void*); | |
77 | static void ka820_memerr(void); | 77 | static void ka820_memerr(void); | |
78 | static void ka820_conf(void); | 78 | static void ka820_conf(void); | |
79 | static int ka820_mchk(void *); | 79 | static int ka820_mchk(void *); | |
80 | static int ka820_gettime(struct timeval *); | 80 | static int ka820_gettime(struct timeval *); | |
81 | static void ka820_settime(struct timeval *); | 81 | static void ka820_settime(struct timeval *); | |
82 | static void rxcdintr(void *); | 82 | static void rxcdintr(void *); | |
83 | static void vaxbierr(void *); | 83 | static void vaxbierr(void *); | |
84 | 84 | |||
85 | static const char * const ka820_devs[] = { "bi", NULL }; | 85 | static const char * const ka820_devs[] = { "bi", NULL }; | |
86 | 86 | |||
87 | const struct cpu_dep ka820_calls = { | 87 | const struct cpu_dep ka820_calls = { | |
88 | .cpu_mchk = ka820_mchk, | 88 | .cpu_mchk = ka820_mchk, | |
89 | .cpu_memerr = ka820_memerr, | 89 | .cpu_memerr = ka820_memerr, | |
90 | .cpu_conf = ka820_conf, | 90 | .cpu_conf = ka820_conf, | |
91 | .cpu_gettime = ka820_gettime, | 91 | .cpu_gettime = ka820_gettime, | |
92 | .cpu_settime = ka820_settime, | 92 | .cpu_settime = ka820_settime, | |
93 | .cpu_devs = ka820_devs, | 93 | .cpu_devs = ka820_devs, | |
94 | .cpu_vups = 3, /* ~VUPS */ | 94 | .cpu_vups = 3, /* ~VUPS */ | |
95 | .cpu_scbsz = 5, /* SCB pages */ | 95 | .cpu_scbsz = 5, /* SCB pages */ | |
96 | }; | 96 | }; | |
97 | 97 | |||
98 | #if defined(MULTIPROCESSOR) | 98 | #if defined(MULTIPROCESSOR) | |
99 | static void ka820_startslave(struct cpu_info *); | 99 | static void ka820_startslave(struct cpu_info *); | |
100 | static void ka820_send_ipi(struct cpu_info *); | 100 | static void ka820_send_ipi(struct cpu_info *); | |
101 | static void ka820_txrx(int, const char *, int); | 101 | static void ka820_txrx(int, const char *, int); | |
102 | static void ka820_sendstr(int, const char *); | 102 | static void ka820_sendstr(int, const char *); | |
103 | static void ka820_sergeant(int); | 103 | static void ka820_sergeant(int); | |
104 | static int rxchar(void); | 104 | static int rxchar(void); | |
105 | static void ka820_putc(int); | 105 | static void ka820_putc(int); | |
106 | static void ka820_cnintr(void); | 106 | static void ka820_cnintr(void); | |
107 | static void ka820_ipintr(void *); | 107 | static void ka820_ipintr(void *); | |
108 | cons_decl(gen); | 108 | cons_decl(gen); | |
109 | 109 | |||
110 | const struct cpu_mp_dep ka820_mp_dep = { | 110 | const struct cpu_mp_dep ka820_mp_dep = { | |
111 | .cpu_startslave = ka820_startslave, | 111 | .cpu_startslave = ka820_startslave, | |
112 | .cpu_send_ipi = ka820_send_ipi, | 112 | .cpu_send_ipi = ka820_send_ipi, | |
113 | .cpu_cnintr = ka820_cnintr, | 113 | .cpu_cnintr = ka820_cnintr, | |
114 | }; | 114 | }; | |
115 | #endif | 115 | #endif | |
116 | 116 | |||
117 | CFATTACH_DECL_NEW(cpu_bi, 0, | 117 | CFATTACH_DECL_NEW(cpu_bi, 0, | |
118 | ka820_match, ka820_attach, NULL, NULL); | 118 | ka820_match, ka820_attach, NULL, NULL); | |
119 | 119 | |||
120 | #ifdef notyet | 120 | #ifdef notyet | |
121 | extern struct pte BRAMmap[]; | 121 | extern struct pte BRAMmap[]; | |
122 | extern struct pte EEPROMmap[]; | 122 | extern struct pte EEPROMmap[]; | |
123 | char bootram[KA820_BRPAGES * VAX_NBPG]; | 123 | char bootram[KA820_BRPAGES * VAX_NBPG]; | |
124 | char eeprom[KA820_EEPAGES * VAX_NBPG]; | 124 | char eeprom[KA820_EEPAGES * VAX_NBPG]; | |
125 | #endif | 125 | #endif | |
126 | 126 | |||
127 | static int | 127 | static int | |
128 | ka820_match(device_t parent, cfdata_t cf, void *aux) | 128 | ka820_match(device_t parent, cfdata_t cf, void *aux) | |
129 | { | 129 | { | |
130 | struct bi_attach_args * const ba = aux; | 130 | struct bi_attach_args * const ba = aux; | |
131 | 131 | |||
132 | if (bus_space_read_2(ba->ba_iot, ba->ba_ioh, BIREG_DTYPE) != BIDT_KA820) | 132 | if (bus_space_read_2(ba->ba_iot, ba->ba_ioh, BIREG_DTYPE) != BIDT_KA820) | |
133 | return 0; | 133 | return 0; | |
134 | 134 | |||
135 | if (cf->cf_loc[BICF_NODE] != BICF_NODE_DEFAULT && | 135 | if (cf->cf_loc[BICF_NODE] != BICF_NODE_DEFAULT && | |
136 | cf->cf_loc[BICF_NODE] != ba->ba_nodenr) | 136 | cf->cf_loc[BICF_NODE] != ba->ba_nodenr) | |
137 | return 0; | 137 | return 0; | |
138 | 138 | |||
139 | return 1; | 139 | return 1; | |
140 | } | 140 | } | |
141 | 141 | |||
142 | static void | 142 | static void | |
143 | ka820_attach(device_t parent, device_t self, void *aux) | 143 | ka820_attach(device_t parent, device_t self, void *aux) | |
144 | { | 144 | { | |
145 | struct bi_attach_args * const ba = aux; | 145 | struct bi_attach_args * const ba = aux; | |
146 | struct cpu_info *ci; | 146 | struct cpu_info *ci; | |
147 | int csr; | 147 | int csr; | |
148 | u_short rev; | 148 | u_short rev; | |
149 | 149 | |||
150 | rev = bus_space_read_4(ba->ba_iot, ba->ba_ioh, BIREG_DTYPE) >> 16; | 150 | rev = bus_space_read_4(ba->ba_iot, ba->ba_ioh, BIREG_DTYPE) >> 16; | |
151 | mastercpu = mfpr(PR_BINID); | 151 | mastercpu = mfpr(PR_BINID); | |
152 | strcpy(cpu_model, "VAX 8200"); | 152 | strcpy(cpu_model, "VAX 8200"); | |
153 | cpu_model[6] = rev & 0x8000 ? '5' : '0'; | 153 | cpu_model[6] = rev & 0x8000 ? '5' : '0'; | |
154 | printf(": ka82%c (%s) CPU rev %d, u patch rev %d, sec patch %d\n", | 154 | printf(": ka82%c (%s) CPU rev %d, u patch rev %d, sec patch %d\n", | |
155 | cpu_model[6], mastercpu == ba->ba_nodenr ? "master" : "slave", | 155 | cpu_model[6], mastercpu == ba->ba_nodenr ? "master" : "slave", | |
156 | ((rev >> 11) & 15), ((rev >> 1) &1023), rev & 1); | 156 | ((rev >> 11) & 15), ((rev >> 1) &1023), rev & 1); | |
157 | 157 | |||
158 | /* Allow for IPINTR */ | 158 | /* Allow for IPINTR */ | |
159 | bus_space_write_4(ba->ba_iot, ba->ba_ioh, | 159 | bus_space_write_4(ba->ba_iot, ba->ba_ioh, | |
160 | BIREG_IPINTRMSK, BIIPINTR_MASK); | 160 | BIREG_IPINTRMSK, BIIPINTR_MASK); | |
161 | 161 | |||
162 | #if defined(MULTIPROCESSOR) | 162 | #if defined(MULTIPROCESSOR) | |
163 | if (ba->ba_nodenr != mastercpu) { | 163 | if (ba->ba_nodenr != mastercpu) { | |
164 | v_putc = ka820_putc; /* Need special console handling */ | 164 | v_putc = ka820_putc; /* Need special console handling */ | |
165 | cpu_slavesetup(self, ba->ba_nodenr); | 165 | cpu_slavesetup(self, ba->ba_nodenr); | |
166 | return; | 166 | return; | |
167 | } | 167 | } | |
168 | #endif | 168 | #endif | |
169 | 169 | |||
170 | ci = curcpu(); | 170 | ci = curcpu(); | |
171 | self->dv_private = ci; /* eww. but curcpu() is already too */ | 171 | self->dv_private = ci; /* eww. but curcpu() is already too */ | |
172 | /* entrenched to change */ | 172 | /* entrenched to change */ | |
173 | ci->ci_slotid = ba->ba_nodenr; | 173 | ci->ci_slotid = ba->ba_nodenr; | |
174 | ci->ci_cpuid = device_unit(self); | 174 | ci->ci_cpuid = device_unit(self); | |
175 | ci->ci_dev = self; | 175 | ci->ci_dev = self; | |
176 | 176 | |||
177 | #if defined(MULTIPROCESSOR) | 177 | #if defined(MULTIPROCESSOR) | |
178 | /* | 178 | /* | |
179 | * Catch interprocessor interrupts. | 179 | * Catch interprocessor interrupts. | |
180 | */ | 180 | */ | |
181 | scb_vecalloc(KA820_INT_IPINTR, ka820_ipintr, ci, SCB_ISTACK, NULL); | 181 | scb_vecalloc(KA820_INT_IPINTR, ka820_ipintr, ci, SCB_ISTACK, NULL); | |
182 | #endif | 182 | #endif | |
183 | /* reset the console and enable the RX50 */ | 183 | /* reset the console and enable the RX50 */ | |
184 | ka820port_ptr = (void *)vax_map_physmem(KA820_PORTADDR, 1); | 184 | ka820port_ptr = (void *)vax_map_physmem(KA820_PORTADDR, 1); | |
185 | csr = ka820port_ptr->csr; | 185 | csr = ka820port_ptr->csr; | |
186 | csr &= ~KA820PORT_RSTHALT; /* ??? */ | 186 | csr &= ~KA820PORT_RSTHALT; /* ??? */ | |
187 | csr |= KA820PORT_CONSCLR | KA820PORT_CRDCLR | KA820PORT_CONSEN | | 187 | csr |= KA820PORT_CONSCLR | KA820PORT_CRDCLR | KA820PORT_CONSEN | | |
188 | KA820PORT_RXIE; | 188 | KA820PORT_RXIE; | |
189 | ka820port_ptr->csr = csr; | 189 | ka820port_ptr->csr = csr; | |
190 | bus_space_write_4(ba->ba_iot, ba->ba_ioh, | 190 | bus_space_write_4(ba->ba_iot, ba->ba_ioh, | |
191 | BIREG_INTRDES, ba->ba_intcpu); | 191 | BIREG_INTRDES, ba->ba_intcpu); | |
192 | bus_space_write_4(ba->ba_iot, ba->ba_ioh, BIREG_VAXBICSR, | 192 | bus_space_write_4(ba->ba_iot, ba->ba_ioh, BIREG_VAXBICSR, | |
193 | bus_space_read_4(ba->ba_iot, ba->ba_ioh, BIREG_VAXBICSR) | | 193 | bus_space_read_4(ba->ba_iot, ba->ba_ioh, BIREG_VAXBICSR) | | |
194 | BICSR_SEIE | BICSR_HEIE); | 194 | BICSR_SEIE | BICSR_HEIE); | |
195 | } | 195 | } | |
196 | 196 | |||
197 | void | 197 | void | |
198 | ka820_conf(void) | 198 | ka820_conf(void) | |
199 | { | 199 | { | |
200 | /* | 200 | /* | |
201 | * Setup parameters necessary to read time from clock chip. | 201 | * Setup parameters necessary to read time from clock chip. | |
202 | */ | 202 | */ | |
203 | ka820_clkpage = (void *)vax_map_physmem(KA820_CLOCKADDR, 1); | 203 | ka820_clkpage = (void *)vax_map_physmem(KA820_CLOCKADDR, 1); | |
204 | 204 | |||
205 | /* Enable cache */ | 205 | /* Enable cache */ | |
206 | mtpr(0, PR_CADR); | 206 | mtpr(0, PR_CADR); | |
207 | 207 | |||
208 | /* Steal the interrupt vectors that are unique for us */ | 208 | /* Steal the interrupt vectors that are unique for us */ | |
209 | scb_vecalloc(KA820_INT_RXCD, rxcdintr, NULL, SCB_ISTACK, NULL); | 209 | scb_vecalloc(KA820_INT_RXCD, rxcdintr, NULL, SCB_ISTACK, NULL); | |
210 | scb_vecalloc(0x50, vaxbierr, NULL, SCB_ISTACK, NULL); | 210 | scb_vecalloc(0x50, vaxbierr, NULL, SCB_ISTACK, NULL); | |
211 | 211 | |||
212 | /* XXX - should be done somewhere else */ | 212 | /* XXX - should be done somewhere else */ | |
213 | scb_vecalloc(SCB_RX50, crxintr, NULL, SCB_ISTACK, NULL); | 213 | scb_vecalloc(SCB_RX50, crxintr, NULL, SCB_ISTACK, NULL); | |
214 | rx50device_ptr = (void *)vax_map_physmem(KA820_RX50ADDR, 1); | 214 | rx50device_ptr = (void *)vax_map_physmem(KA820_RX50ADDR, 1); | |
215 | #if defined(MULTIPROCESSOR) | 215 | #if defined(MULTIPROCESSOR) | |
216 | mp_dep_call = &ka820_mp_dep; | 216 | mp_dep_call = &ka820_mp_dep; | |
217 | #endif | 217 | #endif | |
218 | } | 218 | } | |
219 | 219 | |||
220 | void | 220 | void | |
221 | vaxbierr(void *arg) | 221 | vaxbierr(void *arg) | |
222 | { | 222 | { | |
223 | if (cold == 0) | 223 | if (cold == 0) | |
224 | panic("vaxbierr"); | 224 | panic("vaxbierr"); | |
225 | } | 225 | } | |
226 | 226 | |||
227 | #ifdef notdef | 227 | #ifdef notdef | |
228 | /* | 228 | /* | |
229 | * MS820 support. | 229 | * MS820 support. | |
230 | */ | 230 | */ | |
231 | struct ms820regs { | 231 | struct ms820regs { | |
232 | struct biiregs biic; /* BI interface chip */ | 232 | struct biiregs biic; /* BI interface chip */ | |
233 | u_long ms_gpr[4]; /* the four gprs (unused) */ | 233 | u_long ms_gpr[4]; /* the four gprs (unused) */ | |
234 | int ms_csr1; /* control/status register 1 */ | 234 | int ms_csr1; /* control/status register 1 */ | |
235 | int ms_csr2; /* control/status register 2 */ | 235 | int ms_csr2; /* control/status register 2 */ | |
236 | }; | 236 | }; | |
237 | #endif | 237 | #endif | |
238 | 238 | |||
239 | #define MEMRD(reg) bus_space_read_4(sc->sc_iot, sc->sc_ioh, (reg)) | 239 | #define MEMRD(reg) bus_space_read_4(sc->sc_iot, sc->sc_ioh, (reg)) | |
240 | #define MEMWR(reg, val) bus_space_write_4(sc->sc_iot, sc->sc_ioh, (reg), (val)) | 240 | #define MEMWR(reg, val) bus_space_write_4(sc->sc_iot, sc->sc_ioh, (reg), (val)) | |
241 | 241 | |||
242 | #define MSREG_CSR1 0x100 | 242 | #define MSREG_CSR1 0x100 | |
243 | #define MSREG_CSR2 0x104 | 243 | #define MSREG_CSR2 0x104 | |
244 | /* | 244 | /* | |
245 | * Bits in CSR1. | 245 | * Bits in CSR1. | |
246 | */ | 246 | */ | |
247 | #define MS1_ERRSUM 0x80000000 /* error summary (ro) */ | 247 | #define MS1_ERRSUM 0x80000000 /* error summary (ro) */ | |
248 | #define MS1_ECCDIAG 0x40000000 /* ecc diagnostic (rw) */ | 248 | #define MS1_ECCDIAG 0x40000000 /* ecc diagnostic (rw) */ | |
249 | #define MS1_ECCDISABLE 0x20000000 /* ecc disable (rw) */ | 249 | #define MS1_ECCDISABLE 0x20000000 /* ecc disable (rw) */ | |
250 | #define MS1_MSIZEMASK 0x1ffc0000 /* mask for memory size (ro) */ | 250 | #define MS1_MSIZEMASK 0x1ffc0000 /* mask for memory size (ro) */ | |
251 | #define MS1_RAMTYMASK 0x00030000 /* mask for ram type (ro) */ | 251 | #define MS1_RAMTYMASK 0x00030000 /* mask for ram type (ro) */ | |
252 | #define MS1_RAMTY64K 0x00000000 /* 64K chips */ | 252 | #define MS1_RAMTY64K 0x00000000 /* 64K chips */ | |
253 | #define MS1_RAMTY256K 0x00010000 /* 256K chips */ | 253 | #define MS1_RAMTY256K 0x00010000 /* 256K chips */ | |
254 | #define MS1_RAMTY1MB 0x00020000 /* 1MB chips */ | 254 | #define MS1_RAMTY1MB 0x00020000 /* 1MB chips */ | |
255 | /* type 3 reserved */ | 255 | /* type 3 reserved */ | |
256 | #define MS1_CRDINH 0x00008000 /* inhibit crd interrupts (rw) */ | 256 | #define MS1_CRDINH 0x00008000 /* inhibit crd interrupts (rw) */ | |
257 | #define MS1_MEMVALID 0x00004000 /* memory has been written (ro) */ | 257 | #define MS1_MEMVALID 0x00004000 /* memory has been written (ro) */ | |
258 | #define MS1_INTLK 0x00002000 /* interlock flag (ro) */ | 258 | #define MS1_INTLK 0x00002000 /* interlock flag (ro) */ | |
259 | #define MS1_BROKE 0x00001000 /* broken (rw) */ | 259 | #define MS1_BROKE 0x00001000 /* broken (rw) */ | |
260 | #define MS1_MBZ 0x00000880 /* zero */ | 260 | #define MS1_MBZ 0x00000880 /* zero */ | |
261 | #define MS1_MWRITEERR 0x00000400 /* rds during masked write (rw) */ | 261 | #define MS1_MWRITEERR 0x00000400 /* rds during masked write (rw) */ | |
262 | #define MS1_CNTLERR 0x00000200 /* internal timing busted (rw) */ | 262 | #define MS1_CNTLERR 0x00000200 /* internal timing busted (rw) */ | |
263 | #define MS1_INTLV 0x00000100 /* internally interleaved (ro) */ | 263 | #define MS1_INTLV 0x00000100 /* internally interleaved (ro) */ | |
264 | #define MS1_DIAGC 0x0000007f /* ecc diagnostic bits (rw) */ | 264 | #define MS1_DIAGC 0x0000007f /* ecc diagnostic bits (rw) */ | |
265 | 265 | |||
266 | /* | 266 | /* | |
267 | * Bits in CSR2. | 267 | * Bits in CSR2. | |
268 | */ | 268 | */ | |
269 | #define MS2_RDSERR 0x80000000 /* rds error (rw) */ | 269 | #define MS2_RDSERR 0x80000000 /* rds error (rw) */ | |
270 | #define MS2_HIERR 0x40000000 /* high error rate (rw) */ | 270 | #define MS2_HIERR 0x40000000 /* high error rate (rw) */ | |
271 | #define MS2_CRDERR 0x20000000 /* crd error (rw) */ | 271 | #define MS2_CRDERR 0x20000000 /* crd error (rw) */ | |
272 | #define MS2_ADRSERR 0x10000000 /* rds due to addr par err (rw) */ | 272 | #define MS2_ADRSERR 0x10000000 /* rds due to addr par err (rw) */ | |
273 | #define MS2_MBZ 0x0f000080 /* zero */ | 273 | #define MS2_MBZ 0x0f000080 /* zero */ | |
274 | #define MS2_ADDR 0x00fffe00 /* address in error (relative) (ro) */ | 274 | #define MS2_ADDR 0x00fffe00 /* address in error (relative) (ro) */ | |
275 | #define MS2_INTLVADDR 0x00000100 /* error was in bank 1 (ro) */ | 275 | #define MS2_INTLVADDR 0x00000100 /* error was in bank 1 (ro) */ | |
276 | #define MS2_SYN 0x0000007f /* error syndrome (ro, rw diag) */ | 276 | #define MS2_SYN 0x0000007f /* error syndrome (ro, rw diag) */ | |
277 | 277 | |||
278 | static int ms820_match(device_t, cfdata_t, void *); | 278 | static int ms820_match(device_t, cfdata_t, void *); | |
279 | static void ms820_attach(device_t, device_t, void*); | 279 | static void ms820_attach(device_t, device_t, void*); | |
280 | 280 | |||
281 | struct mem_bi_softc { | 281 | struct mem_bi_softc { | |
282 | struct device *sc_dev; | 282 | device_t sc_dev; | |
283 | bus_space_tag_t sc_iot; | 283 | bus_space_tag_t sc_iot; | |
284 | bus_space_handle_t sc_ioh; | 284 | bus_space_handle_t sc_ioh; | |
285 | }; | 285 | }; | |
286 | 286 | |||
287 | CFATTACH_DECL_NEW(mem_bi, sizeof(struct mem_bi_softc), | 287 | CFATTACH_DECL_NEW(mem_bi, sizeof(struct mem_bi_softc), | |
288 | ms820_match, ms820_attach, NULL, NULL); | 288 | ms820_match, ms820_attach, NULL, NULL); | |
289 | 289 | |||
290 | static int | 290 | static int | |
291 | ms820_match(device_t parent, cfdata_t cf, void *aux) | 291 | ms820_match(device_t parent, cfdata_t cf, void *aux) | |
292 | { | 292 | { | |
293 | struct bi_attach_args * const ba = aux; | 293 | struct bi_attach_args * const ba = aux; | |
294 | 294 | |||
295 | if (bus_space_read_2(ba->ba_iot, ba->ba_ioh, BIREG_DTYPE) != BIDT_MS820) | 295 | if (bus_space_read_2(ba->ba_iot, ba->ba_ioh, BIREG_DTYPE) != BIDT_MS820) | |
296 | return 0; | 296 | return 0; | |
297 | 297 | |||
298 | if (cf->cf_loc[BICF_NODE] != BICF_NODE_DEFAULT && | 298 | if (cf->cf_loc[BICF_NODE] != BICF_NODE_DEFAULT && | |
299 | cf->cf_loc[BICF_NODE] != ba->ba_nodenr) | 299 | cf->cf_loc[BICF_NODE] != ba->ba_nodenr) | |
300 | return 0; | 300 | return 0; | |
301 | 301 | |||
302 | return 1; | 302 | return 1; | |
303 | } | 303 | } | |
304 | 304 | |||
305 | static void | 305 | static void | |
306 | ms820_attach(device_t parent, device_t self, void *aux) | 306 | ms820_attach(device_t parent, device_t self, void *aux) | |
307 | { | 307 | { | |
308 | struct mem_bi_softc * const sc = device_private(self); | 308 | struct mem_bi_softc * const sc = device_private(self); | |
309 | struct bi_attach_args * const ba = aux; | 309 | struct bi_attach_args * const ba = aux; | |
310 | 310 | |||
311 | sc->sc_dev = self; | 311 | sc->sc_dev = self; | |
312 | sc->sc_iot = ba->ba_iot; | 312 | sc->sc_iot = ba->ba_iot; | |
313 | sc->sc_ioh = ba->ba_ioh; | 313 | sc->sc_ioh = ba->ba_ioh; | |
314 | 314 | |||
315 | if ((MEMRD(BIREG_VAXBICSR) & BICSR_STS) == 0) | 315 | if ((MEMRD(BIREG_VAXBICSR) & BICSR_STS) == 0) | |
316 | aprint_error(": failed self test\n"); | 316 | aprint_error(": failed self test\n"); | |
317 | else | 317 | else | |
318 | aprint_normal(": size %dMB, %s chips\n", ((MEMRD(MSREG_CSR1) & | 318 | aprint_normal(": size %dMB, %s chips\n", ((MEMRD(MSREG_CSR1) & | |
319 | MS1_MSIZEMASK) >> 20), (MEMRD(MSREG_CSR1) & MS1_RAMTYMASK | 319 | MS1_MSIZEMASK) >> 20), (MEMRD(MSREG_CSR1) & MS1_RAMTYMASK | |
320 | ? MEMRD(MSREG_CSR1) & MS1_RAMTY256K ? "256K":"1M":"64K")); | 320 | ? MEMRD(MSREG_CSR1) & MS1_RAMTY256K ? "256K":"1M":"64K")); | |
321 | 321 | |||
322 | MEMWR(BIREG_INTRDES, ba->ba_intcpu); | 322 | MEMWR(BIREG_INTRDES, ba->ba_intcpu); | |
323 | MEMWR(BIREG_VAXBICSR, MEMRD(BIREG_VAXBICSR) | BICSR_SEIE | BICSR_HEIE); | 323 | MEMWR(BIREG_VAXBICSR, MEMRD(BIREG_VAXBICSR) | BICSR_SEIE | BICSR_HEIE); | |
324 | 324 | |||
325 | MEMWR(MSREG_CSR1, MS1_MWRITEERR | MS1_CNTLERR); | 325 | MEMWR(MSREG_CSR1, MS1_MWRITEERR | MS1_CNTLERR); | |
326 | MEMWR(MSREG_CSR2, MS2_RDSERR | MS2_HIERR | MS2_CRDERR | MS2_ADRSERR); | 326 | MEMWR(MSREG_CSR2, MS2_RDSERR | MS2_HIERR | MS2_CRDERR | MS2_ADRSERR); | |
327 | } | 327 | } | |
328 | 328 | |||
329 | static void | 329 | static void | |
330 | ka820_memerr(void) | 330 | ka820_memerr(void) | |
331 | { | 331 | { | |
332 | struct mem_bi_softc *sc; | 332 | struct mem_bi_softc *sc; | |
333 | int m, hard, csr1, csr2; | 333 | int m, hard, csr1, csr2; | |
334 | const char *type; | 334 | const char *type; | |
335 | 335 | |||
336 | static const char b1[] = "\20\40ERRSUM\37ECCDIAG\36ECCDISABLE\20CRDINH\17VALID\ | 336 | static const char b1[] = "\20\40ERRSUM\37ECCDIAG\36ECCDISABLE\20CRDINH\17VALID\ | |
337 | \16INTLK\15BROKE\13MWRITEERR\12CNTLERR\11INTLV"; | 337 | \16INTLK\15BROKE\13MWRITEERR\12CNTLERR\11INTLV"; | |
338 | static const char b2[] = "\20\40RDS\37HIERR\36CRD\35ADRS"; | 338 | static const char b2[] = "\20\40RDS\37HIERR\36CRD\35ADRS"; | |
339 | 339 | |||
340 | char sbuf[sizeof(b1) + 64], sbuf2[sizeof(b2) + 64]; | 340 | char sbuf[sizeof(b1) + 64], sbuf2[sizeof(b2) + 64]; | |
341 | 341 | |||
342 | for (m = 0; m < mem_cd.cd_ndevs; m++) { | 342 | for (m = 0; m < mem_cd.cd_ndevs; m++) { | |
343 | sc = device_lookup_private(&mem_cd, m); | 343 | sc = device_lookup_private(&mem_cd, m); | |
344 | if (sc == NULL) | 344 | if (sc == NULL) | |
345 | continue; | 345 | continue; | |
346 | csr1 = MEMRD(MSREG_CSR1); | 346 | csr1 = MEMRD(MSREG_CSR1); | |
347 | csr2 = MEMRD(MSREG_CSR2); | 347 | csr2 = MEMRD(MSREG_CSR2); | |
348 | snprintb(sbuf, sizeof(sbuf), b1, csr1); | 348 | snprintb(sbuf, sizeof(sbuf), b1, csr1); | |
349 | snprintb(sbuf2, sizeof(sbuf2), b2, csr2); | 349 | snprintb(sbuf2, sizeof(sbuf2), b2, csr2); | |
350 | aprint_error_dev(sc->sc_dev, "csr1=%s csr2=%s\n", sbuf, sbuf2); | 350 | aprint_error_dev(sc->sc_dev, "csr1=%s csr2=%s\n", sbuf, sbuf2); | |
351 | if ((csr1 & MS1_ERRSUM) == 0) | 351 | if ((csr1 & MS1_ERRSUM) == 0) | |
352 | continue; | 352 | continue; | |
353 | hard = 1; | 353 | hard = 1; | |
354 | if (csr1 & MS1_BROKE) | 354 | if (csr1 & MS1_BROKE) | |
355 | type = "broke"; | 355 | type = "broke"; | |
356 | else if (csr1 & MS1_CNTLERR) | 356 | else if (csr1 & MS1_CNTLERR) | |
357 | type = "cntl err"; | 357 | type = "cntl err"; | |
358 | else if (csr2 & MS2_ADRSERR) | 358 | else if (csr2 & MS2_ADRSERR) | |
359 | type = "address parity err"; | 359 | type = "address parity err"; | |
360 | else if (csr2 & MS2_RDSERR) | 360 | else if (csr2 & MS2_RDSERR) | |
361 | type = "rds err"; | 361 | type = "rds err"; | |
362 | else if (csr2 & MS2_CRDERR) { | 362 | else if (csr2 & MS2_CRDERR) { | |
363 | hard = 0; | 363 | hard = 0; | |
364 | type = ""; | 364 | type = ""; | |
365 | } else | 365 | } else | |
366 | type = "mysterious error"; | 366 | type = "mysterious error"; | |
367 | aprint_error_dev(sc->sc_dev, "%s%s%s addr %x bank %x syn %x\n", | 367 | aprint_error_dev(sc->sc_dev, "%s%s%s addr %x bank %x syn %x\n", | |
368 | hard ? "hard error: " : "soft ecc", | 368 | hard ? "hard error: " : "soft ecc", | |
369 | type, csr2 & MS2_HIERR ? " (+ other rds or crd err)" : "", | 369 | type, csr2 & MS2_HIERR ? " (+ other rds or crd err)" : "", | |
370 | ((csr2 & MS2_ADDR) + MEMRD(BIREG_SADR)) >> 9, | 370 | ((csr2 & MS2_ADDR) + MEMRD(BIREG_SADR)) >> 9, | |
371 | (csr2 & MS2_INTLVADDR) != 0, csr2 & MS2_SYN); | 371 | (csr2 & MS2_INTLVADDR) != 0, csr2 & MS2_SYN); | |
372 | MEMWR(MSREG_CSR1, csr1 | MS1_CRDINH); | 372 | MEMWR(MSREG_CSR1, csr1 | MS1_CRDINH); | |
373 | MEMWR(MSREG_CSR2, csr2); | 373 | MEMWR(MSREG_CSR2, csr2); | |
374 | } | 374 | } | |
375 | } | 375 | } | |
376 | 376 | |||
377 | /* these are bits 0 to 6 in the summary field */ | 377 | /* these are bits 0 to 6 in the summary field */ | |
378 | const char * const mc8200[] = { | 378 | const char * const mc8200[] = { | |
379 | "cpu bad ipl", "ucode lost err", | 379 | "cpu bad ipl", "ucode lost err", | |
380 | "ucode par err", "DAL par err", | 380 | "ucode par err", "DAL par err", | |
381 | "BI bus err", "BTB tag par", | 381 | "BI bus err", "BTB tag par", | |
382 | "cache tag par", | 382 | "cache tag par", | |
383 | }; | 383 | }; | |
384 | #define MC8200_BADIPL 0x01 | 384 | #define MC8200_BADIPL 0x01 | |
385 | #define MC8200_UERR 0x02 | 385 | #define MC8200_UERR 0x02 | |
386 | #define MC8200_UPAR 0x04 | 386 | #define MC8200_UPAR 0x04 | |
387 | #define MC8200_DPAR 0x08 | 387 | #define MC8200_DPAR 0x08 | |
388 | #define MC8200_BIERR 0x10 | 388 | #define MC8200_BIERR 0x10 | |
389 | #define MC8200_BTAGPAR 0x20 | 389 | #define MC8200_BTAGPAR 0x20 | |
390 | #define MC8200_CTAGPAR 0x40 | 390 | #define MC8200_CTAGPAR 0x40 | |
391 | 391 | |||
392 | struct mc8200frame { | 392 | struct mc8200frame { | |
393 | int mc82_bcnt; /* byte count == 0x20 */ | 393 | int mc82_bcnt; /* byte count == 0x20 */ | |
394 | int mc82_summary; /* summary parameter */ | 394 | int mc82_summary; /* summary parameter */ | |
395 | int mc82_param1; /* parameter 1 */ | 395 | int mc82_param1; /* parameter 1 */ | |
396 | int mc82_va; /* va register */ | 396 | int mc82_va; /* va register */ | |
397 | int mc82_vap; /* va prime register */ | 397 | int mc82_vap; /* va prime register */ | |
398 | int mc82_ma; /* memory address */ | 398 | int mc82_ma; /* memory address */ | |
399 | int mc82_status; /* status word */ | 399 | int mc82_status; /* status word */ | |
400 | int mc82_epc; /* error pc */ | 400 | int mc82_epc; /* error pc */ | |
401 | int mc82_upc; /* micro pc */ | 401 | int mc82_upc; /* micro pc */ | |
402 | int mc82_pc; /* current pc */ | 402 | int mc82_pc; /* current pc */ | |
403 | int mc82_psl; /* current psl */ | 403 | int mc82_psl; /* current psl */ | |
404 | }; | 404 | }; | |
405 | 405 | |||
406 | static int | 406 | static int | |
407 | ka820_mchk(void *cmcf) | 407 | ka820_mchk(void *cmcf) | |
408 | { | 408 | { | |
409 | struct mc8200frame *mcf = (struct mc8200frame *)cmcf; | 409 | struct mc8200frame *mcf = (struct mc8200frame *)cmcf; | |
410 | int i, type = mcf->mc82_summary; | 410 | int i, type = mcf->mc82_summary; | |
411 | 411 | |||
412 | /* ignore BI bus errors during configuration */ | 412 | /* ignore BI bus errors during configuration */ | |
413 | if (cold && type == MC8200_BIERR) { | 413 | if (cold && type == MC8200_BIERR) { | |
414 | mtpr(PR_MCESR, 0xf); | 414 | mtpr(PR_MCESR, 0xf); | |
415 | return (MCHK_RECOVERED); | 415 | return (MCHK_RECOVERED); | |
416 | } | 416 | } | |
417 | 417 | |||
418 | /* | 418 | /* | |
419 | * SOME ERRORS ARE RECOVERABLE | 419 | * SOME ERRORS ARE RECOVERABLE | |
420 | * do it later | 420 | * do it later | |
421 | */ | 421 | */ | |
422 | printf("machine check %x: ", type); | 422 | printf("machine check %x: ", type); | |
423 | for (i = 0; i < sizeof (mc8200) / sizeof (mc8200[0]); i++) | 423 | for (i = 0; i < sizeof (mc8200) / sizeof (mc8200[0]); i++) | |
424 | if (type & (1 << i)) | 424 | if (type & (1 << i)) | |
425 | printf(" %s,", mc8200[i]); | 425 | printf(" %s,", mc8200[i]); | |
426 | printf(" param1 %x\n", mcf->mc82_param1); | 426 | printf(" param1 %x\n", mcf->mc82_param1); | |
427 | printf( | 427 | printf( | |
428 | "\tva %x va' %x ma %x pc %x psl %x\n\tstatus %x errpc %x upc %x\n", | 428 | "\tva %x va' %x ma %x pc %x psl %x\n\tstatus %x errpc %x upc %x\n", | |
429 | mcf->mc82_va, mcf->mc82_vap, mcf->mc82_ma, | 429 | mcf->mc82_va, mcf->mc82_vap, mcf->mc82_ma, | |
430 | mcf->mc82_pc, mcf->mc82_psl, | 430 | mcf->mc82_pc, mcf->mc82_psl, | |
431 | mcf->mc82_status, mcf->mc82_epc, mcf->mc82_upc); | 431 | mcf->mc82_status, mcf->mc82_epc, mcf->mc82_upc); | |
432 | return (MCHK_PANIC); | 432 | return (MCHK_PANIC); | |
433 | } | 433 | } | |
434 | 434 | |||
435 | #if defined(MULTIPROCESSOR) | 435 | #if defined(MULTIPROCESSOR) | |
436 | #define RXBUF 80 | 436 | #define RXBUF 80 | |
437 | static char rxbuf[RXBUF]; | 437 | static char rxbuf[RXBUF]; | |
438 | static int got = 0, taken = 0; | 438 | static int got = 0, taken = 0; | |
439 | static int expect = 0; | 439 | static int expect = 0; | |
440 | #endif | 440 | #endif | |
441 | /* | 441 | /* | |
442 | * Receive a character from logical console. | 442 | * Receive a character from logical console. | |
443 | */ | 443 | */ | |
444 | static void | 444 | static void | |
445 | rxcdintr(void *arg) | 445 | rxcdintr(void *arg) | |
446 | { | 446 | { | |
447 | int c = mfpr(PR_RXCD); | 447 | int c = mfpr(PR_RXCD); | |
448 | 448 | |||
449 | if (c == 0) | 449 | if (c == 0) | |
450 | return; | 450 | return; | |
451 | 451 | |||
452 | #if defined(MULTIPROCESSOR) | 452 | #if defined(MULTIPROCESSOR) | |
453 | if (expect == ((c >> 8) & 0xf)) | 453 | if (expect == ((c >> 8) & 0xf)) | |
454 | rxbuf[got++] = c & 0xff; | 454 | rxbuf[got++] = c & 0xff; | |
455 | 455 | |||
456 | if (got == RXBUF) | 456 | if (got == RXBUF) | |
457 | got = 0; | 457 | got = 0; | |
458 | #endif | 458 | #endif | |
459 | } | 459 | } | |
460 | 460 | |||
461 | #if defined(MULTIPROCESSOR) | 461 | #if defined(MULTIPROCESSOR) | |
462 | int | 462 | int | |
463 | rxchar(void) | 463 | rxchar(void) | |
464 | { | 464 | { | |
465 | int ret; | 465 | int ret; | |
466 | 466 | |||
467 | if (got == taken) | 467 | if (got == taken) | |
468 | return 0; | 468 | return 0; | |
469 | 469 | |||
470 | ret = rxbuf[taken++]; | 470 | ret = rxbuf[taken++]; | |
471 | if (taken == RXBUF) | 471 | if (taken == RXBUF) | |
472 | taken = 0; | 472 | taken = 0; | |
473 | return ret; | 473 | return ret; | |
474 | } | 474 | } | |
475 | #endif | 475 | #endif | |
476 | 476 | |||
477 | int | 477 | int | |
478 | ka820_gettime(struct timeval *tvp) | 478 | ka820_gettime(struct timeval *tvp) | |
479 | { | 479 | { | |
480 | struct clock_ymdhms c; | 480 | struct clock_ymdhms c; | |
481 | int s; | 481 | int s; | |
482 | 482 | |||
483 | while (ka820_clkpage->csr0 & KA820CLK_0_BUSY) | 483 | while (ka820_clkpage->csr0 & KA820CLK_0_BUSY) | |
484 | ; | 484 | ; | |
485 | 485 | |||
486 | s = splhigh(); | 486 | s = splhigh(); | |
487 | c.dt_sec = ka820_clkpage->sec; | 487 | c.dt_sec = ka820_clkpage->sec; | |
488 | c.dt_min = ka820_clkpage->min; | 488 | c.dt_min = ka820_clkpage->min; | |
489 | c.dt_hour = ka820_clkpage->hr; | 489 | c.dt_hour = ka820_clkpage->hr; | |
490 | c.dt_wday = ka820_clkpage->dayofwk; | 490 | c.dt_wday = ka820_clkpage->dayofwk; | |
491 | c.dt_day = ka820_clkpage->day; | 491 | c.dt_day = ka820_clkpage->day; | |
492 | c.dt_mon = ka820_clkpage->mon; | 492 | c.dt_mon = ka820_clkpage->mon; | |
493 | c.dt_year = ka820_clkpage->yr; | 493 | c.dt_year = ka820_clkpage->yr; | |
494 | splx(s); | 494 | splx(s); | |
495 | 495 | |||
496 | /* strange conversion */ | 496 | /* strange conversion */ | |
497 | c.dt_sec = ((c.dt_sec << 7) | (c.dt_sec >> 1)) & 0377; | 497 | c.dt_sec = ((c.dt_sec << 7) | (c.dt_sec >> 1)) & 0377; | |
498 | c.dt_min = ((c.dt_min << 7) | (c.dt_min >> 1)) & 0377; | 498 | c.dt_min = ((c.dt_min << 7) | (c.dt_min >> 1)) & 0377; | |
499 | c.dt_hour = ((c.dt_hour << 7) | (c.dt_hour >> 1)) & 0377; | 499 | c.dt_hour = ((c.dt_hour << 7) | (c.dt_hour >> 1)) & 0377; | |
500 | c.dt_wday = ((c.dt_wday << 7) | (c.dt_wday >> 1)) & 0377; | 500 | c.dt_wday = ((c.dt_wday << 7) | (c.dt_wday >> 1)) & 0377; | |
501 | c.dt_day = ((c.dt_day << 7) | (c.dt_day >> 1)) & 0377; | 501 | c.dt_day = ((c.dt_day << 7) | (c.dt_day >> 1)) & 0377; | |
502 | c.dt_mon = ((c.dt_mon << 7) | (c.dt_mon >> 1)) & 0377; | 502 | c.dt_mon = ((c.dt_mon << 7) | (c.dt_mon >> 1)) & 0377; | |
503 | c.dt_year = ((c.dt_year << 7) | (c.dt_year >> 1)) & 0377; | 503 | c.dt_year = ((c.dt_year << 7) | (c.dt_year >> 1)) & 0377; | |
504 | 504 | |||
505 | tvp->tv_sec = clock_ymdhms_to_secs(&c); | 505 | tvp->tv_sec = clock_ymdhms_to_secs(&c); | |
506 | return 0; | 506 | return 0; | |
507 | } | 507 | } | |
508 | 508 | |||
509 | void | 509 | void | |
510 | ka820_settime(struct timeval *tvp) | 510 | ka820_settime(struct timeval *tvp) | |
511 | { | 511 | { | |
512 | struct clock_ymdhms c; | 512 | struct clock_ymdhms c; | |
513 | 513 | |||
514 | clock_secs_to_ymdhms(tvp->tv_sec, &c); | 514 | clock_secs_to_ymdhms(tvp->tv_sec, &c); | |
515 | 515 | |||
516 | ka820_clkpage->csr1 = KA820CLK_1_SET; | 516 | ka820_clkpage->csr1 = KA820CLK_1_SET; | |
517 | ka820_clkpage->sec = ((c.dt_sec << 1) | (c.dt_sec >> 7)) & 0377; | 517 | ka820_clkpage->sec = ((c.dt_sec << 1) | (c.dt_sec >> 7)) & 0377; | |
518 | ka820_clkpage->min = ((c.dt_min << 1) | (c.dt_min >> 7)) & 0377; | 518 | ka820_clkpage->min = ((c.dt_min << 1) | (c.dt_min >> 7)) & 0377; | |
519 | ka820_clkpage->hr = ((c.dt_hour << 1) | (c.dt_hour >> 7)) & 0377; | 519 | ka820_clkpage->hr = ((c.dt_hour << 1) | (c.dt_hour >> 7)) & 0377; | |
520 | ka820_clkpage->dayofwk = ((c.dt_wday << 1) | (c.dt_wday >> 7)) & 0377; | 520 | ka820_clkpage->dayofwk = ((c.dt_wday << 1) | (c.dt_wday >> 7)) & 0377; | |
521 | ka820_clkpage->day = ((c.dt_day << 1) | (c.dt_day >> 7)) & 0377; | 521 | ka820_clkpage->day = ((c.dt_day << 1) | (c.dt_day >> 7)) & 0377; | |
522 | ka820_clkpage->mon = ((c.dt_mon << 1) | (c.dt_mon >> 7)) & 0377; | 522 | ka820_clkpage->mon = ((c.dt_mon << 1) | (c.dt_mon >> 7)) & 0377; | |
523 | ka820_clkpage->yr = ((c.dt_year << 1) | (c.dt_year >> 7)) & 0377; | 523 | ka820_clkpage->yr = ((c.dt_year << 1) | (c.dt_year >> 7)) & 0377; | |
524 | 524 | |||
525 | ka820_clkpage->csr1 = KA820CLK_1_GO; | 525 | ka820_clkpage->csr1 = KA820CLK_1_GO; | |
526 | } | 526 | } | |
527 | 527 | |||
528 | #if defined(MULTIPROCESSOR) | 528 | #if defined(MULTIPROCESSOR) | |
529 | static void | 529 | static void | |
530 | ka820_startslave(struct cpu_info *ci) | 530 | ka820_startslave(struct cpu_info *ci) | |
531 | { | 531 | { | |
532 | const struct pcb *pcb = lwp_getpcb(ci->ci_data.cpu_onproc); | 532 | const struct pcb *pcb = lwp_getpcb(ci->ci_data.cpu_onproc); | |
533 | const int id = ci->ci_slotid; | 533 | const int id = ci->ci_slotid; | |
534 | int i; | 534 | int i; | |
535 | 535 | |||
536 | expect = id; | 536 | expect = id; | |
537 | /* First empty queue */ | 537 | /* First empty queue */ | |
538 | for (i = 0; i < 10000; i++) | 538 | for (i = 0; i < 10000; i++) | |
539 | if (rxchar()) | 539 | if (rxchar()) | |
540 | i = 0; | 540 | i = 0; | |
541 | ka820_txrx(id, "\020", 0); /* Send ^P to get attention */ | 541 | ka820_txrx(id, "\020", 0); /* Send ^P to get attention */ | |
542 | ka820_txrx(id, "I\r", 0); /* Init other end */ | 542 | ka820_txrx(id, "I\r", 0); /* Init other end */ | |
543 | ka820_txrx(id, "D/I 4 %x\r", ci->ci_istack); /* Interrupt stack */ | 543 | ka820_txrx(id, "D/I 4 %x\r", ci->ci_istack); /* Interrupt stack */ | |
544 | ka820_txrx(id, "D/I C %x\r", mfpr(PR_SBR)); /* SBR */ | 544 | ka820_txrx(id, "D/I C %x\r", mfpr(PR_SBR)); /* SBR */ | |
545 | ka820_txrx(id, "D/I D %x\r", mfpr(PR_SLR)); /* SLR */ | 545 | ka820_txrx(id, "D/I D %x\r", mfpr(PR_SLR)); /* SLR */ | |
546 | ka820_txrx(id, "D/I 10 %x\r", pcb->pcb_paddr); /* PCB for idle proc */ | 546 | ka820_txrx(id, "D/I 10 %x\r", pcb->pcb_paddr); /* PCB for idle proc */ | |
547 | ka820_txrx(id, "D/I 11 %x\r", mfpr(PR_SCBB)); /* SCB */ | 547 | ka820_txrx(id, "D/I 11 %x\r", mfpr(PR_SCBB)); /* SCB */ | |
548 | ka820_txrx(id, "D/I 38 %x\r", mfpr(PR_MAPEN)); /* Enable MM */ | 548 | ka820_txrx(id, "D/I 38 %x\r", mfpr(PR_MAPEN)); /* Enable MM */ | |
549 | ka820_txrx(id, "S %x\r", (int)&vax_mp_tramp); /* Start! */ | 549 | ka820_txrx(id, "S %x\r", (int)&vax_mp_tramp); /* Start! */ | |
550 | expect = 0; | 550 | expect = 0; | |
551 | for (i = 0; i < 10000; i++) | 551 | for (i = 0; i < 10000; i++) | |
552 | if (ci->ci_flags & CI_RUNNING) | 552 | if (ci->ci_flags & CI_RUNNING) | |
553 | break; | 553 | break; | |
554 | if (i == 10000) | 554 | if (i == 10000) | |
555 | aprint_error_dev(ci->ci_dev, "(ID %d) failed starting??\n", id); | 555 | aprint_error_dev(ci->ci_dev, "(ID %d) failed starting??\n", id); | |
556 | } | 556 | } | |
557 | 557 | |||
558 | void | 558 | void | |
559 | ka820_txrx(int id, const char *fmt, int arg) | 559 | ka820_txrx(int id, const char *fmt, int arg) | |
560 | { | 560 | { | |
561 | char buf[20]; | 561 | char buf[20]; | |
562 | 562 | |||
563 | sprintf(buf, fmt, arg); | 563 | sprintf(buf, fmt, arg); | |
564 | ka820_sendstr(id, buf); | 564 | ka820_sendstr(id, buf); | |
565 | ka820_sergeant(id); | 565 | ka820_sergeant(id); | |
566 | } | 566 | } | |
567 | 567 | |||
568 | static void | 568 | static void | |
569 | ka820_sendchr(int chr) | 569 | ka820_sendchr(int chr) | |
570 | { | 570 | { | |
571 | /* | 571 | /* | |
572 | * It seems like mtpr to TXCD sets the V flag if it fails. | 572 | * It seems like mtpr to TXCD sets the V flag if it fails. | |
573 | * Cannot check that flag in C... | 573 | * Cannot check that flag in C... | |
574 | */ | 574 | */ | |
575 | __asm volatile("1:;mtpr %0,$92;bvs 1b" :: "g"(chr)); | 575 | __asm volatile("1:;mtpr %0,$92;bvs 1b" :: "g"(chr)); | |
576 | } | 576 | } | |
577 | 577 | |||
578 | void | 578 | void | |
579 | ka820_sendstr(int id, const char *buf) | 579 | ka820_sendstr(int id, const char *buf) | |
580 | { | 580 | { | |
581 | u_int utchr; | 581 | u_int utchr; | |
582 | int ch, i; | 582 | int ch, i; | |
583 | 583 | |||
584 | while (*buf) { | 584 | while (*buf) { | |
585 | utchr = *buf | id << 8; | 585 | utchr = *buf | id << 8; | |
586 | 586 | |||
587 | ka820_sendchr(utchr); | 587 | ka820_sendchr(utchr); | |
588 | buf++; | 588 | buf++; | |
589 | i = 30000; | 589 | i = 30000; | |
590 | while ((ch = rxchar()) == 0 && --i) | 590 | while ((ch = rxchar()) == 0 && --i) | |
591 | ; | 591 | ; | |
592 | if (ch == 0) | 592 | if (ch == 0) | |
593 | continue; /* failed */ | 593 | continue; /* failed */ | |
594 | } | 594 | } | |
595 | } | 595 | } | |
596 | 596 | |||
597 | void | 597 | void | |
598 | ka820_sergeant(int id) | 598 | ka820_sergeant(int id) | |
599 | { | 599 | { | |
600 | int i, ch, nserg; | 600 | int i, ch, nserg; | |
601 | 601 | |||
602 | nserg = 0; | 602 | nserg = 0; | |
603 | for (i = 0; i < 30000; i++) { | 603 | for (i = 0; i < 30000; i++) { | |
604 | if ((ch = rxchar()) == 0) | 604 | if ((ch = rxchar()) == 0) | |
605 | continue; | 605 | continue; | |
606 | if (ch == '>') | 606 | if (ch == '>') | |
607 | nserg++; | 607 | nserg++; | |
608 | else | 608 | else | |
609 | nserg = 0; | 609 | nserg = 0; | |
610 | i = 0; | 610 | i = 0; | |
611 | if (nserg == 3) | 611 | if (nserg == 3) | |
612 | break; | 612 | break; | |
613 | } | 613 | } | |
614 | /* What to do now??? */ | 614 | /* What to do now??? */ | |
615 | } | 615 | } | |
616 | 616 | |||
617 | /* | 617 | /* | |
618 | * Write to master console. | 618 | * Write to master console. | |
619 | */ | 619 | */ | |
620 | static volatile int ch = 0; | 620 | static volatile int ch = 0; | |
621 | 621 | |||
622 | void | 622 | void | |
623 | ka820_putc(int c) | 623 | ka820_putc(int c) | |
624 | { | 624 | { | |
625 | if (curcpu()->ci_flags & CI_MASTERCPU) { | 625 | if (curcpu()->ci_flags & CI_MASTERCPU) { | |
626 | gencnputc(0, c); | 626 | gencnputc(0, c); | |
627 | return; | 627 | return; | |
628 | } | 628 | } | |
629 | ch = c; | 629 | ch = c; | |
630 | 630 | |||
631 | cpu_send_ipi(IPI_DEST_MASTER, IPI_SEND_CNCHAR); | 631 | cpu_send_ipi(IPI_DEST_MASTER, IPI_SEND_CNCHAR); | |
632 | while (ch != 0) | 632 | while (ch != 0) | |
633 | ; /* Wait for master to handle */ | 633 | ; /* Wait for master to handle */ | |
634 | } | 634 | } | |
635 | 635 | |||
636 | /* | 636 | /* | |
637 | * Got character IPI. | 637 | * Got character IPI. | |
638 | */ | 638 | */ | |
639 | void | 639 | void | |
640 | ka820_cnintr(void) | 640 | ka820_cnintr(void) | |
641 | { | 641 | { | |
642 | if (ch != 0) | 642 | if (ch != 0) | |
643 | gencnputc(0, ch); | 643 | gencnputc(0, ch); | |
644 | ch = 0; /* Release slavecpu */ | 644 | ch = 0; /* Release slavecpu */ | |
645 | } | 645 | } | |
646 | 646 | |||
647 | void | 647 | void | |
648 | ka820_send_ipi(struct cpu_info *ci) | 648 | ka820_send_ipi(struct cpu_info *ci) | |
649 | { | 649 | { | |
650 | mtpr(1 << ci->ci_cpuid, PR_IPIR); | 650 | mtpr(1 << ci->ci_cpuid, PR_IPIR); | |
651 | } | 651 | } | |
652 | 652 | |||
653 | void | 653 | void | |
654 | ka820_ipintr(void *arg) | 654 | ka820_ipintr(void *arg) | |
655 | { | 655 | { | |
656 | cpu_handle_ipi(); | 656 | cpu_handle_ipi(); | |
657 | } | 657 | } | |
658 | #endif | 658 | #endif |
--- src/sys/arch/vax/vax/multicpu.c 2010/12/14 23:44:49 1.31
+++ src/sys/arch/vax/vax/multicpu.c 2011/06/05 16:59:21 1.32
@@ -1,226 +1,226 @@ | @@ -1,226 +1,226 @@ | |||
1 | /* $NetBSD: multicpu.c,v 1.31 2010/12/14 23:44:49 matt Exp $ */ | 1 | /* $NetBSD: multicpu.c,v 1.32 2011/06/05 16:59:21 matt Exp $ */ | |
2 | 2 | |||
3 | /* | 3 | /* | |
4 | * Copyright (c) 2000 Ludd, University of Lule}, Sweden. All rights reserved. | 4 | * Copyright (c) 2000 Ludd, University of Lule}, Sweden. All rights reserved. | |
5 | * | 5 | * | |
6 | * Redistribution and use in source and binary forms, with or without | 6 | * Redistribution and use in source and binary forms, with or without | |
7 | * modification, are permitted provided that the following conditions | 7 | * modification, are permitted provided that the following conditions | |
8 | * are met: | 8 | * are met: | |
9 | * 1. Redistributions of source code must retain the above copyright | 9 | * 1. Redistributions of source code must retain the above copyright | |
10 | * notice, this list of conditions and the following disclaimer. | 10 | * notice, this list of conditions and the following disclaimer. | |
11 | * 2. Redistributions in binary form must reproduce the above copyright | 11 | * 2. Redistributions in binary form must reproduce the above copyright | |
12 | * notice, this list of conditions and the following disclaimer in the | 12 | * notice, this list of conditions and the following disclaimer in the | |
13 | * documentation and/or other materials provided with the distribution. | 13 | * documentation and/or other materials provided with the distribution. | |
14 | * 3. All advertising materials mentioning features or use of this software | 14 | * 3. All advertising materials mentioning features or use of this software | |
15 | * must display the following acknowledgement: | 15 | * must display the following acknowledgement: | |
16 | * This product includes software developed at Ludd, University of | 16 | * This product includes software developed at Ludd, University of | |
17 | * Lule}, Sweden and its contributors. | 17 | * Lule}, Sweden and its contributors. | |
18 | * 4. The name of the author may not be used to endorse or promote products | 18 | * 4. The name of the author may not be used to endorse or promote products | |
19 | * derived from this software without specific prior written permission | 19 | * derived from this software without specific prior written permission | |
20 | * | 20 | * | |
21 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR | 21 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR | |
22 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES | 22 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES | |
23 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. | 23 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. | |
24 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | 24 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | |
25 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | 25 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | |
26 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | 26 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
27 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | 27 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
28 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | 28 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
29 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | 29 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | |
30 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | 30 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
31 | */ | 31 | */ | |
32 | 32 | |||
33 | /* | 33 | /* | |
34 | * CPU-type independent code to spin up other VAX CPU's. | 34 | * CPU-type independent code to spin up other VAX CPU's. | |
35 | */ | 35 | */ | |
36 | 36 | |||
37 | #include <sys/cdefs.h> | 37 | #include <sys/cdefs.h> | |
38 | __KERNEL_RCSID(0, "$NetBSD: multicpu.c,v 1.31 2010/12/14 23:44:49 matt Exp $"); | 38 | __KERNEL_RCSID(0, "$NetBSD: multicpu.c,v 1.32 2011/06/05 16:59:21 matt Exp $"); | |
39 | 39 | |||
40 | #include "opt_multiprocessor.h" | 40 | #include "opt_multiprocessor.h" | |
41 | 41 | |||
42 | #include <sys/param.h> | 42 | #include <sys/param.h> | |
43 | #include <sys/cpu.h> | 43 | #include <sys/cpu.h> | |
44 | #include <sys/device.h> | 44 | #include <sys/device.h> | |
45 | #include <sys/malloc.h> | 45 | #include <sys/malloc.h> | |
46 | #include <sys/proc.h> | 46 | #include <sys/proc.h> | |
47 | #include <sys/xcall.h> | 47 | #include <sys/xcall.h> | |
48 | 48 | |||
49 | #include <uvm/uvm_extern.h> | 49 | #include <uvm/uvm_extern.h> | |
50 | 50 | |||
51 | #include <vax/vax/gencons.h> | 51 | #include <vax/vax/gencons.h> | |
52 | 52 | |||
53 | #include "ioconf.h" | 53 | #include "ioconf.h" | |
54 | 54 | |||
55 | const struct cpu_mp_dep *mp_dep_call; | 55 | const struct cpu_mp_dep *mp_dep_call; | |
56 | 56 | |||
57 | struct cpuq { | 57 | struct cpuq { | |
58 | SIMPLEQ_ENTRY(cpuq) cq_q; | 58 | SIMPLEQ_ENTRY(cpuq) cq_q; | |
59 | struct cpu_info *cq_ci; | 59 | struct cpu_info *cq_ci; | |
60 | struct device *cq_dev; | 60 | device_t cq_dev; | |
61 | }; | 61 | }; | |
62 | 62 | |||
63 | SIMPLEQ_HEAD(, cpuq) cpuq = SIMPLEQ_HEAD_INITIALIZER(cpuq); | 63 | SIMPLEQ_HEAD(, cpuq) cpuq = SIMPLEQ_HEAD_INITIALIZER(cpuq); | |
64 | 64 | |||
65 | extern long avail_start, avail_end; | 65 | extern long avail_start, avail_end; | |
66 | struct cpu_info_qh cpus = SIMPLEQ_HEAD_INITIALIZER(cpus); | 66 | struct cpu_info_qh cpus = SIMPLEQ_HEAD_INITIALIZER(cpus); | |
67 | 67 | |||
68 | void | 68 | void | |
69 | cpu_boot_secondary_processors(void) | 69 | cpu_boot_secondary_processors(void) | |
70 | { | 70 | { | |
71 | struct cpuq *q; | 71 | struct cpuq *q; | |
72 | 72 | |||
73 | while ((q = SIMPLEQ_FIRST(&cpuq))) { | 73 | while ((q = SIMPLEQ_FIRST(&cpuq))) { | |
74 | SIMPLEQ_REMOVE_HEAD(&cpuq, cq_q); | 74 | SIMPLEQ_REMOVE_HEAD(&cpuq, cq_q); | |
75 | (*mp_dep_call->cpu_startslave)(q->cq_ci); | 75 | (*mp_dep_call->cpu_startslave)(q->cq_ci); | |
76 | free(q, M_TEMP); | 76 | free(q, M_TEMP); | |
77 | } | 77 | } | |
78 | } | 78 | } | |
79 | 79 | |||
80 | /* | 80 | /* | |
81 | * Allocate a cpu_info struct and fill it in then prepare for getting | 81 | * Allocate a cpu_info struct and fill it in then prepare for getting | |
82 | * started by cpu_boot_secondary_processors(). | 82 | * started by cpu_boot_secondary_processors(). | |
83 | */ | 83 | */ | |
84 | void | 84 | void | |
85 | cpu_slavesetup(device_t self, int slotid) | 85 | cpu_slavesetup(device_t self, int slotid) | |
86 | { | 86 | { | |
87 | struct cpu_info *ci; | 87 | struct cpu_info *ci; | |
88 | struct cpuq *cq; | 88 | struct cpuq *cq; | |
89 | struct vm_page *pg; | 89 | struct vm_page *pg; | |
90 | vaddr_t istackbase; | 90 | vaddr_t istackbase; | |
91 | 91 | |||
92 | KASSERT(device_private(self) == NULL); | 92 | KASSERT(device_private(self) == NULL); | |
93 | 93 | |||
94 | ci = malloc(sizeof(*ci), M_DEVBUF, M_ZERO|M_NOWAIT); | 94 | ci = malloc(sizeof(*ci), M_DEVBUF, M_ZERO|M_NOWAIT); | |
95 | if (ci == NULL) | 95 | if (ci == NULL) | |
96 | panic("cpu_slavesetup1"); | 96 | panic("cpu_slavesetup1"); | |
97 | 97 | |||
98 | self->dv_private = ci; | 98 | self->dv_private = ci; | |
99 | ci->ci_dev = self; | 99 | ci->ci_dev = self; | |
100 | ci->ci_slotid = slotid; | 100 | ci->ci_slotid = slotid; | |
101 | ci->ci_cpuid = device_unit(self); | 101 | ci->ci_cpuid = device_unit(self); | |
102 | 102 | |||
103 | /* Allocate an interrupt stack */ | 103 | /* Allocate an interrupt stack */ | |
104 | pg = uvm_pagealloc(NULL, 0, NULL, 0); | 104 | pg = uvm_pagealloc(NULL, 0, NULL, 0); | |
105 | if (pg == NULL) | 105 | if (pg == NULL) | |
106 | panic("cpu_slavesetup2"); | 106 | panic("cpu_slavesetup2"); | |
107 | 107 | |||
108 | istackbase = VM_PAGE_TO_PHYS(pg) | KERNBASE; | 108 | istackbase = VM_PAGE_TO_PHYS(pg) | KERNBASE; | |
109 | kvtopte(istackbase)->pg_v = 0; /* istack safety belt */ | 109 | kvtopte(istackbase)->pg_v = 0; /* istack safety belt */ | |
110 | 110 | |||
111 | /* Populate the PCB and the cpu_info struct */ | 111 | /* Populate the PCB and the cpu_info struct */ | |
112 | ci->ci_istack = istackbase + PAGE_SIZE; | 112 | ci->ci_istack = istackbase + PAGE_SIZE; | |
113 | SIMPLEQ_INSERT_TAIL(&cpus, ci, ci_next); | 113 | SIMPLEQ_INSERT_TAIL(&cpus, ci, ci_next); | |
114 | 114 | |||
115 | cq = malloc(sizeof(*cq), M_TEMP, M_NOWAIT|M_ZERO); | 115 | cq = malloc(sizeof(*cq), M_TEMP, M_NOWAIT|M_ZERO); | |
116 | if (cq == NULL) | 116 | if (cq == NULL) | |
117 | panic("cpu_slavesetup3"); | 117 | panic("cpu_slavesetup3"); | |
118 | 118 | |||
119 | cq->cq_ci = ci; | 119 | cq->cq_ci = ci; | |
120 | cq->cq_dev = ci->ci_dev; | 120 | cq->cq_dev = ci->ci_dev; | |
121 | SIMPLEQ_INSERT_TAIL(&cpuq, cq, cq_q); | 121 | SIMPLEQ_INSERT_TAIL(&cpuq, cq, cq_q); | |
122 | 122 | |||
123 | mi_cpu_attach(ci); /* let the MI parts know about the new cpu */ | 123 | mi_cpu_attach(ci); /* let the MI parts know about the new cpu */ | |
124 | } | 124 | } | |
125 | 125 | |||
126 | /* | 126 | /* | |
127 | * Send an IPI of type type to the CPU with logical device number cpu. | 127 | * Send an IPI of type type to the CPU with logical device number cpu. | |
128 | */ | 128 | */ | |
129 | void | 129 | void | |
130 | cpu_send_ipi(int cpu, int type) | 130 | cpu_send_ipi(int cpu, int type) | |
131 | { | 131 | { | |
132 | struct cpu_info *ci; | 132 | struct cpu_info *ci; | |
133 | int i; | 133 | int i; | |
134 | 134 | |||
135 | if (cpu >= 0) { | 135 | if (cpu >= 0) { | |
136 | ci = device_lookup_private(&cpu_cd, cpu); | 136 | ci = device_lookup_private(&cpu_cd, cpu); | |
137 | bbssi(type, &ci->ci_ipimsgs); | 137 | bbssi(type, &ci->ci_ipimsgs); | |
138 | (*mp_dep_call->cpu_send_ipi)(ci); | 138 | (*mp_dep_call->cpu_send_ipi)(ci); | |
139 | return; | 139 | return; | |
140 | } | 140 | } | |
141 | 141 | |||
142 | for (i = 0; i < cpu_cd.cd_ndevs; i++) { | 142 | for (i = 0; i < cpu_cd.cd_ndevs; i++) { | |
143 | ci = device_lookup_private(&cpu_cd, i); | 143 | ci = device_lookup_private(&cpu_cd, i); | |
144 | if (ci == NULL) | 144 | if (ci == NULL) | |
145 | continue; | 145 | continue; | |
146 | switch (cpu) { | 146 | switch (cpu) { | |
147 | case IPI_DEST_MASTER: | 147 | case IPI_DEST_MASTER: | |
148 | if (ci->ci_flags & CI_MASTERCPU) { | 148 | if (ci->ci_flags & CI_MASTERCPU) { | |
149 | bbssi(type, &ci->ci_ipimsgs); | 149 | bbssi(type, &ci->ci_ipimsgs); | |
150 | (*mp_dep_call->cpu_send_ipi)(ci); | 150 | (*mp_dep_call->cpu_send_ipi)(ci); | |
151 | } | 151 | } | |
152 | break; | 152 | break; | |
153 | case IPI_DEST_ALL: | 153 | case IPI_DEST_ALL: | |
154 | if (i == cpu_number()) | 154 | if (i == cpu_number()) | |
155 | continue; /* No IPI to myself */ | 155 | continue; /* No IPI to myself */ | |
156 | bbssi(type, &ci->ci_ipimsgs); | 156 | bbssi(type, &ci->ci_ipimsgs); | |
157 | (*mp_dep_call->cpu_send_ipi)(ci); | 157 | (*mp_dep_call->cpu_send_ipi)(ci); | |
158 | break; | 158 | break; | |
159 | } | 159 | } | |
160 | } | 160 | } | |
161 | } | 161 | } | |
162 | 162 | |||
163 | void | 163 | void | |
164 | cpu_handle_ipi(void) | 164 | cpu_handle_ipi(void) | |
165 | { | 165 | { | |
166 | struct cpu_info * const ci = curcpu(); | 166 | struct cpu_info * const ci = curcpu(); | |
167 | int bitno; | 167 | int bitno; | |
168 | int s; | 168 | int s; | |
169 | 169 | |||
170 | s = splhigh(); | 170 | s = splhigh(); | |
171 | 171 | |||
172 | while ((bitno = ffs(ci->ci_ipimsgs))) { | 172 | while ((bitno = ffs(ci->ci_ipimsgs))) { | |
173 | bitno -= 1; /* ffs() starts from 1 */ | 173 | bitno -= 1; /* ffs() starts from 1 */ | |
174 | bbcci(bitno, &ci->ci_ipimsgs); | 174 | bbcci(bitno, &ci->ci_ipimsgs); | |
175 | switch (bitno) { | 175 | switch (bitno) { | |
176 | case IPI_START_CNTX: | 176 | case IPI_START_CNTX: | |
177 | #ifdef DIAGNOSTIC | 177 | #ifdef DIAGNOSTIC | |
178 | if (CPU_IS_PRIMARY(ci) == 0) | 178 | if (CPU_IS_PRIMARY(ci) == 0) | |
179 | panic("cpu_handle_ipi"); | 179 | panic("cpu_handle_ipi"); | |
180 | #endif | 180 | #endif | |
181 | gencnstarttx(); | 181 | gencnstarttx(); | |
182 | break; | 182 | break; | |
183 | case IPI_SEND_CNCHAR: | 183 | case IPI_SEND_CNCHAR: | |
184 | #ifdef DIAGNOSTIC | 184 | #ifdef DIAGNOSTIC | |
185 | if (CPU_IS_PRIMARY(ci) == 0) | 185 | if (CPU_IS_PRIMARY(ci) == 0) | |
186 | panic("cpu_handle_ipi2"); | 186 | panic("cpu_handle_ipi2"); | |
187 | #endif | 187 | #endif | |
188 | (*mp_dep_call->cpu_cnintr)(); | 188 | (*mp_dep_call->cpu_cnintr)(); | |
189 | break; | 189 | break; | |
190 | case IPI_RUNNING: | 190 | case IPI_RUNNING: | |
191 | break; | 191 | break; | |
192 | case IPI_TBIA: | 192 | case IPI_TBIA: | |
193 | mtpr(0, PR_TBIA); | 193 | mtpr(0, PR_TBIA); | |
194 | break; | 194 | break; | |
195 | case IPI_DDB: | 195 | case IPI_DDB: | |
196 | Debugger(); | 196 | Debugger(); | |
197 | break; | 197 | break; | |
198 | case IPI_XCALL: | 198 | case IPI_XCALL: | |
199 | xc_ipi_handler(); | 199 | xc_ipi_handler(); | |
200 | break; | 200 | break; | |
201 | default: | 201 | default: | |
202 | panic("cpu_handle_ipi: bad bit %x", bitno); | 202 | panic("cpu_handle_ipi: bad bit %x", bitno); | |
203 | } | 203 | } | |
204 | } | 204 | } | |
205 | splx(s); | 205 | splx(s); | |
206 | } | 206 | } | |
207 | 207 | |||
208 | /* | 208 | /* | |
209 | * MD support for xcall(9) interface. | 209 | * MD support for xcall(9) interface. | |
210 | */ | 210 | */ | |
211 | 211 | |||
212 | void | 212 | void | |
213 | xc_send_ipi(struct cpu_info *ci) | 213 | xc_send_ipi(struct cpu_info *ci) | |
214 | { | 214 | { | |
215 | 215 | |||
216 | KASSERT(kpreempt_disabled()); | 216 | KASSERT(kpreempt_disabled()); | |
217 | KASSERT(curcpu() != ci); | 217 | KASSERT(curcpu() != ci); | |
218 | 218 | |||
219 | if (ci) { | 219 | if (ci) { | |
220 | /* Unicast: remote CPU. */ | 220 | /* Unicast: remote CPU. */ | |
221 | cpu_send_ipi(ci->ci_cpuid, IPI_XCALL); | 221 | cpu_send_ipi(ci->ci_cpuid, IPI_XCALL); | |
222 | } else { | 222 | } else { | |
223 | /* Broadcast: all, but local CPU (caller will handle it). */ | 223 | /* Broadcast: all, but local CPU (caller will handle it). */ | |
224 | cpu_send_ipi(IPI_DEST_ALL, IPI_XCALL); | 224 | cpu_send_ipi(IPI_DEST_ALL, IPI_XCALL); | |
225 | } | 225 | } | |
226 | } | 226 | } |
--- src/sys/arch/vax/vax/ubi.c 2010/12/14 23:44:50 1.3
+++ src/sys/arch/vax/vax/ubi.c 2011/06/05 16:59:21 1.4
@@ -1,119 +1,119 @@ | @@ -1,119 +1,119 @@ | |||
1 | /* $NetBSD: ubi.c,v 1.3 2010/12/14 23:44:50 matt Exp $ */ | 1 | /* $NetBSD: ubi.c,v 1.4 2011/06/05 16:59:21 matt Exp $ */ | |
2 | /* | 2 | /* | |
3 | * Copyright (c) 1999 Ludd, University of Lule}, Sweden. | 3 | * Copyright (c) 1999 Ludd, University of Lule}, Sweden. | |
4 | * All rights reserved. | 4 | * All rights reserved. | |
5 | * | 5 | * | |
6 | * Redistribution and use in source and binary forms, with or without | 6 | * Redistribution and use in source and binary forms, with or without | |
7 | * modification, are permitted provided that the following conditions | 7 | * modification, are permitted provided that the following conditions | |
8 | * are met: | 8 | * are met: | |
9 | * 1. Redistributions of source code must retain the above copyright | 9 | * 1. Redistributions of source code must retain the above copyright | |
10 | * notice, this list of conditions and the following disclaimer. | 10 | * notice, this list of conditions and the following disclaimer. | |
11 | * 2. Redistributions in binary form must reproduce the above copyright | 11 | * 2. Redistributions in binary form must reproduce the above copyright | |
12 | * notice, this list of conditions and the following disclaimer in the | 12 | * notice, this list of conditions and the following disclaimer in the | |
13 | * documentation and/or other materials provided with the distribution. | 13 | * documentation and/or other materials provided with the distribution. | |
14 | * 3. All advertising materials mentioning features or use of this software | 14 | * 3. All advertising materials mentioning features or use of this software | |
15 | * must display the following acknowledgement: | 15 | * must display the following acknowledgement: | |
16 | * This product includes software developed at Ludd, University of | 16 | * This product includes software developed at Ludd, University of | |
17 | * Lule}, Sweden and its contributors. | 17 | * Lule}, Sweden and its contributors. | |
18 | * 4. The name of the author may not be used to endorse or promote products | 18 | * 4. The name of the author may not be used to endorse or promote products | |
19 | * derived from this software without specific prior written permission | 19 | * derived from this software without specific prior written permission | |
20 | * | 20 | * | |
21 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR | 21 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR | |
22 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES | 22 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES | |
23 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. | 23 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. | |
24 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | 24 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | |
25 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | 25 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | |
26 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | 26 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | |
27 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | 27 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | |
28 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | 28 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
29 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | 29 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | |
30 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | 30 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
31 | */ | 31 | */ | |
32 | 32 | |||
33 | #include <sys/cdefs.h> | 33 | #include <sys/cdefs.h> | |
34 | __KERNEL_RCSID(0, "$NetBSD: ubi.c,v 1.3 2010/12/14 23:44:50 matt Exp $"); | 34 | __KERNEL_RCSID(0, "$NetBSD: ubi.c,v 1.4 2011/06/05 16:59:21 matt Exp $"); | |
35 | 35 | |||
36 | #include <sys/param.h> | 36 | #include <sys/param.h> | |
37 | #include <sys/systm.h> | 37 | #include <sys/systm.h> | |
38 | #include <sys/bus.h> | 38 | #include <sys/bus.h> | |
39 | #include <sys/cpu.h> | 39 | #include <sys/cpu.h> | |
40 | #include <sys/device.h> | 40 | #include <sys/device.h> | |
41 | 41 | |||
42 | #include <machine/nexus.h> | 42 | #include <machine/nexus.h> | |
43 | #include <machine/sid.h> | 43 | #include <machine/sid.h> | |
44 | #include <machine/ka730.h> | 44 | #include <machine/ka730.h> | |
45 | 45 | |||
46 | static int ubi_print(void *, const char *); | 46 | static int ubi_print(void *, const char *); | |
47 | static int ubi_match(struct device *, struct cfdata *, void *); | 47 | static int ubi_match(device_t, cfdata_t, void *); | |
48 | static void ubi_attach(struct device *, struct device *, void*); | 48 | static void ubi_attach(device_t, device_t, void*); | |
49 | 49 | |||
50 | CFATTACH_DECL_NEW(ubi, sizeof(struct device), | 50 | CFATTACH_DECL_NEW(ubi, 0, | |
51 | ubi_match, ubi_attach, NULL, NULL); | 51 | ubi_match, ubi_attach, NULL, NULL); | |
52 | 52 | |||
53 | int | 53 | int | |
54 | ubi_print(void *aux, const char *name) | 54 | ubi_print(void *aux, const char *name) | |
55 | { | 55 | { | |
56 | struct sbi_attach_args *sa = (struct sbi_attach_args *)aux; | 56 | struct sbi_attach_args *sa = (struct sbi_attach_args *)aux; | |
57 | 57 | |||
58 | if (name) | 58 | if (name) | |
59 | aprint_normal("unknown device 0x%x at %s", sa->sa_type, name); | 59 | aprint_normal("unknown device 0x%x at %s", sa->sa_type, name); | |
60 | 60 | |||
61 | aprint_normal(" tr%d", sa->sa_nexnum); | 61 | aprint_normal(" tr%d", sa->sa_nexnum); | |
62 | return (UNCONF); | 62 | return (UNCONF); | |
63 | } | 63 | } | |
64 | 64 | |||
65 | 65 | |||
66 | int | 66 | int | |
67 | ubi_match(struct device *parent, struct cfdata *cf, void *aux) | 67 | ubi_match(device_t parent, cfdata_t cf, void *aux) | |
68 | { | 68 | { | |
69 | if (vax_bustype == VAX_UNIBUS) | 69 | if (vax_bustype == VAX_UNIBUS) | |
70 | return 1; | 70 | return 1; | |
71 | return 0; | 71 | return 0; | |
72 | } | 72 | } | |
73 | 73 | |||
74 | void | 74 | void | |
75 | ubi_attach(struct device *parent, struct device *self, void *aux) | 75 | ubi_attach(device_t parent, device_t self, void *aux) | |
76 | { | 76 | { | |
77 | struct sbi_attach_args sa; | 77 | struct sbi_attach_args sa; | |
78 | 78 | |||
79 | printf("\n"); | 79 | printf("\n"); | |
80 | 80 | |||
81 | sa.sa_base = NEX730; | 81 | sa.sa_base = NEX730; | |
82 | 82 | |||
83 | #define NEXPAGES (sizeof(struct nexus) / VAX_NBPG) | 83 | #define NEXPAGES (sizeof(struct nexus) / VAX_NBPG) | |
84 | 84 | |||
85 | #if 0 | 85 | #if 0 | |
86 | /* | 86 | /* | |
87 | * Probe for memory, can be in the first 4 slots. | 87 | * Probe for memory, can be in the first 4 slots. | |
88 | */ | 88 | */ | |
89 | 89 | |||
90 | for (sa.sa_nexnum = 0; sa.sa_nexnum < 4; sa.sa_nexnum++) { | 90 | for (sa.sa_nexnum = 0; sa.sa_nexnum < 4; sa.sa_nexnum++) { | |
91 | sa.sa_ioh = vax_map_physmem(NEX730 + | 91 | sa.sa_ioh = vax_map_physmem(NEX730 + | |
92 | sizeof(struct nexus) * sa.sa_nexnum, NEXPAGES); | 92 | sizeof(struct nexus) * sa.sa_nexnum, NEXPAGES); | |
93 | if (badaddr((caddr_t)sa.sa_ioh, 4)) { | 93 | if (badaddr((caddr_t)sa.sa_ioh, 4)) { | |
94 | vax_unmap_physmem((vaddr_t)sa.sa_ioh, NEXPAGES); | 94 | vax_unmap_physmem((vaddr_t)sa.sa_ioh, NEXPAGES); | |
95 | } else { | 95 | } else { | |
96 | sa.sa_type = NEX_MEM16; | 96 | sa.sa_type = NEX_MEM16; | |
97 | config_found(self, (void*)&sa, ubi_print); | 97 | config_found(self, (void*)&sa, ubi_print); | |
98 | } | 98 | } | |
99 | } | 99 | } | |
100 | #endif | 100 | #endif | |
101 | 101 | |||
102 | /* VAX 730 fixed configuration */ | 102 | /* VAX 730 fixed configuration */ | |
103 | 103 | |||
104 | /* memory */ | 104 | /* memory */ | |
105 | sa.sa_nexnum = 0; | 105 | sa.sa_nexnum = 0; | |
106 | sa.sa_ioh = vax_map_physmem((int)NEX730 + | 106 | sa.sa_ioh = vax_map_physmem((int)NEX730 + | |
107 | sizeof(struct nexus) * sa.sa_nexnum, NEXPAGES); | 107 | sizeof(struct nexus) * sa.sa_nexnum, NEXPAGES); | |
108 | sa.sa_type = NEX_MEM16; | 108 | sa.sa_type = NEX_MEM16; | |
109 | config_found(self, (void*)&sa, ubi_print); | 109 | config_found(self, (void*)&sa, ubi_print); | |
110 | 110 | |||
111 | printf("\n"); | 111 | printf("\n"); | |
112 | 112 | |||
113 | /* generic UBA */ | 113 | /* generic UBA */ | |
114 | sa.sa_nexnum = 3; | 114 | sa.sa_nexnum = 3; | |
115 | sa.sa_ioh = vax_map_physmem((int)NEX730 + | 115 | sa.sa_ioh = vax_map_physmem((int)NEX730 + | |
116 | sizeof(struct nexus) * sa.sa_nexnum, NEXPAGES); | 116 | sizeof(struct nexus) * sa.sa_nexnum, NEXPAGES); | |
117 | sa.sa_type = NEX_UBA0; | 117 | sa.sa_type = NEX_UBA0; | |
118 | config_found(self, (void*)&sa, ubi_print); | 118 | config_found(self, (void*)&sa, ubi_print); | |
119 | } | 119 | } |