 @@ -1,1554 +1,1554 @@
-/*	$NetBSD: machdep.c,v 1.702 2011/04/26 15:51:23 joerg Exp $	*/
+/*	$NetBSD: machdep.c,v 1.703 2011/06/07 14:53:03 bouyer Exp $	*/
 /*-
  * Copyright (c) 1996, 1997, 1998, 2000, 2004, 2006, 2008, 2009
  *     The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Charles M. Hannum, by Jason R. Thorpe of the Numerical Aerospace
  * Simulation Facility NASA Ames Research Center, by Julio M. Merino Vidal,
  * and by Andrew Doran.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 /*-
  * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
  * All rights reserved.
+ *
  * This code is derived from software contributed to Berkeley by
  * William Jolitz.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
  * 3. Neither the name of the University nor the names of its contributors
  *    may be used to endorse or promote products derived from this software
  *    without specific prior written permission.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
+ *
  *	@(#)machdep.c	7.4 (Berkeley) 6/3/91
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.702 2011/04/26 15:51:23 joerg Exp $");
+__KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.703 2011/06/07 14:53:03 bouyer Exp $");
 #include "opt_beep.h"
 #include "opt_compat_ibcs2.h"
 #include "opt_compat_netbsd.h"
 #include "opt_compat_svr4.h"
 #include "opt_cpureset_delay.h"
 #include "opt_ddb.h"
 #include "opt_ipkdb.h"
 #include "opt_kgdb.h"
 #include "opt_mtrr.h"
 #include "opt_modular.h"
 #include "opt_multiboot.h"
 #include "opt_multiprocessor.h"
 #include "opt_physmem.h"
 #include "opt_realmem.h"
 #include "opt_user_ldt.h"
 #include "opt_vm86.h"
 #include "opt_xbox.h"
 #include "opt_xen.h"
 #include "isa.h"
 #include "pci.h"
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/signal.h>
 #include <sys/signalvar.h>
 #include <sys/kernel.h>
 #include <sys/cpu.h>
 #include <sys/exec.h>
 #include <sys/reboot.h>
 #include <sys/conf.h>
 #include <sys/malloc.h>
 #include <sys/mbuf.h>
 #include <sys/msgbuf.h>
 #include <sys/mount.h>
 #include <sys/syscallargs.h>
 #include <sys/core.h>
 #include <sys/kcore.h>
 #include <sys/ucontext.h>
 #include <sys/ras.h>
 #include <sys/sa.h>
 #include <sys/savar.h>
 #include <sys/ksyms.h>
 #include <sys/device.h>
 #ifdef IPKDB
 #include <ipkdb/ipkdb.h>
 #endif
 #ifdef KGDB
 #include <sys/kgdb.h>
 #endif
 #include <dev/cons.h>
 #include <uvm/uvm.h>
 #include <uvm/uvm_page.h>
 #include <sys/sysctl.h>
 #include <machine/cpu.h>
 #include <machine/cpufunc.h>
 #include <machine/cpuvar.h>
 #include <machine/gdt.h>
 #include <machine/intr.h>
 #include <machine/kcore.h>
 #include <machine/pio.h>
 #include <machine/psl.h>
 #include <machine/reg.h>
 #include <machine/specialreg.h>
 #include <machine/bootinfo.h>
 #include <machine/mtrr.h>
 #include <x86/x86/tsc.h>
 #include <x86/machdep.h>
 #include <machine/multiboot.h>
 #ifdef XEN
 #include <xen/evtchn.h>
 #include <xen/xen.h>
 #include <xen/hypervisor.h>
 /* #define	XENDEBUG */
 /* #define	XENDEBUG_LOW */
 #ifdef XENDEBUG
 #define	XENPRINTF(x) printf x
 #define	XENPRINTK(x) printk x
 #else
 #define	XENPRINTF(x)
 #define	XENPRINTK(x)
 #endif
 #define	PRINTK(x) printf x
 #endif /* XEN */
 #include <dev/isa/isareg.h>
 #include <machine/isa_machdep.h>
 #include <dev/ic/i8042reg.h>
 #ifdef DDB
 #include <machine/db_machdep.h>
 #include <ddb/db_extern.h>
 #endif
 #ifdef VM86
 #include <machine/vm86.h>
 #endif
 #ifdef XBOX
 #include <machine/xbox.h>
 int arch_i386_is_xbox = 0;
 uint32_t arch_i386_xbox_memsize = 0;
 #endif
 #include "acpica.h"
 #include "apmbios.h"
 #include "bioscall.h"
 #if NBIOSCALL > 0
 #include <machine/bioscall.h>
 #endif
 #if NACPICA > 0
 #include <dev/acpi/acpivar.h>
 #define ACPI_MACHDEP_PRIVATE
 #include <machine/acpi_machdep.h>
 #endif
 #if NAPMBIOS > 0
 #include <machine/apmvar.h>
 #endif
 #include "isa.h"
 #include "isadma.h"
 #include "npx.h"
 #include "ksyms.h"
 #include "cardbus.h"
 #if NCARDBUS > 0
 /* For rbus_min_start hint. */
 #include <machine/bus.h>
 #include <dev/cardbus/rbus.h>
 #include <machine/rbus_machdep.h>
 #endif
 #include "mca.h"
 #if NMCA > 0
 #include <machine/mca_machdep.h>	/* for mca_busprobe() */
 #endif
 #ifdef MULTIPROCESSOR		/* XXX */
 #include <machine/mpbiosvar.h>	/* XXX */
 #endif				/* XXX */
 /* the following is used externally (sysctl_hw) */
 char machine[] = "i386";		/* CPU "architecture" */
 char machine_arch[] = "i386";		/* machine == machine_arch */
 extern struct bi_devmatch *x86_alldisks;
 extern int x86_ndisks;
 #ifdef CPURESET_DELAY
 int	cpureset_delay = CPURESET_DELAY;
 #else
 int     cpureset_delay = 2000; /* default to 2s */
 #endif
 #ifdef MTRR
 struct mtrr_funcs *mtrr_funcs;
 #endif
 int	physmem;
 int	cpu_class;
 int	i386_fpu_present;
 int	i386_fpu_exception;
 int	i386_fpu_fdivbug;
 int	i386_use_fxsave;
 int	i386_use_pae = 0;
 int	i386_has_sse;
 int	i386_has_sse2;
 vaddr_t	msgbuf_vaddr;
 struct {
 	paddr_t paddr;
 	psize_t sz;
 } msgbuf_p_seg[VM_PHYSSEG_MAX];
 unsigned int msgbuf_p_cnt = 0;
 vaddr_t	idt_vaddr;
 paddr_t	idt_paddr;
 vaddr_t	pentium_idt_vaddr;
 struct vm_map *phys_map = NULL;
 extern	paddr_t avail_start, avail_end;
 #ifdef XEN
 extern paddr_t pmap_pa_start, pmap_pa_end;
 void hypervisor_callback(void);
 void failsafe_callback(void);
 #endif
 #ifdef XEN
 void (*delay_func)(unsigned int) = xen_delay;
 void (*initclock_func)(void) = xen_initclocks;
 #else
 void (*delay_func)(unsigned int) = i8254_delay;
 void (*initclock_func)(void) = i8254_initclocks;
 #endif
 /*
  * Size of memory segments, before any memory is stolen.
  */
 phys_ram_seg_t mem_clusters[VM_PHYSSEG_MAX];
 int	mem_cluster_cnt = 0;
 void	init386(paddr_t);
 void	initgdt(union descriptor *);
 extern int time_adjusted;
 int *esym;
 int *eblob;
 extern int boothowto;
 #ifndef XEN
 /* Base memory reported by BIOS. */
 #ifndef REALBASEMEM
 int	biosbasemem = 0;
 #else
 int	biosbasemem = REALBASEMEM;
 #endif
 /* Extended memory reported by BIOS. */
 #ifndef REALEXTMEM
 int	biosextmem = 0;
 #else
 int	biosextmem = REALEXTMEM;
 #endif
 /* Set if any boot-loader set biosbasemem/biosextmem. */
 int	biosmem_implicit;
 /* Representation of the bootinfo structure constructed by a NetBSD native
  * boot loader.  Only be used by native_loader(). */
 struct bootinfo_source {
 	uint32_t bs_naddrs;
 	void *bs_addrs[1]; /* Actually longer. */
 };
 /* Only called by locore.h; no need to be in a header file. */
 void	native_loader(int, int, struct bootinfo_source *, paddr_t, int, int);
 /*
  * Called as one of the very first things during system startup (just after
  * the boot loader gave control to the kernel image), this routine is in
  * charge of retrieving the parameters passed in by the boot loader and
  * storing them in the appropriate kernel variables.
+ *
  * WARNING: Because the kernel has not yet relocated itself to KERNBASE,
  * special care has to be taken when accessing memory because absolute
  * addresses (referring to kernel symbols) do not work.  So:
+ *
  *     1) Avoid jumps to absolute addresses (such as gotos and switches).
  *     2) To access global variables use their physical address, which
  *        can be obtained using the RELOC macro.
  */
 void
 native_loader(int bl_boothowto, int bl_bootdev,
     struct bootinfo_source *bl_bootinfo, paddr_t bl_esym,
     int bl_biosextmem, int bl_biosbasemem)
+{
 #define RELOC(type, x) ((type)((vaddr_t)(x) - KERNBASE))
 	*RELOC(int *, &boothowto) = bl_boothowto;
 #ifdef COMPAT_OLDBOOT
 	/*
 	 * Pre-1.3 boot loaders gave the boot device as a parameter
 	 * (instead of a bootinfo entry).
 	 */
 	*RELOC(int *, &bootdev) = bl_bootdev;
 #endif
 	/*
 	 * The boot loader provides a physical, non-relocated address
 	 * for the symbols table's end.  We need to convert it to a
 	 * virtual address.
 	 */
 	if (bl_esym != 0)
 		*RELOC(int **, &esym) = (int *)((vaddr_t)bl_esym + KERNBASE);
 	else
 		*RELOC(int **, &esym) = 0;
 	/*
 	 * Copy bootinfo entries (if any) from the boot loader's
 	 * representation to the kernel's bootinfo space.
 	 */
 	if (bl_bootinfo != NULL) {
 		size_t i;
 		uint8_t *data;
 		struct bootinfo *bidest;
 		struct btinfo_modulelist *bi;
 		bidest = RELOC(struct bootinfo *, &bootinfo);
 		data = &bidest->bi_data[0];
 		for (i = 0; i < bl_bootinfo->bs_naddrs; i++) {
 			struct btinfo_common *bc;
 			bc = bl_bootinfo->bs_addrs[i];
 			if ((data + bc->len) >
 			    (&bidest->bi_data[0] + BOOTINFO_MAXSIZE))
 				break;
 			memcpy(data, bc, bc->len);
 			/*
 			 * If any modules were loaded, record where they
 			 * end.  We'll need to skip over them.
 			 */
 			bi = (struct btinfo_modulelist *)data;
 			if (bi->common.type == BTINFO_MODULELIST) {
 				*RELOC(int **, &eblob) =
 				    (int *)(bi->endpa + KERNBASE);
+			}
 			data += bc->len;
+		}
 		bidest->bi_nentries = i;
+	}
 	/*
 	 * Configure biosbasemem and biosextmem only if they were not
 	 * explicitly given during the kernel's build.
 	 */
 	if (*RELOC(int *, &biosbasemem) == 0) {
 		*RELOC(int *, &biosbasemem) = bl_biosbasemem;
 		*RELOC(int *, &biosmem_implicit) = 1;
+	}
 	if (*RELOC(int *, &biosextmem) == 0) {
 		*RELOC(int *, &biosextmem) = bl_biosextmem;
 		*RELOC(int *, &biosmem_implicit) = 1;
+	}
 #undef RELOC
+}
 #endif /* XEN */
 /*
  * Machine-dependent startup code
  */
 void
 cpu_startup(void)
+{
 	int x, y;
 	vaddr_t minaddr, maxaddr;
 	psize_t sz;
 	/*
 	 * For console drivers that require uvm and pmap to be initialized,
 	 * we'll give them one more chance here...
 	 */
 	consinit();
 #ifdef XBOX
 	xbox_startup();
 #endif
 	/*
 	 * Initialize error message buffer (et end of core).
 	 */
 	if (msgbuf_p_cnt == 0)
 		panic("msgbuf paddr map has not been set up");
 	for (x = 0, sz = 0; x < msgbuf_p_cnt; sz += msgbuf_p_seg[x++].sz)
 		continue;
 	msgbuf_vaddr = uvm_km_alloc(kernel_map, sz, 0, UVM_KMF_VAONLY);
 	if (msgbuf_vaddr == 0)
 		panic("failed to valloc msgbuf_vaddr");
 	/* msgbuf_paddr was init'd in pmap */
 	for (y = 0, sz = 0; y < msgbuf_p_cnt; y++) {
 		for (x = 0; x < btoc(msgbuf_p_seg[y].sz); x++, sz += PAGE_SIZE)
 			pmap_kenter_pa((vaddr_t)msgbuf_vaddr + sz,
 			    msgbuf_p_seg[y].paddr + x * PAGE_SIZE,
 			    VM_PROT_READ|VM_PROT_WRITE, 0);
+	}
 	pmap_update(pmap_kernel());
 	initmsgbuf((void *)msgbuf_vaddr, sz);
 #ifdef MULTIBOOT
 	multiboot_print_info();
 #endif
 #ifdef TRAPLOG
 	/*
 	 * Enable recording of branch from/to in MSR's
 	 */
 	wrmsr(MSR_DEBUGCTLMSR, 0x1);
 #endif
 #if NCARDBUS > 0
 	/* Tell RBUS how much RAM we have, so it can use heuristics. */
 	rbus_min_start_hint(ctob((psize_t)physmem));
 #endif
 	minaddr = 0;
 	/*
 	 * Allocate a submap for physio
 	 */
 	phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
 				   VM_PHYS_SIZE, 0, false, NULL);
 	/* Say hello. */
 	banner();
 	/* Safe for i/o port / memory space allocation to use malloc now. */
 #if NISA > 0 || NPCI > 0
 	x86_bus_space_mallocok();
 #endif
 	gdt_init();
 	i386_proc0_tss_ldt_init();
 #ifndef XEN
 	cpu_init_tss(&cpu_info_primary);
 	ltr(cpu_info_primary.ci_tss_sel);
 #endif
 	x86_startup();
+}
 /*
  * Set up proc0's TSS and LDT.
  */
 void
 i386_proc0_tss_ldt_init(void)
+{
 	struct lwp *l = &lwp0;
 	struct pcb *pcb = lwp_getpcb(l);
 	pmap_kernel()->pm_ldt_sel = GSEL(GLDT_SEL, SEL_KPL);
 	pcb->pcb_cr0 = rcr0() & ~CR0_TS;
 	pcb->pcb_esp0 = uvm_lwp_getuarea(l) + KSTACK_SIZE - 16;
 	pcb->pcb_iopl = SEL_KPL;
 	l->l_md.md_regs = (struct trapframe *)pcb->pcb_esp0 - 1;
 	memcpy(&pcb->pcb_fsd, &gdt[GUDATA_SEL], sizeof(pcb->pcb_fsd));
 	memcpy(&pcb->pcb_gsd, &gdt[GUDATA_SEL], sizeof(pcb->pcb_gsd));
 #ifndef XEN
 	lldt(pmap_kernel()->pm_ldt_sel);
 #else
-	HYPERVISOR_fpu_taskswitch();
+	HYPERVISOR_fpu_taskswitch(1);
 	XENPRINTF(("lwp tss sp %p ss %04x/%04x\n",
 	    (void *)pcb->pcb_esp0,
 	    GSEL(GDATA_SEL, SEL_KPL),
 	    IDXSEL(GSEL(GDATA_SEL, SEL_KPL))));
 	HYPERVISOR_stack_switch(GSEL(GDATA_SEL, SEL_KPL), pcb->pcb_esp0);
 #endif
+}
 #ifdef XEN
 /*
  * Switch context:
  * - honor CR0_TS in saved CR0 and request DNA exception on FPU use
  * - switch stack pointer for user->kernel transition
  */
 void
 i386_switch_context(lwp_t *l)
+{
 	struct cpu_info *ci;
 	struct pcb *pcb;
 	struct physdev_op physop;
 	pcb = lwp_getpcb(l);
 	ci = curcpu();
 	if (ci->ci_fpused) {
-		HYPERVISOR_fpu_taskswitch();
+		HYPERVISOR_fpu_taskswitch(1);
 		ci->ci_fpused = 0;
+	}
 	HYPERVISOR_stack_switch(GSEL(GDATA_SEL, SEL_KPL), pcb->pcb_esp0);
 	physop.cmd = PHYSDEVOP_SET_IOPL;
 	physop.u.set_iopl.iopl = pcb->pcb_iopl;
 	HYPERVISOR_physdev_op(&physop);
+}
 #endif /* XEN */
 #ifndef XEN
 /*
  * Set up TSS and I/O bitmap.
  */
 void
 cpu_init_tss(struct cpu_info *ci)
+{
 	struct i386tss *tss = &ci->ci_tss;
 	tss->tss_iobase = IOMAP_INVALOFF << 16;
 	tss->tss_ss0 = GSEL(GDATA_SEL, SEL_KPL);
 	tss->tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
 	tss->tss_cr3 = rcr3();
 	ci->ci_tss_sel = tss_alloc(tss);
+}
 #endif /* XEN */
 /*
  * sysctl helper routine for machdep.booted_kernel
  */
 static int
 sysctl_machdep_booted_kernel(SYSCTLFN_ARGS)
+{
 	struct btinfo_bootpath *bibp;
 	struct sysctlnode node;
 	bibp = lookup_bootinfo(BTINFO_BOOTPATH);
 	if(!bibp)
 		return(ENOENT); /* ??? */
 	node = *rnode;
 	node.sysctl_data = bibp->bootpath;
 	node.sysctl_size = sizeof(bibp->bootpath);
 	return (sysctl_lookup(SYSCTLFN_CALL(&node)));
+}
 /*
  * sysctl helper routine for machdep.diskinfo
  */
 static int
 sysctl_machdep_diskinfo(SYSCTLFN_ARGS)
+{
 	struct sysctlnode node;
 	node = *rnode;
 	if (x86_alldisks == NULL)
 		return(EOPNOTSUPP);
 	node.sysctl_data = x86_alldisks;
 	node.sysctl_size = sizeof(struct disklist) +
 	    (x86_ndisks - 1) * sizeof(struct nativedisk_info);
 	return (sysctl_lookup(SYSCTLFN_CALL(&node)));
+}
 /*
  * machine dependent system variables.
  */
 SYSCTL_SETUP(sysctl_machdep_setup, "sysctl machdep subtree setup")
+{
 	extern uint64_t tsc_freq;
 	sysctl_createv(clog, 0, NULL, NULL,
 		       CTLFLAG_PERMANENT,
 		       CTLTYPE_NODE, "machdep", NULL,
 		       NULL, 0, NULL, 0,
 		       CTL_MACHDEP, CTL_EOL);
 	sysctl_createv(clog, 0, NULL, NULL,
 		       CTLFLAG_PERMANENT,
 		       CTLTYPE_STRUCT, "console_device", NULL,
 		       sysctl_consdev, 0, NULL, sizeof(dev_t),
 		       CTL_MACHDEP, CPU_CONSDEV, CTL_EOL);
 #ifndef XEN
 	sysctl_createv(clog, 0, NULL, NULL,
 		       CTLFLAG_PERMANENT,
 		       CTLTYPE_INT, "biosbasemem", NULL,
 		       NULL, 0, &biosbasemem, 0,
 		       CTL_MACHDEP, CPU_BIOSBASEMEM, CTL_EOL);
 	sysctl_createv(clog, 0, NULL, NULL,
 		       CTLFLAG_PERMANENT,
 		       CTLTYPE_INT, "biosextmem", NULL,
 		       NULL, 0, &biosextmem, 0,
 		       CTL_MACHDEP, CPU_BIOSEXTMEM, CTL_EOL);
 #endif /* XEN */
 	sysctl_createv(clog, 0, NULL, NULL,
 		       CTLFLAG_PERMANENT,
 		       CTLTYPE_STRING, "booted_kernel", NULL,
 		       sysctl_machdep_booted_kernel, 0, NULL, 0,
 		       CTL_MACHDEP, CPU_BOOTED_KERNEL, CTL_EOL);
 	sysctl_createv(clog, 0, NULL, NULL,
 		       CTLFLAG_PERMANENT,
 		       CTLTYPE_STRUCT, "diskinfo", NULL,
 		       sysctl_machdep_diskinfo, 0, NULL, 0,
 		       CTL_MACHDEP, CPU_DISKINFO, CTL_EOL);
 	sysctl_createv(clog, 0, NULL, NULL,
 		       CTLFLAG_PERMANENT,
 		       CTLTYPE_INT, "fpu_present", NULL,
 		       NULL, 0, &i386_fpu_present, 0,
 		       CTL_MACHDEP, CPU_FPU_PRESENT, CTL_EOL);
 	sysctl_createv(clog, 0, NULL, NULL,
 		       CTLFLAG_PERMANENT,
 		       CTLTYPE_INT, "osfxsr", NULL,
 		       NULL, 0, &i386_use_fxsave, 0,
 		       CTL_MACHDEP, CPU_OSFXSR, CTL_EOL);
 	sysctl_createv(clog, 0, NULL, NULL,
 		       CTLFLAG_PERMANENT,
 		       CTLTYPE_INT, "sse", NULL,
 		       NULL, 0, &i386_has_sse, 0,
 		       CTL_MACHDEP, CPU_SSE, CTL_EOL);
 	sysctl_createv(clog, 0, NULL, NULL,
 		       CTLFLAG_PERMANENT,
 		       CTLTYPE_INT, "sse2", NULL,
 		       NULL, 0, &i386_has_sse2, 0,
 		       CTL_MACHDEP, CPU_SSE2, CTL_EOL);
 	sysctl_createv(clog, 0, NULL, NULL,
 	    	       CTLFLAG_PERMANENT,
 		       CTLTYPE_STRING, "cpu_brand", NULL,
 		       NULL, 0, &cpu_brand_string, 0,
 		       CTL_MACHDEP, CTL_CREATE, CTL_EOL);
 	sysctl_createv(clog, 0, NULL, NULL,
 		       CTLFLAG_PERMANENT|CTLFLAG_READWRITE,
 		       CTLTYPE_INT, "sparse_dump", NULL,
 		       NULL, 0, &sparse_dump, 0,
 		       CTL_MACHDEP, CTL_CREATE, CTL_EOL);
 	sysctl_createv(clog, 0, NULL, NULL,
 		       CTLFLAG_PERMANENT,
 		       CTLTYPE_QUAD, "tsc_freq", NULL,
 		       NULL, 0, &tsc_freq, 0,
 		       CTL_MACHDEP, CTL_CREATE, CTL_EOL);
 	sysctl_createv(clog, 0, NULL, NULL,
 		       CTLFLAG_PERMANENT,
 		       CTLTYPE_INT, "pae",
 		       SYSCTL_DESCR("Whether the kernel uses PAE"),
 		       NULL, 0, &i386_use_pae, 0,
 		       CTL_MACHDEP, CTL_CREATE, CTL_EOL);
+}
 void *
 getframe(struct lwp *l, int sig, int *onstack)
+{
 	struct proc *p = l->l_proc;
 	struct trapframe *tf = l->l_md.md_regs;
 	/* Do we need to jump onto the signal stack? */
 	*onstack = (l->l_sigstk.ss_flags & (SS_DISABLE | SS_ONSTACK)) == 0
 	    && (SIGACTION(p, sig).sa_flags & SA_ONSTACK) != 0;
 	if (*onstack)
 		return (char *)l->l_sigstk.ss_sp + l->l_sigstk.ss_size;
 #ifdef VM86
 	if (tf->tf_eflags & PSL_VM)
 		return (void *)(tf->tf_esp + (tf->tf_ss << 4));
 	else
 #endif
 		return (void *)tf->tf_esp;
+}
 /*
  * Build context to run handler in.  We invoke the handler
  * directly, only returning via the trampoline.  Note the
  * trampoline version numbers are coordinated with machine-
  * dependent code in libc.
  */
 void
 buildcontext(struct lwp *l, int sel, void *catcher, void *fp)
+{
 	struct trapframe *tf = l->l_md.md_regs;
 #ifndef XEN
 	tf->tf_gs = GSEL(GUGS_SEL, SEL_UPL);
 	tf->tf_fs = GSEL(GUFS_SEL, SEL_UPL);
 #else
 	tf->tf_gs = GSEL(GUDATA_SEL, SEL_UPL);
 	tf->tf_fs = GSEL(GUDATA_SEL, SEL_UPL);
 #endif
 	tf->tf_es = GSEL(GUDATA_SEL, SEL_UPL);
 	tf->tf_ds = GSEL(GUDATA_SEL, SEL_UPL);
 	tf->tf_eip = (int)catcher;
 	tf->tf_cs = GSEL(sel, SEL_UPL);
 	tf->tf_eflags &= ~PSL_CLEARSIG;
 	tf->tf_esp = (int)fp;
 	tf->tf_ss = GSEL(GUDATA_SEL, SEL_UPL);
 	/* Ensure FP state is reset, if FP is used. */
 	l->l_md.md_flags &= ~MDL_USEDFPU;
+}
 void
 sendsig_siginfo(const ksiginfo_t *ksi, const sigset_t *mask)
+{
 	struct lwp *l = curlwp;
 	struct proc *p = l->l_proc;
 	struct pmap *pmap = vm_map_pmap(&p->p_vmspace->vm_map);
 	int sel = pmap->pm_hiexec > I386_MAX_EXE_ADDR ?
 	    GUCODEBIG_SEL : GUCODE_SEL;
 	struct sigacts *ps = p->p_sigacts;
 	int onstack, error;
 	int sig = ksi->ksi_signo;
 	struct sigframe_siginfo *fp = getframe(l, sig, &onstack), frame;
 	sig_t catcher = SIGACTION(p, sig).sa_handler;
 	struct trapframe *tf = l->l_md.md_regs;
 	KASSERT(mutex_owned(p->p_lock));
 	fp--;
 	frame.sf_ra = (int)ps->sa_sigdesc[sig].sd_tramp;
 	frame.sf_signum = sig;
 	frame.sf_sip = &fp->sf_si;
 	frame.sf_ucp = &fp->sf_uc;
 	frame.sf_si._info = ksi->ksi_info;
 	frame.sf_uc.uc_flags = _UC_SIGMASK|_UC_VM;
 	frame.sf_uc.uc_sigmask = *mask;
 	frame.sf_uc.uc_link = l->l_ctxlink;
 	frame.sf_uc.uc_flags |= (l->l_sigstk.ss_flags & SS_ONSTACK)
 	    ? _UC_SETSTACK : _UC_CLRSTACK;
 	memset(&frame.sf_uc.uc_stack, 0, sizeof(frame.sf_uc.uc_stack));
 	if (tf->tf_eflags & PSL_VM)
 		(*p->p_emul->e_syscall_intern)(p);
 	sendsig_reset(l, sig);
 	mutex_exit(p->p_lock);
 	cpu_getmcontext(l, &frame.sf_uc.uc_mcontext, &frame.sf_uc.uc_flags);
 	error = copyout(&frame, fp, sizeof(frame));
 	mutex_enter(p->p_lock);
 	if (error != 0) {
 		/*
 		 * Process has trashed its stack; give it an illegal
 		 * instruction to halt it in its tracks.
 		 */
 		sigexit(l, SIGILL);
 		/* NOTREACHED */
+	}
 	buildcontext(l, sel, catcher, fp);
 	/* Remember that we're now on the signal stack. */
 	if (onstack)
 		l->l_sigstk.ss_flags |= SS_ONSTACK;
+}
 void
 cpu_upcall(struct lwp *l, int type, int nevents, int ninterrupted, void *sas,
 	   void *ap, void *sp, sa_upcall_t upcall)
+{
 	struct pmap *pmap = vm_map_pmap(&l->l_proc->p_vmspace->vm_map);
 	struct saframe *sf, frame;
 	struct trapframe *tf;
 	tf = l->l_md.md_regs;
 	/* Finally, copy out the rest of the frame. */
 	frame.sa_type = type;
 	frame.sa_sas = sas;
 	frame.sa_events = nevents;
 	frame.sa_interrupted = ninterrupted;
 	frame.sa_arg = ap;
 	frame.sa_ra = 0;
 	sf = (struct saframe *)sp - 1;
 	if (copyout(&frame, sf, sizeof(frame)) != 0) {
 		/* Copying onto the stack didn't work. Die. */
 		sigexit(l, SIGILL);
 		/* NOTREACHED */
+	}
 	tf->tf_eip = (int) upcall;
 	tf->tf_esp = (int) sf;
 	tf->tf_ebp = 0; /* indicate call-frame-top to debuggers */
 	tf->tf_gs = GSEL(GUDATA_SEL, SEL_UPL);
 	tf->tf_fs = GSEL(GUDATA_SEL, SEL_UPL);
 	tf->tf_es = GSEL(GUDATA_SEL, SEL_UPL);
 	tf->tf_ds = GSEL(GUDATA_SEL, SEL_UPL);
 	tf->tf_cs = pmap->pm_hiexec > I386_MAX_EXE_ADDR ?
 	    GSEL(GUCODEBIG_SEL, SEL_UPL) : GSEL(GUCODE_SEL, SEL_UPL);
 	tf->tf_ss = GSEL(GUDATA_SEL, SEL_UPL);
 	tf->tf_eflags &= ~(PSL_T|PSL_VM|PSL_AC);
+}
 static void
 maybe_dump(int howto)
+{
 	int s;
 	/* Disable interrupts. */
 	s = splhigh();
 	/* Do a dump if requested. */
 	if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
 		dumpsys();
 	splx(s);
+}
 void
 cpu_reboot(int howto, char *bootstr)
+{
 	static bool syncdone = false;
 	struct lwp *l;
 	int s;
 	s = IPL_NONE;
 	l = (curlwp == NULL) ? &lwp0 : curlwp;
 	if (cold) {
 		howto |= RB_HALT;
 		goto haltsys;
+	}
 	boothowto = howto;
 	/* XXX used to dump after vfs_shutdown() and before
 	 * detaching devices / shutdown hooks / pmf_system_shutdown().
 	 */
 	maybe_dump(howto);
 	/*
 	 * If we've panic'd, don't make the situation potentially
 	 * worse by syncing or unmounting the file systems.
 	 */
 	if ((howto & RB_NOSYNC) == 0 && panicstr == NULL) {
 		if (!syncdone) {
 			syncdone = true;
 			/* XXX used to force unmount as well, here */
 			vfs_sync_all(l);
 			/*
 			 * If we've been adjusting the clock, the todr
 			 * will be out of synch; adjust it now.
+			 *
 			 * XXX used to do this after unmounting all
 			 * filesystems with vfs_shutdown().
 			 */
 			if (time_adjusted != 0)
 				resettodr();
+		}
 		while (vfs_unmountall1(l, false, false) ||
 		       config_detach_all(boothowto) ||
 		       vfs_unmount_forceone(l))
 			;	/* do nothing */
 	} else
 		suspendsched();
 	pmf_system_shutdown(boothowto);
 	s = splhigh();
 haltsys:
 	if ((howto & RB_POWERDOWN) == RB_POWERDOWN) {
 #ifdef XEN
 		HYPERVISOR_shutdown();
 		for (;;);
 #endif
 #ifdef XBOX
 		if (arch_i386_is_xbox) {
 			xbox_poweroff();
 			for (;;);
+		}
 #endif
 #if NACPICA > 0
 		if (s != IPL_NONE)
 			splx(s);
 		acpi_enter_sleep_state(ACPI_STATE_S5);
 #endif
 #if NAPMBIOS > 0 && !defined(APM_NO_POWEROFF)
 		/* turn off, if we can.  But try to turn disk off and
 		 * wait a bit first--some disk drives are slow to clean up
 		 * and users have reported disk corruption.
 		 */
 		delay(500000);
 		apm_set_powstate(NULL, APM_DEV_DISK(APM_DEV_ALLUNITS),
 		    APM_SYS_OFF);
 		delay(500000);
 		apm_set_powstate(NULL, APM_DEV_ALLDEVS, APM_SYS_OFF);
 		printf("WARNING: APM powerdown failed!\n");
 		/*
 		 * RB_POWERDOWN implies RB_HALT... fall into it...
 		 */
 #endif
+	}
 #ifdef MULTIPROCESSOR
 	x86_broadcast_ipi(X86_IPI_HALT);
 #endif
 	if (howto & RB_HALT) {
 #if NACPICA > 0
 		acpi_disable();
 #endif
 		printf("\n");
 		printf("The operating system has halted.\n");
 		printf("Please press any key to reboot.\n\n");
 #ifdef BEEP_ONHALT
+		{
 			int c;
 			for (c = BEEP_ONHALT_COUNT; c > 0; c--) {
 				sysbeep(BEEP_ONHALT_PITCH,
 					BEEP_ONHALT_PERIOD * hz / 1000);
 				delay(BEEP_ONHALT_PERIOD * 1000);
 				sysbeep(0, BEEP_ONHALT_PERIOD * hz / 1000);
 				delay(BEEP_ONHALT_PERIOD * 1000);
+			}
+		}
 #endif
 		cnpollc(1);	/* for proper keyboard command handling */
 		if (cngetc() == 0) {
 			/* no console attached, so just hlt */
 			for(;;) {
 				x86_hlt();
+			}
+		}
 		cnpollc(0);
+	}
 	printf("rebooting...\n");
 	if (cpureset_delay > 0)
 		delay(cpureset_delay * 1000);
 	cpu_reset();
 	for(;;) ;
 	/*NOTREACHED*/
+}
 /*
  * Clear registers on exec
  */
 void
 setregs(struct lwp *l, struct exec_package *pack, vaddr_t stack)
+{
 	struct pmap *pmap = vm_map_pmap(&l->l_proc->p_vmspace->vm_map);
 	struct pcb *pcb = lwp_getpcb(l);
 	struct trapframe *tf;
 #if NNPX > 0
 	/* If we were using the FPU, forget about it. */
 	if (pcb->pcb_fpcpu != NULL) {
 		npxsave_lwp(l, false);
+	}
 #endif
 #ifdef USER_LDT
 	pmap_ldt_cleanup(l);
 #endif
 	l->l_md.md_flags &= ~MDL_USEDFPU;
 	if (i386_use_fxsave) {
 		pcb->pcb_savefpu.sv_xmm.sv_env.en_cw = __NetBSD_NPXCW__;
 		pcb->pcb_savefpu.sv_xmm.sv_env.en_mxcsr = __INITIAL_MXCSR__;
 	} else
 		pcb->pcb_savefpu.sv_87.sv_env.en_cw = __NetBSD_NPXCW__;
 	memcpy(&pcb->pcb_fsd, &gdt[GUDATA_SEL], sizeof(pcb->pcb_fsd));
 	memcpy(&pcb->pcb_gsd, &gdt[GUDATA_SEL], sizeof(pcb->pcb_gsd));
 	tf = l->l_md.md_regs;
 #ifndef XEN
 	tf->tf_gs = GSEL(GUGS_SEL, SEL_UPL);
 	tf->tf_fs = GSEL(GUFS_SEL, SEL_UPL);
 #else
 	tf->tf_gs = LSEL(LUDATA_SEL, SEL_UPL);
 	tf->tf_fs = LSEL(LUDATA_SEL, SEL_UPL);
 #endif
 	tf->tf_es = LSEL(LUDATA_SEL, SEL_UPL);
 	tf->tf_ds = LSEL(LUDATA_SEL, SEL_UPL);
 	tf->tf_edi = 0;
 	tf->tf_esi = 0;
 	tf->tf_ebp = 0;
 	tf->tf_ebx = l->l_proc->p_psstrp;
 	tf->tf_edx = 0;
 	tf->tf_ecx = 0;
 	tf->tf_eax = 0;
 	tf->tf_eip = pack->ep_entry;
 	tf->tf_cs = pmap->pm_hiexec > I386_MAX_EXE_ADDR ?
 	    LSEL(LUCODEBIG_SEL, SEL_UPL) : LSEL(LUCODE_SEL, SEL_UPL);
 	tf->tf_eflags = PSL_USERSET;
 	tf->tf_esp = stack;
 	tf->tf_ss = LSEL(LUDATA_SEL, SEL_UPL);
+}
 /*
  * Initialize segments and descriptor tables
  */
 union	descriptor *gdt, *ldt;
 union	descriptor *pentium_idt;
 extern vaddr_t lwp0uarea;
 void
 setgate(struct gate_descriptor *gd, void *func, int args, int type, int dpl,
     int sel)
+{
 	gd->gd_looffset = (int)func;
 	gd->gd_selector = sel;
 	gd->gd_stkcpy = args;
 	gd->gd_xx = 0;
 	gd->gd_type = type;
 	gd->gd_dpl = dpl;
 	gd->gd_p = 1;
 	gd->gd_hioffset = (int)func >> 16;
+}
 void
 unsetgate(struct gate_descriptor *gd)
+{
 	gd->gd_p = 0;
 	gd->gd_hioffset = 0;
 	gd->gd_looffset = 0;
 	gd->gd_selector = 0;
 	gd->gd_xx = 0;
 	gd->gd_stkcpy = 0;
 	gd->gd_type = 0;
 	gd->gd_dpl = 0;
+}
 void
 setregion(struct region_descriptor *rd, void *base, size_t limit)
+{
 	rd->rd_limit = (int)limit;
 	rd->rd_base = (int)base;
+}
 void
 setsegment(struct segment_descriptor *sd, const void *base, size_t limit,
     int type, int dpl, int def32, int gran)
+{
 	sd->sd_lolimit = (int)limit;
 	sd->sd_lobase = (int)base;
 	sd->sd_type = type;
 	sd->sd_dpl = dpl;
 	sd->sd_p = 1;
 	sd->sd_hilimit = (int)limit >> 16;
 	sd->sd_xx = 0;
 	sd->sd_def32 = def32;
 	sd->sd_gran = gran;
 	sd->sd_hibase = (int)base >> 24;
+}
 #define	IDTVEC(name)	__CONCAT(X, name)
 typedef void (vector)(void);
 extern vector IDTVEC(syscall);
 extern vector IDTVEC(osyscall);
 extern vector *IDTVEC(exceptions)[];
 extern vector IDTVEC(svr4_fasttrap);
 void (*svr4_fasttrap_vec)(void) = (void (*)(void))nullop;
 krwlock_t svr4_fasttrap_lock;
 #ifdef XEN
 #define MAX_XEN_IDT 128
 trap_info_t xen_idt[MAX_XEN_IDT];
 int xen_idt_idx;
 #endif
 #ifndef XEN
 void cpu_init_idt(void)
+{
 	struct region_descriptor region;
 	setregion(&region, pentium_idt, NIDT * sizeof(idt[0]) - 1);
 	lidt(&region);
+}
 #endif /* !XEN */
 void
 initgdt(union descriptor *tgdt)
+{
 #ifdef XEN
 	u_long	frames[16];
 #else
 	struct region_descriptor region;
 	gdt = tgdt;
 	memset(gdt, 0, NGDT*sizeof(*gdt));
 #endif /* XEN */
 	/* make gdt gates and memory segments */
 	setsegment(&gdt[GCODE_SEL].sd, 0, 0xfffff, SDT_MEMERA, SEL_KPL, 1, 1);
 	setsegment(&gdt[GDATA_SEL].sd, 0, 0xfffff, SDT_MEMRWA, SEL_KPL, 1, 1);
 	setsegment(&gdt[GUCODE_SEL].sd, 0, x86_btop(I386_MAX_EXE_ADDR) - 1,
 	    SDT_MEMERA, SEL_UPL, 1, 1);
 	setsegment(&gdt[GUCODEBIG_SEL].sd, 0, 0xfffff,
 	    SDT_MEMERA, SEL_UPL, 1, 1);
 	setsegment(&gdt[GUDATA_SEL].sd, 0, 0xfffff,
 	    SDT_MEMRWA, SEL_UPL, 1, 1);
 #if NBIOSCALL > 0
 	/* bios trampoline GDT entries */
 	setsegment(&gdt[GBIOSCODE_SEL].sd, 0, 0xfffff, SDT_MEMERA, SEL_KPL, 0,
 );
 	setsegment(&gdt[GBIOSDATA_SEL].sd, 0, 0xfffff, SDT_MEMRWA, SEL_KPL, 0,
 );
 #endif
 	setsegment(&gdt[GCPU_SEL].sd, &cpu_info_primary, 0xfffff,
 	    SDT_MEMRWA, SEL_KPL, 1, 1);
 #ifndef XEN
 	setregion(&region, gdt, NGDT * sizeof(gdt[0]) - 1);
 	lgdt(&region);
 #else /* !XEN */
 	frames[0] = xpmap_ptom((uint32_t)gdt - KERNBASE) >> PAGE_SHIFT;
 	pmap_kenter_pa((vaddr_t)gdt, (uint32_t)gdt - KERNBASE, VM_PROT_READ, 0);
 	XENPRINTK(("loading gdt %lx, %d entries\n", frames[0] << PAGE_SHIFT,
 	    NGDT));
 	if (HYPERVISOR_set_gdt(frames, NGDT /* XXX is it right ? */))
 		panic("HYPERVISOR_set_gdt failed!\n");
 	lgdt_finish();
 #endif /* !XEN */
+}
 static void
 init386_msgbuf(void)
+{
 	/* Message buffer is located at end of core. */
 	struct vm_physseg *vps;
 	psize_t sz = round_page(MSGBUFSIZE);
 	psize_t reqsz = sz;
 	unsigned int x;
  search_again:
 	vps = NULL;
 	for (x = 0; x < vm_nphysseg; ++x) {
 		vps = VM_PHYSMEM_PTR(x);
 		if (ctob(vps->avail_end) == avail_end) {
 			break;
+		}
+	}
 	if (x == vm_nphysseg)
 		panic("init386: can't find end of memory");
 	/* Shrink so it'll fit in the last segment. */
 	if (vps->avail_end - vps->avail_start < atop(sz))
 		sz = ctob(vps->avail_end - vps->avail_start);
 	vps->avail_end -= atop(sz);
 	vps->end -= atop(sz);
 	msgbuf_p_seg[msgbuf_p_cnt].sz = sz;
 	msgbuf_p_seg[msgbuf_p_cnt++].paddr = ctob(vps->avail_end);
 	/* Remove the last segment if it now has no pages. */
 	if (vps->start == vps->end) {
 		for (--vm_nphysseg; x < vm_nphysseg; x++)
 			VM_PHYSMEM_PTR_SWAP(x, x + 1);
+	}
 	/* Now find where the new avail_end is. */
 	for (avail_end = 0, x = 0; x < vm_nphysseg; x++)
 		if (VM_PHYSMEM_PTR(x)->avail_end > avail_end)
 			avail_end = VM_PHYSMEM_PTR(x)->avail_end;
 	avail_end = ctob(avail_end);
 	if (sz == reqsz)
 		return;
 	reqsz -= sz;
 	if (msgbuf_p_cnt == VM_PHYSSEG_MAX) {
 		/* No more segments available, bail out. */
 		printf("WARNING: MSGBUFSIZE (%zu) too large, using %zu.\n",
 		    (size_t)MSGBUFSIZE, (size_t)(MSGBUFSIZE - reqsz));
 		return;
+	}
 	sz = reqsz;
 	goto search_again;
+}
 #ifndef XEN
 static void
 init386_pte0(void)
+{
 	paddr_t paddr;
 	vaddr_t vaddr;
 	paddr = 4 * PAGE_SIZE;
 	vaddr = (vaddr_t)vtopte(0);
 	pmap_kenter_pa(vaddr, paddr, VM_PROT_ALL, 0);
 	pmap_update(pmap_kernel());
 	/* make sure it is clean before using */
 	memset((void *)vaddr, 0, PAGE_SIZE);
+}
 #endif /* !XEN */
 static void
 init386_ksyms(void)
+{
 #if NKSYMS || defined(DDB) || defined(MODULAR)
 	extern int end;
 	struct btinfo_symtab *symtab;
 #ifdef DDB
 	db_machine_init();
 #endif
 #if defined(MULTIBOOT)
 	if (multiboot_ksyms_addsyms_elf())
 		return;
 #endif
 	if ((symtab = lookup_bootinfo(BTINFO_SYMTAB)) == NULL) {
 		ksyms_addsyms_elf(*(int *)&end, ((int *)&end) + 1, esym);
 		return;
+	}
 	symtab->ssym += KERNBASE;
 	symtab->esym += KERNBASE;
 	ksyms_addsyms_elf(symtab->nsym, (int *)symtab->ssym, (int *)symtab->esym);
 #endif
+}
 void
 init386(paddr_t first_avail)
+{
 	extern void consinit(void);
 	struct pcb *pcb;
 	int x;
 #ifndef XEN
 	union descriptor *tgdt;
 	extern struct extent *iomem_ex;
 	struct region_descriptor region;
 	struct btinfo_memmap *bim;
 #endif
 #if NBIOSCALL > 0
 	extern int biostramp_image_size;
 	extern u_char biostramp_image[];
 #endif
 #ifdef XEN
 	XENPRINTK(("HYPERVISOR_shared_info %p (%x)\n", HYPERVISOR_shared_info,
 	    xen_start_info.shared_info));
 	KASSERT(HYPERVISOR_shared_info != NULL);
 	cpu_info_primary.ci_vcpu = &HYPERVISOR_shared_info->vcpu_info[0];
 #endif
 	cpu_probe(&cpu_info_primary);
 	uvm_lwp_setuarea(&lwp0, lwp0uarea);
 	pcb = lwp_getpcb(&lwp0);
 	cpu_feature[0] &= ~CPUID_FEAT_BLACKLIST;
 	cpu_init_msrs(&cpu_info_primary, true);
 #ifdef PAE
 	i386_use_pae = 1;
 #endif
 #ifdef XEN
 	pcb->pcb_cr3 = PDPpaddr;
 	__PRINTK(("pcb_cr3 0x%lx cr3 0x%lx\n",
 	    PDPpaddr, xpmap_ptom(PDPpaddr)));
 	XENPRINTK(("lwp0uarea %p first_avail %p\n",
 	    lwp0uarea, (void *)(long)first_avail));
 	XENPRINTK(("ptdpaddr %p atdevbase %p\n", (void *)PDPpaddr,
 	    (void *)atdevbase));
 #endif
 #if defined(PAE) && !defined(XEN)
 	/*
 	 * Save VA and PA of L3 PD of boot processor (for Xen, this is done
 	 * in xen_pmap_bootstrap())
 	 */
 	cpu_info_primary.ci_pae_l3_pdirpa = rcr3();
 	cpu_info_primary.ci_pae_l3_pdir = (pd_entry_t *)(rcr3() + KERNBASE);
 #endif /* PAE && !XEN */
 #ifdef XBOX
 	/*
 	 * From Rink Springer @ FreeBSD:
+	 *
 	 * The following code queries the PCI ID of 0:0:0. For the XBOX,
 	 * This should be 0x10de / 0x02a5.
+	 *
 	 * This is exactly what Linux does.
 	 */
 	outl(0xcf8, 0x80000000);
 	if (inl(0xcfc) == 0x02a510de) {
 		arch_i386_is_xbox = 1;
 		xbox_lcd_init();
 		xbox_lcd_writetext("NetBSD/i386 ");
 		/*
 		 * We are an XBOX, but we may have either 64MB or 128MB of
 		 * memory. The PCI host bridge should be programmed for this,
 		 * so we just query it.
 		 */
 		outl(0xcf8, 0x80000084);
 		arch_i386_xbox_memsize = (inl(0xcfc) == 0x7FFFFFF) ? 128 : 64;
+	}
 #endif /* XBOX */
 #if NISA > 0 || NPCI > 0
 	x86_bus_space_init();
 #endif
 #ifdef XEN
 	xen_parse_cmdline(XEN_PARSE_BOOTFLAGS, NULL);
 #endif
 	/*
 	 * Initialize PAGE_SIZE-dependent variables.
 	 */
 	uvm_setpagesize();
 	/*
 	 * Saving SSE registers won't work if the save area isn't
 	 * 16-byte aligned.
 	 */
 	KASSERT((offsetof(struct pcb, pcb_savefpu) & 0xf) == 0);
 	/*
 	 * Start with 2 color bins -- this is just a guess to get us
 	 * started.  We'll recolor when we determine the largest cache
 	 * sizes on the system.
 	 */
 	uvmexp.ncolors = 2;
 #ifndef XEN
 	/*
 	 * Low memory reservations:
 	 * Page 0:	BIOS data
 	 * Page 1:	BIOS callback
 	 * Page 2:	MP bootstrap
 	 * Page 3:	ACPI wakeup code
 	 * Page 4:	Temporary page table for 0MB-4MB
 	 * Page 5:	Temporary page directory
 	 */
 	avail_start = 6 * PAGE_SIZE;
 #else /* !XEN */
 	/* steal one page for gdt */
 	gdt = (void *)((u_long)first_avail + KERNBASE);
 	first_avail += PAGE_SIZE;
 	/* Make sure the end of the space used by the kernel is rounded. */
 	first_avail = round_page(first_avail);
 	avail_start = first_avail;
 	avail_end = ctob(xen_start_info.nr_pages) + XPMAP_OFFSET;
 	pmap_pa_start = (KERNTEXTOFF - KERNBASE);
 	pmap_pa_end = avail_end;
 	mem_clusters[0].start = avail_start;
 	mem_clusters[0].size = avail_end - avail_start;
 	mem_cluster_cnt++;
 	physmem += xen_start_info.nr_pages;
 	uvmexp.wired += atop(avail_start);
 	/*
 	 * initgdt() has to be done before consinit(), so that %fs is properly
 	 * initialised. initgdt() uses pmap_kenter_pa so it can't be called
 	 * before the above variables are set.
 	 */
 	initgdt(NULL);
 #endif /* XEN */
 	consinit();	/* XXX SHOULD NOT BE DONE HERE */
 #ifdef DEBUG_MEMLOAD
 	printf("mem_cluster_count: %d\n", mem_cluster_cnt);
 #endif
 	/*
 	 * Call pmap initialization to make new kernel address space.
 	 * We must do this before loading pages into the VM system.
 	 */
 	pmap_bootstrap((vaddr_t)atdevbase + IOM_SIZE);
 #ifndef XEN
 	/*
 	 * Check to see if we have a memory map from the BIOS (passed
 	 * to us by the boot program.
 	 */
 	bim = lookup_bootinfo(BTINFO_MEMMAP);
 	if ((biosmem_implicit || (biosbasemem == 0 && biosextmem == 0)) &&
 	    bim != NULL && bim->num > 0)
 		initx86_parse_memmap(bim, iomem_ex);
 	/*
 	 * If the loop above didn't find any valid segment, fall back to
 	 * former code.
 	 */
 	if (mem_cluster_cnt == 0)
 		initx86_fake_memmap(iomem_ex);
 	initx86_load_memmap(first_avail);
 #else /* !XEN */
 	XENPRINTK(("load the memory cluster %p(%d) - %p(%ld)\n",
 	    (void *)(long)avail_start, (int)atop(avail_start),
 	    (void *)(long)avail_end, (int)atop(avail_end)));
 	uvm_page_physload(atop(avail_start), atop(avail_end),
 	    atop(avail_start), atop(avail_end),
 	    VM_FREELIST_DEFAULT);
 #endif /* !XEN */
 	init386_msgbuf();
 #ifndef XEN
 	/*
 	 * XXX Remove this
+	 *
 	 * Setup a temporary Page Table Entry to allow identity mappings of
 	 * the real mode address. This is required by:
 	 * - bioscall
 	 * - MP bootstrap
 	 * - ACPI wakecode
 	 */
 	init386_pte0();
 #if NBIOSCALL > 0
 	KASSERT(biostramp_image_size <= PAGE_SIZE);
 	pmap_kenter_pa((vaddr_t)BIOSTRAMP_BASE,	/* virtual */
 		       (paddr_t)BIOSTRAMP_BASE,	/* physical */
 		       VM_PROT_ALL, 0);		/* protection */
 	pmap_update(pmap_kernel());
 	memcpy((void *)BIOSTRAMP_BASE, biostramp_image, biostramp_image_size);
 	/* Needed early, for bioscall() and kvm86_call() */
 	cpu_info_primary.ci_pmap = pmap_kernel();
 #endif
 #endif /* !XEN */
 	pmap_kenter_pa(idt_vaddr, idt_paddr, VM_PROT_READ|VM_PROT_WRITE, 0);
 	pmap_update(pmap_kernel());
 	memset((void *)idt_vaddr, 0, PAGE_SIZE);
 #ifndef XEN
 	idt_init();
 	idt = (struct gate_descriptor *)idt_vaddr;
 	pmap_kenter_pa(pentium_idt_vaddr, idt_paddr, VM_PROT_READ, 0);
 	pmap_update(pmap_kernel());
 	pentium_idt = (union descriptor *)pentium_idt_vaddr;
 	tgdt = gdt;
 	gdt = (union descriptor *)
 		    ((char *)idt + NIDT * sizeof (struct gate_descriptor));
 	ldt = gdt + NGDT;
 	memcpy(gdt, tgdt, NGDT*sizeof(*gdt));
 	setsegment(&gdt[GLDT_SEL].sd, ldt, NLDT * sizeof(ldt[0]) - 1,
 	    SDT_SYSLDT, SEL_KPL, 0, 0);
 #else
 	HYPERVISOR_set_callbacks(
 	    GSEL(GCODE_SEL, SEL_KPL), (unsigned long)hypervisor_callback,
 	    GSEL(GCODE_SEL, SEL_KPL), (unsigned long)failsafe_callback);
 	ldt = (union descriptor *)idt_vaddr;
 #endif /* XEN */
 	/* make ldt gates and memory segments */
 	setgate(&ldt[LSYS5CALLS_SEL].gd, &IDTVEC(osyscall), 1,
 	    SDT_SYS386CGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
 	ldt[LUCODE_SEL] = gdt[GUCODE_SEL];
 	ldt[LUCODEBIG_SEL] = gdt[GUCODEBIG_SEL];
 	ldt[LUDATA_SEL] = gdt[GUDATA_SEL];
 	ldt[LSOL26CALLS_SEL] = ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
 #ifndef XEN
 	/* exceptions */
 	for (x = 0; x < 32; x++) {
 		idt_vec_reserve(x);
 		setgate(&idt[x], IDTVEC(exceptions)[x], 0, SDT_SYS386IGT,
 		    (x == 3 || x == 4) ? SEL_UPL : SEL_KPL,
 		    GSEL(GCODE_SEL, SEL_KPL));
+	}
 	/* new-style interrupt gate for syscalls */
 	idt_vec_reserve(128);
 	setgate(&idt[128], &IDTVEC(syscall), 0, SDT_SYS386IGT, SEL_UPL,
 	    GSEL(GCODE_SEL, SEL_KPL));
 	idt_vec_reserve(0xd2);
 	setgate(&idt[0xd2], &IDTVEC(svr4_fasttrap), 0, SDT_SYS386IGT,
 	    SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
 	setregion(&region, gdt, NGDT * sizeof(gdt[0]) - 1);
 	lgdt(&region);
 	cpu_init_idt();
 #else /* !XEN */
 	memset(xen_idt, 0, sizeof(trap_info_t) * MAX_XEN_IDT);
 	xen_idt_idx = 0;
 	for (x = 0; x < 32; x++) {
 		KASSERT(xen_idt_idx < MAX_XEN_IDT);
 		xen_idt[xen_idt_idx].vector = x;
 		switch (x) {
 		case 2:  /* NMI */
 		case 18: /* MCA */
 			TI_SET_IF(&(xen_idt[xen_idt_idx]), 2);
 			break;
 		case 3:
 		case 4:

 @@ -1,968 +1,968 @@
-/*	$NetBSD: npx.c,v 1.139 2010/12/20 00:25:35 matt Exp $	*/
+/*	$NetBSD: npx.c,v 1.140 2011/06/07 14:53:03 bouyer Exp $	*/
 /*-
  * Copyright (c) 2008 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software developed for The NetBSD Foundation
  * by Andrew Doran.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 /*-
  * Copyright (c) 1991 The Regents of the University of California.
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
  * 3. Neither the name of the University nor the names of its contributors
  *    may be used to endorse or promote products derived from this software
  *    without specific prior written permission.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
+ *
  *	@(#)npx.c	7.2 (Berkeley) 5/12/91
  */
 /*-
  * Copyright (c) 1994, 1995, 1998 Charles M. Hannum.  All rights reserved.
  * Copyright (c) 1990 William Jolitz.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
  * 3. All advertising materials mentioning features or use of this software
  *    must display the following acknowledgement:
  *	This product includes software developed by the University of
  *	California, Berkeley and its contributors.
  * 4. Neither the name of the University nor the names of its contributors
  *    may be used to endorse or promote products derived from this software
  *    without specific prior written permission.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
+ *
  *	@(#)npx.c	7.2 (Berkeley) 5/12/91
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: npx.c,v 1.139 2010/12/20 00:25:35 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: npx.c,v 1.140 2011/06/07 14:53:03 bouyer Exp $");
 #if 0
 #define IPRINTF(x)	printf x
 #else
 #define	IPRINTF(x)
 #endif
 #include "opt_multiprocessor.h"
 #include "opt_xen.h"
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/conf.h>
 #include <sys/file.h>
 #include <sys/proc.h>
 #include <sys/ioctl.h>
 #include <sys/device.h>
 #include <sys/vmmeter.h>
 #include <sys/kernel.h>
 #include <sys/bus.h>
 #include <sys/cpu.h>
 #include <sys/intr.h>
 #include <uvm/uvm_extern.h>
 #include <machine/cpufunc.h>
 #include <machine/cpuvar.h>
 #include <machine/pcb.h>
 #include <machine/trap.h>
 #include <machine/specialreg.h>
 #include <machine/pio.h>
 #include <machine/i8259.h>
 #include <dev/isa/isareg.h>
 #include <dev/isa/isavar.h>
 #include <i386/isa/npxvar.h>
 /*
  * 387 and 287 Numeric Coprocessor Extension (NPX) Driver.
+ *
  * We do lazy initialization and switching using the TS bit in cr0 and the
  * MDL_USEDFPU bit in mdlwp.
+ *
  * DNA exceptions are handled like this:
+ *
  * 1) If there is no NPX, return and go to the emulator.
  * 2) If someone else has used the NPX, save its state into that process's PCB.
  * 3a) If MDL_USEDFPU is not set, set it and initialize the NPX.
  * 3b) Otherwise, reload the process's previous NPX state.
+ *
  * When a process is created or exec()s, its saved cr0 image has the TS bit
  * set and the MDL_USEDFPU bit clear.  The MDL_USEDFPU bit is set when the
  * process first gets a DNA and the NPX is initialized.  The TS bit is turned
  * off when the NPX is used, and turned on again later when the process's NPX
  * state is saved.
  */
 static int	x86fpflags_to_ksiginfo(uint32_t flags);
 static int	npxdna(struct cpu_info *);
 #ifdef XEN
-#define	clts()
+#define	clts() HYPERVISOR_fpu_taskswitch(0)
-#define	stts()
+#define	stts() HYPERVISOR_fpu_taskswitch(1)
 #endif
 static	enum npx_type		npx_type;
 volatile u_int			npx_intrs_while_probing;
 volatile u_int			npx_traps_while_probing;
 extern int i386_fpu_present;
 extern int i386_fpu_exception;
 extern int i386_fpu_fdivbug;
 struct npx_softc		*npx_softc;
 static inline void
 fpu_save(union savefpu *addr)
+{
 	if (i386_use_fxsave)
+	{
                 fxsave(&addr->sv_xmm);
 		/* FXSAVE doesn't FNINIT like FNSAVE does -- so do it here. */
 		fninit();
 	} else
 		fnsave(&addr->sv_87);
+}
 static int
 npxdna_empty(struct cpu_info *ci)
+{
 #ifndef XEN
 	panic("npxdna vector not initialized");
 #endif
 	return 0;
+}
 int    (*npxdna_func)(struct cpu_info *) = npxdna_empty;
 #ifndef XEN
 /*
  * This calls i8259_* directly, but currently we can count on systems
  * having a i8259 compatible setup all the time. Maybe have to change
  * that in the future.
  */
 enum npx_type
 npxprobe1(bus_space_tag_t iot, bus_space_handle_t ioh, int irq)
+{
 	struct gate_descriptor save_idt_npxintr;
 	struct gate_descriptor save_idt_npxtrap;
 	enum npx_type rv = NPX_NONE;
 	u_long	save_eflags;
 	int control;
 	int status;
 	unsigned irqmask;
 	if (cpu_feature[0] & CPUID_FPU) {
 		i386_fpu_exception = 1;
 		return NPX_CPUID;
+	}
 	save_eflags = x86_read_psl();
 	x86_disable_intr();
 	save_idt_npxintr = idt[NRSVIDT + irq];
 	save_idt_npxtrap = idt[16];
 	setgate(&idt[NRSVIDT + irq], probeintr, 0, SDT_SYS386IGT, SEL_KPL,
 	    GSEL(GCODE_SEL, SEL_KPL));
 	setgate(&idt[16], probetrap, 0, SDT_SYS386TGT, SEL_KPL,
 	    GSEL(GCODE_SEL, SEL_KPL));
 	irqmask = i8259_setmask(~((1 << IRQ_SLAVE) | (1 << irq)));
 	/*
 	 * Partially reset the coprocessor, if any.  Some BIOS's don't reset
 	 * it after a warm boot.
 	 */
 	/* full reset on some systems, NOP on others */
 	bus_space_write_1(iot, ioh, 1, 0);
 	delay(1000);
 	/* clear BUSY# latch */
 	bus_space_write_1(iot, ioh, 0, 0);
 	/*
 	 * We set CR0 in locore to trap all ESC and WAIT instructions.
 	 * We have to turn off the CR0_EM bit temporarily while probing.
 	 */
 	lcr0(rcr0() & ~(CR0_EM|CR0_TS));
 	x86_enable_intr();
 	/*
 	 * Finish resetting the coprocessor, if any.  If there is an error
 	 * pending, then we may get a bogus IRQ13, but probeintr() will handle
 	 * it OK.  Bogus halts have never been observed, but we enabled
 	 * IRQ13 and cleared the BUSY# latch early to handle them anyway.
 	 */
 	fninit();
 	delay(1000);		/* wait for any IRQ13 (fwait might hang) */
 	/*
 	 * Check for a status of mostly zero.
 	 */
 	status = 0x5a5a;
 	fnstsw(&status);
 	if ((status & 0xb8ff) == 0) {
 		/*
 		 * Good, now check for a proper control word.
 		 */
 		control = 0x5a5a;
 		fnstcw(&control);
 		if ((control & 0x1f3f) == 0x033f) {
 			/*
 			 * We have an npx, now divide by 0 to see if exception
 			 * 16 works.
 			 */
 			control &= ~(1 << 2);	/* enable divide by 0 trap */
 			fldcw(&control);
 			npx_traps_while_probing = npx_intrs_while_probing = 0;
 			fp_divide_by_0();
 			if (npx_traps_while_probing != 0) {
 				/*
 				 * Good, exception 16 works.
 				 */
 				rv = NPX_EXCEPTION;
 				i386_fpu_exception = 1;
 			} else if (npx_intrs_while_probing != 0) {
 				/*
 				 * Bad, we are stuck with IRQ13.
 				 */
 				rv = NPX_INTERRUPT;
 			} else {
 				/*
 				 * Worse, even IRQ13 is broken.  Use emulator.
 				 */
 				rv = NPX_BROKEN;
+			}
+		}
+	}
 	x86_disable_intr();
 	lcr0(rcr0() | (CR0_EM|CR0_TS));
 	irqmask = i8259_setmask(irqmask);
 	idt[NRSVIDT + irq] = save_idt_npxintr;
 	idt[16] = save_idt_npxtrap;
 	x86_write_psl(save_eflags);
 	return (rv);
+}
 void npxinit(struct cpu_info *ci)
+{
 	lcr0(rcr0() & ~(CR0_EM|CR0_TS));
 	fninit();
 	if (npx586bug1(4195835, 3145727) != 0) {
 		i386_fpu_fdivbug = 1;
 		aprint_normal_dev(ci->ci_dev,
 		    "WARNING: Pentium FDIV bug detected!\n");
+	}
 	lcr0(rcr0() | (CR0_TS));
+}
 #endif
 /*
  * Common attach routine.
  */
 void
 npxattach(struct npx_softc *sc)
+{
 	npx_softc = sc;
 	npx_type = sc->sc_type;
 #ifndef XEN
 	npxinit(&cpu_info_primary);
 #endif
 	i386_fpu_present = 1;
 	npxdna_func = npxdna;
 	if (!pmf_device_register(sc->sc_dev, NULL, NULL))
 		aprint_error_dev(sc->sc_dev, "couldn't establish power handler\n");
+}
 int
 npxdetach(device_t self, int flags)
+{
 	struct npx_softc *sc = device_private(self);
 	if (sc->sc_type == NPX_INTERRUPT)
 		return EBUSY;
 	pmf_device_deregister(self);
 	return 0;
+}
 /*
  * Record the FPU state and reinitialize it all except for the control word.
  * Then generate a SIGFPE.
+ *
  * Reinitializing the state allows naive SIGFPE handlers to longjmp without
  * doing any fixups.
+ *
  * XXX there is currently no way to pass the full error state to signal
  * handlers, and if this is a nested interrupt there is no way to pass even
  * a status code!  So there is no way to have a non-naive SIGFPE handler.  At
  * best a handler could do an fninit followed by an fldcw of a static value.
  * fnclex would be of little use because it would leave junk on the FPU stack.
  * Returning from the handler would be even less safe than usual because
  * IRQ13 exception handling makes exceptions even less precise than usual.
  */
 int
 npxintr(void *arg, struct intrframe *frame)
+{
 	struct cpu_info *ci = curcpu();
 	struct lwp *l = ci->ci_fpcurlwp;
 	union savefpu *addr;
 	struct npx_softc *sc;
 	struct pcb *pcb;
 	ksiginfo_t ksi;
 	sc = npx_softc;
 	kpreempt_disable();
 #ifndef XEN
 	KASSERT((x86_read_psl() & PSL_I) == 0);
 	x86_enable_intr();
 #endif
 	curcpu()->ci_data.cpu_ntrap++;
 	IPRINTF(("%s: fp intr\n", device_xname(ci->ci_dev)));
 #ifndef XEN
 	/*
 	 * Clear the interrupt latch.
 	 */
 	if (sc->sc_type == NPX_INTERRUPT)
 		bus_space_write_1(sc->sc_iot, sc->sc_ioh, 0, 0);
 #endif
 	/*
 	 * If we're saving, ignore the interrupt.  The FPU will generate
 	 * another one when we restore the state later.
 	 */
 	if (ci->ci_fpsaving) {
 		kpreempt_enable();
 		return (1);
+	}
 	if (l == NULL || npx_type == NPX_NONE) {
 		printf("npxintr: l = %p, curproc = %p, npx_type = %d\n",
 		    l, curproc, npx_type);
 		printf("npxintr: came from nowhere");
 		kpreempt_enable();
 		return 1;
+	}
 	/*
 	 * At this point, fpcurlwp should be curlwp.  If it wasn't, the TS
 	 * bit should be set, and we should have gotten a DNA exception.
 	 */
 	KASSERT(l == curlwp);
 	pcb = lwp_getpcb(l);
 	/*
 	 * Find the address of fpcurproc's saved FPU state.  (Given the
 	 * invariant above, this is always the one in curpcb.)
 	 */
 	addr = &pcb->pcb_savefpu;
 	/*
 	 * Save state.  This does an implied fninit.  It had better not halt
 	 * the CPU or we'll hang.
 	 */
 	fpu_save(addr);
 	fwait();
         if (i386_use_fxsave) {
 		fldcw(&addr->sv_xmm.sv_env.en_cw);
 		/*
 		 * FNINIT doesn't affect MXCSR or the XMM registers;
 		 * no need to re-load MXCSR here.
 		 */
         } else
                 fldcw(&addr->sv_87.sv_env.en_cw);
 	fwait();
 	/*
 	 * Remember the exception status word and tag word.  The current
 	 * (almost fninit'ed) fpu state is in the fpu and the exception
 	 * state just saved will soon be junk.  However, the implied fninit
 	 * doesn't change the error pointers or register contents, and we
 	 * preserved the control word and will copy the status and tag
 	 * words, so the complete exception state can be recovered.
 	 */
         if (i386_use_fxsave) {
 		addr->sv_xmm.sv_ex_sw = addr->sv_xmm.sv_env.en_sw;
 		addr->sv_xmm.sv_ex_tw = addr->sv_xmm.sv_env.en_tw;
 	} else {
 		addr->sv_87.sv_ex_sw = addr->sv_87.sv_env.en_sw;
 		addr->sv_87.sv_ex_tw = addr->sv_87.sv_env.en_tw;
+	}
 	/*
 	 * Pass exception to process.
 	 */
 	if (USERMODE(frame->if_cs, frame->if_eflags)) {
 		/*
 		 * Interrupt is essentially a trap, so we can afford to call
 		 * the SIGFPE handler (if any) as soon as the interrupt
 		 * returns.
+		 *
 		 * XXX little or nothing is gained from this, and plenty is
 		 * lost - the interrupt frame has to contain the trap frame
 		 * (this is otherwise only necessary for the rescheduling trap
 		 * in doreti, and the frame for that could easily be set up
 		 * just before it is used).
 		 */
 		l->l_md.md_regs = (struct trapframe *)&frame->if_gs;
 		KSI_INIT_TRAP(&ksi);
 		ksi.ksi_signo = SIGFPE;
 		ksi.ksi_addr = (void *)frame->if_eip;
 		/*
 		 * Encode the appropriate code for detailed information on
 		 * this exception.
 		 */
 		if (i386_use_fxsave) {
 			ksi.ksi_code =
 				x86fpflags_to_ksiginfo(addr->sv_xmm.sv_ex_sw);
 			ksi.ksi_trap = (int)addr->sv_xmm.sv_ex_sw;
 		} else {
 			ksi.ksi_code =
 				x86fpflags_to_ksiginfo(addr->sv_87.sv_ex_sw);
 			ksi.ksi_trap = (int)addr->sv_87.sv_ex_sw;
+		}
 		trapsignal(l, &ksi);
 	} else {
 		/*
 		 * This is a nested interrupt.  This should only happen when
 		 * an IRQ13 occurs at the same time as a higher-priority
 		 * interrupt.
+		 *
 		 * XXX
 		 * Currently, we treat this like an asynchronous interrupt, but
 		 * this has disadvantages.
 		 */
 		mutex_enter(proc_lock);
 		psignal(l->l_proc, SIGFPE);
 		mutex_exit(proc_lock);
+	}
 	kpreempt_enable();
 	return (1);
+}
 /* map x86 fp flags to ksiginfo fp codes 		*/
 /* see table 8-4 of the IA-32 Intel Architecture	*/
 /* Software Developer's Manual, Volume 1		*/
 /* XXX punting on the stack fault with FLTINV		*/
 static int
 x86fpflags_to_ksiginfo(uint32_t flags)
+{
 	int i;
 	static int x86fp_ksiginfo_table[] = {
 		FPE_FLTINV, /* bit 0 - invalid operation */
 		FPE_FLTRES, /* bit 1 - denormal operand */
 		FPE_FLTDIV, /* bit 2 - divide by zero	*/
 		FPE_FLTOVF, /* bit 3 - fp overflow	*/
 		FPE_FLTUND, /* bit 4 - fp underflow	*/
 		FPE_FLTRES, /* bit 5 - fp precision	*/
 		FPE_FLTINV, /* bit 6 - stack fault	*/
 	};
 	for(i=0;i < sizeof(x86fp_ksiginfo_table)/sizeof(int); i++) {
 		if (flags & (1 << i))
 			return(x86fp_ksiginfo_table[i]);
+	}
 	/* punt if flags not set */
 	return(0);
+}
 /*
  * Implement device not available (DNA) exception
+ *
  * If we were the last lwp to use the FPU, we can simply return.
  * Otherwise, we save the previous state, if necessary, and restore
  * our last saved state.
  */
 static int
 npxdna(struct cpu_info *ci)
+{
 	struct lwp *l, *fl;
 	struct pcb *pcb;
 	int s;
 	if (ci->ci_fpsaving) {
 		/* Recursive trap. */
 		return 1;
+	}
 	/* Lock out IPIs and disable preemption. */
 	s = splhigh();
 #ifndef XEN
 	x86_enable_intr();
 #endif
 	/* Save state on current CPU. */
 	l = ci->ci_curlwp;
 	pcb = lwp_getpcb(l);
 	fl = ci->ci_fpcurlwp;
 	if (fl != NULL) {
 		/*
 		 * It seems we can get here on Xen even if we didn't
 		 * switch lwp.  In this case do nothing
 		 */
 		if (fl == l) {
 			KASSERT(pcb->pcb_fpcpu == ci);
 			ci->ci_fpused = 1;
 			clts();
 			splx(s);
 			return 1;
+		}
 		KASSERT(fl != l);
 		npxsave_cpu(true);
 		KASSERT(ci->ci_fpcurlwp == NULL);
+	}
 	/* Save our state if on a remote CPU. */
 	if (pcb->pcb_fpcpu != NULL) {
 		/* Explicitly disable preemption before dropping spl. */
 		KPREEMPT_DISABLE(l);
 		splx(s);
 		npxsave_lwp(l, true);
 		KASSERT(pcb->pcb_fpcpu == NULL);
 		s = splhigh();
 		KPREEMPT_ENABLE(l);
+	}
 	/*
 	 * Restore state on this CPU, or initialize.  Ensure that
 	 * the entire update is atomic with respect to FPU-sync IPIs.
 	 */
 	clts();
 	ci->ci_fpcurlwp = l;
 	pcb->pcb_fpcpu = ci;
 	ci->ci_fpused = 1;
 	if ((l->l_md.md_flags & MDL_USEDFPU) == 0) {
 		fninit();
 		if (i386_use_fxsave) {
 			fldcw(&pcb->pcb_savefpu.
 			    sv_xmm.sv_env.en_cw);
 		} else {
 			fldcw(&pcb->pcb_savefpu.
 			    sv_87.sv_env.en_cw);
+		}
 		l->l_md.md_flags |= MDL_USEDFPU;
 	} else if (i386_use_fxsave) {
 		/*
 		 * AMD FPU's do not restore FIP, FDP, and FOP on fxrstor,
 		 * leaking other process's execution history. Clear them
 		 * manually.
 		 */
 		static const double zero = 0.0;
 		int status;
 		/*
 		 * Clear the ES bit in the x87 status word if it is currently
 		 * set, in order to avoid causing a fault in the upcoming load.
 		 */
 		fnstsw(&status);
 		if (status & 0x80)
 			fnclex();
 		/*
 		 * Load the dummy variable into the x87 stack.  This mangles
 		 * the x87 stack, but we don't care since we're about to call
 		 * fxrstor() anyway.
 		 */
 		fldummy(&zero);
 		fxrstor(&pcb->pcb_savefpu.sv_xmm);
 	} else {
 		frstor(&pcb->pcb_savefpu.sv_87);
+	}
 	KASSERT(ci == curcpu());
 	splx(s);
 	return 1;
+}
 /*
  * Save current CPU's FPU state.  Must be called at IPL_HIGH.
  */
 void
 npxsave_cpu(bool save)
+{
 	struct cpu_info *ci;
 	struct lwp *l;
 	struct pcb *pcb;
 	KASSERT(curcpu()->ci_ilevel == IPL_HIGH);
 	ci = curcpu();
 	l = ci->ci_fpcurlwp;
 	if (l == NULL)
 		return;
 	pcb = lwp_getpcb(l);
 	if (save) {
 		 /*
 		  * Set ci->ci_fpsaving, so that any pending exception will
 		  * be thrown away.  It will be caught again if/when the
 		  * FPU state is restored.
 		  */
 		KASSERT(ci->ci_fpsaving == 0);
 		clts();
 		ci->ci_fpsaving = 1;
 		if (i386_use_fxsave) {
 			fxsave(&pcb->pcb_savefpu.sv_xmm);
 		} else {
 			fnsave(&pcb->pcb_savefpu.sv_87);
+		}
 		ci->ci_fpsaving = 0;
+	}
 	stts();
 	pcb->pcb_fpcpu = NULL;
 	ci->ci_fpcurlwp = NULL;
 	ci->ci_fpused = 1;
+}
 /*
  * Save l's FPU state, which may be on this processor or another processor.
  * It may take some time, so we avoid disabling preemption where possible.
  * Caller must know that the target LWP is stopped, otherwise this routine
  * may race against it.
  */
 void
 npxsave_lwp(struct lwp *l, bool save)
+{
 	struct cpu_info *oci;
 	struct pcb *pcb;
 	int s, spins, ticks;
 	spins = 0;
 	ticks = hardclock_ticks;
 	for (;;) {
 		s = splhigh();
 		pcb = lwp_getpcb(l);
 		oci = pcb->pcb_fpcpu;
 		if (oci == NULL) {
 			splx(s);
 			break;
+		}
 		if (oci == curcpu()) {
 			KASSERT(oci->ci_fpcurlwp == l);
 			npxsave_cpu(save);
 			splx(s);
 			break;
+		}
 		splx(s);
 		x86_send_ipi(oci, X86_IPI_SYNCH_FPU);
 		while (pcb->pcb_fpcpu == oci &&
 		    ticks == hardclock_ticks) {
 			x86_pause();
 			spins++;
+		}
 		if (spins > 100000000) {
 			panic("npxsave_lwp: did not");
+		}
+	}
 	if (!save) {
 		/* Ensure we restart with a clean slate. */
 	 	l->l_md.md_flags &= ~MDL_USEDFPU;
+	}
+}
 /*
  * The following mechanism is used to ensure that the FPE_... value
  * that is passed as a trapcode to the signal handler of the user
  * process does not have more than one bit set.
+ *
  * Multiple bits may be set if the user process modifies the control
  * word while a status word bit is already set.  While this is a sign
  * of bad coding, we have no choise than to narrow them down to one
  * bit, since we must not send a trapcode that is not exactly one of
  * the FPE_ macros.
+ *
  * The mechanism has a static table with 127 entries.  Each combination
  * of the 7 FPU status word exception bits directly translates to a
  * position in this table, where a single FPE_... value is stored.
  * This FPE_... value stored there is considered the "most important"
  * of the exception bits and will be sent as the signal code.  The
  * precedence of the bits is based upon Intel Document "Numerical
  * Applications", Chapter "Special Computational Situations".
+ *
  * The macro to choose one of these values does these steps: 1) Throw
  * away status word bits that cannot be masked.  2) Throw away the bits
  * currently masked in the control word, assuming the user isn't
  * interested in them anymore.  3) Reinsert status word bit 7 (stack
  * fault) if it is set, which cannot be masked but must be presered.
  * 4) Use the remaining bits to point into the trapcode table.
+ *
  * The 6 maskable bits in order of their preference, as stated in the
  * above referenced Intel manual:
  * 1  Invalid operation (FP_X_INV)
  * 1a   Stack underflow
  * 1b   Stack overflow
  * 1c   Operand of unsupported format
  * 1d   SNaN operand.
  * 2  QNaN operand (not an exception, irrelavant here)
  * 3  Any other invalid-operation not mentioned above or zero divide
  *      (FP_X_INV, FP_X_DZ)
  * 4  Denormal operand (FP_X_DNML)
  * 5  Numeric over/underflow (FP_X_OFL, FP_X_UFL)
  * 6  Inexact result (FP_X_IMP)
  */
 static const uint8_t fpetable[128] = {
 ,
 	FPE_FLTINV,	/*  1 - INV */
 	FPE_FLTUND,	/*  2 - DNML */
 	FPE_FLTINV,	/*  3 - INV | DNML */
 	FPE_FLTDIV,	/*  4 - DZ */
 	FPE_FLTINV,	/*  5 - INV | DZ */
 	FPE_FLTDIV,	/*  6 - DNML | DZ */
 	FPE_FLTINV,	/*  7 - INV | DNML | DZ */
 	FPE_FLTOVF,	/*  8 - OFL */
 	FPE_FLTINV,	/*  9 - INV | OFL */
 	FPE_FLTUND,	/*  A - DNML | OFL */
 	FPE_FLTINV,	/*  B - INV | DNML | OFL */
 	FPE_FLTDIV,	/*  C - DZ | OFL */
 	FPE_FLTINV,	/*  D - INV | DZ | OFL */
 	FPE_FLTDIV,	/*  E - DNML | DZ | OFL */
 	FPE_FLTINV,	/*  F - INV | DNML | DZ | OFL */
 	FPE_FLTUND,	/* 10 - UFL */
 	FPE_FLTINV,	/* 11 - INV | UFL */
 	FPE_FLTUND,	/* 12 - DNML | UFL */
 	FPE_FLTINV,	/* 13 - INV | DNML | UFL */
 	FPE_FLTDIV,	/* 14 - DZ | UFL */
 	FPE_FLTINV,	/* 15 - INV | DZ | UFL */
 	FPE_FLTDIV,	/* 16 - DNML | DZ | UFL */
 	FPE_FLTINV,	/* 17 - INV | DNML | DZ | UFL */
 	FPE_FLTOVF,	/* 18 - OFL | UFL */
 	FPE_FLTINV,	/* 19 - INV | OFL | UFL */
 	FPE_FLTUND,	/* 1A - DNML | OFL | UFL */
 	FPE_FLTINV,	/* 1B - INV | DNML | OFL | UFL */
 	FPE_FLTDIV,	/* 1C - DZ | OFL | UFL */
 	FPE_FLTINV,	/* 1D - INV | DZ | OFL | UFL */
 	FPE_FLTDIV,	/* 1E - DNML | DZ | OFL | UFL */
 	FPE_FLTINV,	/* 1F - INV | DNML | DZ | OFL | UFL */
 	FPE_FLTRES,	/* 20 - IMP */
 	FPE_FLTINV,	/* 21 - INV | IMP */
 	FPE_FLTUND,	/* 22 - DNML | IMP */
 	FPE_FLTINV,	/* 23 - INV | DNML | IMP */
 	FPE_FLTDIV,	/* 24 - DZ | IMP */
 	FPE_FLTINV,	/* 25 - INV | DZ | IMP */
 	FPE_FLTDIV,	/* 26 - DNML | DZ | IMP */
 	FPE_FLTINV,	/* 27 - INV | DNML | DZ | IMP */
 	FPE_FLTOVF,	/* 28 - OFL | IMP */
 	FPE_FLTINV,	/* 29 - INV | OFL | IMP */
 	FPE_FLTUND,	/* 2A - DNML | OFL | IMP */
 	FPE_FLTINV,	/* 2B - INV | DNML | OFL | IMP */
 	FPE_FLTDIV,	/* 2C - DZ | OFL | IMP */
 	FPE_FLTINV,	/* 2D - INV | DZ | OFL | IMP */
 	FPE_FLTDIV,	/* 2E - DNML | DZ | OFL | IMP */
 	FPE_FLTINV,	/* 2F - INV | DNML | DZ | OFL | IMP */
 	FPE_FLTUND,	/* 30 - UFL | IMP */
 	FPE_FLTINV,	/* 31 - INV | UFL | IMP */
 	FPE_FLTUND,	/* 32 - DNML | UFL | IMP */
 	FPE_FLTINV,	/* 33 - INV | DNML | UFL | IMP */
 	FPE_FLTDIV,	/* 34 - DZ | UFL | IMP */
 	FPE_FLTINV,	/* 35 - INV | DZ | UFL | IMP */
 	FPE_FLTDIV,	/* 36 - DNML | DZ | UFL | IMP */
 	FPE_FLTINV,	/* 37 - INV | DNML | DZ | UFL | IMP */
 	FPE_FLTOVF,	/* 38 - OFL | UFL | IMP */
 	FPE_FLTINV,	/* 39 - INV | OFL | UFL | IMP */
 	FPE_FLTUND,	/* 3A - DNML | OFL | UFL | IMP */
 	FPE_FLTINV,	/* 3B - INV | DNML | OFL | UFL | IMP */
 	FPE_FLTDIV,	/* 3C - DZ | OFL | UFL | IMP */
 	FPE_FLTINV,	/* 3D - INV | DZ | OFL | UFL | IMP */
 	FPE_FLTDIV,	/* 3E - DNML | DZ | OFL | UFL | IMP */
 	FPE_FLTINV,	/* 3F - INV | DNML | DZ | OFL | UFL | IMP */
 	FPE_FLTSUB,	/* 40 - STK */
 	FPE_FLTSUB,	/* 41 - INV | STK */
 	FPE_FLTUND,	/* 42 - DNML | STK */
 	FPE_FLTSUB,	/* 43 - INV | DNML | STK */
 	FPE_FLTDIV,	/* 44 - DZ | STK */
 	FPE_FLTSUB,	/* 45 - INV | DZ | STK */
 	FPE_FLTDIV,	/* 46 - DNML | DZ | STK */
 	FPE_FLTSUB,	/* 47 - INV | DNML | DZ | STK */
 	FPE_FLTOVF,	/* 48 - OFL | STK */
 	FPE_FLTSUB,	/* 49 - INV | OFL | STK */
 	FPE_FLTUND,	/* 4A - DNML | OFL | STK */
 	FPE_FLTSUB,	/* 4B - INV | DNML | OFL | STK */
 	FPE_FLTDIV,	/* 4C - DZ | OFL | STK */
 	FPE_FLTSUB,	/* 4D - INV | DZ | OFL | STK */
 	FPE_FLTDIV,	/* 4E - DNML | DZ | OFL | STK */
 	FPE_FLTSUB,	/* 4F - INV | DNML | DZ | OFL | STK */
 	FPE_FLTUND,	/* 50 - UFL | STK */
 	FPE_FLTSUB,	/* 51 - INV | UFL | STK */
 	FPE_FLTUND,	/* 52 - DNML | UFL | STK */
 	FPE_FLTSUB,	/* 53 - INV | DNML | UFL | STK */
 	FPE_FLTDIV,	/* 54 - DZ | UFL | STK */
 	FPE_FLTSUB,	/* 55 - INV | DZ | UFL | STK */
 	FPE_FLTDIV,	/* 56 - DNML | DZ | UFL | STK */
 	FPE_FLTSUB,	/* 57 - INV | DNML | DZ | UFL | STK */
 	FPE_FLTOVF,	/* 58 - OFL | UFL | STK */
 	FPE_FLTSUB,	/* 59 - INV | OFL | UFL | STK */
 	FPE_FLTUND,	/* 5A - DNML | OFL | UFL | STK */
 	FPE_FLTSUB,	/* 5B - INV | DNML | OFL | UFL | STK */
 	FPE_FLTDIV,	/* 5C - DZ | OFL | UFL | STK */
 	FPE_FLTSUB,	/* 5D - INV | DZ | OFL | UFL | STK */
 	FPE_FLTDIV,	/* 5E - DNML | DZ | OFL | UFL | STK */
 	FPE_FLTSUB,	/* 5F - INV | DNML | DZ | OFL | UFL | STK */
 	FPE_FLTRES,	/* 60 - IMP | STK */
 	FPE_FLTSUB,	/* 61 - INV | IMP | STK */
 	FPE_FLTUND,	/* 62 - DNML | IMP | STK */
 	FPE_FLTSUB,	/* 63 - INV | DNML | IMP | STK */
 	FPE_FLTDIV,	/* 64 - DZ | IMP | STK */
 	FPE_FLTSUB,	/* 65 - INV | DZ | IMP | STK */
 	FPE_FLTDIV,	/* 66 - DNML | DZ | IMP | STK */
 	FPE_FLTSUB,	/* 67 - INV | DNML | DZ | IMP | STK */
 	FPE_FLTOVF,	/* 68 - OFL | IMP | STK */
 	FPE_FLTSUB,	/* 69 - INV | OFL | IMP | STK */
 	FPE_FLTUND,	/* 6A - DNML | OFL | IMP | STK */
 	FPE_FLTSUB,	/* 6B - INV | DNML | OFL | IMP | STK */
 	FPE_FLTDIV,	/* 6C - DZ | OFL | IMP | STK */
 	FPE_FLTSUB,	/* 6D - INV | DZ | OFL | IMP | STK */
 	FPE_FLTDIV,	/* 6E - DNML | DZ | OFL | IMP | STK */
 	FPE_FLTSUB,	/* 6F - INV | DNML | DZ | OFL | IMP | STK */
 	FPE_FLTUND,	/* 70 - UFL | IMP | STK */
 	FPE_FLTSUB,	/* 71 - INV | UFL | IMP | STK */
 	FPE_FLTUND,	/* 72 - DNML | UFL | IMP | STK */
 	FPE_FLTSUB,	/* 73 - INV | DNML | UFL | IMP | STK */
 	FPE_FLTDIV,	/* 74 - DZ | UFL | IMP | STK */
 	FPE_FLTSUB,	/* 75 - INV | DZ | UFL | IMP | STK */
 	FPE_FLTDIV,	/* 76 - DNML | DZ | UFL | IMP | STK */
 	FPE_FLTSUB,	/* 77 - INV | DNML | DZ | UFL | IMP | STK */
 	FPE_FLTOVF,	/* 78 - OFL | UFL | IMP | STK */
 	FPE_FLTSUB,	/* 79 - INV | OFL | UFL | IMP | STK */
 	FPE_FLTUND,	/* 7A - DNML | OFL | UFL | IMP | STK */
 	FPE_FLTSUB,	/* 7B - INV | DNML | OFL | UFL | IMP | STK */
 	FPE_FLTDIV,	/* 7C - DZ | OFL | UFL | IMP | STK */
 	FPE_FLTSUB,	/* 7D - INV | DZ | OFL | UFL | IMP | STK */
 	FPE_FLTDIV,	/* 7E - DNML | DZ | OFL | UFL | IMP | STK */
 	FPE_FLTSUB,	/* 7F - INV | DNML | DZ | OFL | UFL | IMP | STK */
 };
 #define GET_FPU_CW(pcb) \
     (i386_use_fxsave ? \
 	pcb->pcb_savefpu.sv_xmm.sv_env.en_cw : \
 	pcb->pcb_savefpu.sv_87.sv_env.en_cw)
 #define GET_FPU_SW(pcb) \
     (i386_use_fxsave ? \
 	pcb->pcb_savefpu.sv_xmm.sv_env.en_sw : \
 	pcb->pcb_savefpu.sv_87.sv_env.en_sw)
 /*
  * Preserve the FP status word, clear FP exceptions, then generate a SIGFPE.
+ *
  * Clearing exceptions is necessary mainly to avoid IRQ13 bugs.  We now
  * depend on longjmp() restoring a usable state.  Restoring the state
  * or examining it might fail if we didn't clear exceptions.
+ *
  * The error code chosen will be one of the FPE_... macros. It will be
  * sent as the second argument to old BSD-style signal handlers and as
  * "siginfo_t->si_code" (second argument) to SA_SIGINFO signal handlers.
+ *
  * XXX the FP state is not preserved across signal handlers.  So signal
  * handlers cannot afford to do FP unless they preserve the state or
  * longjmp() out.  Both preserving the state and longjmp()ing may be
  * destroyed by IRQ13 bugs.  Clearing FP exceptions is not an acceptable
  * solution for signals other than SIGFPE.
  */
 int
 npxtrap(struct lwp *l)
+{
 	u_short control, status;
 	struct cpu_info *ci = curcpu();
 	struct lwp *fl = ci->ci_fpcurlwp;
 	if (!i386_fpu_present) {
 		printf("%s: fpcurthread = %p, curthread = %p, npx_type = %d\n",
 		    __func__, fl, l, npx_type);
 		panic("npxtrap from nowhere");
+	}
 	kpreempt_disable();
 	/*
 	 * Interrupt handling (for another interrupt) may have pushed the
 	 * state to memory.  Fetch the relevant parts of the state from
 	 * wherever they are.
 	 */
 	if (fl != l) {
 		struct pcb *pcb = lwp_getpcb(l);
 		control = GET_FPU_CW(pcb);
 		status = GET_FPU_SW(pcb);
 	} else {
 		fnstcw(&control);
 		fnstsw(&status);
+	}
 	if (fl == l)
 		fnclex();
 	kpreempt_enable();
 	return fpetable[status & ((~control & 0x3f) | 0x40)];
+}

 @@ -1,549 +1,535 @@
-/*	$NetBSD: hypercalls.h,v 1.11 2011/03/30 22:57:24 jym Exp $	*/
+/*	$NetBSD: hypercalls.h,v 1.12 2011/06/07 14:53:03 bouyer Exp $	*/
 /*
  * Copyright (c) 2006 Manuel Bouyer.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
+ *
  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
  */
 /*
+ *
  * Communication to/from hypervisor.
+ *
  * Copyright (c) 2002-2004, K A Fraser
+ *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this source file (the "Software"), to deal in the Software without
  * restriction, including without limitation the rights to use, copy, modify,
  * merge, publish, distribute, sublicense, and/or sell copies of the Software,
  * and to permit persons to whom the Software is furnished to do so, subject to
  * the following conditions:
+ *
  * The above copyright notice and this permission notice shall be included in
  * all copies or substantial portions of the Software.
+ *
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  * IN THE SOFTWARE.
  */
 #ifndef _XENI386_HYPERVISOR_H_
 #define _XENI386_HYPERVISOR_H_
 /*
  * Assembler stubs for hyper-calls.
  */
 #include <machine/pte.h> /* pt_entry_t */
 #if !defined(XEN_COMPAT_030001)
 /* hypercall via the hypercall call page */
 #define __str(x) #x
 #define _str(x) __str(x)
 #define _hypercall(name, input_const, output_const) \
 	__asm volatile ( \
 	    "call hypercall_page + ("_str(name)" * 32)" \
 	    : output_const \
 	    : input_const \
 	    : "memory" )
 #else
 /* traditionnal hypercall via int 0x82 */
 #define _hypercall(name, input_const, output_const) \
 	__asm volatile ( \
 	    TRAP_INSTR \
 	    : output_const \
 	    : "0" (name), input_const \
 	    : "memory" )
 #endif
 #define _harg(...) __VA_ARGS__
 static __inline int
 HYPERVISOR_set_trap_table(trap_info_t *table)
+{
     int ret;
     unsigned long ign1;
 	_hypercall(__HYPERVISOR_set_trap_table, _harg("1" (table)),
 	    _harg("=a" (ret), "=b" (ign1)));
     return ret;
+}
 static __inline int
 HYPERVISOR_set_gdt(unsigned long *frame_list, int entries)
+{
     int ret;
     unsigned long ign1, ign2;
     _hypercall(__HYPERVISOR_set_gdt, _harg("1" (frame_list), "2" (entries)),
 	_harg("=a" (ret), "=b" (ign1), "=c" (ign2)));
     return ret;
+}
 static __inline int
 HYPERVISOR_stack_switch(unsigned long ss, unsigned long esp)
+{
     int ret;
     unsigned long ign1, ign2;
     _hypercall(__HYPERVISOR_stack_switch, _harg("1" (ss), "2" (esp)),
 	_harg("=a" (ret), "=b" (ign1), "=c" (ign2)));
     return ret;
+}
 static __inline int
 HYPERVISOR_set_callbacks(
     unsigned long event_selector, unsigned long event_address,
     unsigned long failsafe_selector, unsigned long failsafe_address)
+{
     int ret;
     unsigned long ign1, ign2, ign3, ign4;
     _hypercall(__HYPERVISOR_set_callbacks,
 	_harg("1" (event_selector),"2" (event_address),
 	    "3" (failsafe_selector), "4" (failsafe_address)),
 	_harg("=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3), "=S" (ign4)));
     return ret;
+}
 #if __XEN_INTERFACE_VERSION__ < 0x00030204
 static __inline int
 HYPERVISOR_dom0_op(dom0_op_t *dom0_op)
+{
     int ret;
     unsigned long ign1;
     dom0_op->interface_version = DOM0_INTERFACE_VERSION;
     _hypercall(__HYPERVISOR_dom0_op, _harg("1" (dom0_op)),
 	_harg("=a" (ret), "=b" (ign1)));
     return ret;
+}
 #endif	/* __XEN_INTERFACE_VERSION__ */
 static __inline int
 HYPERVISOR_set_debugreg(int reg, unsigned long value)
+{
     int ret;
     unsigned long ign1, ign2;
     _hypercall(__HYPERVISOR_set_debugreg, _harg("1" (reg), "2" (value)),
 	 _harg("=a" (ret), "=b" (ign1), "=c" (ign2)));
     return ret;
+}
 static __inline unsigned long
 HYPERVISOR_get_debugreg(int reg)
+{
     unsigned long ret;
     unsigned long ign1;
     _hypercall(__HYPERVISOR_get_debugreg, _harg("1" (reg)),
 	_harg("=a" (ret), "=b" (ign1)));
     return ret;
+}
 static __inline int
 HYPERVISOR_machine_check(struct xen_mc *mc)
+{
      int ret;
      unsigned long ign1;
      mc->interface_version = XEN_MCA_INTERFACE_VERSION;
      _hypercall(__HYPERVISOR_mca, _harg("1" (mc)),
 	  _harg("=a" (ret), "=b" (ign1)));
      return ret;
+}
 static __inline int
 HYPERVISOR_hvm_op(int cmd, void *arg)
+{
     int ret;
     unsigned long ign1, ign2;
     _hypercall(__HYPERVISOR_hvm_op, _harg("1" (cmd), "2" (arg)),
 	_harg("=a" (ret), "=b" (ign1), "=c" (ign2)));
     return ret;
+}
 static __inline int
 HYPERVISOR_mmu_update(mmu_update_t *req, int count, int *success_count,
     domid_t domid)
+{
     int ret;
     unsigned long ign1, ign2, ign3, ign4;
     _hypercall(__HYPERVISOR_mmu_update,
 	_harg("1" (req), "2" (count), "3" (success_count), "4" (domid)),
 	_harg("=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3), "=S" (ign4)));
     return ret;
+}
 static __inline int
 HYPERVISOR_mmuext_op(struct mmuext_op *op, int count, int *success_count,
     domid_t domid)
+{
     int ret;
     unsigned long ign1, ign2, ign3, ign4;
     _hypercall(__HYPERVISOR_mmuext_op,
 	_harg("1" (op), "2" (count), "3" (success_count), "4" (domid)),
 	_harg("=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3), "=S" (ign4)));
     return ret;
+}
 #if 0
 static __inline int
 HYPERVISOR_fpu_taskswitch(int set)
+{
     long ret;
     long ign1;
     _hypercall(__HYPERVISOR_fpu_taskswitch, _harg("1" (set)),
 	_harg("=a" (ret), "=b" (ign1)));
     return ret;
+}
 #else /* 0 */
 /* Xen2 compat: always i38HYPERVISOR_fpu_taskswitch(1) */
 static __inline int
 HYPERVISOR_fpu_taskswitch(void)
     long ret;
     long ign1;
     _hypercall(__HYPERVISOR_fpu_taskswitch, _harg("1" (1)),
 	_harg("=a" (ret), "=b" (ign1)));
     return ret;
 #endif /* 0 */
 static __inline int
 HYPERVISOR_update_descriptor(uint64_t ma, uint32_t word1, uint32_t word2)
+{
     int ret;
     unsigned long ign1, ign2, ign3, ign4;
     int ma1 = ma & 0xffffffff;
     int ma2 = (ma >> 32) & 0xffffffff;
     _hypercall(__HYPERVISOR_update_descriptor,
 	_harg("1" (ma1), "2" (ma2), "3" (word1), "4" (word2)),
 	_harg("=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3), "=S" (ign4)));
     return ret;
+}
 static __inline int
 HYPERVISOR_memory_op(unsigned int cmd, void *arg)
+{
     int ret;
     unsigned long ign1, ign2;
     _hypercall(__HYPERVISOR_memory_op, _harg("1" (cmd), "2" (arg)),
 	_harg("=a" (ret), "=b" (ign1), "=c" (ign2)));
     return ret;
+}
 static __inline int
 HYPERVISOR_update_va_mapping(unsigned long page_nr, pt_entry_t new_val,
     unsigned long flags)
+{
     int ret;
     unsigned long ign1, ign2, ign3, ign4;
     unsigned long pte_low, pte_hi;
     pte_low = new_val & 0xffffffff;
 #ifdef PAE
     pte_hi = new_val >> 32;
 #else
     pte_hi = 0;
 #endif
     _hypercall(__HYPERVISOR_update_va_mapping,
 	_harg("1" (page_nr), "2" (pte_low), "3" (pte_hi), "4" (flags)),
 	_harg("=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3), "=S" (ign4)));
 #ifdef notdef
     if (__predict_false(ret < 0))
         panic("Failed update VA mapping: %08lx, %08lx, %08lx",
               page_nr, new_val, flags);
 #endif
     return ret;
+}
 static __inline int
 HYPERVISOR_xen_version(int cmd, void *arg)
+{
     int ret;
     unsigned long ign1, ign2;
     _hypercall(__HYPERVISOR_xen_version, _harg("1" (cmd), "2" (arg)),
 	_harg("=a" (ret), "=b" (ign1), "=c" (ign2)));
     return ret;
+}
 static __inline int
 HYPERVISOR_grant_table_op(unsigned int cmd, void *uop, unsigned int count)
+{
     int ret;
     unsigned long ign1, ign2, ign3;
     _hypercall(__HYPERVISOR_grant_table_op,
 	_harg("1" (cmd), "2" (uop), "3" (count)),
 	_harg("=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3)));
     return ret;
+}
 static __inline int
 HYPERVISOR_update_va_mapping_otherdomain(unsigned long page_nr,
     pt_entry_t new_val, unsigned long flags, domid_t domid)
+{
     int ret;
     unsigned long ign1, ign2, ign3, ign4, ign5;
     unsigned long pte_low, pte_hi;
     pte_low = new_val & 0xffffffff;
 #ifdef PAE
     pte_hi = new_val >> 32;
 #else
     pte_hi = 0;
 #endif
     _hypercall(__HYPERVISOR_update_va_mapping_otherdomain,
 	_harg("1" (page_nr), "2" (pte_low), "3" (pte_hi), "4" (flags), "5" (domid)),
 	_harg("=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3), "=S" (ign4),
 	    "=D" (ign5)));
     return ret;
+}
 static __inline int
 HYPERVISOR_vcpu_op(int cmd, int vcpuid, void *extra_args)
+{
     long ret;
     unsigned long ign1, ign2, ign3;
     _hypercall(__HYPERVISOR_vcpu_op,
 	_harg("1" (cmd), "2" (vcpuid), "3" (extra_args)),
 	_harg("=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3)));
     return ret;
+}
 static __inline long
 HYPERVISOR_yield(void)
+{
     long ret;
     unsigned long ign1, ign2;
     _hypercall(__HYPERVISOR_sched_op, _harg("1" (SCHEDOP_yield), "2" (0)),
 	_harg("=a" (ret), "=b" (ign1), "=c" (ign2)));
     return ret;
+}
 static __inline long
 HYPERVISOR_block(void)
+{
     long ret;
     unsigned long ign1, ign2;
     _hypercall(__HYPERVISOR_sched_op, _harg("1" (SCHEDOP_block), "2" (0)),
 	_harg("=a" (ret), "=b" (ign1), "=c" (ign2)));
     return ret;
+}
 static __inline long
 HYPERVISOR_shutdown(void)
+{
     long ret;
     unsigned long ign1, ign2;
     _hypercall(__HYPERVISOR_sched_op,
 	_harg("1" (SCHEDOP_shutdown), "2" (SHUTDOWN_poweroff)),
 	_harg("=a" (ret), "=b" (ign1), "=c" (ign2)));
     return ret;
+}
 static __inline long
 HYPERVISOR_crash(void)
+{
     long ret;
     unsigned long ign1, ign2;
     _hypercall(__HYPERVISOR_sched_op,
 	_harg("1" (SCHEDOP_shutdown), "2" (SHUTDOWN_crash)),
 	_harg("=a" (ret), "=b" (ign1), "=c" (ign2)));
     return ret;
+}
 static __inline long
 HYPERVISOR_reboot(void)
+{
     long ret;
     unsigned long ign1, ign2;
     _hypercall(__HYPERVISOR_sched_op,
 	_harg("1" (SCHEDOP_shutdown), "2" (SHUTDOWN_reboot)),
 	_harg("=a" (ret), "=b" (ign1), "=c" (ign2)));
     return ret;
+}
 static __inline long
 HYPERVISOR_suspend(unsigned long srec)
+{
     long ret;
     unsigned long ign1, ign2, ign3;
     _hypercall(__HYPERVISOR_sched_op,
 	_harg("1" (SCHEDOP_shutdown), "2" (SHUTDOWN_suspend), "3" (srec)),
 	_harg("=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3)));
     return ret;
+}
 static __inline long
 HYPERVISOR_set_timer_op(uint64_t timeout)
+{
     long ret;
     unsigned long timeout_hi = (unsigned long)(timeout>>32);
     unsigned long timeout_lo = (unsigned long)timeout;
     unsigned long ign1, ign2;
     _hypercall(__HYPERVISOR_set_timer_op,
 	 _harg("1" (timeout_lo), "2" (timeout_hi)),
 	 _harg("=a" (ret), "=b" (ign1), "=c" (ign2)));
     return ret;
+}
 static __inline int
 HYPERVISOR_platform_op(struct xen_platform_op *platform_op)
+{
     int ret;
     unsigned long ign1;
     platform_op->interface_version = XENPF_INTERFACE_VERSION;
     _hypercall(__HYPERVISOR_platform_op, _harg("1" (platform_op)),
 	_harg("=a" (ret), "=b" (ign1)));
     return ret;
+}
 static __inline int
 HYPERVISOR_multicall(void *call_list, int nr_calls)
+{
     int ret;
     unsigned long ign1, ign2;
     _hypercall(__HYPERVISOR_multicall,
 	 _harg("1" (call_list), "2" (nr_calls)),
 	 _harg("=a" (ret), "=b" (ign1), "=c" (ign2)));
     return ret;
+}
 static __inline int
 HYPERVISOR_event_channel_op(void *op)
+{
     int ret;
     unsigned long ign1;
     _hypercall(__HYPERVISOR_event_channel_op, _harg("1" (op)),
 	_harg("=a" (ret), "=b" (ign1)));
     return ret;
+}
 static __inline int
 HYPERVISOR_console_io(int cmd, int count, char *str)
+{
     int ret;
     unsigned long ign1, ign2, ign3;
     _hypercall(__HYPERVISOR_console_io,
 	_harg("1" (cmd), "2" (count), "3" (str)),
 	_harg("=a" (ret), "=b" (ign1), "=c" (ign2), "=d" (ign3)));
     return ret;
+}
 static __inline int
 HYPERVISOR_physdev_op(void *physdev_op)
+{
     int ret;
     unsigned long ign1;
     _hypercall(__HYPERVISOR_physdev_op, _harg("1" (physdev_op)),
 	_harg("=a" (ret), "=b" (ign1)));
     return ret;
+}
 static __inline int
 HYPERVISOR_vm_assist(unsigned int cmd, unsigned int type)
+{
     int ret;
     unsigned long ign1, ign2;
     _hypercall(__HYPERVISOR_vm_assist, _harg("1" (cmd), "2" (type)),
 	_harg("=a" (ret), "=b" (ign1), "=c" (ign2)));
     return ret;
+}
 static __inline int
 HYPERVISOR_sysctl(void *sysctl)
+{
     int ret;
     unsigned long ign1;
     _hypercall(__HYPERVISOR_sysctl, _harg("1" (sysctl)),
 	_harg("=a" (ret), "=b" (ign1)));
     return ret;
+}
 #endif /* _XENI386_HYPERVISOR_H_ */