Thu Jun 9 17:29:42 2011 UTC ()
- device_t/softc split.
- use aprint_* function.


(nonaka)
diff -r1.18 -r1.19 src/sys/arch/arm/xscale/pxa2x0.c
diff -r1.7 -r1.8 src/sys/arch/arm/xscale/pxa2x0_ac97.c
diff -r1.6 -r1.7 src/sys/arch/arm/xscale/pxa2x0_dmac.c
diff -r1.13 -r1.14 src/sys/arch/arm/xscale/pxa2x0_gpio.c
diff -r1.3 -r1.4 src/sys/arch/arm/xscale/pxa2x0_udc.c

cvs diff -r1.18 -r1.19 src/sys/arch/arm/xscale/pxa2x0.c (expand / switch to unified diff)

--- src/sys/arch/arm/xscale/pxa2x0.c 2009/08/09 06:12:33 1.18
+++ src/sys/arch/arm/xscale/pxa2x0.c 2011/06/09 17:29:42 1.19
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: pxa2x0.c,v 1.18 2009/08/09 06:12:33 kiyohara Exp $ */ 1/* $NetBSD: pxa2x0.c,v 1.19 2011/06/09 17:29:42 nonaka Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 2002, 2005 Genetec Corporation. All rights reserved. 4 * Copyright (c) 2002, 2005 Genetec Corporation. All rights reserved.
5 * Written by Hiroyuki Bessho for Genetec Corporation. 5 * Written by Hiroyuki Bessho for Genetec Corporation.
6 * 6 *
7 * Redistribution and use in source and binary forms, with or without 7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions 8 * modification, are permitted provided that the following conditions
9 * are met: 9 * are met:
10 * 1. Redistributions of source code must retain the above copyright 10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer. 11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright 12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the 13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution. 14 * documentation and/or other materials provided with the distribution.
@@ -89,127 +89,127 @@ @@ -89,127 +89,127 @@
89 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 89 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
90 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 90 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
91 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 91 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
92 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 92 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
93 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 93 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
94 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 94 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
95 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 95 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
96 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 96 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
97 * SUCH DAMAGE. 97 * SUCH DAMAGE.
98 * 98 *
99 */ 99 */
100 100
101#include <sys/cdefs.h> 101#include <sys/cdefs.h>
102__KERNEL_RCSID(0, "$NetBSD: pxa2x0.c,v 1.18 2009/08/09 06:12:33 kiyohara Exp $"); 102__KERNEL_RCSID(0, "$NetBSD: pxa2x0.c,v 1.19 2011/06/09 17:29:42 nonaka Exp $");
103 103
104#include "pxaintc.h" 104#include "pxaintc.h"
105#include "pxagpio.h" 105#include "pxagpio.h"
106#if 0 106#if 0
107#include "pxadmac.h" /* Not yet */ 107#include "pxadmac.h" /* Not yet */
108#endif 108#endif
109 109
110#include "locators.h" 110#include "locators.h"
111 111
112#include <sys/param.h> 112#include <sys/param.h>
113#include <sys/systm.h> 113#include <sys/systm.h>
114#include <sys/device.h> 114#include <sys/device.h>
115#include <sys/kernel.h> 115#include <sys/kernel.h>
116#include <sys/reboot.h> 116#include <sys/reboot.h>
117 117
118#include <machine/cpu.h> 118#include <machine/cpu.h>
119#include <machine/bus.h> 119#include <machine/bus.h>
120 120
121#include <arm/cpufunc.h> 121#include <arm/cpufunc.h>
122#include <arm/mainbus/mainbus.h> 122#include <arm/mainbus/mainbus.h>
123#include <arm/xscale/pxa2x0cpu.h> 123#include <arm/xscale/pxa2x0cpu.h>
124#include <arm/xscale/pxa2x0reg.h> 124#include <arm/xscale/pxa2x0reg.h>
125#include <arm/xscale/pxa2x0var.h> 125#include <arm/xscale/pxa2x0var.h>
126#include <arm/xscale/xscalereg.h> 126#include <arm/xscale/xscalereg.h>
127 127
128struct pxaip_softc { 128struct pxaip_softc {
129 struct device sc_dev; 129 device_t sc_dev;
130 bus_space_tag_t sc_bust; 130 bus_space_tag_t sc_bust;
131 bus_dma_tag_t sc_dmat; 131 bus_dma_tag_t sc_dmat;
132 bus_space_handle_t sc_bush_clk; 132 bus_space_handle_t sc_bush_clk;
133 bus_space_handle_t sc_bush_mem; 133 bus_space_handle_t sc_bush_mem;
134}; 134};
135 135
136/* prototypes */ 136/* prototypes */
137static int pxaip_match(struct device *, struct cfdata *, void *); 137static int pxaip_match(device_t, cfdata_t, void *);
138static void pxaip_attach(struct device *, struct device *, void *); 138static void pxaip_attach(device_t, device_t, void *);
139static int pxaip_search(struct device *, struct cfdata *, 139static int pxaip_search(device_t, cfdata_t, const int *, void *);
140 const int *, void *); 
141static void pxaip_attach_critical(struct pxaip_softc *); 140static void pxaip_attach_critical(struct pxaip_softc *);
142static int pxaip_print(void *, const char *); 141static int pxaip_print(void *, const char *);
143 142
144static int pxaip_measure_cpuclock(struct pxaip_softc *); 143static int pxaip_measure_cpuclock(struct pxaip_softc *);
145 144
146#if defined(CPU_XSCALE_PXA250) && defined(CPU_XSCALE_PXA270) 145#if defined(CPU_XSCALE_PXA250) && defined(CPU_XSCALE_PXA270)
147# define SUPPORTED_CPU "PXA250 and PXA270" 146# define SUPPORTED_CPU "PXA250 and PXA270"
148#elif defined(CPU_XSCALE_PXA250) 147#elif defined(CPU_XSCALE_PXA250)
149# define SUPPORTED_CPU "PXA250" 148# define SUPPORTED_CPU "PXA250"
150#elif defined(CPU_XSCALE_PXA270) 149#elif defined(CPU_XSCALE_PXA270)
151# define SUPPORTED_CPU "PXA270" 150# define SUPPORTED_CPU "PXA270"
152#else 151#else
153# define SUPPORTED_CPU "none of PXA2xx" 152# define SUPPORTED_CPU "none of PXA2xx"
154#endif 153#endif
155 154
156/* attach structures */ 155/* attach structures */
157CFATTACH_DECL(pxaip, sizeof(struct pxaip_softc), 156CFATTACH_DECL_NEW(pxaip, sizeof(struct pxaip_softc),
158 pxaip_match, pxaip_attach, NULL, NULL); 157 pxaip_match, pxaip_attach, NULL, NULL);
159 158
160static struct pxaip_softc *pxaip_sc; 159static struct pxaip_softc *pxaip_sc;
161static vaddr_t pxamemctl_regs; 160static vaddr_t pxamemctl_regs;
162#define MEMCTL_BOOTSTRAP_REG(reg) \ 161#define MEMCTL_BOOTSTRAP_REG(reg) \
163 (*((volatile uint32_t *)(pxamemctl_regs + (reg)))) 162 (*((volatile uint32_t *)(pxamemctl_regs + (reg))))
164static vaddr_t pxaclkman_regs; 163static vaddr_t pxaclkman_regs;
165#define CLKMAN_BOOTSTRAP_REG(reg) \ 164#define CLKMAN_BOOTSTRAP_REG(reg) \
166 (*((volatile uint32_t *)(pxaclkman_regs + (reg)))) 165 (*((volatile uint32_t *)(pxaclkman_regs + (reg))))
167 166
168static int 167static int
169pxaip_match(struct device *parent, struct cfdata *match, void *aux) 168pxaip_match(device_t parent, cfdata_t match, void *aux)
170{ 169{
171 170
172#if !defined(CPU_XSCALE_PXA270) 171#if !defined(CPU_XSCALE_PXA270)
173 if (__CPU_IS_PXA270) 172 if (__CPU_IS_PXA270)
174 goto bad_config; 173 goto bad_config;
175#endif 174#endif
176 175
177#if !defined(CPU_XSCALE_PXA250) 176#if !defined(CPU_XSCALE_PXA250)
178 if (__CPU_IS_PXA250) 177 if (__CPU_IS_PXA250)
179 goto bad_config; 178 goto bad_config;
180#endif 179#endif
181 180
182 return 1; 181 return 1;
183 182
184#if defined(CPU_XSCALE_PXA250) + defined(CPU_XSCALE_PXA270) != 2 183#if defined(CPU_XSCALE_PXA250) + defined(CPU_XSCALE_PXA270) != 2
185 bad_config: 184 bad_config:
186 aprint_error("Kernel is configured for %s, but CPU is %s\n", 185 aprint_error("Kernel is configured for %s, but CPU is %s\n",
187 SUPPORTED_CPU, __CPU_IS_PXA270 ? "PXA270" : "PXA250"); 186 SUPPORTED_CPU, __CPU_IS_PXA270 ? "PXA270" : "PXA250");
188 return 0; 187 return 0;
189#endif 188#endif
190} 189}
191 190
192static void 191static void
193pxaip_attach(struct device *parent, struct device *self, void *aux) 192pxaip_attach(device_t parent, device_t self, void *aux)
194{ 193{
195 struct pxaip_softc *sc = (struct pxaip_softc *)self; 194 struct pxaip_softc *sc = device_private(self);
196 int cpuclock; 195 int cpuclock;
197 196
198 pxaip_sc = sc; 197 pxaip_sc = sc;
 198 sc->sc_dev = self;
199 sc->sc_bust = &pxa2x0_bs_tag; 199 sc->sc_bust = &pxa2x0_bs_tag;
200 sc->sc_dmat = &pxa2x0_bus_dma_tag; 200 sc->sc_dmat = &pxa2x0_bus_dma_tag;
201 201
202 aprint_normal(": PXA2x0 Onchip Peripheral Bus\n"); 202 aprint_normal(": Onchip Peripheral Bus\n");
203 203
204 if (bus_space_map(sc->sc_bust, PXA2X0_CLKMAN_BASE, PXA2X0_CLKMAN_SIZE, 204 if (bus_space_map(sc->sc_bust, PXA2X0_CLKMAN_BASE, PXA2X0_CLKMAN_SIZE,
205 0, &sc->sc_bush_clk)) 205 0, &sc->sc_bush_clk))
206 panic("pxaip_attach: failed to map CLKMAN"); 206 panic("pxaip_attach: failed to map CLKMAN");
207 207
208 if (bus_space_map(sc->sc_bust, PXA2X0_MEMCTL_BASE, PXA2X0_MEMCTL_SIZE, 208 if (bus_space_map(sc->sc_bust, PXA2X0_MEMCTL_BASE, PXA2X0_MEMCTL_SIZE,
209 0, &sc->sc_bush_mem)) 209 0, &sc->sc_bush_mem))
210 panic("pxaip_attach: failed to map MEMCTL"); 210 panic("pxaip_attach: failed to map MEMCTL");
211 211
212 /* 212 /*
213 * Calculate clock speed 213 * Calculate clock speed
214 * This takes 2 secs at most. 214 * This takes 2 secs at most.
215 */ 215 */
@@ -224,28 +224,27 @@ pxaip_attach(struct device *parent, stru @@ -224,28 +224,27 @@ pxaip_attach(struct device *parent, stru
224 224
225 /* 225 /*
226 * Attach critical devices 226 * Attach critical devices
227 */ 227 */
228 pxaip_attach_critical(sc); 228 pxaip_attach_critical(sc);
229 229
230 /* 230 /*
231 * Attach all other devices 231 * Attach all other devices
232 */ 232 */
233 config_search_ia(pxaip_search, self, "pxaip", sc); 233 config_search_ia(pxaip_search, self, "pxaip", sc);
234} 234}
235 235
236static int 236static int
237pxaip_search(struct device *parent, struct cfdata *cf, 237pxaip_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
238 const int *ldesc, void *aux) 
239{ 238{
240 struct pxaip_softc *sc = aux; 239 struct pxaip_softc *sc = aux;
241 struct pxaip_attach_args aa; 240 struct pxaip_attach_args aa;
242 241
243 aa.pxa_iot = sc->sc_bust; 242 aa.pxa_iot = sc->sc_bust;
244 aa.pxa_dmat = sc->sc_dmat; 243 aa.pxa_dmat = sc->sc_dmat;
245 aa.pxa_name = cf->cf_name; 244 aa.pxa_name = cf->cf_name;
246 aa.pxa_addr = cf->cf_loc[PXAIPCF_ADDR]; 245 aa.pxa_addr = cf->cf_loc[PXAIPCF_ADDR];
247 aa.pxa_size = cf->cf_loc[PXAIPCF_SIZE]; 246 aa.pxa_size = cf->cf_loc[PXAIPCF_SIZE];
248 aa.pxa_index = cf->cf_loc[PXAIPCF_INDEX]; 247 aa.pxa_index = cf->cf_loc[PXAIPCF_INDEX];
249 aa.pxa_intr = cf->cf_loc[PXAIPCF_INTR]; 248 aa.pxa_intr = cf->cf_loc[PXAIPCF_INTR];
250 249
251 if (config_match(parent, cf, &aa)) 250 if (config_match(parent, cf, &aa))
@@ -255,56 +254,56 @@ pxaip_search(struct device *parent, stru @@ -255,56 +254,56 @@ pxaip_search(struct device *parent, stru
255} 254}
256 255
257static void 256static void
258pxaip_attach_critical(struct pxaip_softc *sc) 257pxaip_attach_critical(struct pxaip_softc *sc)
259{ 258{
260 struct pxaip_attach_args aa; 259 struct pxaip_attach_args aa;
261 260
262 aa.pxa_iot = sc->sc_bust; 261 aa.pxa_iot = sc->sc_bust;
263 aa.pxa_dmat = sc->sc_dmat; 262 aa.pxa_dmat = sc->sc_dmat;
264 aa.pxa_name = "pxaintc"; 263 aa.pxa_name = "pxaintc";
265 aa.pxa_addr = PXA2X0_INTCTL_BASE; 264 aa.pxa_addr = PXA2X0_INTCTL_BASE;
266 aa.pxa_size = PXA2X0_INTCTL_SIZE; 265 aa.pxa_size = PXA2X0_INTCTL_SIZE;
267 aa.pxa_intr = PXAIPCF_INTR_DEFAULT; 266 aa.pxa_intr = PXAIPCF_INTR_DEFAULT;
268 if (config_found(&sc->sc_dev, &aa, pxaip_print) == NULL) 267 if (config_found(sc->sc_dev, &aa, pxaip_print) == NULL)
269 panic("pxaip_attach_critical: failed to attach INTC!"); 268 panic("pxaip_attach_critical: failed to attach INTC!");
270 269
271#if NPXAGPIO > 0 270#if NPXAGPIO > 0
272 aa.pxa_iot = sc->sc_bust; 271 aa.pxa_iot = sc->sc_bust;
273 aa.pxa_dmat = sc->sc_dmat; 272 aa.pxa_dmat = sc->sc_dmat;
274 aa.pxa_name = "pxagpio"; 273 aa.pxa_name = "pxagpio";
275 aa.pxa_addr = PXA2X0_GPIO_BASE; 274 aa.pxa_addr = PXA2X0_GPIO_BASE;
276 aa.pxa_size = PXA2X0_GPIO_SIZE; 275 aa.pxa_size = PXA2X0_GPIO_SIZE;
277 aa.pxa_intr = PXAIPCF_INTR_DEFAULT; 276 aa.pxa_intr = PXAIPCF_INTR_DEFAULT;
278 if (config_found(&sc->sc_dev, &aa, pxaip_print) == NULL) 277 if (config_found(sc->sc_dev, &aa, pxaip_print) == NULL)
279 panic("pxaip_attach_critical: failed to attach GPIO!"); 278 panic("pxaip_attach_critical: failed to attach GPIO!");
280#endif 279#endif
281 280
282#if NPXADMAC > 0 281#if NPXADMAC > 0
283 aa.pxa_iot = sc->sc_bust; 282 aa.pxa_iot = sc->sc_bust;
284 aa.pxa_dmat = sc->sc_dmat; 283 aa.pxa_dmat = sc->sc_dmat;
285 aa.pxa_name = "pxaidmac"; 284 aa.pxa_name = "pxaidmac";
286 aa.pxa_addr = PXA2X0_DMAC_BASE; 285 aa.pxa_addr = PXA2X0_DMAC_BASE;
287 aa.pxa_size = PXA2X0_DMAC_SIZE; 286 aa.pxa_size = PXA2X0_DMAC_SIZE;
288 aa.pxa_intr = PXA2X0_INT_DMA; 287 aa.pxa_intr = PXA2X0_INT_DMA;
289 if (config_found(&sc->sc_dev, &aa, pxaip_print) == NULL) 288 if (config_found(sc->sc_dev, &aa, pxaip_print) == NULL)
290 panic("pxaip_attach_critical: failed to attach DMAC!"); 289 panic("pxaip_attach_critical: failed to attach DMAC!");
291#endif 290#endif
292} 291}
293 292
294static int 293static int
295pxaip_print(void *aux, const char *name) 294pxaip_print(void *aux, const char *name)
296{ 295{
297 struct pxaip_attach_args *sa = (struct pxaip_attach_args*)aux; 296 struct pxaip_attach_args *sa = (struct pxaip_attach_args *)aux;
298 297
299 if (sa->pxa_addr != PXAIPCF_ADDR_DEFAULT) { 298 if (sa->pxa_addr != PXAIPCF_ADDR_DEFAULT) {
300 aprint_normal(" addr 0x%lx", sa->pxa_addr); 299 aprint_normal(" addr 0x%lx", sa->pxa_addr);
301 if (sa->pxa_size > PXAIPCF_SIZE_DEFAULT) 300 if (sa->pxa_size > PXAIPCF_SIZE_DEFAULT)
302 aprint_normal("-0x%lx", sa->pxa_addr + sa->pxa_size-1); 301 aprint_normal("-0x%lx", sa->pxa_addr + sa->pxa_size-1);
303 } 302 }
304 if (sa->pxa_intr != PXAIPCF_INTR_DEFAULT) 303 if (sa->pxa_intr != PXAIPCF_INTR_DEFAULT)
305 aprint_normal(" intr %d", sa->pxa_intr); 304 aprint_normal(" intr %d", sa->pxa_intr);
306 305
307 return (UNCONF); 306 return (UNCONF);
308} 307}
309 308
310static inline uint32_t 309static inline uint32_t

cvs diff -r1.7 -r1.8 src/sys/arch/arm/xscale/pxa2x0_ac97.c (expand / switch to unified diff)

--- src/sys/arch/arm/xscale/pxa2x0_ac97.c 2007/10/17 19:53:44 1.7
+++ src/sys/arch/arm/xscale/pxa2x0_ac97.c 2011/06/09 17:29:42 1.8
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: pxa2x0_ac97.c,v 1.7 2007/10/17 19:53:44 garbled Exp $ */ 1/* $NetBSD: pxa2x0_ac97.c,v 1.8 2011/06/09 17:29:42 nonaka Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 2003, 2005 Wasabi Systems, Inc. 4 * Copyright (c) 2003, 2005 Wasabi Systems, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Written by Steve C. Woodford for Wasabi Systems, Inc. 7 * Written by Steve C. Woodford for Wasabi Systems, Inc.
8 * 8 *
9 * Redistribution and use in source and binary forms, with or without 9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions 10 * modification, are permitted provided that the following conditions
11 * are met: 11 * are met:
12 * 1. Redistributions of source code must retain the above copyright 12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer. 13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright 14 * 2. Redistributions in binary form must reproduce the above copyright
@@ -65,27 +65,27 @@ struct acu_dma { @@ -65,27 +65,27 @@ struct acu_dma {
65 bus_dmamap_t ad_map; 65 bus_dmamap_t ad_map;
66 void *ad_addr; 66 void *ad_addr;
67#define ACU_N_SEGS 1 /* XXX: We don't support > 1 */ 67#define ACU_N_SEGS 1 /* XXX: We don't support > 1 */
68 bus_dma_segment_t ad_segs[ACU_N_SEGS]; 68 bus_dma_segment_t ad_segs[ACU_N_SEGS];
69 int ad_nsegs; 69 int ad_nsegs;
70 size_t ad_size; 70 size_t ad_size;
71 struct dmac_xfer *ad_dx; 71 struct dmac_xfer *ad_dx;
72 struct acu_dma *ad_next; 72 struct acu_dma *ad_next;
73}; 73};
74 74
75#define KERNADDR(ad) ((void *)((ad)->ad_addr)) 75#define KERNADDR(ad) ((void *)((ad)->ad_addr))
76 76
77struct acu_softc { 77struct acu_softc {
78 struct device sc_dev; 78 device_t sc_dev;
79 bus_space_tag_t sc_bust; 79 bus_space_tag_t sc_bust;
80 bus_dma_tag_t sc_dmat; 80 bus_dma_tag_t sc_dmat;
81 bus_space_handle_t sc_bush; 81 bus_space_handle_t sc_bush;
82 void *sc_irqcookie; 82 void *sc_irqcookie;
83 int sc_in_reset; 83 int sc_in_reset;
84 u_int sc_dac_rate; 84 u_int sc_dac_rate;
85 u_int sc_adc_rate; 85 u_int sc_adc_rate;
86 86
87 /* List of DMA ring-buffers allocated by acu_malloc() */ 87 /* List of DMA ring-buffers allocated by acu_malloc() */
88 struct acu_dma *sc_dmas; 88 struct acu_dma *sc_dmas;
89 89
90 /* Dummy DMA segment which points to the AC97 PCM Fifo register */ 90 /* Dummy DMA segment which points to the AC97 PCM Fifo register */
91 bus_dma_segment_t sc_dr; 91 bus_dma_segment_t sc_dr;
@@ -103,30 +103,30 @@ struct acu_softc { @@ -103,30 +103,30 @@ struct acu_softc {
103 void *sc_rxarg; 103 void *sc_rxarg;
104 104
105 /* AC97 Codec State */ 105 /* AC97 Codec State */
106 struct ac97_codec_if *sc_codec_if; 106 struct ac97_codec_if *sc_codec_if;
107 struct ac97_host_if sc_host_if; 107 struct ac97_host_if sc_host_if;
108 108
109 /* Child audio(4) device */ 109 /* Child audio(4) device */
110 struct device *sc_audiodev; 110 struct device *sc_audiodev;
111 111
112 /* auconv encodings */ 112 /* auconv encodings */
113 struct audio_encoding_set *sc_encodings; 113 struct audio_encoding_set *sc_encodings;
114}; 114};
115 115
116static int pxaacu_match(struct device *, struct cfdata *, void *); 116static int pxaacu_match(device_t, cfdata_t, void *);
117static void pxaacu_attach(struct device *, struct device *, void *); 117static void pxaacu_attach(device_t, device_t, void *);
118 118
119CFATTACH_DECL(pxaacu, sizeof(struct acu_softc), 119CFATTACH_DECL_NEW(pxaacu, sizeof(struct acu_softc),
120 pxaacu_match, pxaacu_attach, NULL, NULL); 120 pxaacu_match, pxaacu_attach, NULL, NULL);
121 121
122static int acu_codec_attach(void *, struct ac97_codec_if *); 122static int acu_codec_attach(void *, struct ac97_codec_if *);
123static int acu_codec_read(void *, u_int8_t, u_int16_t *); 123static int acu_codec_read(void *, u_int8_t, u_int16_t *);
124static int acu_codec_write(void *, u_int8_t, u_int16_t); 124static int acu_codec_write(void *, u_int8_t, u_int16_t);
125static int acu_codec_reset(void *); 125static int acu_codec_reset(void *);
126static int acu_intr(void *); 126static int acu_intr(void *);
127 127
128static int acu_open(void *, int); 128static int acu_open(void *, int);
129static void acu_close(void *); 129static void acu_close(void *);
130static int acu_query_encoding(void *, struct audio_encoding *); 130static int acu_query_encoding(void *, struct audio_encoding *);
131static int acu_set_params(void *, int, int, audio_params_t *, audio_params_t *, 131static int acu_set_params(void *, int, int, audio_params_t *, audio_params_t *,
132 stream_filter_list_t *, stream_filter_list_t *); 132 stream_filter_list_t *, stream_filter_list_t *);
@@ -220,128 +220,126 @@ acu_wait_gsr(struct acu_softc *sc, u_int @@ -220,128 +220,126 @@ acu_wait_gsr(struct acu_softc *sc, u_int
220 220
221 for (timeout = 5000; timeout; timeout--) { 221 for (timeout = 5000; timeout; timeout--) {
222 if ((rv = acu_reg_read(sc, AC97_GSR)) & bit) { 222 if ((rv = acu_reg_read(sc, AC97_GSR)) & bit) {
223 acu_reg_write(sc, AC97_GSR, rv | bit); 223 acu_reg_write(sc, AC97_GSR, rv | bit);
224 return (0); 224 return (0);
225 } 225 }
226 delay(1); 226 delay(1);
227 } 227 }
228 228
229 return (1); 229 return (1);
230} 230}
231 231
232static int 232static int
233pxaacu_match(struct device *parent, struct cfdata *cf, void *aux) 233pxaacu_match(device_t parent, cfdata_t cf, void *aux)
234{ 234{
235 struct pxaip_attach_args *pxa = aux; 235 struct pxaip_attach_args *pxa = aux;
236 struct pxa2x0_gpioconf *gpioconf; 236 struct pxa2x0_gpioconf *gpioconf;
237 u_int gpio; 237 u_int gpio;
238 int i; 238 int i;
239 239
240 if (pxa->pxa_addr != PXA2X0_AC97_BASE || 240 if (pxa->pxa_addr != PXA2X0_AC97_BASE ||
241 pxa->pxa_intr != PXA2X0_INT_AC97) 241 pxa->pxa_intr != PXA2X0_INT_AC97)
242 return (0); 242 return (0);
243 243
244 gpioconf = CPU_IS_PXA250 ? pxa25x_pxaacu_gpioconf : 244 gpioconf = CPU_IS_PXA250 ? pxa25x_pxaacu_gpioconf :
245 pxa27x_pxaacu_gpioconf; 245 pxa27x_pxaacu_gpioconf;
246 for (i = 0; gpioconf[i].pin != -1; i++) { 246 for (i = 0; gpioconf[i].pin != -1; i++) {
247 gpio = pxa2x0_gpio_get_function(gpioconf[i].pin); 247 gpio = pxa2x0_gpio_get_function(gpioconf[i].pin);
248 if (GPIO_FN(gpio) != GPIO_FN(gpioconf[i].value) || 248 if (GPIO_FN(gpio) != GPIO_FN(gpioconf[i].value) ||
249 GPIO_FN_IS_OUT(gpio) != GPIO_FN_IS_OUT(gpioconf[i].value)) 249 GPIO_FN_IS_OUT(gpio) != GPIO_FN_IS_OUT(gpioconf[i].value))
250 return (0); 250 return (0);
251 } 251 }
252 252
253 pxa->pxa_size = PXA2X0_AC97_SIZE; 253 pxa->pxa_size = PXA2X0_AC97_SIZE;
254 254
255 return (1); 255 return (1);
256} 256}
257 257
258static void 258static void
259pxaacu_attach(struct device *parent, struct device *self, void *aux) 259pxaacu_attach(device_t parent, device_t self, void *aux)
260{ 260{
261 struct acu_softc *sc = (struct acu_softc *)self; 261 struct acu_softc *sc = device_private(self);
262 struct pxaip_attach_args *pxa = aux; 262 struct pxaip_attach_args *pxa = aux;
263 263
 264 sc->sc_dev = self;
264 sc->sc_bust = pxa->pxa_iot; 265 sc->sc_bust = pxa->pxa_iot;
265 sc->sc_dmat = pxa->pxa_dmat; 266 sc->sc_dmat = pxa->pxa_dmat;
266 267
267 aprint_naive("\n"); 268 aprint_naive("\n");
268 aprint_normal(": AC97 Controller\n"); 269 aprint_normal(": AC97 Controller\n");
269 270
270 if (bus_space_map(sc->sc_bust, pxa->pxa_addr, pxa->pxa_size, 0, 271 if (bus_space_map(sc->sc_bust, pxa->pxa_addr, pxa->pxa_size, 0,
271 &sc->sc_bush)) { 272 &sc->sc_bush)) {
272 aprint_error("%s: Can't map registers!\n", sc->sc_dev.dv_xname); 273 aprint_error_dev(self, "Can't map registers!\n");
273 return; 274 return;
274 } 275 }
275 276
276 sc->sc_irqcookie = pxa2x0_intr_establish(pxa->pxa_intr, IPL_AUDIO, 277 sc->sc_irqcookie = pxa2x0_intr_establish(pxa->pxa_intr, IPL_AUDIO,
277 acu_intr, sc); 278 acu_intr, sc);
278 KASSERT(sc->sc_irqcookie != NULL); 279 KASSERT(sc->sc_irqcookie != NULL);
279 280
280 /* Make sure the AC97 clock is enabled */ 281 /* Make sure the AC97 clock is enabled */
281 pxa2x0_clkman_config(CKEN_AC97, true); 282 pxa2x0_clkman_config(CKEN_AC97, true);
282 delay(100); 283 delay(100);
283 284
284 /* Do a cold reset */ 285 /* Do a cold reset */
285 acu_reg_write(sc, AC97_GCR, 0); 286 acu_reg_write(sc, AC97_GCR, 0);
286 delay(100); 287 delay(100);
287 acu_reg_write(sc, AC97_GCR, GCR_COLD_RST); 288 acu_reg_write(sc, AC97_GCR, GCR_COLD_RST);
288 delay(100); 289 delay(100);
289 acu_reg_write(sc, AC97_CAR, 0); 290 acu_reg_write(sc, AC97_CAR, 0);
290 291
291 if (acu_wait_gsr(sc, GSR_PCR)) { 292 if (acu_wait_gsr(sc, GSR_PCR)) {
292 acu_reg_write(sc, AC97_GCR, 0); 293 acu_reg_write(sc, AC97_GCR, 0);
293 delay(100); 294 delay(100);
294 pxa2x0_clkman_config(CKEN_AC97, false); 295 pxa2x0_clkman_config(CKEN_AC97, false);
295 bus_space_unmap(sc->sc_bust, sc->sc_bush, pxa->pxa_size); 296 bus_space_unmap(sc->sc_bust, sc->sc_bush, pxa->pxa_size);
296 aprint_error("%s: Primary codec not ready\n", 297 aprint_error_dev(self, "Primary codec not ready\n");
297 sc->sc_dev.dv_xname); 
298 return; 298 return;
299 } 299 }
300 300
301 sc->sc_dr.ds_addr = pxa->pxa_addr + AC97_PCDR; 301 sc->sc_dr.ds_addr = pxa->pxa_addr + AC97_PCDR;
302 sc->sc_dr.ds_len = 4; 302 sc->sc_dr.ds_len = 4;
303 303
304 sc->sc_codec_if = NULL; 304 sc->sc_codec_if = NULL;
305 sc->sc_host_if.arg = sc; 305 sc->sc_host_if.arg = sc;
306 sc->sc_host_if.attach = acu_codec_attach; 306 sc->sc_host_if.attach = acu_codec_attach;
307 sc->sc_host_if.read = acu_codec_read; 307 sc->sc_host_if.read = acu_codec_read;
308 sc->sc_host_if.write = acu_codec_write; 308 sc->sc_host_if.write = acu_codec_write;
309 sc->sc_host_if.reset = acu_codec_reset; 309 sc->sc_host_if.reset = acu_codec_reset;
310 sc->sc_host_if.flags = NULL; 310 sc->sc_host_if.flags = NULL;
311 sc->sc_in_reset = 0; 311 sc->sc_in_reset = 0;
312 sc->sc_dac_rate = sc->sc_adc_rate = 0; 312 sc->sc_dac_rate = sc->sc_adc_rate = 0;
313 313
314 if (ac97_attach(&sc->sc_host_if, &sc->sc_dev)) { 314 if (ac97_attach(&sc->sc_host_if, sc->sc_dev)) {
315 aprint_error("%s: Failed to attach primary codec\n", 315 aprint_error_dev(self, "Failed to attach primary codec\n");
316 sc->sc_dev.dv_xname); 
317 fail: 316 fail:
318 acu_reg_write(sc, AC97_GCR, 0); 317 acu_reg_write(sc, AC97_GCR, 0);
319 delay(100); 318 delay(100);
320 pxa2x0_clkman_config(CKEN_AC97, false); 319 pxa2x0_clkman_config(CKEN_AC97, false);
321 bus_space_unmap(sc->sc_bust, sc->sc_bush, pxa->pxa_size); 320 bus_space_unmap(sc->sc_bust, sc->sc_bush, pxa->pxa_size);
322 return; 321 return;
323 } 322 }
324 323
325 if (auconv_create_encodings(acu_formats, ACU_NFORMATS, 324 if (auconv_create_encodings(acu_formats, ACU_NFORMATS,
326 &sc->sc_encodings)) { 325 &sc->sc_encodings)) {
327 aprint_error("%s: Failed to create encodings\n", 326 aprint_error_dev(self, "Failed to create encodings\n");
328 sc->sc_dev.dv_xname); 
329 if (sc->sc_codec_if != NULL) 327 if (sc->sc_codec_if != NULL)
330 (sc->sc_codec_if->vtbl->detach)(sc->sc_codec_if); 328 (sc->sc_codec_if->vtbl->detach)(sc->sc_codec_if);
331 goto fail; 329 goto fail;
332 } 330 }
333 331
334 sc->sc_audiodev = audio_attach_mi(&acu_hw_if, sc, &sc->sc_dev); 332 sc->sc_audiodev = audio_attach_mi(&acu_hw_if, sc, sc->sc_dev);
335 333
336 /* 334 /*
337 * As a work-around for braindamage in the PXA250's AC97 controller 335 * As a work-around for braindamage in the PXA250's AC97 controller
338 * (see errata #125), we hold the ACUNIT/Codec in Cold Reset until 336 * (see errata #125), we hold the ACUNIT/Codec in Cold Reset until
339 * acu_open() is called. acu_close() also puts the controller into 337 * acu_open() is called. acu_close() also puts the controller into
340 * Cold Reset. 338 * Cold Reset.
341 * 339 *
342 * While this won't necessarily prevent Rx FIFO overruns, it at least 340 * While this won't necessarily prevent Rx FIFO overruns, it at least
343 * allows the user to recover by closing then re-opening the audio 341 * allows the user to recover by closing then re-opening the audio
344 * device. 342 * device.
345 */ 343 */
346 acu_reg_write(sc, AC97_GCR, 0); 344 acu_reg_write(sc, AC97_GCR, 0);
347 sc->sc_in_reset = 1; 345 sc->sc_in_reset = 1;
@@ -453,66 +451,66 @@ acu_codec_write(void *arg, u_int8_t code @@ -453,66 +451,66 @@ acu_codec_write(void *arg, u_int8_t code
453static int 451static int
454acu_codec_reset(void *arg) 452acu_codec_reset(void *arg)
455{ 453{
456 struct acu_softc *sc = arg; 454 struct acu_softc *sc = arg;
457 u_int32_t rv; 455 u_int32_t rv;
458 456
459 rv = acu_reg_read(sc, AC97_GCR); 457 rv = acu_reg_read(sc, AC97_GCR);
460 acu_reg_write(sc, AC97_GCR, rv | GCR_WARM_RST); 458 acu_reg_write(sc, AC97_GCR, rv | GCR_WARM_RST);
461 delay(100); 459 delay(100);
462 acu_reg_write(sc, AC97_GCR, rv); 460 acu_reg_write(sc, AC97_GCR, rv);
463 delay(100); 461 delay(100);
464 462
465 if (acu_wait_gsr(sc, GSR_PCR)) { 463 if (acu_wait_gsr(sc, GSR_PCR)) {
466 printf("%s: acu_codec_reset: failed to ready after reset\n", 464 aprint_error_dev(sc->sc_dev,
467 sc->sc_dev.dv_xname); 465 "acu_codec_reset: failed to ready after reset\n");
468 return (ETIMEDOUT); 466 return (ETIMEDOUT);
469 } 467 }
470 468
471 return (0); 469 return (0);
472} 470}
473 471
474static int 472static int
475acu_intr(void *arg) 473acu_intr(void *arg)
476{ 474{
477 struct acu_softc *sc = arg; 475 struct acu_softc *sc = arg;
478 u_int32_t gsr, reg; 476 u_int32_t gsr, reg;
479 477
480 gsr = acu_reg_read(sc, AC97_GSR); 478 gsr = acu_reg_read(sc, AC97_GSR);
481 479
482 /* 480 /*
483 * Tx FIFO underruns are no big deal. Just log it and ignore and 481 * Tx FIFO underruns are no big deal. Just log it and ignore and
484 * subsequent underruns until the next time acu_trigger_output() 482 * subsequent underruns until the next time acu_trigger_output()
485 * is called. 483 * is called.
486 */ 484 */
487 if ((gsr & GSR_POINT) && (acu_reg_read(sc, AC97_POCR) & AC97_FEFIE)) { 485 if ((gsr & GSR_POINT) && (acu_reg_read(sc, AC97_POCR) & AC97_FEFIE)) {
488 acu_reg_write(sc, AC97_POCR, 0); 486 acu_reg_write(sc, AC97_POCR, 0);
489 reg = acu_reg_read(sc, AC97_POSR); 487 reg = acu_reg_read(sc, AC97_POSR);
490 acu_reg_write(sc, AC97_POSR, reg); 488 acu_reg_write(sc, AC97_POSR, reg);
491 printf("%s: Tx PCM Fifo underrun\n", sc->sc_dev.dv_xname); 489 aprint_error_dev(sc->sc_dev, "Tx PCM Fifo underrun\n");
492 } 490 }
493 491
494 /* 492 /*
495 * Rx FIFO overruns are a different story. See PAX250 Errata #125 493 * Rx FIFO overruns are a different story. See PAX250 Errata #125
496 * for the gory details. 494 * for the gory details.
497 * I don't see any way to gracefully recover from this problem, 495 * I don't see any way to gracefully recover from this problem,
498 * other than a issuing a Cold Reset in acu_close(). 496 * other than a issuing a Cold Reset in acu_close().
499 * The best we can do here is to report the problem on the console. 497 * The best we can do here is to report the problem on the console.
500 */ 498 */
501 if ((gsr & GSR_PIINT) && (acu_reg_read(sc, AC97_PICR) & AC97_FEFIE)) { 499 if ((gsr & GSR_PIINT) && (acu_reg_read(sc, AC97_PICR) & AC97_FEFIE)) {
502 acu_reg_write(sc, AC97_PICR, 0); 500 acu_reg_write(sc, AC97_PICR, 0);
503 reg = acu_reg_read(sc, AC97_PISR); 501 reg = acu_reg_read(sc, AC97_PISR);
504 acu_reg_write(sc, AC97_PISR, reg); 502 acu_reg_write(sc, AC97_PISR, reg);
505 printf("%s: Rx PCM Fifo overrun\n", sc->sc_dev.dv_xname); 503 aprint_error_dev(sc->sc_dev, "Rx PCM Fifo overrun\n");
506 } 504 }
507 505
508 return (1); 506 return (1);
509} 507}
510 508
511static int 509static int
512acu_open(void *arg, int flags) 510acu_open(void *arg, int flags)
513{ 511{
514 struct acu_softc *sc = arg; 512 struct acu_softc *sc = arg;
515 513
516 /* 514 /*
517 * Deassert Cold Reset 515 * Deassert Cold Reset
518 */ 516 */
@@ -915,46 +913,46 @@ static void @@ -915,46 +913,46 @@ static void
915acu_tx_loop_segment(struct dmac_xfer *dx, int status) 913acu_tx_loop_segment(struct dmac_xfer *dx, int status)
916{ 914{
917 struct acu_softc *sc = dx->dx_cookie; 915 struct acu_softc *sc = dx->dx_cookie;
918 struct acu_dma *ad; 916 struct acu_dma *ad;
919 int s; 917 int s;
920 918
921 if ((ad = sc->sc_txdma) == NULL) 919 if ((ad = sc->sc_txdma) == NULL)
922 panic("acu_tx_loop_segment: bad TX dma descriptor!"); 920 panic("acu_tx_loop_segment: bad TX dma descriptor!");
923 921
924 if (ad->ad_dx != dx) 922 if (ad->ad_dx != dx)
925 panic("acu_tx_loop_segment: xfer mismatch!"); 923 panic("acu_tx_loop_segment: xfer mismatch!");
926 924
927 if (status) { 925 if (status) {
928 printf( 926 aprint_error_dev(sc->sc_dev,
929 "%s: acu_tx_loop_segment: non-zero completion status %d\n", 927 "acu_tx_loop_segment: non-zero completion status %d\n",
930 sc->sc_dev.dv_xname, status); 928 status);
931 } 929 }
932 930
933 s = splaudio(); 931 s = splaudio();
934 (sc->sc_txfunc)(sc->sc_txarg); 932 (sc->sc_txfunc)(sc->sc_txarg);
935 splx(s); 933 splx(s);
936} 934}
937 935
938static void 936static void
939acu_rx_loop_segment(struct dmac_xfer *dx, int status) 937acu_rx_loop_segment(struct dmac_xfer *dx, int status)
940{ 938{
941 struct acu_softc *sc = dx->dx_cookie; 939 struct acu_softc *sc = dx->dx_cookie;
942 struct acu_dma *ad; 940 struct acu_dma *ad;
943 int s; 941 int s;
944 942
945 if ((ad = sc->sc_rxdma) == NULL) 943 if ((ad = sc->sc_rxdma) == NULL)
946 panic("acu_rx_loop_segment: bad RX dma descriptor!"); 944 panic("acu_rx_loop_segment: bad RX dma descriptor!");
947 945
948 if (ad->ad_dx != dx) 946 if (ad->ad_dx != dx)
949 panic("acu_rx_loop_segment: xfer mismatch!"); 947 panic("acu_rx_loop_segment: xfer mismatch!");
950 948
951 if (status) { 949 if (status) {
952 printf( 950 aprint_error_dev(sc->sc_dev,
953 "%s: acu_rx_loop_segment: non-zero completion status %d\n", 951 "acu_rx_loop_segment: non-zero completion status %d\n",
954 sc->sc_dev.dv_xname, status); 952 status);
955 } 953 }
956 954
957 s = splaudio(); 955 s = splaudio();
958 (sc->sc_rxfunc)(sc->sc_rxarg); 956 (sc->sc_rxfunc)(sc->sc_rxarg);
959 splx(s); 957 splx(s);
960} 958}

cvs diff -r1.6 -r1.7 src/sys/arch/arm/xscale/pxa2x0_dmac.c (expand / switch to unified diff)

--- src/sys/arch/arm/xscale/pxa2x0_dmac.c 2009/03/16 11:42:31 1.6
+++ src/sys/arch/arm/xscale/pxa2x0_dmac.c 2011/06/09 17:29:42 1.7
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: pxa2x0_dmac.c,v 1.6 2009/03/16 11:42:31 nonaka Exp $ */ 1/* $NetBSD: pxa2x0_dmac.c,v 1.7 2011/06/09 17:29:42 nonaka Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 2003, 2005 Wasabi Systems, Inc. 4 * Copyright (c) 2003, 2005 Wasabi Systems, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Written by Steve C. Woodford for Wasabi Systems, Inc. 7 * Written by Steve C. Woodford for Wasabi Systems, Inc.
8 * 8 *
9 * Redistribution and use in source and binary forms, with or without 9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions 10 * modification, are permitted provided that the following conditions
11 * are met: 11 * are met:
12 * 1. Redistributions of source code must retain the above copyright 12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer. 13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright 14 * 2. Redistributions in binary form must reproduce the above copyright
@@ -153,27 +153,27 @@ struct dmac_dmover_state { @@ -153,27 +153,27 @@ struct dmac_dmover_state {
153 153
154/* 154/*
155 * Overall dmover(9) backend state 155 * Overall dmover(9) backend state
156 */ 156 */
157struct dmac_dmover { 157struct dmac_dmover {
158 struct dmover_backend dd_backend; 158 struct dmover_backend dd_backend;
159 int dd_busy; 159 int dd_busy;
160 LIST_HEAD(, dmac_dmover_state) dd_free; 160 LIST_HEAD(, dmac_dmover_state) dd_free;
161 struct dmac_dmover_state dd_state[PXA2X0_DMAC_DMOVER_CONCURRENCY]; 161 struct dmac_dmover_state dd_state[PXA2X0_DMAC_DMOVER_CONCURRENCY];
162}; 162};
163#endif 163#endif
164 164
165struct pxadmac_softc { 165struct pxadmac_softc {
166 struct device sc_dev; 166 device_t sc_dev;
167 bus_space_tag_t sc_bust; 167 bus_space_tag_t sc_bust;
168 bus_dma_tag_t sc_dmat; 168 bus_dma_tag_t sc_dmat;
169 bus_space_handle_t sc_bush; 169 bus_space_handle_t sc_bush;
170 void *sc_irqcookie; 170 void *sc_irqcookie;
171 171
172 /* 172 /*
173 * Queue of pending requests, per priority 173 * Queue of pending requests, per priority
174 */ 174 */
175 struct dmac_xfer_state_head sc_queue[DMAC_N_PRIORITIES]; 175 struct dmac_xfer_state_head sc_queue[DMAC_N_PRIORITIES];
176 176
177 /* 177 /*
178 * Queue of pending requests, per peripheral 178 * Queue of pending requests, per peripheral
179 */ 179 */
@@ -206,30 +206,30 @@ struct pxadmac_softc { @@ -206,30 +206,30 @@ struct pxadmac_softc {
206#define DMAC_DESCS_SIZE (DMAC_N_DESCS * sizeof(struct pxa2x0_dma_desc)) 206#define DMAC_DESCS_SIZE (DMAC_N_DESCS * sizeof(struct pxa2x0_dma_desc))
207 struct dmac_desc sc_all_descs[DMAC_N_DESCS]; 207 struct dmac_desc sc_all_descs[DMAC_N_DESCS];
208 u_int sc_free_descs; 208 u_int sc_free_descs;
209 SLIST_HEAD(, dmac_desc) sc_descs; 209 SLIST_HEAD(, dmac_desc) sc_descs;
210 210
211#if (PXA2X0_DMAC_DMOVER_CONCURRENCY > 0) 211#if (PXA2X0_DMAC_DMOVER_CONCURRENCY > 0)
212 /* 212 /*
213 * dmover(9) backend state 213 * dmover(9) backend state
214 */ 214 */
215 struct dmac_dmover sc_dmover; 215 struct dmac_dmover sc_dmover;
216#endif 216#endif
217}; 217};
218 218
219static int pxadmac_match(struct device *, struct cfdata *, void *); 219static int pxadmac_match(device_t, cfdata_t, void *);
220static void pxadmac_attach(struct device *, struct device *, void *); 220static void pxadmac_attach(device_t, device_t, void *);
221 221
222CFATTACH_DECL(pxadmac, sizeof(struct pxadmac_softc), 222CFATTACH_DECL_NEW(pxadmac, sizeof(struct pxadmac_softc),
223 pxadmac_match, pxadmac_attach, NULL, NULL); 223 pxadmac_match, pxadmac_attach, NULL, NULL);
224 224
225static struct pxadmac_softc *pxadmac_sc; 225static struct pxadmac_softc *pxadmac_sc;
226 226
227static void dmac_start(struct pxadmac_softc *, dmac_priority_t); 227static void dmac_start(struct pxadmac_softc *, dmac_priority_t);
228static int dmac_continue_xfer(struct pxadmac_softc *, struct dmac_xfer_state *); 228static int dmac_continue_xfer(struct pxadmac_softc *, struct dmac_xfer_state *);
229static u_int dmac_channel_intr(struct pxadmac_softc *, u_int); 229static u_int dmac_channel_intr(struct pxadmac_softc *, u_int);
230static int dmac_intr(void *); 230static int dmac_intr(void *);
231 231
232#if (PXA2X0_DMAC_DMOVER_CONCURRENCY > 0) 232#if (PXA2X0_DMAC_DMOVER_CONCURRENCY > 0)
233static void dmac_dmover_attach(struct pxadmac_softc *); 233static void dmac_dmover_attach(struct pxadmac_softc *);
234static void dmac_dmover_process(struct dmover_backend *); 234static void dmac_dmover_process(struct dmover_backend *);
235static void dmac_dmover_run(struct dmover_backend *); 235static void dmac_dmover_run(struct dmover_backend *);
@@ -268,55 +268,56 @@ dmac_allocate_channel(struct pxadmac_sof @@ -268,55 +268,56 @@ dmac_allocate_channel(struct pxadmac_sof
268 268
269static inline void 269static inline void
270dmac_free_channel(struct pxadmac_softc *sc, dmac_priority_t priority, 270dmac_free_channel(struct pxadmac_softc *sc, dmac_priority_t priority,
271 u_int channel) 271 u_int channel)
272{ 272{
273 273
274 KDASSERT((u_int)priority < DMAC_N_PRIORITIES); 274 KDASSERT((u_int)priority < DMAC_N_PRIORITIES);
275 275
276 sc->sc_prio[priority].p_pri[channel] = sc->sc_prio[priority].p_first; 276 sc->sc_prio[priority].p_pri[channel] = sc->sc_prio[priority].p_first;
277 sc->sc_prio[priority].p_first = channel; 277 sc->sc_prio[priority].p_first = channel;
278} 278}
279 279
280static int 280static int
281pxadmac_match(struct device *parent, struct cfdata *cf, void *aux) 281pxadmac_match(device_t parent, cfdata_t cf, void *aux)
282{ 282{
283 struct pxaip_attach_args *pxa = aux; 283 struct pxaip_attach_args *pxa = aux;
284 284
285 if (pxadmac_sc || pxa->pxa_addr != PXA2X0_DMAC_BASE || 285 if (pxadmac_sc || pxa->pxa_addr != PXA2X0_DMAC_BASE ||
286 pxa->pxa_intr != PXA2X0_INT_DMA) 286 pxa->pxa_intr != PXA2X0_INT_DMA)
287 return (0); 287 return (0);
288 288
289 pxa->pxa_size = PXA2X0_DMAC_SIZE; 289 pxa->pxa_size = PXA2X0_DMAC_SIZE;
290 290
291 return (1); 291 return (1);
292} 292}
293 293
294static void 294static void
295pxadmac_attach(struct device *parent, struct device *self, void *aux) 295pxadmac_attach(device_t parent, device_t self, void *aux)
296{ 296{
297 struct pxadmac_softc *sc = (struct pxadmac_softc *)self; 297 struct pxadmac_softc *sc = device_private(self);
298 struct pxaip_attach_args *pxa = aux; 298 struct pxaip_attach_args *pxa = aux;
299 struct pxa2x0_dma_desc *dd; 299 struct pxa2x0_dma_desc *dd;
300 int i, nsegs; 300 int i, nsegs;
301 301
 302 sc->sc_dev = self;
302 sc->sc_bust = pxa->pxa_iot; 303 sc->sc_bust = pxa->pxa_iot;
303 sc->sc_dmat = pxa->pxa_dmat; 304 sc->sc_dmat = pxa->pxa_dmat;
304 305
305 aprint_normal(": DMA Controller\n"); 306 aprint_normal(": DMA Controller\n");
306 307
307 if (bus_space_map(sc->sc_bust, pxa->pxa_addr, pxa->pxa_size, 0, 308 if (bus_space_map(sc->sc_bust, pxa->pxa_addr, pxa->pxa_size, 0,
308 &sc->sc_bush)) { 309 &sc->sc_bush)) {
309 aprint_error("%s: Can't map registers!\n", sc->sc_dev.dv_xname); 310 aprint_error_dev(self, "Can't map registers!\n");
310 return; 311 return;
311 } 312 }
312 313
313 pxadmac_sc = sc; 314 pxadmac_sc = sc;
314 315
315 /* 316 /*
316 * Make sure the DMAC is quiescent 317 * Make sure the DMAC is quiescent
317 */ 318 */
318 for (i = 0; i < DMAC_N_CHANNELS; i++) { 319 for (i = 0; i < DMAC_N_CHANNELS; i++) {
319 dmac_reg_write(sc, DMAC_DCSR(i), 0); 320 dmac_reg_write(sc, DMAC_DCSR(i), 0);
320 dmac_reg_write(sc, DMAC_DRCMR(i), 0); 321 dmac_reg_write(sc, DMAC_DRCMR(i), 0);
321 sc->sc_active[i] = NULL; 322 sc->sc_active[i] = NULL;
322 } 323 }
@@ -1176,28 +1177,29 @@ static u_int @@ -1176,28 +1177,29 @@ static u_int
1176dmac_channel_intr(struct pxadmac_softc *sc, u_int channel) 1177dmac_channel_intr(struct pxadmac_softc *sc, u_int channel)
1177{ 1178{
1178 struct dmac_xfer_state *dxs; 1179 struct dmac_xfer_state *dxs;
1179 struct dmac_desc *desc, *ndesc; 1180 struct dmac_desc *desc, *ndesc;
1180 u_int32_t dcsr; 1181 u_int32_t dcsr;
1181 u_int rv = 0; 1182 u_int rv = 0;
1182 1183
1183 dcsr = dmac_reg_read(sc, DMAC_DCSR(channel)); 1184 dcsr = dmac_reg_read(sc, DMAC_DCSR(channel));
1184 dmac_reg_write(sc, DMAC_DCSR(channel), dcsr); 1185 dmac_reg_write(sc, DMAC_DCSR(channel), dcsr);
1185 if (dmac_reg_read(sc, DMAC_DCSR(channel)) & DCSR_STOPSTATE) 1186 if (dmac_reg_read(sc, DMAC_DCSR(channel)) & DCSR_STOPSTATE)
1186 dmac_reg_write(sc, DMAC_DCSR(channel), dcsr & ~DCSR_RUN); 1187 dmac_reg_write(sc, DMAC_DCSR(channel), dcsr & ~DCSR_RUN);
1187 1188
1188 if ((dxs = sc->sc_active[channel]) == NULL) { 1189 if ((dxs = sc->sc_active[channel]) == NULL) {
1189 printf("%s: Stray DMAC interrupt for unallocated channel %d\n", 1190 aprint_error_dev(sc->sc_dev,
1190 sc->sc_dev.dv_xname, channel); 1191 "Stray DMAC interrupt for unallocated channel %d\n",
 1192 channel);
1191 return (0); 1193 return (0);
1192 } 1194 }
1193 1195
1194 /* 1196 /*
1195 * Clear down the interrupt in the DMA Interrupt Register 1197 * Clear down the interrupt in the DMA Interrupt Register
1196 */ 1198 */
1197 dmac_reg_write(sc, DMAC_DINT, (1u << channel)); 1199 dmac_reg_write(sc, DMAC_DINT, (1u << channel));
1198 1200
1199 /* 1201 /*
1200 * If this is a looping request, invoke the 'done' callback and 1202 * If this is a looping request, invoke the 'done' callback and
1201 * return immediately. 1203 * return immediately.
1202 */ 1204 */
1203 if (dxs->dxs_loop_notify != DMAC_DONT_LOOP && 1205 if (dxs->dxs_loop_notify != DMAC_DONT_LOOP &&

cvs diff -r1.13 -r1.14 src/sys/arch/arm/xscale/pxa2x0_gpio.c (expand / switch to unified diff)

--- src/sys/arch/arm/xscale/pxa2x0_gpio.c 2009/08/04 12:11:33 1.13
+++ src/sys/arch/arm/xscale/pxa2x0_gpio.c 2011/06/09 17:29:42 1.14
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: pxa2x0_gpio.c,v 1.13 2009/08/04 12:11:33 kiyohara Exp $ */ 1/* $NetBSD: pxa2x0_gpio.c,v 1.14 2011/06/09 17:29:42 nonaka Exp $ */
2 2
3/* 3/*
4 * Copyright 2003 Wasabi Systems, Inc. 4 * Copyright 2003 Wasabi Systems, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Written by Steve C. Woodford for Wasabi Systems, Inc. 7 * Written by Steve C. Woodford for Wasabi Systems, Inc.
8 * 8 *
9 * Redistribution and use in source and binary forms, with or without 9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions 10 * modification, are permitted provided that the following conditions
11 * are met: 11 * are met:
12 * 1. Redistributions of source code must retain the above copyright 12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer. 13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright 14 * 2. Redistributions in binary form must reproduce the above copyright
@@ -26,27 +26,27 @@ @@ -26,27 +26,27 @@
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE. 35 * POSSIBILITY OF SUCH DAMAGE.
36 */ 36 */
37 37
38#include <sys/cdefs.h> 38#include <sys/cdefs.h>
39__KERNEL_RCSID(0, "$NetBSD: pxa2x0_gpio.c,v 1.13 2009/08/04 12:11:33 kiyohara Exp $"); 39__KERNEL_RCSID(0, "$NetBSD: pxa2x0_gpio.c,v 1.14 2011/06/09 17:29:42 nonaka Exp $");
40 40
41#include "opt_pxa2x0_gpio.h" 41#include "opt_pxa2x0_gpio.h"
42 42
43#include <sys/param.h> 43#include <sys/param.h>
44#include <sys/systm.h> 44#include <sys/systm.h>
45#include <sys/device.h> 45#include <sys/device.h>
46#include <sys/malloc.h> 46#include <sys/malloc.h>
47 47
48#include <machine/intr.h> 48#include <machine/intr.h>
49#include <machine/bus.h> 49#include <machine/bus.h>
50 50
51#include <arm/xscale/pxa2x0cpu.h> 51#include <arm/xscale/pxa2x0cpu.h>
52#include <arm/xscale/pxa2x0reg.h> 52#include <arm/xscale/pxa2x0reg.h>
@@ -55,42 +55,42 @@ __KERNEL_RCSID(0, "$NetBSD: pxa2x0_gpio. @@ -55,42 +55,42 @@ __KERNEL_RCSID(0, "$NetBSD: pxa2x0_gpio.
55 55
56#include "locators.h" 56#include "locators.h"
57 57
58struct gpio_irq_handler { 58struct gpio_irq_handler {
59 struct gpio_irq_handler *gh_next; 59 struct gpio_irq_handler *gh_next;
60 int (*gh_func)(void *); 60 int (*gh_func)(void *);
61 void *gh_arg; 61 void *gh_arg;
62 int gh_spl; 62 int gh_spl;
63 u_int gh_gpio; 63 u_int gh_gpio;
64 int gh_level; 64 int gh_level;
65}; 65};
66 66
67struct pxagpio_softc { 67struct pxagpio_softc {
68 struct device sc_dev; 68 device_t sc_dev;
69 bus_space_tag_t sc_bust; 69 bus_space_tag_t sc_bust;
70 bus_space_handle_t sc_bush; 70 bus_space_handle_t sc_bush;
71 void *sc_irqcookie[4]; 71 void *sc_irqcookie[4];
72 u_int32_t sc_mask[4]; 72 u_int32_t sc_mask[4];
73#ifdef PXAGPIO_HAS_GPION_INTRS 73#ifdef PXAGPIO_HAS_GPION_INTRS
74 struct gpio_irq_handler *sc_handlers[GPIO_NPINS]; 74 struct gpio_irq_handler *sc_handlers[GPIO_NPINS];
75#else 75#else
76 struct gpio_irq_handler *sc_handlers[2]; 76 struct gpio_irq_handler *sc_handlers[2];
77#endif 77#endif
78}; 78};
79 79
80static int pxagpio_match(struct device *, struct cfdata *, void *); 80static int pxagpio_match(device_t, cfdata_t, void *);
81static void pxagpio_attach(struct device *, struct device *, void *); 81static void pxagpio_attach(device_t, device_t, void *);
82 82
83CFATTACH_DECL(pxagpio, sizeof(struct pxagpio_softc), 83CFATTACH_DECL_NEW(pxagpio, sizeof(struct pxagpio_softc),
84 pxagpio_match, pxagpio_attach, NULL, NULL); 84 pxagpio_match, pxagpio_attach, NULL, NULL);
85 85
86static struct pxagpio_softc *pxagpio_softc; 86static struct pxagpio_softc *pxagpio_softc;
87static vaddr_t pxagpio_regs; 87static vaddr_t pxagpio_regs;
88#define GPIO_BOOTSTRAP_REG(reg) \ 88#define GPIO_BOOTSTRAP_REG(reg) \
89 (*((volatile u_int32_t *)(pxagpio_regs + (reg)))) 89 (*((volatile u_int32_t *)(pxagpio_regs + (reg))))
90 90
91static int gpio_intr0(void *); 91static int gpio_intr0(void *);
92static int gpio_intr1(void *); 92static int gpio_intr1(void *);
93#ifdef PXAGPIO_HAS_GPION_INTRS 93#ifdef PXAGPIO_HAS_GPION_INTRS
94static int gpio_dispatch(struct pxagpio_softc *, int); 94static int gpio_dispatch(struct pxagpio_softc *, int);
95static int gpio_intrN(void *); 95static int gpio_intrN(void *);
96#endif 96#endif
@@ -110,51 +110,52 @@ static inline void @@ -110,51 +110,52 @@ static inline void
110pxagpio_reg_write(struct pxagpio_softc *sc, int reg, u_int32_t val) 110pxagpio_reg_write(struct pxagpio_softc *sc, int reg, u_int32_t val)
111{ 111{
112 if (__predict_true(sc != NULL)) 112 if (__predict_true(sc != NULL))
113 bus_space_write_4(sc->sc_bust, sc->sc_bush, reg, val); 113 bus_space_write_4(sc->sc_bust, sc->sc_bush, reg, val);
114 else 114 else
115 if (pxagpio_regs) 115 if (pxagpio_regs)
116 GPIO_BOOTSTRAP_REG(reg) = val; 116 GPIO_BOOTSTRAP_REG(reg) = val;
117 else 117 else
118 panic("pxagpio_reg_write: not bootstrapped"); 118 panic("pxagpio_reg_write: not bootstrapped");
119 return; 119 return;
120} 120}
121 121
122static int 122static int
123pxagpio_match(struct device *parent, struct cfdata *cf, void *aux) 123pxagpio_match(device_t parent, cfdata_t cf, void *aux)
124{ 124{
125 struct pxaip_attach_args *pxa = aux; 125 struct pxaip_attach_args *pxa = aux;
126 126
127 if (pxagpio_softc != NULL || pxa->pxa_addr != PXA2X0_GPIO_BASE) 127 if (pxagpio_softc != NULL || pxa->pxa_addr != PXA2X0_GPIO_BASE)
128 return (0); 128 return (0);
129 129
130 pxa->pxa_size = PXA2X0_GPIO_SIZE; 130 pxa->pxa_size = PXA2X0_GPIO_SIZE;
131 131
132 return (1); 132 return (1);
133} 133}
134 134
135static void 135static void
136pxagpio_attach(struct device *parent, struct device *self, void *aux) 136pxagpio_attach(device_t parent, device_t self, void *aux)
137{ 137{
138 struct pxagpio_softc *sc = (struct pxagpio_softc *)self; 138 struct pxagpio_softc *sc = device_private(self);
139 struct pxaip_attach_args *pxa = aux; 139 struct pxaip_attach_args *pxa = aux;
140 140
 141 sc->sc_dev = self;
141 sc->sc_bust = pxa->pxa_iot; 142 sc->sc_bust = pxa->pxa_iot;
142 143
143 aprint_normal(": GPIO Controller\n"); 144 aprint_normal(": GPIO Controller\n");
144 145
145 if (bus_space_map(sc->sc_bust, pxa->pxa_addr, pxa->pxa_size, 0, 146 if (bus_space_map(sc->sc_bust, pxa->pxa_addr, pxa->pxa_size, 0,
146 &sc->sc_bush)) { 147 &sc->sc_bush)) {
147 aprint_error("%s: Can't map registers!\n", sc->sc_dev.dv_xname); 148 aprint_error_dev(self, "Can't map registers!\n");
148 return; 149 return;
149 } 150 }
150 151
151 pxagpio_regs = (vaddr_t)bus_space_vaddr(sc->sc_bust, sc->sc_bush); 152 pxagpio_regs = (vaddr_t)bus_space_vaddr(sc->sc_bust, sc->sc_bush);
152 153
153 memset(sc->sc_handlers, 0, sizeof(sc->sc_handlers)); 154 memset(sc->sc_handlers, 0, sizeof(sc->sc_handlers));
154 155
155 /* 156 /*
156 * Disable all GPIO interrupts 157 * Disable all GPIO interrupts
157 */ 158 */
158 pxagpio_reg_write(sc, GPIO_GRER0, 0); 159 pxagpio_reg_write(sc, GPIO_GRER0, 0);
159 pxagpio_reg_write(sc, GPIO_GRER1, 0); 160 pxagpio_reg_write(sc, GPIO_GRER1, 0);
160 pxagpio_reg_write(sc, GPIO_GRER2, 0); 161 pxagpio_reg_write(sc, GPIO_GRER2, 0);
@@ -166,28 +167,27 @@ pxagpio_attach(struct device *parent, st @@ -166,28 +167,27 @@ pxagpio_attach(struct device *parent, st
166 pxagpio_reg_write(sc, GPIO_GEDR2, ~0); 167 pxagpio_reg_write(sc, GPIO_GEDR2, ~0);
167#ifdef CPU_XSCALE_PXA270 168#ifdef CPU_XSCALE_PXA270
168 if (CPU_IS_PXA270) { 169 if (CPU_IS_PXA270) {
169 pxagpio_reg_write(sc, GPIO_GRER3, 0); 170 pxagpio_reg_write(sc, GPIO_GRER3, 0);
170 pxagpio_reg_write(sc, GPIO_GFER3, 0); 171 pxagpio_reg_write(sc, GPIO_GFER3, 0);
171 pxagpio_reg_write(sc, GPIO_GEDR3, ~0); 172 pxagpio_reg_write(sc, GPIO_GEDR3, ~0);
172 } 173 }
173#endif 174#endif
174 175
175#ifdef PXAGPIO_HAS_GPION_INTRS 176#ifdef PXAGPIO_HAS_GPION_INTRS
176 sc->sc_irqcookie[2] = pxa2x0_intr_establish(PXA2X0_INT_GPION, IPL_BIO, 177 sc->sc_irqcookie[2] = pxa2x0_intr_establish(PXA2X0_INT_GPION, IPL_BIO,
177 gpio_intrN, sc); 178 gpio_intrN, sc);
178 if (sc->sc_irqcookie[2] == NULL) { 179 if (sc->sc_irqcookie[2] == NULL) {
179 aprint_error("%s: failed to hook main GPIO interrupt\n", 180 aprint_error_dev(self, "failed to hook main GPIO interrupt\n");
180 sc->sc_dev.dv_xname); 
181 return; 181 return;
182 } 182 }
183#endif 183#endif
184 184
185 sc->sc_irqcookie[0] = sc->sc_irqcookie[1] = NULL; 185 sc->sc_irqcookie[0] = sc->sc_irqcookie[1] = NULL;
186 186
187 pxagpio_softc = sc; 187 pxagpio_softc = sc;
188} 188}
189 189
190void 190void
191pxa2x0_gpio_bootstrap(vaddr_t gpio_regs) 191pxa2x0_gpio_bootstrap(vaddr_t gpio_regs)
192{ 192{
193 193
@@ -313,47 +313,45 @@ pxa2x0_gpio_intr_disestablish(void *cook @@ -313,47 +313,45 @@ pxa2x0_gpio_intr_disestablish(void *cook
313#endif 313#endif
314 } 314 }
315 315
316 free(gh, M_DEVBUF); 316 free(gh, M_DEVBUF);
317} 317}
318 318
319static int 319static int
320gpio_intr0(void *arg) 320gpio_intr0(void *arg)
321{ 321{
322 struct pxagpio_softc *sc = arg; 322 struct pxagpio_softc *sc = arg;
323 323
324#ifdef DIAGNOSTIC 324#ifdef DIAGNOSTIC
325 if (sc->sc_handlers[0] == NULL) { 325 if (sc->sc_handlers[0] == NULL) {
326 printf("%s: stray GPIO#0 edge interrupt\n", 326 aprint_error_dev(sc->sc_dev, "stray GPIO#0 edge interrupt\n");
327 sc->sc_dev.dv_xname); 
328 return (0); 327 return (0);
329 } 328 }
330#endif 329#endif
331 330
332 bus_space_write_4(sc->sc_bust, sc->sc_bush, GPIO_REG(GPIO_GEDR0, 0), 331 bus_space_write_4(sc->sc_bust, sc->sc_bush, GPIO_REG(GPIO_GEDR0, 0),
333 GPIO_BIT(0)); 332 GPIO_BIT(0));
334 333
335 return ((sc->sc_handlers[0]->gh_func)(sc->sc_handlers[0]->gh_arg)); 334 return ((sc->sc_handlers[0]->gh_func)(sc->sc_handlers[0]->gh_arg));
336} 335}
337 336
338static int 337static int
339gpio_intr1(void *arg) 338gpio_intr1(void *arg)
340{ 339{
341 struct pxagpio_softc *sc = arg; 340 struct pxagpio_softc *sc = arg;
342 341
343#ifdef DIAGNOSTIC 342#ifdef DIAGNOSTIC
344 if (sc->sc_handlers[1] == NULL) { 343 if (sc->sc_handlers[1] == NULL) {
345 printf("%s: stray GPIO#1 edge interrupt\n", 344 aprint_error_dev(sc->sc_dev, "stray GPIO#1 edge interrupt\n");
346 sc->sc_dev.dv_xname); 
347 return (0); 345 return (0);
348 } 346 }
349#endif 347#endif
350 348
351 bus_space_write_4(sc->sc_bust, sc->sc_bush, GPIO_REG(GPIO_GEDR0, 1), 349 bus_space_write_4(sc->sc_bust, sc->sc_bush, GPIO_REG(GPIO_GEDR0, 1),
352 GPIO_BIT(1)); 350 GPIO_BIT(1));
353 351
354 return ((sc->sc_handlers[1]->gh_func)(sc->sc_handlers[1]->gh_arg)); 352 return ((sc->sc_handlers[1]->gh_func)(sc->sc_handlers[1]->gh_arg));
355} 353}
356 354
357#ifdef PXAGPIO_HAS_GPION_INTRS 355#ifdef PXAGPIO_HAS_GPION_INTRS
358static int 356static int
359gpio_dispatch(struct pxagpio_softc *sc, int gpio_base) 357gpio_dispatch(struct pxagpio_softc *sc, int gpio_base)
@@ -375,48 +373,50 @@ gpio_dispatch(struct pxagpio_softc *sc,  @@ -375,48 +373,50 @@ gpio_dispatch(struct pxagpio_softc *sc,
375 return (0); 373 return (0);
376 374
377 /* Acknowledge pending interrupts. */ 375 /* Acknowledge pending interrupts. */
378 pxagpio_reg_write(sc, GPIO_REG(GPIO_GEDR0, gpio_base), gedr); 376 pxagpio_reg_write(sc, GPIO_REG(GPIO_GEDR0, gpio_base), gedr);
379 377
380 bank = GPIO_BANK(gpio_base); 378 bank = GPIO_BANK(gpio_base);
381 379
382 /* 380 /*
383 * We're only interested in those for which we have a handler 381 * We're only interested in those for which we have a handler
384 * registered 382 * registered
385 */ 383 */
386#ifdef DEBUG 384#ifdef DEBUG
387 if ((gedr & sc->sc_mask[bank]) == 0) { 385 if ((gedr & sc->sc_mask[bank]) == 0) {
388 printf("%s: stray GPIO interrupt. Bank %d, GEDR 0x%08x, mask 0x%08x\n", 386 aprint_error_dev(sc->sc_dev,
389 sc->sc_dev.dv_xname, bank, gedr, sc->sc_mask[bank]); 387 "stray GPIO interrupt. Bank %d, GEDR 0x%08x, mask 0x%08x\n",
 388 bank, gedr, sc->sc_mask[bank]);
390 return (1); /* XXX: Pretend we dealt with it */ 389 return (1); /* XXX: Pretend we dealt with it */
391 } 390 }
392#endif 391#endif
393 392
394 gedr &= sc->sc_mask[bank]; 393 gedr &= sc->sc_mask[bank];
395 ghp = &sc->sc_handlers[gpio_base]; 394 ghp = &sc->sc_handlers[gpio_base];
396 if (CPU_IS_PXA270) 395 if (CPU_IS_PXA270)
397 pins = (gpio_base < 96) ? 32 : 25; 396 pins = (gpio_base < 96) ? 32 : 25;
398 else 397 else
399 pins = (gpio_base < 64) ? 32 : 17; 398 pins = (gpio_base < 64) ? 32 : 17;
400 handled = 0; 399 handled = 0;
401 400
402 for (i = 0, mask = 1; i < pins && gedr; i++, ghp++, mask <<= 1) { 401 for (i = 0, mask = 1; i < pins && gedr; i++, ghp++, mask <<= 1) {
403 if ((gedr & mask) == 0) 402 if ((gedr & mask) == 0)
404 continue; 403 continue;
405 gedr &= ~mask; 404 gedr &= ~mask;
406 405
407 if ((gh = *ghp) == NULL) { 406 if ((gh = *ghp) == NULL) {
408 printf("%s: unhandled GPIO interrupt. GPIO#%d\n", 407 aprint_error_dev(sc->sc_dev,
409 sc->sc_dev.dv_xname, gpio_base + i); 408 "unhandled GPIO interrupt. GPIO#%d\n",
 409 gpio_base + i);
410 continue; 410 continue;
411 } 411 }
412 412
413 s = _splraise(gh->gh_spl); 413 s = _splraise(gh->gh_spl);
414 do { 414 do {
415 nhandled = (gh->gh_func)(gh->gh_arg); 415 nhandled = (gh->gh_func)(gh->gh_arg);
416 handled |= nhandled; 416 handled |= nhandled;
417 gh = gh->gh_next; 417 gh = gh->gh_next;
418 } while (gh != NULL); 418 } while (gh != NULL);
419 splx(s); 419 splx(s);
420 } 420 }
421 421
422 return (handled); 422 return (handled);

cvs diff -r1.3 -r1.4 src/sys/arch/arm/xscale/pxa2x0_udc.c (expand / switch to unified diff)

--- src/sys/arch/arm/xscale/pxa2x0_udc.c 2009/08/09 06:24:03 1.3
+++ src/sys/arch/arm/xscale/pxa2x0_udc.c 2011/06/09 17:29:42 1.4
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: pxa2x0_udc.c,v 1.3 2009/08/09 06:24:03 kiyohara Exp $ */ 1/* $NetBSD: pxa2x0_udc.c,v 1.4 2011/06/09 17:29:42 nonaka Exp $ */
2/* $OpenBSD: pxa27x_udc.c,v 1.5 2005/03/30 14:24:39 dlg Exp $ */ 2/* $OpenBSD: pxa27x_udc.c,v 1.5 2005/03/30 14:24:39 dlg Exp $ */
3 3
4/* 4/*
5 * Copyright (c) 2005 David Gwynne <dlg@openbsd.org> 5 * Copyright (c) 2005 David Gwynne <dlg@openbsd.org>
6 * 6 *
7 * Permission to use, copy, modify, and distribute this software for any 7 * Permission to use, copy, modify, and distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above 8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies. 9 * copyright notice and this permission notice appear in all copies.
10 * 10 *
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
@@ -21,94 +21,95 @@ @@ -21,94 +21,95 @@
21#include <sys/systm.h> 21#include <sys/systm.h>
22#include <sys/device.h> 22#include <sys/device.h>
23#include <sys/kernel.h> 23#include <sys/kernel.h>
24 24
25#include <machine/intr.h> 25#include <machine/intr.h>
26#include <machine/bus.h> 26#include <machine/bus.h>
27 27
28#include <arm/xscale/pxa2x0cpu.h> 28#include <arm/xscale/pxa2x0cpu.h>
29#include <arm/xscale/pxa2x0reg.h> 29#include <arm/xscale/pxa2x0reg.h>
30#include <arm/xscale/pxa2x0var.h> 30#include <arm/xscale/pxa2x0var.h>
31#include <arm/xscale/pxa2x0_gpio.h> 31#include <arm/xscale/pxa2x0_gpio.h>
32 32
33struct pxaudc_softc { 33struct pxaudc_softc {
34 struct device sc_dev; 34 device_t sc_dev;
35 bus_space_tag_t sc_iot; 35 bus_space_tag_t sc_iot;
36 bus_space_handle_t sc_ioh; 36 bus_space_handle_t sc_ioh;
37 bus_size_t sc_size; 37 bus_size_t sc_size;
38 38
39 void *sc_powerhook; 39 void *sc_powerhook;
40}; 40};
41 41
42static int pxaudc_match(struct device *, struct cfdata *, void *); 42static int pxaudc_match(device_t, cfdata_t, void *);
43static void pxaudc_attach(struct device *, struct device *, void *); 43static void pxaudc_attach(device_t, device_t, void *);
44static int pxaudc_detach(struct device *, int); 44static int pxaudc_detach(device_t, int);
45 45
46CFATTACH_DECL(pxaudc, sizeof(struct pxaudc_softc), 46CFATTACH_DECL_NEW(pxaudc, sizeof(struct pxaudc_softc),
47 pxaudc_match, pxaudc_attach, pxaudc_detach, NULL); 47 pxaudc_match, pxaudc_attach, pxaudc_detach, NULL);
48 48
49static void pxaudc_power(int, void *); 49static void pxaudc_power(int, void *);
50static void pxaudc_enable(struct pxaudc_softc *); 50static void pxaudc_enable(struct pxaudc_softc *);
51 51
52static int 52static int
53pxaudc_match(struct device *parent, struct cfdata *cf, void *aux) 53pxaudc_match(device_t parent, cfdata_t cf, void *aux)
54{ 54{
55 struct pxaip_attach_args *pxa = aux; 55 struct pxaip_attach_args *pxa = aux;
56 56
57 if (CPU_IS_PXA270 && strcmp(pxa->pxa_name, cf->cf_name) == 0) { 57 if (CPU_IS_PXA270 && strcmp(pxa->pxa_name, cf->cf_name) == 0) {
58 pxa->pxa_size = PXA270_USBDC_SIZE; 58 pxa->pxa_size = PXA270_USBDC_SIZE;
59 return 1; 59 return 1;
60 } 60 }
61 return 0; 61 return 0;
62} 62}
63 63
64static void 64static void
65pxaudc_attach(struct device *parent, struct device *self, void *aux) 65pxaudc_attach(device_t parent, device_t self, void *aux)
66{ 66{
67 struct pxaudc_softc *sc = (struct pxaudc_softc *)self; 67 struct pxaudc_softc *sc = device_private(self);
68 struct pxaip_attach_args *pxa = (struct pxaip_attach_args *)aux; 68 struct pxaip_attach_args *pxa = (struct pxaip_attach_args *)aux;
69 69
 70 sc->sc_dev = self;
70 sc->sc_iot = pxa->pxa_iot; 71 sc->sc_iot = pxa->pxa_iot;
71 sc->sc_size = 0; 72 sc->sc_size = 0;
72 sc->sc_powerhook = NULL; 73 sc->sc_powerhook = NULL;
73 74
 75 aprint_normal(": USB Device Controller\n");
 76 aprint_naive("\n");
 77
74 if (bus_space_map(sc->sc_iot, pxa->pxa_addr, pxa->pxa_size, 0, 78 if (bus_space_map(sc->sc_iot, pxa->pxa_addr, pxa->pxa_size, 0,
75 &sc->sc_ioh)) { 79 &sc->sc_ioh)) {
76 aprint_error(": couldn't map memory space\n"); 80 aprint_error_dev(self, "couldn't map memory space\n");
77 return; 81 return;
78 } 82 }
79 sc->sc_size = pxa->pxa_size; 83 sc->sc_size = pxa->pxa_size;
80 84
81 printf(": PXA2x0 USB Device Controller\n"); 
82 
83 bus_space_barrier(sc->sc_iot, sc->sc_ioh, 0, sc->sc_size, 85 bus_space_barrier(sc->sc_iot, sc->sc_ioh, 0, sc->sc_size,
84 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE); 86 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE);
85 87
86 pxa2x0_clkman_config(CKEN_USBDC, 1); 88 pxa2x0_clkman_config(CKEN_USBDC, 1);
87 89
88 pxaudc_enable(sc); 90 pxaudc_enable(sc);
89 91
90 sc->sc_powerhook = powerhook_establish(sc->sc_dev.dv_xname, 92 sc->sc_powerhook = powerhook_establish(device_xname(self),
91 pxaudc_power, sc); 93 pxaudc_power, sc);
92 if (sc->sc_powerhook == NULL) { 94 if (sc->sc_powerhook == NULL) {
93 aprint_error("%s: unable to establish powerhook.\n", 95 aprint_error_dev(self, "unable to establish powerhook.\n");
94 sc->sc_dev.dv_xname); 
95 } 96 }
96} 97}
97 98
98static int 99static int
99pxaudc_detach(struct device *self, int flags) 100pxaudc_detach(device_t self, int flags)
100{ 101{
101 struct pxaudc_softc *sc = (struct pxaudc_softc *)self; 102 struct pxaudc_softc *sc = device_private(self);
102 103
103 if (sc->sc_powerhook) 104 if (sc->sc_powerhook)
104 powerhook_disestablish(sc->sc_powerhook); 105 powerhook_disestablish(sc->sc_powerhook);
105 106
106 if (sc->sc_size) { 107 if (sc->sc_size) {
107 bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_size); 108 bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_size);
108 sc->sc_size = 0; 109 sc->sc_size = 0;
109 } 110 }
110 111
111 return 0; 112 return 0;
112} 113}
113 114
114static void 115static void