intr.h must not include cpu due to deadly embrace with SOFTINT_COUNT. Cleanup intr.h so MD definitions can overload common definitions. Rototill pic/intr.c. Virtual IRQs can now be reclaimed. separate virq from hwirq from picirq. Redo intr mask calculations. tested on pmppc and macppc (MP).

(matt)

 @@ -1,14 +1,14 @@
-/*	$NetBSD: intr.h,v 1.7 2011/06/17 05:15:22 matt Exp $ */
+/*	$NetBSD: intr.h,v 1.8 2011/06/17 23:36:17 matt Exp $ */
 /*-
  * Copyright (c) 2007 Michael Lorenz
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
 @@ -18,27 +18,27 @@
  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 #ifndef _LOCORE
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: intr.h,v 1.7 2011/06/17 05:15:22 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: intr.h,v 1.8 2011/06/17 23:36:17 matt Exp $");
 #endif
 #ifndef POWERPC_INTR_MACHDEP_H
 #define POWERPC_INTR_MACHDEP_H
 #define	__HAVE_FAST_SOFTINTS	1
 #ifndef _LOCORE
 void *intr_establish(int, int, int, int (*)(void *), void *);
 void intr_disestablish(void *);
 const char *intr_typename(int);
 void genppc_cpu_configure(void);
 #endif
 @@ -50,62 +50,66 @@ void genppc_cpu_configure(void);
 #define	IPL_SOFTNET	3	/* protocol stacks */
 #define	IPL_SOFTSERIAL	4	/* serial */
 #define	IPL_VM		5	/* memory allocation */
 #define	IPL_SCHED	6
 #define	IPL_HIGH	7	/* everything */
 #define	NIPL		8
 /* Interrupt sharing types. */
 #define	IST_NONE	0	/* none */
 #define	IST_PULSE	1	/* pulsed */
 #define	IST_EDGE	2	/* edge-triggered */
 #define	IST_LEVEL	3	/* level-triggered */
 #ifdef _LOCORE
 #define splhigh __splhigh
 #endif
 #ifndef _LOCORE
 /*
  * Interrupt handler chains.  intr_establish() inserts a handler into
  * the list.  The handler is called with its (single) argument.
  */
 struct intrhand {
 	int	(*ih_fun)(void *);
 	void	*ih_arg;
 	struct	intrhand *ih_next;
 	int	ih_ipl;
-	int	ih_irq;
+	int	ih_virq;
 };
 int splraise(int);
 int spllower(int);
 void splx(int);
 void softint_fast_dispatch(struct lwp *, int);
 #define softint_init_md	powerpc_softint_init_md
 #define softint_trigger		powerpc_softint_trigger
-typedef u_int imask_t;
+#ifdef __IMASK_T
 typedef __IMASK_T imask_t;
 #else
 typedef uint32_t imask_t;
 #endif
 extern imask_t imask[];
-#define NVIRQ		32	/* 32 virtual IRQs */
+#define NVIRQ		(sizeof(imask_t)*8)	/* 32 virtual IRQs */
 #ifndef NIRQ
 #define NIRQ		128	/* up to 128 HW IRQs */
 #endif
-#define HWIRQ_MAX       (NVIRQ - 5 - 1)
+#define HWIRQ_MAX       (NVIRQ - 1)
-#define HWIRQ_MASK      0x07ffffff
+#define HWIRQ_MASK     	(~(imask_t)0 >> 1)
-#define MS_PENDING(p)	(31 - cntlzw(p))
+#define	PIC_VIRQ_TO_MASK(v)	__BIT(HWIRQ_MAX - (v))
 #define PIC_VIRQ_MS_PENDING(p)	__builtin_clz(p)
 #define spl0()		spllower(0)
 typedef int ipl_t;
 typedef struct {
 	ipl_t _ipl;
 } ipl_cookie_t;
 static inline ipl_cookie_t
 makeiplcookie(ipl_t ipl)
+{
 	return (ipl_cookie_t){._ipl = ipl};

 @@ -1,14 +1,14 @@
-/*	$NetBSD: intr.c,v 1.14 2011/06/17 05:15:23 matt Exp $ */
+/*	$NetBSD: intr.c,v 1.15 2011/06/17 23:36:18 matt Exp $ */
 /*-
  * Copyright (c) 2007 Michael Lorenz
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
 @@ -17,27 +17,27 @@
  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.14 2011/06/17 05:15:23 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.15 2011/06/17 23:36:18 matt Exp $");
 #include "opt_multiprocessor.h"
 #define __INTR_PRIVATE
 #include <sys/param.h>
 #include <sys/malloc.h>
 #include <sys/kernel.h>
 #include <sys/cpu.h>
 #include <arch/powerpc/pic/picvar.h>
 #include "opt_pic.h"
 #include "opt_interrupt.h"
 @@ -45,147 +45,142 @@ __KERNEL_RCSID(0, "$NetBSD: intr.c,v 1.1
 #include <machine/isa_machdep.h>
 #endif
 #ifdef MULTIPROCESSOR
 #include <arch/powerpc/pic/ipivar.h>
 #endif
 #ifdef __HAVE_FAST_SOFTINTS
 #include <powerpc/softint.h>
 #endif
 #define MAX_PICS	8	/* 8 PICs ought to be enough for everyone */
-#define	LEGAL_VIRQ(x)	((x) >= 0 && (x) < NVIRQ)
+#define	PIC_VIRQ_LEGAL_P(x)	((u_int)(x) < NVIRQ)
 struct pic_ops *pics[MAX_PICS];
 int num_pics = 0;
 int max_base = 0;
-uint8_t	virq[NIRQ];
+uint8_t	virq_map[NIRQ];
-int	virq_max = 0;
+imask_t virq_mask = HWIRQ_MASK;
 imask_t	imask[NIPL];
 int	primary_pic = 0;
 static int	fakeintr(void *);
-static int	mapirq(uint32_t);
+static int	mapirq(int);
 static void	intr_calculatemasks(void);
-static struct pic_ops *find_pic_by_irq(int);
+static struct pic_ops *find_pic_by_hwirq(int);
 static struct intr_source intrsources[NVIRQ];
 void
 pic_init(void)
+{
-	for (u_int i = 0; i < NIRQ; i++)
+	/* everything is in bss, no reason to zero it. */
 		virq[i] = 0;
 	memset(intrsources, 0, sizeof(intrsources));
+}
 int
 pic_add(struct pic_ops *pic)
+{
 	if (num_pics >= MAX_PICS)
 		return -1;
 	pics[num_pics] = pic;
 	pic->pic_intrbase = max_base;
 	max_base += pic->pic_numintrs;
 	num_pics++;
 	return pic->pic_intrbase;
+}
 void
 pic_finish_setup(void)
+{
-	struct pic_ops *pic;
+	for (size_t i = 0; i < num_pics; i++) {
-	int i;
+		struct pic_ops * const pic = pics[i];
 	for (i = 0; i < num_pics; i++) {
 		pic = pics[i];
 		if (pic->pic_finish_setup != NULL)
 			pic->pic_finish_setup(pic);
+	}
+}
 static struct pic_ops *
-find_pic_by_irq(int irq)
+find_pic_by_hwirq(int hwirq)
+{
 	for (u_int base = 0; base < num_pics; base++) {
 		struct pic_ops * const pic = pics[base];
-		if (pic->pic_intrbase <= irq
+		if (pic->pic_intrbase <= hwirq
-		    && irq < pic->pic_intrbase + pic->pic_numintrs) {
+		    && hwirq < pic->pic_intrbase + pic->pic_numintrs) {
 			return pic;
+		}
+	}
 	return NULL;
+}
 static int
 fakeintr(void *arg)
+{
 	return 0;
+}
 /*
  * Register an interrupt handler.
  */
 void *
 intr_establish(int hwirq, int type, int ipl, int (*ih_fun)(void *),
     void *ih_arg)
+{
 	struct intrhand **p, *q, *ih;
 	struct intr_source *is;
 	struct pic_ops *pic;
 	static struct intrhand fakehand;
-	int irq, maxipl = ipl;
+	int maxipl = ipl;
 	if (maxipl == IPL_NONE)
 		maxipl = IPL_HIGH;
 	if (hwirq >= max_base) {
 		panic("%s: bogus IRQ %d, max is %d", __func__, hwirq,
 		    max_base - 1);
+	}
-	pic = find_pic_by_irq(hwirq);
+	pic = find_pic_by_hwirq(hwirq);
 	if (pic == NULL) {
 		panic("%s: cannot find a pic for IRQ %d", __func__, hwirq);
+	}
-	irq = mapirq(hwirq);
+	const int virq = mapirq(hwirq);
 	/* no point in sleeping unless someone can free memory. */
 	ih = malloc(sizeof *ih, M_DEVBUF, cold ? M_NOWAIT : M_WAITOK);
 	if (ih == NULL)
 		panic("intr_establish: can't malloc handler info");
-	if (!LEGAL_VIRQ(irq) || type == IST_NONE)
+	if (!PIC_VIRQ_LEGAL_P(virq) || type == IST_NONE)
-		panic("intr_establish: bogus irq (%d) or type (%d)", irq, type);
+		panic("intr_establish: bogus irq (%d) or type (%d)",
 		    hwirq, type);
-	is = &intrsources[irq];
+	struct intr_source * const is = &intrsources[virq];
 	switch (is->is_type) {
 	case IST_NONE:
 		is->is_type = type;
 		break;
 	case IST_EDGE:
 	case IST_LEVEL:
 		if (type == is->is_type)
 			break;
 		/* FALLTHROUGH */
 	case IST_PULSE:
 		if (type != IST_NONE)
 			panic("intr_establish: can't share %s with %s",
 			    intr_typename(is->is_type),
 			    intr_typename(type));
 		break;
+	}
 	if (is->is_hand == NULL) {
 		snprintf(is->is_source, sizeof(is->is_source), "irq %d",
 		    is->is_hwirq);
 		evcnt_attach_dynamic(&is->is_ev, EVCNT_TYPE_INTR, NULL,
 		    pic->pic_name, is->is_source);
+	}
 @@ -205,27 +200,27 @@ intr_establish(int hwirq, int type, int
 	 * until masking is set up.
 	 */
 	fakehand.ih_ipl = ipl;
 	fakehand.ih_fun = fakeintr;
 	*p = &fakehand;
 	/*
 	 * Poke the real handler in now.
 	 */
 	ih->ih_fun = ih_fun;
 	ih->ih_arg = ih_arg;
 	ih->ih_next = NULL;
 	ih->ih_ipl = ipl;
-	ih->ih_irq = irq;
+	ih->ih_virq = virq;
 	*p = ih;
 	if (pic->pic_establish_irq != NULL)
 		pic->pic_establish_irq(pic, hwirq - pic->pic_intrbase,
 		    is->is_type, maxipl);
 	/*
 	 * Remember the highest IPL used by this handler.
 	 */
 	is->is_ipl = maxipl;
 	/*
 	 * now that the handler is established we're actually ready to
 @@ -239,33 +234,33 @@ intr_establish(int hwirq, int type, int
 void
 dummy_pic_establish_intr(struct pic_ops *pic, int irq, int type, int pri)
+{
+}
 /*
  * Deregister an interrupt handler.
  */
 void
 intr_disestablish(void *arg)
+{
 	struct intrhand * const ih = arg;
-	const int irq = ih->ih_irq;
+	const int virq = ih->ih_virq;
-	struct intr_source * const is = &intrsources[irq];
+	struct intr_source * const is = &intrsources[virq];
 	struct intrhand **p, **q;
 	int maxipl = IPL_NONE;
-	if (!LEGAL_VIRQ(irq))
+	if (!PIC_VIRQ_LEGAL_P(virq))
-		panic("intr_disestablish: bogus irq %d", irq);
+		panic("intr_disestablish: bogus virq %d", virq);
 	/*
 	 * Remove the handler from the chain.
 	 * This is O(n^2), too.
 	 */
 	for (p = &is->is_hand, q = NULL; (*p) != NULL; p = &(*p)->ih_next) {
 		struct intrhand * const tmp_ih = *p;
 		if (tmp_ih == ih) {
 			q = p;
 		} else {
 			maxipl = max(maxipl, tmp_ih->ih_ipl);
+		}
+	}
 @@ -275,59 +270,66 @@ intr_disestablish(void *arg)
 		panic("intr_disestablish: handler not registered");
 	free((void *)ih, M_DEVBUF);
 	/*
 	 * Reset the IPL for this source now that we've removed a handler.
 	 */
 	is->is_ipl = maxipl;
 	intr_calculatemasks();
 	if (is->is_hand == NULL) {
 		is->is_type = IST_NONE;
 		evcnt_detach(&is->is_ev);
 		/*
 		 * Make the virutal IRQ available again.
 		 */
 		virq_map[virq] = 0;
 		virq_mask |= PIC_VIRQ_TO_MASK(virq);
+	}
+}
 /*
  * Map max_base irqs into 32 (bits).
  */
 static int
-mapirq(uint32_t irq)
+mapirq(int hwirq)
+{
 	struct pic_ops *pic;
 	int v;
-	if (irq >= max_base)
+	if (hwirq >= max_base)
-		panic("invalid irq %d", irq);
+		panic("invalid irq %d", hwirq);
-	if ((pic = find_pic_by_irq(irq)) == NULL)
+	if ((pic = find_pic_by_hwirq(hwirq)) == NULL)
-		panic("%s: cannot find PIC for IRQ %d", __func__, irq);
+		panic("%s: cannot find PIC for HWIRQ %d", __func__, hwirq);
-	if (virq[irq])
+	if (virq_map[hwirq])
-		return virq[irq];
+		return virq_map[hwirq];
-	virq_max++;
+	if (virq_mask == 0)
 	v = virq_max;
 	if (v > HWIRQ_MAX)
 		panic("virq overflow");
-	intrsources[v].is_hwirq = irq;
+	const int virq = PIC_VIRQ_MS_PENDING(virq_mask);
-	intrsources[v].is_pic = pic;
+	struct intr_source * const is = intrsources + virq;
 	virq[irq] = v;
 	virq_mask &= ~PIC_VIRQ_TO_MASK(virq);
 	is->is_hwirq = hwirq;
 	is->is_pic = pic;
 	virq_map[hwirq] = virq;
 #ifdef PIC_DEBUG
-	printf("mapping irq %d to virq %d\n", irq, v);
+	printf("mapping hwirq %d to virq %d\n", irq, virq);
 #endif
-	return v;
+	return virq;
+}
 static const char * const intr_typenames[] = {
    [IST_NONE]  = "none",
    [IST_PULSE] = "pulsed",
    [IST_EDGE]  = "edge-triggered",
    [IST_LEVEL] = "level-triggered",
 };
 const char *
 intr_typename(int type)
+{
 	KASSERT((unsigned int) type < __arraycount(intr_typenames));
 @@ -344,27 +346,27 @@ intr_typename(int type)
 static void
 intr_calculatemasks(void)
+{
 	imask_t newmask[NIPL] = { [IPL_NONE...IPL_HIGH] = 0 };
 	struct intr_source *is;
 	int irq;
 	for (u_int ipl = IPL_NONE; ipl < NIPL; ipl++) {
 		newmask[ipl] = 0;
+	}
 	/* First, figure out which ipl each IRQ uses. */
 	for (irq = 0, is = intrsources; irq < NVIRQ; irq++, is++) {
-		newmask[is->is_ipl] |= 1ULL << irq;
+		newmask[is->is_ipl] |= PIC_VIRQ_TO_MASK(irq);
+	}
 	/*
 	 * IPL_NONE is used for hardware interrupts that are never blocked,
 	 * and do not block anything else.
 	 */
 	newmask[IPL_NONE] = 0;
 	/*
 	 * strict hierarchy - all IPLs block everything blocked by any lower
 	 * IPL
 	 */
 	for (u_int ipl = 1; ipl < NIPL; ipl++) {
 @@ -394,259 +396,191 @@ intr_calculatemasks(void)
 		imask[ipl] = newmask[ipl];
+	}
 	/*
 	 * Lastly, enable IRQs actually in use.
 	 */
 	for (irq = 0, is = intrsources; irq < NVIRQ; irq++, is++) {
 		if (is->is_hand)
 			pic_enable_irq(is->is_hwirq);
+	}
+}
 void
-pic_enable_irq(int num)
+pic_enable_irq(int hwirq)
+{
-	struct pic_ops *current;
+	struct pic_ops * const pic = find_pic_by_hwirq(hwirq);
-	int type;
+	if (pic == NULL)
 		panic("%s: bogus IRQ %d", __func__, hwirq);
-	current = find_pic_by_irq(num);
+	const int type = intrsources[virq_map[hwirq]].is_type;
-	if (current == NULL)
+	(*pic->pic_enable_irq)(pic, hwirq - pic->pic_intrbase, type);
 		panic("%s: bogus IRQ %d", __func__, num);
 	type = intrsources[virq[num]].is_type;
 	current->pic_enable_irq(current, num - current->pic_intrbase, type);
+}
 void
-pic_mark_pending(int irq)
+pic_mark_pending(int hwirq)
+{
 	struct cpu_info * const ci = curcpu();
 	int v, msr;
-	v = virq[irq];
+	const int virq = virq_map[hwirq];
-	if (v == 0)
+	if (virq == 0)
-		printf("IRQ %d maps to 0\n", irq);
+		printf("IRQ %d maps to 0\n", hwirq);
-	msr = mfmsr();
+	const register_t msr = mfmsr();
 	mtmsr(msr & ~PSL_EE);
-	ci->ci_ipending |= 1ULL << v;
+	ci->ci_ipending |= PIC_VIRQ_TO_MASK(virq);
 	mtmsr(msr);
+}
 static void
 intr_deliver(struct intr_source *is, int virq)
+{
 	bool locked = false;
 	for (struct intrhand *ih = is->is_hand; ih != NULL; ih = ih->ih_next) {
 		KASSERTMSG(ih->ih_fun != NULL,
 		    ("%s: irq %d, hwirq %d, is %p ih %p: "
 		     "NULL interrupt handler!\n", __func__,
 		     virq, is->is_hwirq, is, ih));
 		if (ih->ih_ipl == IPL_VM) {
 			if (!locked) {
 				KERNEL_LOCK(1, NULL);
 				locked = true;
+			}
 		} else if (locked) {
 			KERNEL_UNLOCK_ONE(NULL);
 			locked = false;
+		}
 		(*ih->ih_fun)(ih->ih_arg);
+	}
 	if (locked) {
 		KERNEL_UNLOCK_ONE(NULL);
+	}
 	is->is_ev.ev_count++;
+}
 void
 pic_do_pending_int(void)
+{
 	struct cpu_info * const ci = curcpu();
-	struct intr_source *is;
+	imask_t vpend;
 	struct intrhand *ih;
 	struct pic_ops *pic;
 	int irq;
 	int pcpl;
 	imask_t hwpend;
 	int emsr, dmsr;
 	if (ci->ci_iactive)
 		return;
 	ci->ci_iactive = 1;
 	emsr = mfmsr();
 	const register_t emsr = mfmsr();
 	const register_t dmsr = emsr & ~PSL_EE;
 	KASSERT(emsr & PSL_EE);
 	dmsr = emsr & ~PSL_EE;
 	mtmsr(dmsr);
-	pcpl = ci->ci_cpl;
+	const int pcpl = ci->ci_cpl;
 #ifdef __HAVE_FAST_SOFTINTS
 #if 0
 again:
 #endif
 #endif
 	/* Do now unmasked pendings */
-	while ((hwpend = (ci->ci_ipending & ~imask[pcpl] & HWIRQ_MASK)) != 0) {
+	while ((vpend = (ci->ci_ipending & ~imask[pcpl])) != 0) {
 		ci->ci_idepth++;
 		KASSERT((PIC_VIRQ_TO_MASK(0) & ci->ci_ipending) == 0);
 		/* Get most significant pending bit */
-		irq = MS_PENDING(hwpend);
+		const int virq = PIC_VIRQ_MS_PENDING(vpend);
-		KASSERT(irq <= virq_max);
+		ci->ci_ipending &= ~PIC_VIRQ_TO_MASK(virq);
 		ci->ci_ipending &= ~(1ULL << irq);
-		if (irq == 0) {
+		struct intr_source * const is = &intrsources[virq];
-			printf("VIRQ0");
+		struct pic_ops * const pic = is->is_pic;
 			continue;
 		is = &intrsources[irq];
 		pic = is->is_pic;
 		splraise(is->is_ipl);
 		mtmsr(emsr);
-		ih = is->is_hand;
+		intr_deliver(is, virq);
 		while (ih) {
 #ifdef DIAGNOSTIC
 			if (!ih->ih_fun) {
 				printf("NULL interrupt handler!\n");
 				panic("irq %02d, hwirq %02d, is %p\n",
 					irq, is->is_hwirq, is);
 #endif
 			if (ih->ih_ipl == IPL_VM) {
 				KERNEL_LOCK(1, NULL);
 			(*ih->ih_fun)(ih->ih_arg);
 			if (ih->ih_ipl == IPL_VM) {
 				KERNEL_UNLOCK_ONE(NULL);
 			ih = ih->ih_next;
 		mtmsr(dmsr);
-		ci->ci_cpl = pcpl;
+		ci->ci_cpl = pcpl; /* Don't use splx... we are here already! */
 		is->is_ev.ev_count++;
 		pic->pic_reenable_irq(pic, is->is_hwirq - pic->pic_intrbase,
 		    is->is_type);
 		ci->ci_idepth--;
+	}
 #ifdef __HAVE_FAST_SOFTINTS
 #if 0
 	if ((ci->ci_ipending & ~pcpl) & (1ULL << SIR_SERIAL)) {
 		ci->ci_ipending &= ~(1ULL << SIR_SERIAL);
 		splsoftserial();
 		mtmsr(emsr);
 		softintr__run(IPL_SOFTSERIAL);
 		mtmsr(dmsr);
 		ci->ci_cpl = pcpl;
 		ci->ci_ev_softserial.ev_count++;
 		goto again;
 	if ((ci->ci_ipending & ~pcpl) & (1ULL << SIR_NET)) {
 		ci->ci_ipending &= ~(1ULL << SIR_NET);
 		splsoftnet();
 		mtmsr(emsr);
 		softintr__run(IPL_SOFTNET);
 		mtmsr(dmsr);
 		ci->ci_cpl = pcpl;
 		ci->ci_ev_softnet.ev_count++;
 		goto again;
 	if ((ci->ci_ipending & ~pcpl) & (1ULL << SIR_CLOCK)) {
 		ci->ci_ipending &= ~(1ULL << SIR_CLOCK);
 		splsoftclock();
 		mtmsr(emsr);
 		softintr__run(IPL_SOFTCLOCK);
 		mtmsr(dmsr);
 		ci->ci_cpl = pcpl;
 		ci->ci_ev_softclock.ev_count++;
 		goto again;
 #else
 	const u_int softints = (ci->ci_data.cpu_softints << pcpl) & IPL_SOFTMASK;
 	if (__predict_false(softints != 0)) {
-		splhigh();
+		ci->ci_cpl = IPL_HIGH;
 		mtmsr(emsr);
 		powerpc_softint(ci, pcpl,
 		    (vaddr_t)__builtin_return_address(0));
 		mtmsr(dmsr);
 		ci->ci_cpl = pcpl;
 		if (__predict_false(ci->ci_ipending & ~imask[pcpl]))
 			goto again;
+	}
 #endif
 #endif
 	ci->ci_cpl = pcpl;	/* Don't use splx... we are here already! */
 	ci->ci_iactive = 0;
 	mtmsr(emsr);
+}
 int
 pic_handle_intr(void *cookie)
+{
 	struct pic_ops *pic = cookie;
 	struct cpu_info *ci = curcpu();
-	struct intr_source *is;
+	int picirq;
 	struct intrhand *ih;
 	int irq, realirq;
 	int pcpl, msr, bail;
 	imask_t r_imen;
-	realirq = pic->pic_get_irq(pic, PIC_GET_IRQ);
+	picirq = pic->pic_get_irq(pic, PIC_GET_IRQ);
-	if (realirq == 255)
+	if (picirq == 255)
 		return 0;
-	msr = mfmsr();
+	const register_t msr = mfmsr();
-	pcpl = ci->ci_cpl;
+	const int pcpl = ci->ci_cpl;
 start:
 	do {
 #ifdef MULTIPROCESSOR
-	/* THIS IS WRONG XXX */
+		/* THIS IS WRONG XXX */
-	while (realirq == ipiops.ppc_ipi_vector) {
+		if (picirq == ipiops.ppc_ipi_vector) {
-		ipi_intr(NULL);
+			ci->ci_cpl = IPL_HIGH;
-		pic->pic_ack_irq(pic, realirq);
+			ipi_intr(NULL);
-		realirq = pic->pic_get_irq(pic, PIC_GET_RECHECK);
+			ci->ci_cpl = pcpl;
 			pic->pic_ack_irq(pic, picirq);
-	if (realirq == 255) {
+			continue;
 		return 0;
 #endif
-	irq = virq[realirq + pic->pic_intrbase];
+		const int virq = virq_map[picirq + pic->pic_intrbase];
-#ifdef PIC_DEBUG
+		KASSERT(virq != 0);
-	if (irq == 0) {
+		KASSERT(picirq < pic->pic_numintrs);
-		printf("%s: %d virq 0\n", pic->pic_name, realirq);
+		imask_t v_imen = PIC_VIRQ_TO_MASK(virq);
-		goto boo;
+		struct intr_source * const is = &intrsources[virq];
-#endif /* PIC_DEBUG */
+		if ((imask[pcpl] & v_imen) != 0) {
-	KASSERT(realirq < pic->pic_numintrs);
+			ci->ci_ipending |= v_imen; /* Masked! Mark this as pending */
-	r_imen = 1ULL << irq;
+			pic->pic_disable_irq(pic, picirq);
-	is = &intrsources[irq];
+		} else {
 			/* this interrupt is no longer pending */
-	if ((imask[pcpl] & r_imen) != 0) {
+			ci->ci_ipending &= ~v_imen;
 			ci->ci_idepth++;
 		ci->ci_ipending |= r_imen; /* Masked! Mark this as pending */
-		pic->pic_disable_irq(pic, realirq);
+			splraise(is->is_ipl);
-	} else {
+			mtmsr(msr | PSL_EE);
 			intr_deliver(is, virq);
-		/* this interrupt is no longer pending */
+			mtmsr(msr);
-		ci->ci_ipending &= ~r_imen;
+			ci->ci_cpl = pcpl;
 		ci->ci_idepth++;
-		splraise(is->is_ipl);
+			ci->ci_data.cpu_nintr++;
-		mtmsr(msr | PSL_EE);
+			ci->ci_idepth--;
 		ih = is->is_hand;
 		bail = 0;
 		while ((ih != NULL) && (bail < 10)) {
 			if (ih->ih_fun == NULL)
 				panic("bogus handler for IRQ %s %d",
 				    pic->pic_name, realirq);
 			if (ih->ih_ipl == IPL_VM) {
 				KERNEL_LOCK(1, NULL);
 			(*ih->ih_fun)(ih->ih_arg);
 			if (ih->ih_ipl == IPL_VM) {
 				KERNEL_UNLOCK_ONE(NULL);
 			ih = ih->ih_next;
 			bail++;
+		}
-		mtmsr(msr);
+		pic->pic_ack_irq(pic, picirq);
-		ci->ci_cpl = pcpl;
+	} while ((picirq = pic->pic_get_irq(pic, PIC_GET_RECHECK)) != 255);
 		ci->ci_data.cpu_nintr++;
 		is->is_ev.ev_count++;
 		ci->ci_idepth--;
 #ifdef PIC_DEBUG
 boo:
 #endif /* PIC_DEBUG */
 	pic->pic_ack_irq(pic, realirq);
 	realirq = pic->pic_get_irq(pic, PIC_GET_RECHECK);
 	if (realirq != 255)
 		goto start;
 	mtmsr(msr | PSL_EE);
 	splx(pcpl);	/* Process pendings. */
 	mtmsr(msr);
 	return 0;
+}
 void
 pic_ext_intr(void)
+{
 	KASSERT(pics[primary_pic] != NULL);
 @@ -737,27 +671,27 @@ genppc_isa_intr_alloc(isa_chipset_tag_t
+{
 	int irq, vi;
 	int maybe_irq = -1;
 	int shared_depth = 0;
 	struct intr_source *is;
 	if (pic == NULL)
 		return 1;
 	for (irq = 0; (mask != 0 && irq < pic->pic_numintrs);
 	     mask >>= 1, irq++) {
 		if ((mask & 1) == 0)
 			continue;
-		vi = virq[irq + pic->pic_intrbase];
+		vi = virq_map[irq + pic->pic_intrbase];
 		if (!vi) {
 			*irq_p = irq;
 			return 0;
+		}
 		is = &intrsources[vi];
 		if (is->is_type == IST_NONE) {
 			*irq_p = irq;
 			return 0;
+		}
 		/* Level interrupts can be shared */
 		if (type == IST_LEVEL && is->is_type == IST_LEVEL) {
 			struct intrhand *ih = is->is_hand;
 			int depth;

 @@ -1,14 +1,14 @@
-/*	$NetBSD: intr.h,v 1.29 2010/04/24 09:39:56 kiyohara Exp $	*/
+/*	$NetBSD: intr.h,v 1.30 2011/06/17 23:36:17 matt Exp $	*/
 /*-
  * Copyright (c) 1998 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Charles M. Hannum.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
 @@ -32,23 +32,23 @@
 #ifndef _BEBOX_INTR_H_
 #define _BEBOX_INTR_H_
 #include <powerpc/intr.h>
 #ifndef _LOCORE
 void enable_intr(void);
 void disable_intr(void);
 extern paddr_t bebox_mb_reg;
-#define ICU_LEN		32
+#define ICU_LEN			32
-#define IRQ_SLAVE	2
+#define IRQ_SLAVE		2
-#define LEGAL_IRQ(x)	((x) >= 0 && (x) < ICU_LEN && (x) != IRQ_SLAVE)
+#define LEGAL_HWIRQ_P(x)	((u_int)(x) < ICU_LEN && (x) != IRQ_SLAVE)
-#define BEBOX_INTR_REG	0x7ffff000
+#define BEBOX_INTR_REG		0x7ffff000
-#define INTR_VECTOR_REG	0xff0
+#define INTR_VECTOR_REG		0xff0
 #endif /* !_LOCORE */
 #endif /* !_BEBOX_INTR_H_ */

 @@ -1,14 +1,14 @@
-/*	$NetBSD: intr.h,v 1.14 2010/11/13 14:07:07 uebayasi Exp $	*/
+/*	$NetBSD: intr.h,v 1.15 2011/06/17 23:36:17 matt Exp $	*/
 /*-
  * Copyright (c) 1998 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Charles M. Hannum.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
 @@ -22,39 +22,37 @@
  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 #ifndef _IBMNWS_INTR_H_
 #define _IBMNWS_INTR_H_
 #include <powerpc/intr.h>
 #ifndef _LOCORE
 #include <machine/cpu.h>
 void init_intr_ivr(void);
 void init_intr_openpic(void);
 void openpic_init(unsigned char *);
 void enable_intr(void);
 void disable_intr(void);
 extern vaddr_t prep_intr_reg;
 extern uint32_t prep_intr_reg_off;
 #define	ICU_LEN			32
 #define	IRQ_SLAVE		2
-#define	LEGAL_IRQ(x)		((x) >= 0 && (x) < ICU_LEN && (x) != IRQ_SLAVE)
+#define	LEGAL_HWIRQ_P(x)	((u_int)(x) < ICU_LEN && (x) != IRQ_SLAVE)
 #define	I8259_INTR_NUM		16
 #define	PREP_INTR_REG	0xbffff000
 #define	INTR_VECTOR_REG	0xff0
 #endif /* !_LOCORE */
 #include <powerpc/intr.h>
 #endif /* !_IBMNWS_INTR_H_ */

 @@ -1,20 +1,19 @@
+#
-#	$NetBSD: files.pic,v 1.6 2011/06/16 02:43:43 macallan Exp $
+#	$NetBSD: files.pic,v 1.7 2011/06/17 23:36:18 matt Exp $
+#
 # generic PIC abstraction
 file arch/powerpc/pic/intr.c
 file arch/powerpc/pic/pic_subr.c
 defflag opt_pic.h PIC_DEBUG
 define pic_openpic
 define pic_distopenpic
 define pic_prepivr
 define pic_i8259
 define pic_mpcsoc
 defflag opt_interrupt.h PIC_OPENPIC:	pic_openpic
 defflag opt_interrupt.h PIC_DISTOPENPIC:	pic_distopenpic
 defflag opt_interrupt.h PIC_PREPIVR:	pic_prepivr
 defflag opt_interrupt.h PIC_I8259:	pic_i8259

 @@ -1,14 +1,14 @@
-/*	$NetBSD: intr.h,v 1.33 2010/11/13 14:07:07 uebayasi Exp $	*/
+/*	$NetBSD: intr.h,v 1.34 2011/06/17 23:36:18 matt Exp $	*/
 /*-
  * Copyright (c) 2007 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Tim Rightnour
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
 @@ -22,40 +22,39 @@
  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 #ifndef _PREP_INTR_H_
 #define _PREP_INTR_H_
 #include <powerpc/intr.h>
 #ifndef _LOCORE
 #include <machine/cpu.h>
 void init_intr_ivr(void);
 void init_intr_openpic(void);
 void openpic_init(unsigned char *);
 void enable_intr(void);
 void disable_intr(void);
 extern vaddr_t prep_intr_reg;
 extern uint32_t prep_intr_reg_off;
 #define	ICU_LEN			32
 #define	IRQ_SLAVE		2
-#define	LEGAL_IRQ(x)		((x) >= 0 && (x) < ICU_LEN && (x) != IRQ_SLAVE)
+#define	LEGAL_HWIRQ_P(x)	((u_int)(x) < ICU_LEN && (x) != IRQ_SLAVE)
 #define	I8259_INTR_NUM		16
 #define	OPENPIC_INTR_NUM	((ICU_LEN)-(I8259_INTR_NUM))
-#define	PREP_INTR_REG	0xbffff000
+#define	PREP_INTR_REG		0xbffff000
-#define	INTR_VECTOR_REG	0xff0
+#define	INTR_VECTOR_REG		0xff0
 #endif /* !_LOCORE */
 #include <powerpc/intr.h>
 #endif /* !_PREP_INTR_H_ */

 @@ -1,14 +1,14 @@
-/*	$NetBSD: if_we_pnpbus.c,v 1.5 2009/03/14 21:04:14 dsl Exp $	*/
+/*	$NetBSD: if_we_pnpbus.c,v 1.6 2011/06/17 23:36:18 matt Exp $	*/
 /*-
  * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * This code is derived from software contributed to The NetBSD Foundation
  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
  * NASA Ames Research Center.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
 @@ -39,27 +39,27 @@
  * Copyright (C) 1993, David Greenman.  This software may be used, modified,
  * copied, distributed, and sold, in both source and binary form provided that
  * the above copyright and these terms are retained.  Under no circumstances is
  * the author responsible for the proper functioning of this software, nor does
  * the author assume any responsibility for damages incurred with its use.
  */
 /*
  * Device driver for the Western Digital/SMC 8003 and 8013 series,
  * and the SMC Elite Ultra (8216).
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_we_pnpbus.c,v 1.5 2009/03/14 21:04:14 dsl Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_we_pnpbus.c,v 1.6 2011/06/17 23:36:18 matt Exp $");
 #include <sys/types.h>
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/device.h>
 #include <sys/socket.h>
 #include <sys/mbuf.h>
 #include <sys/syslog.h>
 #include <sys/bswap.h>
 #include <net/if.h>
 #include <net/if_dl.h>
 #include <net/if_types.h>
 @@ -228,27 +228,27 @@ we_pnpbus_attach(struct device *parent,
 		    bus_space_read_1(asict, asich, WE_IRR) | WE_IRR_IEN);
 #endif
 	/*
 	 * Establish interrupt handler.
 	 * Loop through all probed IRQs until one looks sane.
 	 */
 	for (i = 0, irq = SIMPLEQ_FIRST(&pna->pna_res.irq);
  	     i < pna->pna_res.numirq; i++, irq = SIMPLEQ_NEXT(irq, next)) {
 		irqnum = ffs(irq->mask) - 1;
 		/* some cards think they are level.  force them to edge */
 		if (irq->flags & 0x0c)
 			irq->flags = 0x01;
-		if (!LEGAL_IRQ(irqnum))
+		if (!LEGAL_HWIRQ_P(irqnum))
 			continue;
 		if (irqnum < 2)
 			continue;
 		break;
+	}
 	wsc->sc_ih = pnpbus_intr_establish(i, IPL_NET, IST_PNP, dp8390_intr, sc,
 	    &pna->pna_res);
 	if (wsc->sc_ih == NULL)
 		aprint_error("%s: can't establish interrupt\n",
 		    device_xname(self));
+}
 static const char *