Sun Jul 31 23:10:58 2011 UTC ()
Support using MEMSIZE


(matt)
diff -r1.1 -r1.2 src/sys/arch/mips/atheros/ar7100.c
cvs diff -r1.1 -r1.2 src/sys/arch/mips/atheros/ar7100.c (expand / switch to unified diff)

--- src/sys/arch/mips/atheros/ar7100.c 2011/07/07 05:06:44 1.1
+++ src/sys/arch/mips/atheros/ar7100.c 2011/07/31 23:10:58 1.2
@@ -19,30 +19,31 @@ @@ -19,30 +19,31 @@
19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 * POSSIBILITY OF SUCH DAMAGE. 27 * POSSIBILITY OF SUCH DAMAGE.
28 */ 28 */
29 29
30#include <sys/cdefs.h> 30#include <sys/cdefs.h>
31 31
32__KERNEL_RCSID(0, "$NetBSD: ar7100.c,v 1.1 2011/07/07 05:06:44 matt Exp $"); 32__KERNEL_RCSID(0, "$NetBSD: ar7100.c,v 1.2 2011/07/31 23:10:58 matt Exp $");
33 33
34#define __INTR_PRIVATE 34#define __INTR_PRIVATE
35#include "pci.h" 35#include "pci.h"
 36#include "opt_memsize.h"
36 37
37#include <sys/param.h> 38#include <sys/param.h>
38 39
39#include <sys/device.h> 40#include <sys/device.h>
40 41
41#include <prop/proplib.h> 42#include <prop/proplib.h>
42 43
43#include <mips/atheros/include/platform.h> 44#include <mips/atheros/include/platform.h>
44#include <mips/atheros/include/ar9344reg.h> 45#include <mips/atheros/include/ar9344reg.h>
45 46
46#define AR7100_BASE_FREQ (40*1000*1000) 47#define AR7100_BASE_FREQ (40*1000*1000)
47 48
48static const char * const ar7100_cpu_intrnames[] = { 49static const char * const ar7100_cpu_intrnames[] = {
@@ -92,27 +93,31 @@ static const struct ipl_sr_map ar7100_ip @@ -92,27 +93,31 @@ static const struct ipl_sr_map ar7100_ip
92 [IPL_HIGH] = MIPS_INT_MASK, /* EVERYTHING */ 93 [IPL_HIGH] = MIPS_INT_MASK, /* EVERYTHING */
93 }, 94 },
94}; 95};
95 96
96static void 97static void
97ar7100_intr_init(void) 98ar7100_intr_init(void)
98{ 99{
99 atheros_intr_init(); 100 atheros_intr_init();
100} 101}
101 102
102static uint32_t 103static uint32_t
103ar7100_get_memsize(void) 104ar7100_get_memsize(void)
104{ 105{
 106#ifdef MEMSIZE
 107 return MEMSIZE;
 108#else
105 return 128*1024*1024; 109 return 128*1024*1024;
 110#endif
106} 111}
107 112
108static void 113static void
109ar7100_wdog_reload(uint32_t period) 114ar7100_wdog_reload(uint32_t period)
110{ 115{
111 116
112 if (period == 0) { 117 if (period == 0) {
113 PUTRESETREG(ARCHIP_RESET_WDOG_CTL, ARCHIP_WDOG_CTL_IGNORE); 118 PUTRESETREG(ARCHIP_RESET_WDOG_CTL, ARCHIP_WDOG_CTL_IGNORE);
114 PUTRESETREG(ARCHIP_RESET_WDOG_TIMER, 0); 119 PUTRESETREG(ARCHIP_RESET_WDOG_TIMER, 0);
115 } else { 120 } else {
116 PUTRESETREG(ARCHIP_RESET_WDOG_TIMER, period); 121 PUTRESETREG(ARCHIP_RESET_WDOG_TIMER, period);
117 PUTRESETREG(ARCHIP_RESET_WDOG_CTL, ARCHIP_WDOG_CTL_RESET); 122 PUTRESETREG(ARCHIP_RESET_WDOG_CTL, ARCHIP_WDOG_CTL_RESET);
118 } 123 }