 @@ -1,14 +1,14 @@
-/* $NetBSD: spdmem_i2c.c,v 1.1 2010/03/24 00:31:41 pgoyette Exp $ */
+/* $NetBSD: spdmem_i2c.c,v 1.2 2011/08/01 03:49:52 pgoyette Exp $ */
 /*
  * Copyright (c) 2007 Nicolas Joly
  * Copyright (c) 2007 Paul Goyette
  * Copyright (c) 2007 Tobias Nygren
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
 @@ -25,56 +25,59 @@
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 /*
  * Serial Presence Detect (SPD) memory identification
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: spdmem_i2c.c,v 1.1 2010/03/24 00:31:41 pgoyette Exp $");
+__KERNEL_RCSID(0, "$NetBSD: spdmem_i2c.c,v 1.2 2011/08/01 03:49:52 pgoyette Exp $");
 #include <sys/param.h>
 #include <sys/device.h>
 #include <sys/endian.h>
 #include <sys/module.h>
 #include <sys/sysctl.h>
 #include <machine/bswap.h>
 #include <dev/i2c/i2cvar.h>
 #include <dev/ic/spdmemreg.h>
 #include <dev/ic/spdmemvar.h>
 /* Constants for matching i2c bus address */
 #define SPDMEM_I2C_ADDRMASK 0x78
 #define SPDMEM_I2C_ADDR     0x50
 struct spdmem_i2c_softc {
 	struct spdmem_softc sc_base;
 	i2c_tag_t sc_tag;
 	i2c_addr_t sc_addr;
 };
-static int spdmem_i2c_match(device_t, cfdata_t, void *);
+static int  spdmem_i2c_match(device_t, cfdata_t, void *);
 static void spdmem_i2c_attach(device_t, device_t, void *);
-SYSCTL_SETUP_PROTO(sysctl_spdmem_setup);
+static int  spdmem_i2c_detach(device_t, int);
 CFATTACH_DECL_NEW(spdmem_iic, sizeof(struct spdmem_i2c_softc),
     spdmem_i2c_match, spdmem_i2c_attach, spdmem_i2c_detach, NULL);
 static uint8_t spdmem_i2c_read(struct spdmem_softc *, uint8_t);
-CFATTACH_DECL_NEW(spdmem_iic, sizeof(struct spdmem_i2c_softc),
+SYSCTL_SETUP_PROTO(sysctl_spdmem_setup);
     spdmem_i2c_match, spdmem_i2c_attach, NULL, NULL);
 static int
 spdmem_i2c_match(device_t parent, cfdata_t match, void *aux)
+{
 	struct i2c_attach_args *ia = aux;
 	struct spdmem_i2c_softc sc;
 	if (ia->ia_name) {
 		/* add other names as we find more firmware variations */
 		if (strcmp(ia->ia_name, "dimm-spd"))
 			return 0;
+	}
 @@ -97,26 +100,65 @@ spdmem_i2c_attach(device_t parent, devic
 	struct spdmem_i2c_softc *sc = device_private(self);
 	struct i2c_attach_args *ia = aux;
 	sc->sc_tag = ia->ia_tag;
 	sc->sc_addr = ia->ia_addr;
 	sc->sc_base.sc_read = spdmem_i2c_read;
 	if (!pmf_device_register(self, NULL, NULL))
 		aprint_error_dev(self, "couldn't establish power handler\n");
 	spdmem_common_attach(&sc->sc_base, self);
+}
 static int
 spdmem_i2c_detach(device_t self, int flags)
+{
 	struct spdmem_i2c_softc *sc = device_private(self);
 	pmf_device_deregister(self);
 	return spdmem_common_detach(&sc->sc_base, self);
+}
 static uint8_t
 spdmem_i2c_read(struct spdmem_softc *softc, uint8_t reg)
+{
 	uint8_t val;
 	struct spdmem_i2c_softc *sc = (struct spdmem_i2c_softc *)softc;
 	iic_acquire_bus(sc->sc_tag, 0);
 	iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr, &reg, 1,
 		 &val, 1, 0);
 	iic_release_bus(sc->sc_tag, 0);
 	return val;
+}
 MODULE(MODULE_CLASS_DRIVER, spdmem, NULL);
 #ifdef _MODULE
 #include "ioconf.c"
 #endif
 static int
 spdmem_modcmd(modcmd_t cmd, void *opaque)
+{
 	int error = 0;
 	switch (cmd) {
 	case MODULE_CMD_INIT:
 #ifdef _MODULE
 		error = config_init_component(cfdriver_ioconf_spdmem,
 		    cfattach_ioconf_spdmem, cfdata_ioconf_spdmem);
 #endif
 		return error;
 	case MODULE_CMD_FINI:
 #ifdef _MODULE
 		error = config_fini_component(cfdriver_ioconf_spdmem,
 		    cfattach_ioconf_spdmem, cfdata_ioconf_spdmem);
 #endif
 		return error;
 	default:
 		return ENOTTY;
+	}
+}

 @@ -1,14 +1,14 @@
-/* $NetBSD: spdmem.c,v 1.2 2010/06/29 04:42:30 pgoyette Exp $ */
+/* $NetBSD: spdmem.c,v 1.3 2011/08/01 03:49:52 pgoyette Exp $ */
 /*
  * Copyright (c) 2007 Nicolas Joly
  * Copyright (c) 2007 Paul Goyette
  * Copyright (c) 2007 Tobias Nygren
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
 @@ -25,52 +25,52 @@
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 /*
  * Serial Presence Detect (SPD) memory identification
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: spdmem.c,v 1.2 2010/06/29 04:42:30 pgoyette Exp $");
+__KERNEL_RCSID(0, "$NetBSD: spdmem.c,v 1.3 2011/08/01 03:49:52 pgoyette Exp $");
 #include <sys/param.h>
 #include <sys/device.h>
 #include <sys/endian.h>
 #include <sys/sysctl.h>
 #include <machine/bswap.h>
 #include <dev/i2c/i2cvar.h>
 #include <dev/ic/spdmemreg.h>
 #include <dev/ic/spdmemvar.h>
 SYSCTL_SETUP_PROTO(sysctl_spdmem_setup);
 /* Routines for decoding spd data */
 static void decode_edofpm(const struct sysctlnode *, device_t, struct spdmem *);
 static void decode_rom(const struct sysctlnode *, device_t, struct spdmem *);
 static void decode_sdram(const struct sysctlnode *, device_t, struct spdmem *,
 	int);
 static void decode_ddr(const struct sysctlnode *, device_t, struct spdmem *);
 static void decode_ddr2(const struct sysctlnode *, device_t, struct spdmem *);
 static void decode_ddr3(const struct sysctlnode *, device_t, struct spdmem *);
 static void decode_fbdimm(const struct sysctlnode *, device_t, struct spdmem *);
-static void decode_size_speed(const struct sysctlnode *, int, int, int, int,
+static void decode_size_speed(device_t, const struct sysctlnode *,
-			      bool, const char *, int);
+			      int, int, int, int, bool, const char *, int);
 static void decode_voltage_refresh(device_t, struct spdmem *);
 #define IS_RAMBUS_TYPE (s->sm_len < 4)
 static const char* spdmem_basic_types[] = {
 	"unknown",
 	"FPM",
 	"EDO",
 	"Pipelined Nibble",
 	"SDRAM",
 	"ROM",
 	"DDR SGRAM",
 	"DDR SDRAM",
 @@ -209,28 +209,27 @@ spdmem_common_probe(struct spdmem_softc
+	}
 	/* For unrecognized memory types, don't match at all */
 	return 0;
+}
 void
 spdmem_common_attach(struct spdmem_softc *sc, device_t self)
+{
 	struct spdmem *s = &(sc->sc_spd_data);
 	const char *type;
 	const char *rambus_rev = "Reserved";
 	int dimm_size;
-	int i;
+	unsigned int i, spd_len, spd_size;
 	unsigned int spd_len, spd_size;
 	const struct sysctlnode *node = NULL;
 	/*
 	 * FBDIMM and DDR3 (and probably all newer) have a different
 	 * encoding of the SPD EEPROM used/total sizes
 	 */
 	s->sm_len = (sc->sc_read)(sc, 0);
 	s->sm_size = (sc->sc_read)(sc, 1);
 	s->sm_type = (sc->sc_read)(sc, 2);
 	if (s->sm_type >= SPDMEM_MEMTYPE_FBDIMM) {
 		spd_size = 64 << (s->sm_len & SPDMEM_SPDSIZE_MASK);
 		switch (s->sm_len & SPDMEM_SPDLEN_MASK) {
 @@ -252,47 +251,51 @@ spdmem_common_attach(struct spdmem_softc
 		spd_len = s->sm_len;
 		if (spd_len < 64)
 			spd_len = 64;
+	}
 	if (spd_len > spd_size)
 		spd_len = spd_size;
 	if (spd_len > sizeof(struct spdmem))
 		spd_len = sizeof(struct spdmem);
 	for (i = 3; i < spd_len; i++)
 		((uint8_t *)s)[i] = (sc->sc_read)(sc, i);
 #ifdef DEBUG
 	for (i = 0; i < spd_len;  i += 16) {
-		int j, k;
+		unsigned int j, k;
 		aprint_debug("\n");
 		aprint_debug_dev(self, "0x%02x:", i);
 		k = (spd_len > i + 16) ? spd_len : i + 16;
 		for (j = i; j < k; j++)
 			aprint_debug(" %02x", ((uint8_t *)s)[j]);
+	}
 	aprint_debug("\n");
 	aprint_debug_dev(self, "");
 #endif
 	/*
 	 * Setup our sysctl subtree, hw.spdmemN
 	 */
 	sc->sc_sysctl_log = NULL;
 #ifdef _MODULE
 	sysctl_spdmem_setup(&sc->sc_sysctl_log);
 #endif
 	if (hw_node != CTL_EOL)
-		sysctl_createv(NULL, 0, NULL, &node,
+		sysctl_createv(&sc->sc_sysctl_log, 0, NULL, &node,
 , CTLTYPE_NODE,
 		    device_xname(self), NULL, NULL, 0, NULL, 0,
 		    CTL_HW, CTL_CREATE, CTL_EOL);
 	if (node != NULL && spd_len != 0)
-                sysctl_createv(NULL, 0, NULL, NULL,
+                sysctl_createv(&sc->sc_sysctl_log, 0, NULL, NULL,
 ,
                     CTLTYPE_STRUCT, "spd_data",
 		    SYSCTL_DESCR("raw spd data"), NULL,
 , s, spd_len,
                     CTL_HW, node->sysctl_num, CTL_CREATE, CTL_EOL);
 	/*
 	 * Decode and print key SPD contents
 	 */
 	if (IS_RAMBUS_TYPE) {
 		if (s->sm_type == SPDMEM_MEMTYPE_RAMBUS)
 			type = "Rambus";
 		else if (s->sm_type == SPDMEM_MEMTYPE_DIRECTRAMBUS)
 @@ -331,27 +334,27 @@ spdmem_common_attach(struct spdmem_softc
 			type =
 			    spdmem_superset_types[SPDMEM_SUPERSET_DDR_ESDRAM];
 		if (s->sm_type == SPDMEM_MEMTYPE_SDRAM &&
 		    s->sm_sdr.sdr_superset == SPDMEM_SUPERSET_ESDRAM) {
 			type = spdmem_superset_types[SPDMEM_SUPERSET_ESDRAM];
+		}
+	}
 	aprint_naive("\n");
 	aprint_normal("\n");
 	aprint_normal_dev(self, "%s", type);
 	strlcpy(sc->sc_type, type, SPDMEM_TYPE_MAXLEN);
 	if (node != NULL)
-		sysctl_createv(NULL, 0, NULL, NULL,
+		sysctl_createv(&sc->sc_sysctl_log, 0, NULL, NULL,
 ,
 		    CTLTYPE_STRING, "mem_type",
 		    SYSCTL_DESCR("memory module type"), NULL,
 , sc->sc_type, 0,
 		    CTL_HW, node->sysctl_num, CTL_CREATE, CTL_EOL);
 	if (IS_RAMBUS_TYPE) {
 		aprint_normal(", SPD Revision %s", rambus_rev);
 		dimm_size = 1 << (s->sm_rdr.rdr_rows + s->sm_rdr.rdr_cols - 13);
 		if (dimm_size >= 1024)
 			aprint_normal(", %dGB\n", dimm_size / 1024);
 		else
 			aprint_normal(", %dMB\n", dimm_size);
 @@ -376,53 +379,60 @@ spdmem_common_attach(struct spdmem_softc
 	case SPDMEM_MEMTYPE_DDR2SDRAM:
 		decode_ddr2(node, self, s);
 		break;
 	case SPDMEM_MEMTYPE_DDR3SDRAM:
 		decode_ddr3(node, self, s);
 		break;
 	case SPDMEM_MEMTYPE_FBDIMM:
 	case SPDMEM_MEMTYPE_FBDIMM_PROBE:
 		decode_fbdimm(node, self, s);
 		break;
+	}
+}
 int
 spdmem_common_detach(struct spdmem_softc *sc, device_t self)
+{
 	sysctl_teardown(&sc->sc_sysctl_log);
 	return 0;
+}
 SYSCTL_SETUP(sysctl_spdmem_setup, "sysctl hw.spdmem subtree setup")
+{
 	const struct sysctlnode *node;
-	if (sysctl_createv(clog, 0, NULL, &node,
+	if (sysctl_createv(clog, 0, NULL, &node, CTLFLAG_PERMANENT,
-	    CTLFLAG_PERMANENT,
+			       CTLTYPE_NODE, "hw", NULL, NULL, 0, NULL, 0,
-	    CTLTYPE_NODE, "hw", NULL,
+			       CTL_HW, CTL_EOL) != 0)
 	    NULL, 0, NULL, 0,
 	    CTL_HW, CTL_EOL) != 0)
 		return;
 	hw_node = node->sysctl_num;
+}
 static void
-decode_size_speed(const struct sysctlnode *node, int dimm_size, int cycle_time,
+decode_size_speed(device_t self, const struct sysctlnode *node,
-		  int d_clk, int bits, bool round, const char *ddr_type_string,
+		  int dimm_size, int cycle_time, int d_clk, int bits,
-		  int speed)
+		  bool round, const char *ddr_type_string, int speed)
+{
 	int p_clk;
 	struct spdmem_softc *sc = (struct spdmem_softc *)device_private(self);
 	if (dimm_size < 1024)
 		aprint_normal("%dMB", dimm_size);
 	else
 		aprint_normal("%dGB", dimm_size / 1024);
 	if (node != NULL)
-		sysctl_createv(NULL, 0, NULL, NULL,
+		sysctl_createv(&sc->sc_sysctl_log, 0, NULL, NULL,
 		    CTLFLAG_IMMEDIATE,
 		    CTLTYPE_INT, "size",
 		    SYSCTL_DESCR("module size in MB"), NULL,
 		    dimm_size, NULL, 0,
 		    CTL_HW, node->sysctl_num, CTL_CREATE, CTL_EOL);
 	if (cycle_time == 0) {
 		aprint_normal("\n");
 		return;
+	}
 	/*
 	 * Calculate p_clk first, since for DDR3 we need maximum significance.
 @@ -435,27 +445,27 @@ decode_size_speed(const struct sysctlnod
 	if (speed)
 		p_clk = speed;
 	else
 		p_clk = (d_clk * bits) / 8 / cycle_time;
 	d_clk = ((d_clk + cycle_time / 2) ) / cycle_time;
 	if (round) {
 		if ((p_clk % 100) >= 50)
 			p_clk += 50;
 		p_clk -= p_clk % 100;
+	}
 	aprint_normal(", %dMHz (%s-%d)\n",
 		      d_clk, ddr_type_string, p_clk);
 	if (node != NULL)
-		sysctl_createv(NULL, 0, NULL, NULL,
+		sysctl_createv(&sc->sc_sysctl_log, 0, NULL, NULL,
 			       CTLFLAG_IMMEDIATE,
 			       CTLTYPE_INT, "speed",
 			       SYSCTL_DESCR("memory speed in MHz"),
 			       NULL, d_clk, NULL, 0,
 			       CTL_HW, node->sysctl_num, CTL_CREATE, CTL_EOL);
+}
 static void
 decode_voltage_refresh(device_t self, struct spdmem *s)
+{
 	const char *voltage, *refresh;
 	if (s->sm_voltage < __arraycount(spdmem_voltage_types))
 @@ -520,28 +530,28 @@ decode_sdram(const struct sysctlnode *no
 		 * actually report PC-100
 		 */
 	    case 100:
 	    case 133:
 		if (cycle_time < 8000)
 			speed = 133;
 		else
 			speed = 100;
 		break;
 	    case 0x66:		/* Legacy DIMMs use _hex_ 66! */
 	    default:
 		speed = 66;
+	}
-	decode_size_speed(node, dimm_size, cycle_time, 1, bits, FALSE, "PC",
+	decode_size_speed(self, node, dimm_size, cycle_time, 1, bits, FALSE,
-			  speed);
+			  "PC", speed);
 	aprint_verbose_dev(self,
 	    "%d rows, %d cols, %d banks, %d banks/chip, %d.%dns cycle time\n",
 	    s->sm_sdr.sdr_rows, s->sm_sdr.sdr_cols, s->sm_sdr.sdr_banks,
 	    s->sm_sdr.sdr_banks_per_chip, cycle_time/1000,
 	    (cycle_time % 1000) / 100);
 	tAA  = 0;
 	for (i = 0; i < 8; i++)
 		if (s->sm_sdr.sdr_tCAS & (1 << i))
 			tAA = i;
 	tAA++;
 	aprint_verbose_dev(self, latency, tAA, s->sm_sdr.sdr_tRCD,
 @@ -558,27 +568,28 @@ decode_ddr(const struct sysctlnode *node
 		(s->sm_ddr.ddr_mod_attrs & SPDMEM_DDR_MASK_REG)?
 			" (registered)":"",
 		(s->sm_config < __arraycount(spdmem_parity_types))?
 			spdmem_parity_types[s->sm_config]:"invalid parity");
 	dimm_size = 1 << (s->sm_ddr.ddr_rows + s->sm_ddr.ddr_cols - 17);
 	dimm_size *= s->sm_ddr.ddr_ranks * s->sm_ddr.ddr_banks_per_chip;
 	cycle_time = s->sm_ddr.ddr_cycle_whole * 1000 +
 		  spdmem_cycle_frac[s->sm_ddr.ddr_cycle_tenths];
 	bits = le16toh(s->sm_ddr.ddr_datawidth);
 	if (s->sm_config == 1 || s->sm_config == 2)
 		bits -= 8;
-	decode_size_speed(node, dimm_size, cycle_time, 2, bits, TRUE, "PC", 0);
+	decode_size_speed(self, node, dimm_size, cycle_time, 2, bits, TRUE,
 			  "PC", 0);
 	aprint_verbose_dev(self,
 	    "%d rows, %d cols, %d ranks, %d banks/chip, %d.%dns cycle time\n",
 	    s->sm_ddr.ddr_rows, s->sm_ddr.ddr_cols, s->sm_ddr.ddr_ranks,
 	    s->sm_ddr.ddr_banks_per_chip, cycle_time/1000,
 	    (cycle_time % 1000 + 50) / 100);
 	tAA  = 0;
 	for (i = 2; i < 8; i++)
 		if (s->sm_ddr.ddr_tCAS & (1 << i))
 			tAA = i;
 	tAA /= 2;
 @@ -602,27 +613,28 @@ decode_ddr2(const struct sysctlnode *nod
 			" (registered)":"",
 		(s->sm_config < __arraycount(spdmem_parity_types))?
 			spdmem_parity_types[s->sm_config]:"invalid parity");
 	dimm_size = 1 << (s->sm_ddr2.ddr2_rows + s->sm_ddr2.ddr2_cols - 17);
 	dimm_size *= (s->sm_ddr2.ddr2_ranks + 1) *
 		     s->sm_ddr2.ddr2_banks_per_chip;
 	cycle_time = s->sm_ddr2.ddr2_cycle_whole * 1000 +
 		 spdmem_cycle_frac[s->sm_ddr2.ddr2_cycle_frac];
 	bits = s->sm_ddr2.ddr2_datawidth;
 	if ((s->sm_config & 0x03) != 0)
 		bits -= 8;
-	decode_size_speed(node, dimm_size, cycle_time, 2, bits, TRUE, "PC2", 0);
+	decode_size_speed(self, node, dimm_size, cycle_time, 2, bits, TRUE,
 			  "PC2", 0);
 	aprint_verbose_dev(self,
 	    "%d rows, %d cols, %d ranks, %d banks/chip, %d.%02dns cycle time\n",
 	    s->sm_ddr2.ddr2_rows, s->sm_ddr2.ddr2_cols,
 	    s->sm_ddr2.ddr2_ranks + 1, s->sm_ddr2.ddr2_banks_per_chip,
 	    cycle_time / 1000, (cycle_time % 1000 + 5) /10 );
 	tAA  = 0;
 	for (i = 2; i < 8; i++)
 		if (s->sm_ddr2.ddr2_tCAS & (1 << i))
 			tAA = i;
 #define __DDR2_ROUND(scale, field)	\
 @@ -656,27 +668,28 @@ decode_ddr3(const struct sysctlnode *nod
 	 *	external_bus_width / internal_bus_width
 	 * We further divide by 2**20 to get our answer in MB
 	 */
 	dimm_size = (s->sm_ddr3.ddr3_chipsize + 28 - 20) - 3 +
 		    (s->sm_ddr3.ddr3_datawidth + 3) -
 		    (s->sm_ddr3.ddr3_chipwidth + 2);
 	dimm_size = (1 << dimm_size) * (s->sm_ddr3.ddr3_physbanks + 1);
 	cycle_time = (1000 * s->sm_ddr3.ddr3_mtb_dividend +
 			    (s->sm_ddr3.ddr3_mtb_divisor / 2)) /
 		     s->sm_ddr3.ddr3_mtb_divisor;
 	cycle_time *= s->sm_ddr3.ddr3_tCKmin;
 	bits = 1 << (s->sm_ddr3.ddr3_datawidth + 3);
-	decode_size_speed(node, dimm_size, cycle_time, 2, bits, FALSE, "PC3", 0);
+	decode_size_speed(self, node, dimm_size, cycle_time, 2, bits, FALSE,
 			  "PC3", 0);
 	aprint_verbose_dev(self,
 	    "%d rows, %d cols, %d log. banks, %d phys. banks, "
 	    "%d.%03dns cycle time\n",
 	    s->sm_ddr3.ddr3_rows + 9, s->sm_ddr3.ddr3_cols + 12,
 << (s->sm_ddr3.ddr3_logbanks + 3),
 	    s->sm_ddr3.ddr3_physbanks + 1,
 	    cycle_time/1000, cycle_time % 1000);
 #define	__DDR3_CYCLES(field) (s->sm_ddr3.field / s->sm_ddr3.ddr3_tCKmin)
 	aprint_verbose_dev(self, latency, __DDR3_CYCLES(ddr3_tAAmin),
 		__DDR3_CYCLES(ddr3_tRCDmin), __DDR3_CYCLES(ddr3_tRPmin),
 @@ -691,27 +704,28 @@ decode_fbdimm(const struct sysctlnode *n
 	int dimm_size, cycle_time, bits;
 	/*
 	 * FB-DIMM module size calculation is very much like DDR3
 	 */
 	dimm_size = s->sm_fbd.fbdimm_rows + 12 +
 		    s->sm_fbd.fbdimm_cols +  9 - 20 - 3;
 	dimm_size = (1 << dimm_size) * (1 << (s->sm_fbd.fbdimm_banks + 2));
 	cycle_time = (1000 * s->sm_fbd.fbdimm_mtb_dividend +
 			    (s->sm_fbd.fbdimm_mtb_divisor / 2)) /
 		     s->sm_fbd.fbdimm_mtb_divisor;
 	bits = 1 << (s->sm_fbd.fbdimm_dev_width + 2);
-	decode_size_speed(node, dimm_size, cycle_time, 2, bits, TRUE, "PC2", 0);
+	decode_size_speed(self, node, dimm_size, cycle_time, 2, bits, TRUE,
 			  "PC2", 0);
 	aprint_verbose_dev(self,
 	    "%d rows, %d cols, %d banks, %d.%02dns cycle time\n",
 	    s->sm_fbd.fbdimm_rows, s->sm_fbd.fbdimm_cols,
 << (s->sm_fbd.fbdimm_banks + 2),
 	    cycle_time / 1000, (cycle_time % 1000 + 5) /10 );
 #define	__FBDIMM_CYCLES(field) (s->sm_fbd.field / s->sm_fbd.fbdimm_tCKmin)
 	aprint_verbose_dev(self, latency, __FBDIMM_CYCLES(fbdimm_tAAmin),
 		__FBDIMM_CYCLES(fbdimm_tRCDmin), __FBDIMM_CYCLES(fbdimm_tRPmin),
 		(s->sm_fbd.fbdimm_tRAS_msb * 256 +
 			s->sm_fbd.fbdimm_tRAS_lsb) /

 @@ -1,14 +1,14 @@
-/* $NetBSD: spdmemvar.h,v 1.1 2010/03/24 00:31:41 pgoyette Exp $ */
+/* $NetBSD: spdmemvar.h,v 1.2 2011/08/01 03:49:52 pgoyette Exp $ */
 /*
  * Copyright (c) 2007 Paul Goyette
  * Copyright (c) 2007 Tobias Nygren
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
 @@ -508,18 +508,20 @@ struct spdmem {
 /* some fields are in the same place for all memory types */
 #define sm_cksum	sm_fpm.fpm_cksum
 #define sm_config	sm_fpm.fpm_config
 #define sm_voltage	sm_fpm.fpm_voltage
 #define	sm_refresh	sm_fpm.fpm_refresh
 #define	sm_selfrefresh	sm_fpm.fpm_selfrefresh
 #define SPDMEM_TYPE_MAXLEN 16
 struct spdmem_softc {
 	uint8_t		(*sc_read)(struct spdmem_softc *, uint8_t);
 	struct spdmem	sc_spd_data;
 	struct sysctllog *sc_sysctl_log;
 	char		sc_type[SPDMEM_TYPE_MAXLEN];
 };
-int spdmem_common_probe(struct spdmem_softc *);
+int  spdmem_common_probe(struct spdmem_softc *);
 void spdmem_common_attach(struct spdmem_softc *, device_t);
 int  spdmem_common_detach(struct spdmem_softc *, device_t);