Mon Aug 1 11:08:03 2011 UTC ()
add an experimental implementation of PCI MSIs (Message Signaled
Interrupts). Successfully tested with hdaudio and "wpi" wireless
ethernet.
notes:
-There seem to be buggy chips around which announce MSI support
 but don't correctly implement it. Thus the final word whether MSIs
 can be used should be by the driver.
-Only a single vector is supported. For multiple vectors, the IDT
 allocation code would have to be changed. (And we would possibly
 run into problems due to the limited number of vectors supported
 by the current code.)
-The code is "#if NIOAPIC > 0" because it uses the ioapic_edge
 interrupt stubs. These actually don't touch any ioapic, so this
 is somewhat a misnomer.
-MSIs can't be identified by a "pin" but only by a cpu/vector
 pair. Common intr code soesn't deal well with this yet.
-Drivers need to take care of saving/restoring MSI data in the device's
 config space on suspend/resume.


(drochner)
diff -r1.6 -r1.7 src/sys/arch/x86/include/pci_machdep_common.h
diff -r1.19 -r1.20 src/sys/arch/x86/pci/pci_intr_machdep.c

cvs diff -r1.6 -r1.7 src/sys/arch/x86/include/pci_machdep_common.h (expand / switch to unified diff)

--- src/sys/arch/x86/include/pci_machdep_common.h 2011/04/04 20:37:55 1.6
+++ src/sys/arch/x86/include/pci_machdep_common.h 2011/08/01 11:08:03 1.7
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: pci_machdep_common.h,v 1.6 2011/04/04 20:37:55 dyoung Exp $ */ 1/* $NetBSD: pci_machdep_common.h,v 1.7 2011/08/01 11:08:03 drochner Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. 4 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
5 * Copyright (c) 1994 Charles M. Hannum. All rights reserved. 5 * Copyright (c) 1994 Charles M. Hannum. All rights reserved.
6 * 6 *
7 * Redistribution and use in source and binary forms, with or without 7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions 8 * modification, are permitted provided that the following conditions
9 * are met: 9 * are met:
10 * 1. Redistributions of source code must retain the above copyright 10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer. 11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright 12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the 13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution. 14 * documentation and/or other materials provided with the distribution.
@@ -100,26 +100,30 @@ pcitag_t pci_make_tag(pci_chipset_tag_t, @@ -100,26 +100,30 @@ pcitag_t pci_make_tag(pci_chipset_tag_t,
100void pci_decompose_tag(pci_chipset_tag_t, pcitag_t, 100void pci_decompose_tag(pci_chipset_tag_t, pcitag_t,
101 int *, int *, int *); 101 int *, int *, int *);
102pcireg_t pci_conf_read(pci_chipset_tag_t, pcitag_t, int); 102pcireg_t pci_conf_read(pci_chipset_tag_t, pcitag_t, int);
103void pci_conf_write(pci_chipset_tag_t, pcitag_t, int, 103void pci_conf_write(pci_chipset_tag_t, pcitag_t, int,
104 pcireg_t); 104 pcireg_t);
105int pci_intr_map(const struct pci_attach_args *, 105int pci_intr_map(const struct pci_attach_args *,
106 pci_intr_handle_t *); 106 pci_intr_handle_t *);
107const char *pci_intr_string(pci_chipset_tag_t, pci_intr_handle_t); 107const char *pci_intr_string(pci_chipset_tag_t, pci_intr_handle_t);
108const struct evcnt *pci_intr_evcnt(pci_chipset_tag_t, pci_intr_handle_t); 108const struct evcnt *pci_intr_evcnt(pci_chipset_tag_t, pci_intr_handle_t);
109void *pci_intr_establish(pci_chipset_tag_t, pci_intr_handle_t, 109void *pci_intr_establish(pci_chipset_tag_t, pci_intr_handle_t,
110 int, int (*)(void *), void *); 110 int, int (*)(void *), void *);
111void pci_intr_disestablish(pci_chipset_tag_t, void *); 111void pci_intr_disestablish(pci_chipset_tag_t, void *);
112 112
 113/* experimental MSI support */
 114void *pci_msi_establish(struct pci_attach_args *, int, int (*)(void *), void *);
 115void pci_msi_disestablish(void *);
 116
113/* 117/*
114 * ALL OF THE FOLLOWING ARE MACHINE-DEPENDENT, AND SHOULD NOT BE USED 118 * ALL OF THE FOLLOWING ARE MACHINE-DEPENDENT, AND SHOULD NOT BE USED
115 * BY PORTABLE CODE. 119 * BY PORTABLE CODE.
116 */ 120 */
117 121
118/* Extract Bus Number for a host bridge or -1 if unknown. */ 122/* Extract Bus Number for a host bridge or -1 if unknown. */
119int pchb_get_bus_number(pci_chipset_tag_t, pcitag_t); 123int pchb_get_bus_number(pci_chipset_tag_t, pcitag_t);
120 124
121/* 125/*
122 * Section 6.2.4, `Miscellaneous Functions' of the PCI Specification, 126 * Section 6.2.4, `Miscellaneous Functions' of the PCI Specification,
123 * says that 255 means `unknown' or `no connection' to the interrupt 127 * says that 255 means `unknown' or `no connection' to the interrupt
124 * controller on a PC. 128 * controller on a PC.
125 */ 129 */

cvs diff -r1.19 -r1.20 src/sys/arch/x86/pci/pci_intr_machdep.c (expand / switch to unified diff)

--- src/sys/arch/x86/pci/pci_intr_machdep.c 2011/04/04 20:37:55 1.19
+++ src/sys/arch/x86/pci/pci_intr_machdep.c 2011/08/01 11:08:03 1.20
@@ -1,14 +1,14 @@ @@ -1,14 +1,14 @@
1/* $NetBSD: pci_intr_machdep.c,v 1.19 2011/04/04 20:37:55 dyoung Exp $ */ 1/* $NetBSD: pci_intr_machdep.c,v 1.20 2011/08/01 11:08:03 drochner Exp $ */
2 2
3/*- 3/*-
4 * Copyright (c) 1997, 1998, 2009 The NetBSD Foundation, Inc. 4 * Copyright (c) 1997, 1998, 2009 The NetBSD Foundation, Inc.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * This code is derived from software contributed to The NetBSD Foundation 7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center. 9 * NASA Ames Research Center.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions 12 * modification, are permitted provided that the following conditions
13 * are met: 13 * are met:
14 * 1. Redistributions of source code must retain the above copyright 14 * 1. Redistributions of source code must retain the above copyright
@@ -63,35 +63,36 @@ @@ -63,35 +63,36 @@
63/* 63/*
64 * Machine-specific functions for PCI autoconfiguration. 64 * Machine-specific functions for PCI autoconfiguration.
65 * 65 *
66 * On PCs, there are two methods of generating PCI configuration cycles. 66 * On PCs, there are two methods of generating PCI configuration cycles.
67 * We try to detect the appropriate mechanism for this machine and set 67 * We try to detect the appropriate mechanism for this machine and set
68 * up a few function pointers to access the correct method directly. 68 * up a few function pointers to access the correct method directly.
69 * 69 *
70 * The configuration method can be hard-coded in the config file by 70 * The configuration method can be hard-coded in the config file by
71 * using `options PCI_CONF_MODE=N', where `N' is the configuration mode 71 * using `options PCI_CONF_MODE=N', where `N' is the configuration mode
72 * as defined section 3.6.4.1, `Generating Configuration Cycles'. 72 * as defined section 3.6.4.1, `Generating Configuration Cycles'.
73 */ 73 */
74 74
75#include <sys/cdefs.h> 75#include <sys/cdefs.h>
76__KERNEL_RCSID(0, "$NetBSD: pci_intr_machdep.c,v 1.19 2011/04/04 20:37:55 dyoung Exp $"); 76__KERNEL_RCSID(0, "$NetBSD: pci_intr_machdep.c,v 1.20 2011/08/01 11:08:03 drochner Exp $");
77 77
78#include <sys/types.h> 78#include <sys/types.h>
79#include <sys/param.h> 79#include <sys/param.h>
80#include <sys/time.h> 80#include <sys/time.h>
81#include <sys/systm.h> 81#include <sys/systm.h>
82#include <sys/errno.h> 82#include <sys/errno.h>
83#include <sys/device.h> 83#include <sys/device.h>
84#include <sys/intr.h> 84#include <sys/intr.h>
 85#include <sys/malloc.h>
85 86
86#include <dev/pci/pcivar.h> 87#include <dev/pci/pcivar.h>
87 88
88#include "ioapic.h" 89#include "ioapic.h"
89#include "eisa.h" 90#include "eisa.h"
90#include "acpica.h" 91#include "acpica.h"
91#include "opt_mpbios.h" 92#include "opt_mpbios.h"
92#include "opt_acpi.h" 93#include "opt_acpi.h"
93 94
94#if NIOAPIC > 0 || NACPICA > 0 95#if NIOAPIC > 0 || NACPICA > 0
95#include <machine/i82093var.h> 96#include <machine/i82093var.h>
96#include <machine/mpconfig.h> 97#include <machine/mpconfig.h>
97#include <machine/mpbiosvar.h> 98#include <machine/mpbiosvar.h>
@@ -315,13 +316,103 @@ pci_intr_disestablish(pci_chipset_tag_t  @@ -315,13 +316,103 @@ pci_intr_disestablish(pci_chipset_tag_t
315 if ((pc->pc_present & PCI_OVERRIDE_INTR_ESTABLISH) != 0) { 316 if ((pc->pc_present & PCI_OVERRIDE_INTR_ESTABLISH) != 0) {
316 (*pc->pc_ov->ov_intr_disestablish)(pc->pc_ctx, 317 (*pc->pc_ov->ov_intr_disestablish)(pc->pc_ctx,
317 pc, cookie); 318 pc, cookie);
318 return; 319 return;
319 } 320 }
320 if (pc->pc_super != NULL) { 321 if (pc->pc_super != NULL) {
321 pci_intr_disestablish(pc->pc_super, cookie); 322 pci_intr_disestablish(pc->pc_super, cookie);
322 return; 323 return;
323 } 324 }
324 } 325 }
325 326
326 intr_disestablish(cookie); 327 intr_disestablish(cookie);
327} 328}
 329
 330#if NIOAPIC > 0
 331/*
 332 * experimental support for MSI, does support a single vector,
 333 * no MSI-X, 8-bit APIC IDs
 334 * (while it doesn't need the ioapic technically, it borrows
 335 * from its kernel support)
 336 */
 337
 338/* dummies, needed by common intr_establish code */
 339static void
 340msipic_hwmask(struct pic *pic, int pin)
 341{
 342}
 343static void
 344msipic_addroute(struct pic *pic, struct cpu_info *ci,
 345 int pin, int vec, int type)
 346{
 347}
 348
 349static struct pic msi_pic = {
 350 .pic_name = "msi",
 351 .pic_type = PIC_SOFT,
 352 .pic_vecbase = 0,
 353 .pic_apicid = 0,
 354 .pic_lock = __SIMPLELOCK_UNLOCKED,
 355 .pic_hwmask = msipic_hwmask,
 356 .pic_hwunmask = msipic_hwmask,
 357 .pic_addroute = msipic_addroute,
 358 .pic_delroute = msipic_addroute,
 359 .pic_edge_stubs = ioapic_edge_stubs,
 360};
 361
 362struct msi_hdl {
 363 struct intrhand *ih;
 364 pci_chipset_tag_t pc;
 365 pcitag_t tag;
 366 int co;
 367};
 368
 369void *
 370pci_msi_establish(struct pci_attach_args *pa, int level,
 371 int (*func)(void *), void *arg)
 372{
 373 int co;
 374 void *ih;
 375 struct msi_hdl *msih;
 376 struct cpu_info *ci;
 377 struct intrsource *s;
 378 u_int32_t cr;
 379
 380 if (!pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_MSI, &co, 0))
 381 return NULL;
 382
 383 ih = intr_establish(-1, &msi_pic, -1, IST_EDGE, level,
 384 func, arg, 0);
 385 if (!ih)
 386 return NULL;
 387
 388 msih = malloc(sizeof(*msih), M_DEVBUF, M_WAITOK);
 389 msih->ih = ih;
 390 msih->pc = pa->pa_pc;
 391 msih->tag = pa->pa_tag;
 392 msih->co = co;
 393
 394 ci = msih->ih->ih_cpu;
 395 s = ci->ci_isources[msih->ih->ih_slot];
 396 cr = pci_conf_read(pa->pa_pc, pa->pa_tag, co);
 397 pci_conf_write(pa->pa_pc, pa->pa_tag, co + 4,
 398 0xfee00000 | ci->ci_cpuid << 12);
 399 if (cr & 0x800000) {
 400 pci_conf_write(pa->pa_pc, pa->pa_tag, co + 8, 0);
 401 pci_conf_write(pa->pa_pc, pa->pa_tag, co + 12,
 402 s->is_idtvec | 0x4000);
 403 } else
 404 pci_conf_write(pa->pa_pc, pa->pa_tag, co + 8,
 405 s->is_idtvec | 0x4000);
 406 pci_conf_write(pa->pa_pc, pa->pa_tag, co, 0x10000);
 407 return ih;
 408}
 409
 410void
 411pci_msi_disestablish(void *ih)
 412{
 413 struct msi_hdl *msih = ih;
 414
 415 pci_conf_write(msih->pc, msih->tag, msih->co, 0);
 416 intr_disestablish(msih->ih);
 417}
 418#endif