 @@ -1,104 +1,114 @@
-/* $NetBSD: gpio.c,v 1.35 2011/08/12 08:00:52 mbalmer Exp $ */
+/* $NetBSD: gpio.c,v 1.36 2011/08/28 07:48:50 mbalmer Exp $ */
 /*	$OpenBSD: gpio.c,v 1.6 2006/01/14 12:33:49 grange Exp $	*/
 /*
  * Copyright (c) 2008, 2009, 2010, 2011 Marc Balmer <marc@msys.ch>
  * Copyright (c) 2004, 2006 Alexander Yurchenko <grange@openbsd.org>
+ *
  * Permission to use, copy, modify, and distribute this software for any
  * purpose with or without fee is hereby granted, provided that the above
  * copyright notice and this permission notice appear in all copies.
+ *
  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: gpio.c,v 1.35 2011/08/12 08:00:52 mbalmer Exp $");
+__KERNEL_RCSID(0, "$NetBSD: gpio.c,v 1.36 2011/08/28 07:48:50 mbalmer Exp $");
 /*
  * General Purpose Input/Output framework.
  */
 #include <sys/param.h>
 #include <sys/callout.h>
 #include <sys/systm.h>
 #include <sys/conf.h>
 #include <sys/device.h>
 #include <sys/fcntl.h>
 #include <sys/ioctl.h>
 #include <sys/gpio.h>
 #include <sys/kernel.h>
 #include <sys/vnode.h>
 #include <sys/kmem.h>
 #include <sys/mutex.h>
 #include <sys/condvar.h>
 #include <sys/queue.h>
 #include <sys/kauth.h>
 #ifdef _MODULE
 #include <sys/module.h>
 #endif
 #include <dev/gpio/gpiovar.h>
 #include "locators.h"
 #ifdef GPIO_DEBUG
 #define DPRINTFN(n, x)	do { if (gpiodebug > (n)) printf x; } while (0)
 int gpiodebug = 0;
 #else
 #define DPRINTFN(n, x)
 #endif
 #define DPRINTF(x)	DPRINTFN(0, x)
 struct gpio_softc {
 	device_t		 sc_dev;
 	gpio_chipset_tag_t	 sc_gc;		/* GPIO controller */
 	gpio_pin_t		*sc_pins;	/* pins array */
 	int			 sc_npins;	/* number of pins */
-	int			 sc_opened;
+	kmutex_t		 sc_mtx;
 	kcondvar_t		 sc_ioctl;	/* ioctl in progress */
 	int			 sc_ioctl_busy;	/* ioctl is busy */
 	LIST_HEAD(, gpio_dev)	 sc_devs;	/* devices */
 	LIST_HEAD(, gpio_name)	 sc_names;	/* named pins */
 };
 static int	gpio_match(device_t, cfdata_t, void *);
 int		gpio_submatch(device_t, cfdata_t, const int *, void *);
 static void	gpio_attach(device_t, device_t, void *);
 static int	gpio_rescan(device_t, const char *, const int *);
 static void	gpio_childdetached(device_t, device_t);
 static bool	gpio_resume(device_t, const pmf_qual_t *);
 static int	gpio_detach(device_t, int);
 static int	gpio_search(device_t, cfdata_t, const int *, void *);
 static int	gpio_print(void *, const char *);
 static int	gpio_pinbyname(struct gpio_softc *, char *);
 static void	gpio_pulse(void *);
 static int	gpio_ioctl(struct gpio_softc *, u_long, void *, int,
     struct lwp *);
 /* Old API */
 static int	gpio_ioctl_oapi(struct gpio_softc *, u_long, void *, int,
     kauth_cred_t);
 CFATTACH_DECL3_NEW(gpio, sizeof(struct gpio_softc),
     gpio_match, gpio_attach, gpio_detach, NULL, gpio_rescan,
     gpio_childdetached, DVF_DETACH_SHUTDOWN);
 dev_type_open(gpioopen);
 dev_type_close(gpioclose);
 dev_type_ioctl(gpioioctl);
 dev_type_ioctl(gpioioctl_locked);
 const struct cdevsw gpio_cdevsw = {
 	gpioopen, gpioclose, noread, nowrite, gpioioctl,
-	nostop, notty, nopoll, nommap, nokqfilter, D_OTHER,
+	nostop, notty, nopoll, nommap, nokqfilter, D_OTHER | D_MPSAFE
 };
 extern struct cfdriver gpio_cd;
 static int
 gpio_match(device_t parent, cfdata_t cf, void *aux)
+{
 	return 1;
+}
 int
 gpio_submatch(device_t parent, cfdata_t cf, const int *ip, void *aux)
+{
 @@ -134,52 +144,71 @@ gpio_rescan(device_t self, const char *i
+{
 	struct gpio_softc *sc = device_private(self);
 	config_search_loc(gpio_search, self, ifattr, locators, sc);
 	return 0;
+}
 static void
 gpio_attach(device_t parent, device_t self, void *aux)
+{
 	struct gpio_softc *sc = device_private(self);
 	struct gpiobus_attach_args *gba = aux;
 	int pin;
 	sc->sc_dev = self;
 	sc->sc_gc = gba->gba_gc;
 	sc->sc_pins = gba->gba_pins;
 	sc->sc_npins = gba->gba_npins;
 	printf(": %d pins\n", sc->sc_npins);
 	for (pin = 0; pin < sc->sc_npins; pin++) {
 		callout_init(&sc->sc_pins[pin].pin_pulse, CALLOUT_MPSAFE);
 		callout_setfunc(&sc->sc_pins[pin].pin_pulse, gpio_pulse,
 		     &sc->sc_pins[pin]);
+	}
 	if (!pmf_device_register(self, NULL, gpio_resume))
 		aprint_error_dev(self, "couldn't establish power handler\n");
 	mutex_init(&sc->sc_mtx, MUTEX_DEFAULT, IPL_VM);
 	cv_init(&sc->sc_ioctl, "gpioctl");
 	/*
 	 * Attach all devices that can be connected to the GPIO pins
 	 * described in the kernel configuration file.
 	 */
 	gpio_rescan(self, "gpio", NULL);
+}
 static int
 gpio_detach(device_t self, int flags)
+{
-	int rc;
+	struct gpio_softc *sc;
 	int pin, rc;
 	sc = device_private(self);
 	for (pin = 0; pin < sc->sc_npins; pin++) {
 		if (sc->sc_pins[pin].pin_state & GPIO_PIN_PULSE) {
 			callout_halt(&sc->sc_pins[pin].pin_pulse, NULL);
 			callout_destroy(&sc->sc_pins[pin].pin_pulse);
 			sc->sc_pins[pin].pin_state &= ~GPIO_PIN_PULSE;
+		}
+	}
 	if ((rc = config_detach_children(self, flags)) != 0)
 		return rc;
 	mutex_destroy(&sc->sc_mtx);
 	cv_destroy(&sc->sc_ioctl);
 #if 0
 	int maj, mn;
 	/* Locate the major number */
 	for (maj = 0; maj < nchrdev; maj++)
 		if (cdevsw[maj].d_open == gpioopen)
 			break;
 	/* Nuke the vnodes for any open instances (calls close) */
 	mn = device_unit(self);
 	vdevgone(maj, mn, mn, VCHR);
 #endif
 	return 0;
 @@ -218,49 +247,49 @@ int
 gpiobus_print(void *aux, const char *pnp)
+{
 #if 0
 	struct gpiobus_attach_args *gba = aux;
 #endif
 	if (pnp != NULL)
 		aprint_normal("gpiobus at %s", pnp);
 	return UNCONF;
+}
 /* return 1 if all pins can be mapped, 0 if not */
 int
-gpio_pin_can_map(void *gpio, int offset, u_int32_t mask)
+gpio_pin_can_map(void *gpio, int offset, uint32_t mask)
+{
 	struct gpio_softc *sc = gpio;
 	int npins, pin, i;
 	npins = gpio_npins(mask);
 	if (npins > sc->sc_npins)
 		return 0;
 	for (npins = 0, i = 0; i < 32; i++)
 		if (mask & (1 << i)) {
 			pin = offset + i;
 			if (pin < 0 || pin >= sc->sc_npins)
 				return 0;
 			if (sc->sc_pins[pin].pin_mapped)
 				return 0;
+		}
 	return 1;
+}
 int
-gpio_pin_map(void *gpio, int offset, u_int32_t mask, struct gpio_pinmap *map)
+gpio_pin_map(void *gpio, int offset, uint32_t mask, struct gpio_pinmap *map)
+{
 	struct gpio_softc *sc = gpio;
 	int npins, pin, i;
 	npins = gpio_npins(mask);
 	if (npins > sc->sc_npins)
 		return 1;
 	for (npins = 0, i = 0; i < 32; i++)
 		if (mask & (1 << i)) {
 			pin = offset + i;
 			if (pin < 0 || pin >= sc->sc_npins)
 				return 1;
 @@ -310,196 +339,289 @@ gpio_pin_ctl(void *gpio, struct gpio_pin
 	return gpiobus_pin_ctl(sc->sc_gc, map->pm_map[pin], flags);
+}
 int
 gpio_pin_caps(void *gpio, struct gpio_pinmap *map, int pin)
+{
 	struct gpio_softc *sc = gpio;
 	return sc->sc_pins[map->pm_map[pin]].pin_caps;
+}
 int
-gpio_npins(u_int32_t mask)
+gpio_npins(uint32_t mask)
+{
 	int npins, i;
 	for (npins = 0, i = 0; i < 32; i++)
 		if (mask & (1 << i))
 			npins++;
 	return npins;
+}
 int
 gpio_lock(void *data)
+{
 	struct gpio_softc *sc;
 	int error;
 	error = 0;
 	sc = (struct gpio_softc *)data;
 	mutex_enter(&sc->sc_mtx);
 	while (sc->sc_ioctl_busy) {
 		error = cv_wait_sig(&sc->sc_ioctl, &sc->sc_mtx);
 		if (error)
 			break;
+	}
 	if (!error)
 		sc->sc_ioctl_busy = 1;
 	mutex_exit(&sc->sc_mtx);
 	return error;
+}
 void
 gpio_unlock(void *data)
+{
 	struct gpio_softc *sc;
 	sc = (struct gpio_softc *)data;
 	mutex_enter(&sc->sc_mtx);
 	sc->sc_ioctl_busy = 0;
 	cv_signal(&sc->sc_ioctl);
 	mutex_exit(&sc->sc_mtx);
+}
 int
 gpioopen(dev_t dev, int flag, int mode, struct lwp *l)
+{
 	struct gpio_softc *sc;
 	int ret;
 	sc = device_lookup_private(&gpio_cd, minor(dev));
 	if (sc == NULL)
 		return ENXIO;
 	DPRINTF(("%s: opening\n", device_xname(sc->sc_dev)));
 	if (sc->sc_opened) {
 		DPRINTF(("%s: already opened\n", device_xname(sc->sc_dev)));
 		return EBUSY;
 	if ((ret = gpiobus_open(sc->sc_gc, sc->sc_dev))) {
 		DPRINTF(("%s: gpiobus_open returned %d\n",
 		    device_xname(sc->sc_dev),
 		    ret));
 		return ret;
 	sc->sc_opened = 1;
-	return 0;
+	return gpiobus_open(sc->sc_gc, sc->sc_dev);
+}
 int
 gpioclose(dev_t dev, int flag, int mode, struct lwp *l)
+{
 	struct gpio_softc *sc;
 	sc = device_lookup_private(&gpio_cd, minor(dev));
-	DPRINTF(("%s: closing\n", device_xname(sc->sc_dev)));
+	gpiobus_close(sc->sc_gc, sc->sc_dev);
 	(void)gpiobus_close(sc->sc_gc, sc->sc_dev);
 	sc->sc_opened = 0;
 	return 0;
+}
 static int
 gpio_pinbyname(struct gpio_softc *sc, char *gp_name)
+{
         struct gpio_name *nm;
         LIST_FOREACH(nm, &sc->sc_names, gp_next)
                 if (!strcmp(nm->gp_name, gp_name))
                         return nm->gp_pin;
         return -1;
+}
 static void
 gpio_pulse(void *arg)
+{
 	struct gpio_pin *pin;
 	pin = (struct gpio_pin *)arg;
 	if ((pin->pin_state & GPIO_PIN_PULSE) == 0)
 		return;
 	if (pin->pin_state & GPIO_PIN_HIGH) {
 		gpiobus_pin_write(pin->pin_gc, pin->pin_num, GPIO_PIN_LOW);
 		pin->pin_state &= ~GPIO_PIN_HIGH;
 		callout_schedule(&pin->pin_pulse, pin->pin_ticks_off);
 	} else {
 		gpiobus_pin_write(pin->pin_gc, pin->pin_num, GPIO_PIN_HIGH);
 		pin->pin_state |= GPIO_PIN_HIGH;
 		callout_schedule(&pin->pin_pulse, pin->pin_ticks_on);
+	}
+}
 int
 gpioioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l)
+{
 	int error;
 	struct gpio_softc *sc;
 	sc = device_lookup_private(&gpio_cd, minor(dev));
 	error = gpio_lock(sc);
 	if (error)
 		return error;
 	error = gpio_ioctl(sc, cmd, data, flag, l);
 	gpio_unlock(sc);
 	return error;
+}
 static int
 gpio_ioctl(struct gpio_softc *sc, u_long cmd, void *data, int flag,
     struct lwp *l)
+{
 	gpio_chipset_tag_t gc;
 	struct gpio_info *info;
 	struct gpio_attach *attach;
 	struct gpio_attach_args ga;
 	struct gpio_dev *gdev;
 	struct gpio_req *req;
 	struct gpio_pulse *pulse;
 	struct gpio_name *nm;
 	struct gpio_set *set;
 	struct gpio_pin *gpin;
 	device_t dv;
 	cfdata_t cf;
 	kauth_cred_t cred;
 	int locs[GPIOCF_NLOCS];
 	int pin, value, flags, npins;
 	sc = device_lookup_private(&gpio_cd, minor(dev));
 	gc = sc->sc_gc;
 	if (cmd != GPIOINFO && !device_is_active(sc->sc_dev)) {
 		DPRINTF(("%s: device is not active\n",
 		    device_xname(sc->sc_dev)));
 		return EBUSY;
+	}
 	cred = kauth_cred_get();
 	switch (cmd) {
 	case GPIOINFO:
 		info = (struct gpio_info *)data;
 		if (!kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET,
 		    NULL, NULL, NULL, NULL))
 			info->gpio_npins = sc->sc_npins;
 		else {
 			for (pin = npins = 0; pin < sc->sc_npins; pin++)
 				if (sc->sc_pins[pin].pin_flags & GPIO_PIN_SET)
 					++npins;
 			info->gpio_npins = npins;
+		}
 		break;
 	case GPIOREAD:
 		req = (struct gpio_req *)data;
-		if (req->gp_name[0] != '\0') {
+		if (req->gp_name[0] != '\0')
 			pin = gpio_pinbyname(sc, req->gp_name);
-			if (pin == -1)
+		else
 				return EINVAL;
 		} else
 			pin = req->gp_pin;
 		if (pin < 0 || pin >= sc->sc_npins)
 			return EINVAL;
 		if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) &&
 		    kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET,
 		    NULL, NULL, NULL, NULL))
 			return EPERM;
 		/* return read value */
 		req->gp_value = gpiobus_pin_read(gc, pin);
 		break;
 	case GPIOWRITE:
 		if ((flag & FWRITE) == 0)
 			return EBADF;
 		req = (struct gpio_req *)data;
-		if (req->gp_name[0] != '\0') {
+		if (req->gp_name[0] != '\0')
 			pin = gpio_pinbyname(sc, req->gp_name);
-			if (pin == -1)
+		else
 				return EINVAL;
 		} else
 			pin = req->gp_pin;
 		if (pin < 0 || pin >= sc->sc_npins)
 			return EINVAL;
 		if (sc->sc_pins[pin].pin_mapped)
 			return EBUSY;
 		if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) &&
 		    kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET,
 		    NULL, NULL, NULL, NULL))
 			return EPERM;
 		value = req->gp_value;
 		if (value != GPIO_PIN_LOW && value != GPIO_PIN_HIGH)
 			return EINVAL;
 		if (sc->sc_pins[pin].pin_state & GPIO_PIN_PULSE) {
 			callout_halt(&sc->sc_pins[pin].pin_pulse, NULL);
 			sc->sc_pins[pin].pin_state &= ~GPIO_PIN_PULSE;
+		}
 		gpiobus_pin_write(gc, pin, value);
 		/* return old value */
 		req->gp_value = sc->sc_pins[pin].pin_state;
 		/* update current value */
 		sc->sc_pins[pin].pin_state = value;
 		break;
 	case GPIOPULSE:
 		if ((flag & FWRITE) == 0)
 			return EBADF;
 		pulse = (struct gpio_pulse *)data;
 		if (pulse->gp_name[0] != '\0')
 			pin = gpio_pinbyname(sc, pulse->gp_name);
 		else
 			pin = pulse->gp_pin;
 		if (pin < 0 || pin >= sc->sc_npins)
 			return EINVAL;
 		gpin = &sc->sc_pins[pin];
 		if (gpin->pin_mapped)
 			return EBUSY;
 		if (!(gpin->pin_flags & GPIO_PIN_SET) &&
 		    kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET,
 		    NULL, NULL, NULL, NULL))
 			return EPERM;
 		if (gpin->pin_flags & GPIO_PIN_PULSATE) {
 			gpiobus_pin_write(gc, pin, GPIO_PIN_HIGH);
 			gpin->pin_state = GPIO_PIN_PULSE;
 			return 0;
+		}
 		if (gpin->pin_state & GPIO_PIN_PULSE)
 			callout_halt(&gpin->pin_pulse, NULL);
 		gpin->pin_gc = gc;
 		gpin->pin_ticks_on = tvtohz(&pulse->gp_pulse_on);
 		gpin->pin_ticks_off = tvtohz(&pulse->gp_pulse_off);
 		if (gpin->pin_ticks_on == 0 || gpin->pin_ticks_off == 0) {
 			gpin->pin_ticks_on = hz / 2;
 			gpin->pin_ticks_off = hz / 2;
+		}
 		gpiobus_pin_write(gc, pin, GPIO_PIN_HIGH);
 		gpin->pin_state = GPIO_PIN_HIGH | GPIO_PIN_PULSE;
 		callout_schedule(&gpin->pin_pulse, gpin->pin_ticks_on);
 		break;
 	case GPIOTOGGLE:
 		if ((flag & FWRITE) == 0)
 			return EBADF;
 		req = (struct gpio_req *)data;
-		if (req->gp_name[0] != '\0') {
+		if (req->gp_name[0] != '\0')
 			pin = gpio_pinbyname(sc, req->gp_name);
-			if (pin == -1)
+		else
 				return EINVAL;
 		} else
 			pin = req->gp_pin;
 		if (pin < 0 || pin >= sc->sc_npins)
 			return EINVAL;
 		if (sc->sc_pins[pin].pin_mapped)
 			return EBUSY;
 		if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET) &&
 		    kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET,
 		    NULL, NULL, NULL, NULL))
 			return EPERM;
 @@ -516,80 +638,79 @@ gpioioctl(dev_t dev, u_long cmd, void *d
 		    NULL, NULL, NULL, NULL))
 			return EPERM;
 		attach = (struct gpio_attach *)data;
 		/* do not try to attach if the pins are already mapped */
 		if (!gpio_pin_can_map(sc, attach->ga_offset, attach->ga_mask))
 			return EBUSY;
 		ga.ga_gpio = sc;
 		ga.ga_dvname = attach->ga_dvname;
 		ga.ga_offset = attach->ga_offset;
 		ga.ga_mask = attach->ga_mask;
-		DPRINTF(("%s: attach %s with offset %d and mask 0x%02x\n",
+		ga.ga_nolock = 1;
-		    device_xname(sc->sc_dev), ga.ga_dvname, ga.ga_offset,
+		DPRINTF(("%s: attach %s with offset %d and mask "
-		    ga.ga_mask));
+		    "0x%02x\n", device_xname(sc->sc_dev), ga.ga_dvname,
 		    ga.ga_offset, ga.ga_mask));
 		locs[GPIOCF_OFFSET] = ga.ga_offset;
 		locs[GPIOCF_MASK] = ga.ga_mask;
 		cf = config_search_loc(NULL, sc->sc_dev, "gpio", locs, &ga);
 		if (cf != NULL) {
 			dv = config_attach_loc(sc->sc_dev, cf, locs, &ga,
 			    gpiobus_print);
 			if (dv != NULL) {
 				gdev = kmem_alloc(sizeof(struct gpio_dev),
 				    KM_SLEEP);
 				gdev->sc_dev = dv;
 				LIST_INSERT_HEAD(&sc->sc_devs, gdev, sc_next);
 			} else
 				return EINVAL;
 		} else
 			return EINVAL;
-		break;
+		return 0;
 	case GPIODETACH:
 		if (kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET,
 		    NULL, NULL, NULL, NULL))
 			return EPERM;
 		attach = (struct gpio_attach *)data;
 		LIST_FOREACH(gdev, &sc->sc_devs, sc_next) {
 			if (strcmp(device_xname(gdev->sc_dev),
 			    attach->ga_dvname) == 0) {
 				if (config_detach(gdev->sc_dev, 0) == 0) {
 					LIST_REMOVE(gdev, sc_next);
 					kmem_free(gdev,
 					    sizeof(struct gpio_dev));
 					return 0;
+				}
 				break;
+			}
+		}
 		return EINVAL;
 		break;
 	case GPIOSET:
 		if (kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET,
 		    NULL, NULL, NULL, NULL))
 			return EPERM;
 		set = (struct gpio_set *)data;
-		if (set->gp_name[0] != '\0') {
+		if (set->gp_name[0] != '\0')
 			pin = gpio_pinbyname(sc, set->gp_name);
-			if (pin == -1)
+		else
 				return EINVAL;
 		} else
 			pin = set->gp_pin;
 		if (pin < 0 || pin >= sc->sc_npins)
 			return EINVAL;
 		flags = set->gp_flags;
 		/* check that the controller supports all requested flags */
 		if ((flags & sc->sc_pins[pin].pin_caps) != flags)
 			return ENODEV;
 		flags = set->gp_flags | GPIO_PIN_SET;
 		set->gp_caps = sc->sc_pins[pin].pin_caps;
 		/* return old value */
 		set->gp_flags = sc->sc_pins[pin].pin_flags;
 		if (flags > 0) {
 @@ -619,31 +740,29 @@ gpioioctl(dev_t dev, u_long cmd, void *d
 				strlcpy(nm->gp_name, set->gp_name2,
 				    sizeof(nm->gp_name));
 				nm->gp_pin = set->gp_pin;
 				LIST_INSERT_HEAD(&sc->sc_names, nm, gp_next);
+			}
+		}
 		break;
 	case GPIOUNSET:
 		if (kauth_authorize_device(cred, KAUTH_DEVICE_GPIO_PINSET,
 		    NULL, NULL, NULL, NULL))
 			return EPERM;
 		set = (struct gpio_set *)data;
-		if (set->gp_name[0] != '\0') {
+		if (set->gp_name[0] != '\0')
 			pin = gpio_pinbyname(sc, set->gp_name);
-			if (pin == -1)
+		else
 				return EINVAL;
 		} else
 			pin = set->gp_pin;
 		if (pin < 0 || pin >= sc->sc_npins)
 			return EINVAL;
 		if (sc->sc_pins[pin].pin_mapped)
 			return EBUSY;
 		if (!(sc->sc_pins[pin].pin_flags & GPIO_PIN_SET))
 			return EINVAL;
 		LIST_FOREACH(nm, &sc->sc_names, gp_next) {
 			if (nm->gp_pin == pin) {
 				LIST_REMOVE(nm, gp_next);
 				kmem_free(nm, sizeof(struct gpio_name));

 @@ -1,14 +1,14 @@
-/* $NetBSD: gpiovar.h,v 1.11 2011/08/12 08:00:52 mbalmer Exp $ */
+/* $NetBSD: gpiovar.h,v 1.12 2011/08/28 07:48:50 mbalmer Exp $ */
 /*	$OpenBSD: gpiovar.h,v 1.3 2006/01/14 12:33:49 grange Exp $	*/
 /*
  * Copyright (c) 2004, 2006 Alexander Yurchenko <grange@openbsd.org>
+ *
  * Permission to use, copy, modify, and distribute this software for any
  * purpose with or without fee is hereby granted, provided that the above
  * copyright notice and this permission notice appear in all copies.
+ *
  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 @@ -25,76 +25,84 @@
 /* GPIO controller description */
 typedef struct gpio_chipset_tag {
 	void	*gp_cookie;
 	int	(*gp_gc_open)(void *, device_t);
 	void    (*gp_gc_close)(void *, device_t);
 	int	(*gp_pin_read)(void *, int);
 	void	(*gp_pin_write)(void *, int, int);
 	void	(*gp_pin_ctl)(void *, int, int);
 } *gpio_chipset_tag_t;
 /* GPIO pin description */
 typedef struct gpio_pin {
-	int	pin_num;		/* number */
+	int			pin_num;	/* number */
-	int	pin_caps;		/* capabilities */
+	int			pin_caps;	/* capabilities */
-	int	pin_flags;		/* current configuration */
+	int			pin_flags;	/* current configuration */
-	int	pin_state;		/* current state */
+	int			pin_state;	/* current state */
-	int	pin_mapped;		/* is mapped */
+	int			pin_mapped;	/* is mapped */
 	callout_t		pin_pulse;	/* for pulsing */
 	int			pin_ticks_on;	/* "on" period */
 	int			pin_ticks_off;	/* "off" period */
 	gpio_chipset_tag_t	pin_gc;		/* reference the controller */
 } gpio_pin_t;
 /* Attach GPIO framework to the controller */
 struct gpiobus_attach_args {
-	gpio_chipset_tag_t	gba_gc;		/* underlying controller */
+	gpio_chipset_tag_t	 gba_gc;	/* underlying controller */
 	gpio_pin_t		*gba_pins;	/* pins array */
-	int			gba_npins;	/* total number of pins */
+	int			 gba_npins;	/* total number of pins */
 };
 int gpiobus_print(void *, const char *);
 /* GPIO framework private methods */
 #define gpiobus_open(gc, dev) \
     ((gc)->gp_gc_open ? ((gc)->gp_gc_open((gc)->gp_cookie, dev)) : 0)
 #define gpiobus_close(gc, dev) \
     ((gc)->gp_gc_close ? ((gc)->gp_gc_close((gc)->gp_cookie, dev)), 1 : 0)
 #define gpiobus_pin_read(gc, pin) \
     ((gc)->gp_pin_read((gc)->gp_cookie, (pin)))
 #define gpiobus_pin_write(gc, pin, value) \
     ((gc)->gp_pin_write((gc)->gp_cookie, (pin), (value)))
 #define gpiobus_pin_ctl(gc, pin, flags) \
     ((gc)->gp_pin_ctl((gc)->gp_cookie, (pin), (flags)))
 /* Attach devices connected to the GPIO pins */
 struct gpio_attach_args {
 	void		*ga_gpio;
 	int		 ga_offset;
-	u_int32_t	 ga_mask;
+	uint32_t	 ga_mask;
 	char		*ga_dvname;
 	int		 ga_nolock;
 };
 /* GPIO pin map */
 struct gpio_pinmap {
 	int		*pm_map;		/* pin map */
 	int		 pm_size;		/* map size */
 };
 struct gpio_dev {
 	device_t		sc_dev;	/* the gpio device */
 	LIST_ENTRY(gpio_dev)	sc_next;
 };
 struct gpio_name {
 	char			gp_name[GPIOMAXNAME];
 	int			gp_pin;
 	LIST_ENTRY(gpio_name)	gp_next;
 };
-int	gpio_pin_can_map(void *, int, u_int32_t);
+int	gpio_pin_can_map(void *, int, uint32_t);
-int	gpio_pin_map(void *, int, u_int32_t, struct gpio_pinmap *);
+int	gpio_pin_map(void *, int, uint32_t, struct gpio_pinmap *);
 void	gpio_pin_unmap(void *, struct gpio_pinmap *);
 int	gpio_pin_read(void *, struct gpio_pinmap *, int);
 void	gpio_pin_write(void *, struct gpio_pinmap *, int, int);
 void	gpio_pin_ctl(void *, struct gpio_pinmap *, int, int);
 int	gpio_pin_caps(void *, struct gpio_pinmap *, int);
-int	gpio_npins(u_int32_t);
+int	gpio_npins(uint32_t);
 int	gpio_lock(void *);
 void	gpio_unlock(void *);
 #endif	/* !_DEV_GPIO_GPIOVAR_H_ */

 @@ -1,38 +1,41 @@
-/* $NetBSD: gpio.h,v 1.8 2011/06/23 00:46:37 matt Exp $ */
+/* $NetBSD: gpio.h,v 1.9 2011/08/28 07:48:50 mbalmer Exp $ */
 /*	$OpenBSD: gpio.h,v 1.7 2008/11/26 14:51:20 mbalmer Exp $	*/
 /*
  * Copyright (c) 2009 Marc Balmer <marc@msys.ch>
  * Copyright (c) 2004 Alexander Yurchenko <grange@openbsd.org>
+ *
  * Permission to use, copy, modify, and distribute this software for any
  * purpose with or without fee is hereby granted, provided that the above
  * copyright notice and this permission notice appear in all copies.
+ *
  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  */
 #ifndef _SYS_GPIO_H_
 #define _SYS_GPIO_H_
 #include <sys/time.h>
 /* GPIO pin states */
 #define GPIO_PIN_LOW		0x00	/* low level (logical 0) */
 #define GPIO_PIN_HIGH		0x01	/* high level (logical 1) */
 #define GPIO_PIN_PULSE		0x02	/* pulsing, or-ed with state */
 /* Max name length of a pin */
 #define GPIOMAXNAME		64
 /* GPIO pin configuration flags */
 #define GPIO_PIN_INPUT		0x0001	/* input direction */
 #define GPIO_PIN_OUTPUT		0x0002	/* output direction */
 #define GPIO_PIN_INOUT		0x0004	/* bi-directional */
 #define GPIO_PIN_OPENDRAIN	0x0008	/* open-drain output */
 #define GPIO_PIN_PUSHPULL	0x0010	/* push-pull output */
 #define GPIO_PIN_TRISTATE	0x0020	/* output disabled */
 #define GPIO_PIN_PULLUP		0x0040	/* internal pull-up enabled */
 #define GPIO_PIN_PULLDOWN	0x0080	/* internal pull-down enabled */
 @@ -41,65 +44,74 @@
 #define GPIO_PIN_USER		0x0400	/* user != 0 can access */
 #define GPIO_PIN_PULSATE	0x0800	/* pulsate in hardware */
 #define GPIO_PIN_INTR		0x1000	/* can be as an interrupt */
 #define GPIO_PIN_INTR_HIGH	0x2000	/* interrupt leading edge high */
 #define GPIO_PIN_SET		0x8000	/* set for securelevel access */
 /* GPIO controller description */
 struct gpio_info {
 	int gpio_npins;		/* total number of pins available */
 };
 /* GPIO pin request (read/write/toggle) */
 struct gpio_req {
-	char gp_name[GPIOMAXNAME];	/* pin name */
+	char		gp_name[GPIOMAXNAME];	/* pin name */
-	int gp_pin;			/* pin number */
+	int		gp_pin;			/* pin number */
-	int gp_value;			/* value */
+	int		gp_value;		/* value */
 };
 /* GPIO pulse request */
 struct gpio_pulse {
 	char		gp_name[GPIOMAXNAME];	/* pin name */
 	int		gp_pin;			/* pin number */
 	struct timeval	gp_pulse_on;		/* "on" period */
 	struct timeval	gp_pulse_off;		/* "off" period */
 };
 /* GPIO pin configuration */
 struct gpio_set {
-	char gp_name[GPIOMAXNAME];
+	char	gp_name[GPIOMAXNAME];
-	int gp_pin;
+	int	gp_pin;
-	int gp_caps;
+	int	gp_caps;
-	int gp_flags;
+	int	gp_flags;
-	char gp_name2[GPIOMAXNAME];	/* new name */
+	char	gp_name2[GPIOMAXNAME];	/* new name */
 };
 /* Attach/detach device drivers that use GPIO pins */
 struct gpio_attach {
-	char ga_dvname[16];	/* device name */
+	char		ga_dvname[16];	/* device name */
-	int ga_offset;		/* pin number */
+	int		ga_offset;	/* pin number */
-	u_int32_t ga_mask;	/* binary mask */
+	uint32_t	ga_mask;	/* binary mask */
 };
 /* GPIO pin control (old API) */
 struct gpio_pin_ctl {
 	int gp_pin;		/* pin number */
 	int gp_caps;		/* pin capabilities (read-only) */
 	int gp_flags;		/* pin configuration flags */
 };
 /* GPIO pin operation (read/write/toggle) (old API) */
 struct gpio_pin_op {
-	int gp_pin;			/* pin number */
+	int gp_pin;		/* pin number */
-	int gp_value;			/* value */
+	int gp_value;		/* value */
 };
 #define GPIOINFO		_IOR('G', 0, struct gpio_info)
 /* the old API, kept for backwards compatibility */
 #define GPIOPINREAD		_IOWR('G', 1, struct gpio_pin_op)
 #define GPIOPINWRITE		_IOWR('G', 2, struct gpio_pin_op)
 #define GPIOPINTOGGLE		_IOWR('G', 3, struct gpio_pin_op)
 #define GPIOPINCTL		_IOWR('G', 4, struct gpio_pin_ctl)
 /* the new API */
 #define GPIOSET			_IOWR('G', 5, struct gpio_set)
 #define GPIOUNSET		_IOWR('G', 6, struct gpio_set)
 #define GPIOREAD		_IOWR('G', 7, struct gpio_req)
 #define GPIOWRITE		_IOWR('G', 8, struct gpio_req)
 #define GPIOTOGGLE		_IOWR('G', 9, struct gpio_req)
 #define GPIOATTACH		_IOWR('G', 10, struct gpio_attach)
 #define GPIODETACH		_IOWR('G', 11, struct gpio_attach)
 #define GPIOPULSE		_IOWR('G', 12, struct gpio_pulse)
 #endif	/* !_SYS_GPIO_H_ */

 @@ -1,31 +1,31 @@
-.\" $NetBSD: gpioctl.8,v 1.8 2011/08/12 08:02:33 mbalmer Exp $
+.\" $NetBSD: gpioctl.8,v 1.9 2011/08/28 07:48:50 mbalmer Exp $
 .\"
-.\" Copyright (c) 2009, 2010 Marc Balmer <marc@msys.ch>
+.\" Copyright (c) 2009, 2010, 2011 Marc Balmer <marc@msys.ch>
 .\" Copyright (c) 2004 Alexander Yurchenko <grange@openbsd.org>
 .\"
 .\" Permission to use, copy, modify, and distribute this software for any
 .\" purpose with or without fee is hereby granted, provided that the above
 .\" copyright notice and this permission notice appear in all copies.
 .\"
 .\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 .\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 .\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 .\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 .\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 .\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 .\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 .\"
-.Dd September 25, 2009
+.Dd August 21, 2011
 .Dt GPIOCTL 8
 .Os
 .Sh NAME
 .Nm gpioctl
 .Nd control GPIO devices
 .Sh SYNOPSIS
 .Nm gpioctl
 .Op Fl q
 .Ar device
 attach
 .Ar device
 .Ar offset
 .Ar mask
 @@ -38,26 +38,32 @@ detach
 .Op Fl q
 .Ar device
 .Ar pin
 .Op Ar 0 | 1 | 2
 .Nm gpioctl
 .Op Fl q
 .Ar device
 .Ar pin
 .Op Ar on | off | toggle
 .Nm gpioctl
 .Op Fl q
 .Ar device
 .Ar pin
 pulse
 .Op Ar frequency Op Ar duty cycle
 .Nm gpioctl
 .Op Fl q
 .Ar device
 .Ar pin
 set
 .Op Ar flags
 .Op Ar name
 .Nm gpioctl
 .Op Fl q
 .Ar device
 .Ar pin
 unset
 .Sh DESCRIPTION
 The
 .Nm
 program allows manipulation of GPIO
 (General Purpose Input/Output) device pins.
 @@ -82,36 +88,49 @@ or
 GPIO pins can be either
 .Dq read
 or
 .Dq written
 with the values of logical 0 or 1.
 If only a
 .Ar pin
 number is specified on the command line, the pin state will be read
 from the GPIO controller and displayed.
 To write to a pin, a value must be specified after the
 .Ar pin
 number.
 Values can be either 0 or 1.
-A value of 2 has a special meaning: it
+A value of 2
 .Dq toggles
 the pin, i.e. changes its state to the opposite.
 Instead of the numerical values, the word
 .Ar on ,
 .Ar off ,
 or
 .Ar toggle
 can be used.
 .Pp
 To
 .Dq pulse
 a pin, use the pulse command line option with an optional frequency value
 in hertz and an optional duty cycle in percent.
 If no frequency is specified, 1 Hz is assumed.
 If no duty cycle is specified, 50% are assumed.
 If the underlying hardware is not capable of pulsing in hardware,
 pulsing is done in software using the
 .Xr callout 9
 facility.
 The frequency and duty cycle arguments are ignored for pins that are able to
 pulse in hardware.
 .Pp
 Only pins that have been configured at securelevel 0, typically during system
 startup, are accessible once the securelevel has been raised.
 Pins can be given symbolic names for easier use.
 Besides using individual pins, device drivers that use GPIO pins can be
 attached to a
 .Xr gpio 4
 device using the
 .Nm
 command.
 .Pp
 The following configuration
 .Ar flags
 are supported by the GPIO framework:
 @@ -197,15 +216,15 @@ Toggle the error_led:
 .Xr gpio 4
 .Sh HISTORY
 The
 .Nm
 command first appeared in
 .Ox 3.6
 and
 .Nx 4.0 .
 .Sh AUTHORS
 The
 .Nm
 program was written by
 .An Alexander Yurchenko Aq grange@openbsd.org .
-Device attachment was added by
+Device attachment and pulsing was added by
 .An Marc Balmer Aq marc@msys.ch .

 @@ -1,14 +1,14 @@
-/* $NetBSD: gpioctl.c,v 1.10 2011/08/12 08:06:23 mbalmer Exp $ */
+/* $NetBSD: gpioctl.c,v 1.11 2011/08/28 07:48:50 mbalmer Exp $ */
 /*
  * Copyright (c) 2008, 2010 Marc Balmer <mbalmer@NetBSD.org>
  * Copyright (c) 2004 Alexander Yurchenko <grange@openbsd.org>
+ *
  * Permission to use, copy, modify, and distribute this software for any
  * purpose with or without fee is hereby granted, provided that the above
  * copyright notice and this permission notice appear in all copies.
+ *
  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 @@ -22,40 +22,41 @@
  */
 #include <sys/types.h>
 #include <sys/gpio.h>
 #include <sys/ioctl.h>
 #include <err.h>
 #include <errno.h>
 #include <fcntl.h>
 #include <limits.h>
 #include <paths.h>
 #include <stdio.h>
 #include <stdlib.h>
 #include <time.h>
 #include <string.h>
 #include <unistd.h>
 char *dev;
 int devfd = -1;
 int quiet = 0;
 static void getinfo(void);
 static void gpioread(int, char *);
 static void gpiowrite(int, char *, int);
 static void gpiopulse(int, char *, double, double);
 static void gpioset(int pin, char *name, int flags, char *alias);
 static void gpiounset(int pin, char *name);
-static void devattach(char *, int, u_int32_t);
+static void devattach(char *, int, uint32_t);
 static void devdetach(char *);
 static void usage(void);
 extern long long strtonum(const char *numstr, long long minval,
     long long maxval, const char **errstrp);
 const struct bitstr {
 	unsigned int mask;
 	const char *string;
 } pinflags[] = {
 	{ GPIO_PIN_INPUT, "in" },
 	{ GPIO_PIN_OUTPUT, "out" },
 	{ GPIO_PIN_INOUT, "inout" },
 @@ -64,51 +65,54 @@ const struct bitstr {
 	{ GPIO_PIN_TRISTATE, "tri" },
 	{ GPIO_PIN_PULLUP, "pu" },
 	{ GPIO_PIN_PULLDOWN, "pd" },
 	{ GPIO_PIN_INVIN, "iin" },
 	{ GPIO_PIN_INVOUT, "iout" },
 	{ GPIO_PIN_PULSATE, "pulsate" },
 	{ 0, NULL },
 };
 int
 main(int argc, char *argv[])
+{
 	const struct bitstr *bs;
 	double freq, dc;
 	int pin, ch, n, fl = 0, value = 0;
 	const char *errstr;
 	char *ep;
 	int ga_offset = -1;
-	u_int32_t ga_mask = 0;
+	uint32_t ga_mask = 0;
 	long lval;
 	char *nam = NULL;
 	char devn[32];
 	while ((ch = getopt(argc, argv, "q")) != -1)
 		switch (ch) {
 		case 'q':
 			quiet = 1;
 			break;
 		default:
 			usage();
 			/* NOTREACHED */
+		}
 	argc -= optind;
 	argv += optind;
 	if (argc < 1)
 		usage();
 	dev = argv[0];
 	freq = dc = 0.0;
 	if (strncmp(_PATH_DEV, dev, sizeof(_PATH_DEV) - 1)) {
 		(void)snprintf(devn, sizeof(devn), "%s%s", _PATH_DEV, dev);
 		dev = devn;
+	}
 	if ((devfd = open(dev, O_RDWR)) == -1)
 		err(EXIT_FAILURE, "%s", dev);
 	if (argc == 1) {
 		getinfo();
 		return EXIT_SUCCESS;
+	}
 @@ -130,56 +134,66 @@ main(int argc, char *argv[])
 			errx(EXIT_FAILURE, "invalid mask (not a number)");
 		if ((errno == ERANGE && (lval == LONG_MAX
 		    || lval == LONG_MIN)) || (unsigned long)lval > UINT_MAX)
 			errx(EXIT_FAILURE, "mask out of range");
 		ga_mask = lval;
 		devattach(driver, ga_offset, ga_mask);
 		return EXIT_SUCCESS;
 	} else if (!strcmp(argv[1], "detach")) {
 		if (argc != 3)
 			usage();
 		devdetach(argv[2]);
 	} else {
 		char *nm = NULL;
 		/* expecting a pin number or name */
 		pin = strtonum(argv[1], 0, INT_MAX, &errstr);
 		if (errstr)
 			nm = argv[1];	/* try named pin */
 		if (argc > 2) {
 			if (!strcmp(argv[2], "set")) {
 				for (n = 3; n < argc; n++) {
 					for (bs = pinflags; bs->string != NULL;
 					     bs++) {
 						if (!strcmp(argv[n],
 						    bs->string)) {
 							fl |= bs->mask;
 							break;
+						}
+					}
 					if (bs->string == NULL)
 						nam = argv[n];
+				}
 				gpioset(pin, nm, fl, nam);
 			} else if (!strcmp(argv[2], "unset")) {
 				gpiounset(pin, nm);
 			} else if (!strcmp(argv[2], "pulse")) {
 				if (argc == 4) {
 					freq = atof(argv[3]);
 					dc = 50.0;
 				} else if (argc == 5) {
 					freq = atof(argv[3]);
 					dc = atof(argv[4]);
 				} else
 					freq = dc = 0.0;
 				gpiopulse(pin, nm, freq, dc);
 			} else {
 				value = strtonum(argv[2], INT_MIN, INT_MAX,
 				   &errstr);
 				if (errstr) {
 					if (!strcmp(argv[2], "on"))
-						value = 1;
+						value = GPIO_PIN_HIGH;
 					else if (!strcmp(argv[2], "off"))
-						value = 0;
+						value = GPIO_PIN_LOW;
 					else if (!strcmp(argv[2], "toggle"))
 						value = 2;
 					else
 						errx(EXIT_FAILURE,
 						    "%s: invalid value",
 						    argv[2]);
+				}
 				gpiowrite(pin, nm, value);
+			}
 		} else
 			gpioread(pin, nm);
+	}
 @@ -226,47 +240,104 @@ gpioread(int pin, char *gp_name)
 static void
 gpiowrite(int pin, char *gp_name, int value)
+{
 	struct gpio_req req;
 	if (value < 0 || value > 2)
 		errx(EXIT_FAILURE, "%d: invalid value", value);
 	memset(&req, 0, sizeof(req));
 	if (gp_name != NULL)
 		strlcpy(req.gp_name, gp_name, sizeof(req.gp_name));
 	else
 		req.gp_pin = pin;
 	req.gp_value = (value == 0 ? GPIO_PIN_LOW : GPIO_PIN_HIGH);
-	if (value < 2) {
+	if (value == GPIO_PIN_HIGH || value == GPIO_PIN_LOW) {
 		req.gp_value = value;
 		if (ioctl(devfd, GPIOWRITE, &req) == -1)
 			err(EXIT_FAILURE, "GPIOWRITE");
 	} else {
 		if (ioctl(devfd, GPIOTOGGLE, &req) == -1)
 			err(EXIT_FAILURE, "GPIOTOGGLE");
+	}
 	if (quiet)
 		return;
 	if (gp_name)
 		printf("pin %s: state %d -> %d\n", gp_name, req.gp_value,
 		    (value < 2 ? value : 1 - req.gp_value));
 	else
 		printf("pin %d: state %d -> %d\n", pin, req.gp_value,
 		    (value < 2 ? value : 1 - req.gp_value));
+}
 static void
 gpiopulse(int pin, char *gp_name, double freq, double dc)
+{
 	struct gpio_pulse pulse;
 	suseconds_t period, on, off;
 	if (freq < 0.0 || (dc < 0.0 || dc >= 100.0))
 		errx(EXIT_FAILURE, "%.f Hz, %.f%% duty cycle: invalid value",
 		    freq, dc);
 	memset(&pulse, 0, sizeof(pulse));
 	if (gp_name != NULL)
 		strlcpy(pulse.gp_name, gp_name, sizeof(pulse.gp_name));
 	else
 		pulse.gp_pin = pin;
 	if (freq > 0.0 && dc > 0.0) {
 		period = 1000000 / freq;
 		on = period * dc / 100;
 		off = period - on;
 		if (on >= 1000000) {
 			pulse.gp_pulse_on.tv_sec = on / 1000000;
 			on -= pulse.gp_pulse_on.tv_sec * 1000000;
 			pulse.gp_pulse_on.tv_usec = on;
 		} else {
 			pulse.gp_pulse_on.tv_sec = 0;
 			pulse.gp_pulse_on.tv_usec = on;
+		}
 		if (off >= 1000000) {
 			pulse.gp_pulse_off.tv_sec = off / 1000000;
 			off -= pulse.gp_pulse_off.tv_sec * 1000000;
 			pulse.gp_pulse_off.tv_usec = off;
 		} else {
 			pulse.gp_pulse_off.tv_sec = 0;
 			pulse.gp_pulse_off.tv_usec = off;
+		}
 	} else {	/* gpio(4) defaults */
 		freq = 1.0;
 		dc = 50.0;
+	}
 	if (ioctl(devfd, GPIOPULSE, &pulse) == -1)
 		err(EXIT_FAILURE, "GPIOPULSE");
 	if (quiet)
 		return;
 	if (gp_name)
 		printf("pin %s: pulse at %.f Hz with a %.f%% duty cylce\n",
 		    gp_name, freq, dc);
 	else
 		printf("pin %d: pulse at %.f Hz with a %.f%% duty cylce\n",
 		    pin, freq, dc);
+}
 static void
 gpioset(int pin, char *name, int fl, char *alias)
+{
 	struct gpio_set set;
 	const struct bitstr *bs;
 	memset(&set, 0, sizeof(set));
 	if (name != NULL)
 		strlcpy(set.gp_name, name, sizeof(set.gp_name));
 	else
 		set.gp_pin = pin;
 	set.gp_flags = fl;
 	if (alias != NULL)
 @@ -304,27 +375,27 @@ gpiounset(int pin, char *name)
 	struct gpio_set set;
 	memset(&set, 0, sizeof(set));
 	if (name != NULL)
 		strlcpy(set.gp_name, name, sizeof(set.gp_name));
 	else
 		set.gp_pin = pin;
 	if (ioctl(devfd, GPIOUNSET, &set) == -1)
 		err(EXIT_FAILURE, "GPIOUNSET");
+}
 static void
-devattach(char *dvname, int offset, u_int32_t mask)
+devattach(char *dvname, int offset, uint32_t mask)
+{
 	struct gpio_attach attach;
 	memset(&attach, 0, sizeof(attach));
 	strlcpy(attach.ga_dvname, dvname, sizeof(attach.ga_dvname));
 	attach.ga_offset = offset;
 	attach.ga_mask = mask;
 	if (ioctl(devfd, GPIOATTACH, &attach) == -1)
 		err(EXIT_FAILURE, "GPIOATTACH");
+}
 static void
 devdetach(char *dvname)
 @@ -335,22 +406,24 @@ devdetach(char *dvname)
 	strlcpy(attach.ga_dvname, dvname, sizeof(attach.ga_dvname));
 	if (ioctl(devfd, GPIODETACH, &attach) == -1)
 		err(EXIT_FAILURE, "GPIODETACH");
+}
 static void
 usage(void)
+{
 	const char *progname;
 	progname = getprogname();
 	fprintf(stderr, "usage: %s [-q] device [pin] [0 | 1 | 2 | "
 	    "on | off | toggle]\n", progname);
 	fprintf(stderr, "usage: %s [-q] device pin pulse [frequency "
 	    "[duty cycle]]\n", progname);
 	fprintf(stderr, "       %s [-q] device pin set [flags] [name]\n",
 	    progname);
 	fprintf(stderr, "       %s [-q] device pin unset\n", progname);
 	fprintf(stderr, "       %s [-q] device attach device offset mask\n",
 	    progname);
 	fprintf(stderr, "       %s [-q] device detach device\n", progname);
 	exit(EXIT_FAILURE);
+}

 @@ -1,31 +1,31 @@
-.\" $NetBSD: gpio.4,v 1.18 2010/03/22 18:58:31 joerg Exp $
+.\" $NetBSD: gpio.4,v 1.19 2011/08/28 07:48:50 mbalmer Exp $
 .\"	$OpenBSD: gpio.4,v 1.5 2004/11/23 09:39:29 reyk Exp $
 .\"
 .\" Copyright (c) 2004 Alexander Yurchenko <grange@openbsd.org>
 .\"
 .\" Permission to use, copy, modify, and distribute this software for any
 .\" purpose with or without fee is hereby granted, provided that the above
 .\" copyright notice and this permission notice appear in all copies.
 .\"
 .\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 .\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 .\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 .\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 .\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 .\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 .\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 .\"
-.Dd September 27, 2009
+.Dd August 21, 2011
 .Dt GPIO 4
 .Os
 .Sh NAME
 .Nm gpio
 .Nd General Purpose Input/Output
 .Sh SYNOPSIS
 .Cd "gpio* at elansc?"
 .Cd "gpio* at epgpio?"
 .Cd "gpio* at gcscpcib?"
 .Cd "gpio* at gpiosim?"
 .Cd "gpio* at gscpcib?"
 .Cd "gpio* at ichlpcib?"
 .Cd "gpio* at nsclpcsio?"
 @@ -113,26 +113,51 @@ field must be either
 .Dv GPIO_PIN_LOW
 (logical 0) or
 .Dv GPIO_PIN_HIGH
 (logical 1).
 On return, the
 .Fa gp_value
 field contains the old pin state.
 .Pp
 .It Dv GPIOTOGGLE (struct gpio_req)
 Toggles the pin output value, i.e. changes it to the opposite.
 .Fa gp_value
 field is ignored and on return contains the old pin state.
 .Pp
 .It Dv GPIOPULSE (struct gpio_pulse)
 Starts pulsing the pin:
 .Bd -literal
 /* GPIO pulse request */
 struct gpio_pulse {
 	char		gp_name[GPIOMAXNAME];	/* pin name */
 	int		gp_pin;			/* pin number */
 	struct timeval	gp_pulse_on;		/* "on" period */
 	struct timeval	gp_pulse_off;		/* "off" period */
 };
 .Ed
 .Pp
 The
 .Fa gp_name
 or
 .Fa gp_pin
 field must be set before calling.
 If
 .Fa gp_pulse_on
 or
 .Fa gp_pulse_off
 is set to zero, a default of
 .Xr hz 9 / 2
 is assumed for both periods.
 .Pp
 .It Dv GPIOSET (struct gpio_set)
 Changes pin configuration flags with the new ones provided in the
 .Fa gpio_set
 structure:
 .Bd -literal
 #define GPIOMAXNAME          64
 struct gpio_set {
         char gp_name[GPIOMAXNAME];   /* pin name */
         int gp_pin;                     /* pin number */
         int gp_caps;                    /* pin capabilities (ro) */
         int gp_flags;                   /* pin configuration flags */
         char gp_name2[GPIOMAXNAME];  /* new name */