Sat Dec 3 10:53:10 2011 UTC ()
Don't try to set ld->sc_maxxfer below MAXPHYS.
At least genfs_io assumes 'ld->sc_maxxfer == MAXPHYS'.


(hannken)
diff -r1.3 -r1.4 src/sys/dev/pci/ld_virtio.c

cvs diff -r1.3 -r1.4 src/sys/dev/pci/ld_virtio.c (switch to unified diff)

--- src/sys/dev/pci/ld_virtio.c 2011/11/23 19:40:42 1.3
+++ src/sys/dev/pci/ld_virtio.c 2011/12/03 10:53:09 1.4
@@ -1,555 +1,557 @@ @@ -1,555 +1,557 @@
1/* $NetBSD: ld_virtio.c,v 1.3 2011/11/23 19:40:42 hannken Exp $ */ 1/* $NetBSD: ld_virtio.c,v 1.4 2011/12/03 10:53:09 hannken Exp $ */
2 2
3/* 3/*
4 * Copyright (c) 2010 Minoura Makoto. 4 * Copyright (c) 2010 Minoura Makoto.
5 * All rights reserved. 5 * All rights reserved.
6 * 6 *
7 * Redistribution and use in source and binary forms, with or without 7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions 8 * modification, are permitted provided that the following conditions
9 * are met: 9 * are met:
10 * 1. Redistributions of source code must retain the above copyright 10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer. 11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright 12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the 13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution. 14 * documentation and/or other materials provided with the distribution.
15 * 15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 */ 26 */
27 27
28#include <sys/cdefs.h> 28#include <sys/cdefs.h>
29__KERNEL_RCSID(0, "$NetBSD: ld_virtio.c,v 1.3 2011/11/23 19:40:42 hannken Exp $"); 29__KERNEL_RCSID(0, "$NetBSD: ld_virtio.c,v 1.4 2011/12/03 10:53:09 hannken Exp $");
30 30
31#include "rnd.h" 31#include "rnd.h"
32 32
33#include <sys/param.h> 33#include <sys/param.h>
34#include <sys/systm.h> 34#include <sys/systm.h>
35#include <sys/kernel.h> 35#include <sys/kernel.h>
36#include <sys/buf.h> 36#include <sys/buf.h>
37#include <sys/bus.h> 37#include <sys/bus.h>
38#include <sys/device.h> 38#include <sys/device.h>
39#include <sys/disk.h> 39#include <sys/disk.h>
40#include <sys/mutex.h> 40#include <sys/mutex.h>
41#if NRND > 0 41#if NRND > 0
42#include <sys/rnd.h> 42#include <sys/rnd.h>
43#endif 43#endif
44 44
45#include <dev/pci/pcidevs.h> 45#include <dev/pci/pcidevs.h>
46#include <dev/pci/pcireg.h> 46#include <dev/pci/pcireg.h>
47#include <dev/pci/pcivar.h> 47#include <dev/pci/pcivar.h>
48 48
49#include <dev/ldvar.h> 49#include <dev/ldvar.h>
50#include <dev/pci/virtioreg.h> 50#include <dev/pci/virtioreg.h>
51#include <dev/pci/virtiovar.h> 51#include <dev/pci/virtiovar.h>
52 52
53/* 53/*
54 * ld_virtioreg: 54 * ld_virtioreg:
55 */ 55 */
56/* Configuration registers */ 56/* Configuration registers */
57#define VIRTIO_BLK_CONFIG_CAPACITY 0 /* 64bit */ 57#define VIRTIO_BLK_CONFIG_CAPACITY 0 /* 64bit */
58#define VIRTIO_BLK_CONFIG_SIZE_MAX 8 /* 32bit */ 58#define VIRTIO_BLK_CONFIG_SIZE_MAX 8 /* 32bit */
59#define VIRTIO_BLK_CONFIG_SEG_MAX 12 /* 32bit */ 59#define VIRTIO_BLK_CONFIG_SEG_MAX 12 /* 32bit */
60#define VIRTIO_BLK_CONFIG_GEOMETRY_C 16 /* 16bit */ 60#define VIRTIO_BLK_CONFIG_GEOMETRY_C 16 /* 16bit */
61#define VIRTIO_BLK_CONFIG_GEOMETRY_H 18 /* 8bit */ 61#define VIRTIO_BLK_CONFIG_GEOMETRY_H 18 /* 8bit */
62#define VIRTIO_BLK_CONFIG_GEOMETRY_S 19 /* 8bit */ 62#define VIRTIO_BLK_CONFIG_GEOMETRY_S 19 /* 8bit */
63#define VIRTIO_BLK_CONFIG_BLK_SIZE 20 /* 32bit */ 63#define VIRTIO_BLK_CONFIG_BLK_SIZE 20 /* 32bit */
64 64
65/* Feature bits */ 65/* Feature bits */
66#define VIRTIO_BLK_F_BARRIER (1<<0) 66#define VIRTIO_BLK_F_BARRIER (1<<0)
67#define VIRTIO_BLK_F_SIZE_MAX (1<<1) 67#define VIRTIO_BLK_F_SIZE_MAX (1<<1)
68#define VIRTIO_BLK_F_SEG_MAX (1<<2) 68#define VIRTIO_BLK_F_SEG_MAX (1<<2)
69#define VIRTIO_BLK_F_GEOMETRY (1<<4) 69#define VIRTIO_BLK_F_GEOMETRY (1<<4)
70#define VIRTIO_BLK_F_RO (1<<5) 70#define VIRTIO_BLK_F_RO (1<<5)
71#define VIRTIO_BLK_F_BLK_SIZE (1<<6) 71#define VIRTIO_BLK_F_BLK_SIZE (1<<6)
72#define VIRTIO_BLK_F_SCSI (1<<7) 72#define VIRTIO_BLK_F_SCSI (1<<7)
73#define VIRTIO_BLK_F_FLUSH (1<<9) 73#define VIRTIO_BLK_F_FLUSH (1<<9)
74 74
75/* Command */ 75/* Command */
76#define VIRTIO_BLK_T_IN 0 76#define VIRTIO_BLK_T_IN 0
77#define VIRTIO_BLK_T_OUT 1 77#define VIRTIO_BLK_T_OUT 1
78#define VIRTIO_BLK_T_BARRIER 0x80000000 78#define VIRTIO_BLK_T_BARRIER 0x80000000
79 79
80/* Status */ 80/* Status */
81#define VIRTIO_BLK_S_OK 0 81#define VIRTIO_BLK_S_OK 0
82#define VIRTIO_BLK_S_IOERR 1 82#define VIRTIO_BLK_S_IOERR 1
83 83
84/* Request header structure */ 84/* Request header structure */
85struct virtio_blk_req_hdr { 85struct virtio_blk_req_hdr {
86 uint32_t type; /* VIRTIO_BLK_T_* */ 86 uint32_t type; /* VIRTIO_BLK_T_* */
87 uint32_t ioprio; 87 uint32_t ioprio;
88 uint64_t sector; 88 uint64_t sector;
89} __packed; 89} __packed;
90/* 512*virtio_blk_req_hdr.sector byte payload and 1 byte status follows */ 90/* 512*virtio_blk_req_hdr.sector byte payload and 1 byte status follows */
91 91
92 92
93/* 93/*
94 * ld_virtiovar: 94 * ld_virtiovar:
95 */ 95 */
96struct virtio_blk_req { 96struct virtio_blk_req {
97 struct virtio_blk_req_hdr vr_hdr; 97 struct virtio_blk_req_hdr vr_hdr;
98 uint8_t vr_status; 98 uint8_t vr_status;
99 struct buf *vr_bp; 99 struct buf *vr_bp;
100 bus_dmamap_t vr_cmdsts; 100 bus_dmamap_t vr_cmdsts;
101 bus_dmamap_t vr_payload; 101 bus_dmamap_t vr_payload;
102}; 102};
103 103
104struct ld_virtio_softc { 104struct ld_virtio_softc {
105 struct ld_softc sc_ld; 105 struct ld_softc sc_ld;
106 device_t sc_dev; 106 device_t sc_dev;
107 107
108 struct virtio_softc *sc_virtio; 108 struct virtio_softc *sc_virtio;
109 struct virtqueue sc_vq[1]; 109 struct virtqueue sc_vq[1];
110 110
111 struct virtio_blk_req *sc_reqs; 111 struct virtio_blk_req *sc_reqs;
112 bus_dma_segment_t sc_reqs_segs[1]; 112 bus_dma_segment_t sc_reqs_segs[1];
113 113
114 kmutex_t sc_lock; 114 kmutex_t sc_lock;
115 115
116 int sc_readonly; 116 int sc_readonly;
117}; 117};
118 118
119static int ld_virtio_match(device_t, cfdata_t, void *); 119static int ld_virtio_match(device_t, cfdata_t, void *);
120static void ld_virtio_attach(device_t, device_t, void *); 120static void ld_virtio_attach(device_t, device_t, void *);
121static int ld_virtio_detach(device_t, int); 121static int ld_virtio_detach(device_t, int);
122 122
123CFATTACH_DECL_NEW(ld_virtio, sizeof(struct ld_virtio_softc), 123CFATTACH_DECL_NEW(ld_virtio, sizeof(struct ld_virtio_softc),
124 ld_virtio_match, ld_virtio_attach, ld_virtio_detach, NULL); 124 ld_virtio_match, ld_virtio_attach, ld_virtio_detach, NULL);
125 125
126static int 126static int
127ld_virtio_match(device_t parent, cfdata_t match, void *aux) 127ld_virtio_match(device_t parent, cfdata_t match, void *aux)
128{ 128{
129 struct virtio_softc *va = aux; 129 struct virtio_softc *va = aux;
130 130
131 if (va->sc_childdevid == PCI_PRODUCT_VIRTIO_BLOCK) 131 if (va->sc_childdevid == PCI_PRODUCT_VIRTIO_BLOCK)
132 return 1; 132 return 1;
133 133
134 return 0; 134 return 0;
135} 135}
136 136
137static int ld_virtio_vq_done(struct virtqueue *); 137static int ld_virtio_vq_done(struct virtqueue *);
138static int ld_virtio_dump(struct ld_softc *, void *, int, int); 138static int ld_virtio_dump(struct ld_softc *, void *, int, int);
139static int ld_virtio_start(struct ld_softc *, struct buf *); 139static int ld_virtio_start(struct ld_softc *, struct buf *);
140 140
141static int 141static int
142ld_virtio_alloc_reqs(struct ld_virtio_softc *sc, int qsize) 142ld_virtio_alloc_reqs(struct ld_virtio_softc *sc, int qsize)
143{ 143{
144 int allocsize, r, rsegs, i; 144 int allocsize, r, rsegs, i;
145 struct ld_softc *ld = &sc->sc_ld; 145 struct ld_softc *ld = &sc->sc_ld;
146 void *vaddr; 146 void *vaddr;
147 147
148 allocsize = sizeof(struct virtio_blk_req) * qsize; 148 allocsize = sizeof(struct virtio_blk_req) * qsize;
149 r = bus_dmamem_alloc(sc->sc_virtio->sc_dmat, allocsize, 0, 0, 149 r = bus_dmamem_alloc(sc->sc_virtio->sc_dmat, allocsize, 0, 0,
150 &sc->sc_reqs_segs[0], 1, &rsegs, BUS_DMA_NOWAIT); 150 &sc->sc_reqs_segs[0], 1, &rsegs, BUS_DMA_NOWAIT);
151 if (r != 0) { 151 if (r != 0) {
152 aprint_error_dev(sc->sc_dev, 152 aprint_error_dev(sc->sc_dev,
153 "DMA memory allocation failed, size %d, " 153 "DMA memory allocation failed, size %d, "
154 "error code %d\n", allocsize, r); 154 "error code %d\n", allocsize, r);
155 goto err_none; 155 goto err_none;
156 } 156 }
157 r = bus_dmamem_map(sc->sc_virtio->sc_dmat, 157 r = bus_dmamem_map(sc->sc_virtio->sc_dmat,
158 &sc->sc_reqs_segs[0], 1, allocsize, 158 &sc->sc_reqs_segs[0], 1, allocsize,
159 &vaddr, BUS_DMA_NOWAIT); 159 &vaddr, BUS_DMA_NOWAIT);
160 if (r != 0) { 160 if (r != 0) {
161 aprint_error_dev(sc->sc_dev, 161 aprint_error_dev(sc->sc_dev,
162 "DMA memory map failed, " 162 "DMA memory map failed, "
163 "error code %d\n", r); 163 "error code %d\n", r);
164 goto err_dmamem_alloc; 164 goto err_dmamem_alloc;
165 } 165 }
166 sc->sc_reqs = vaddr; 166 sc->sc_reqs = vaddr;
167 memset(vaddr, 0, allocsize); 167 memset(vaddr, 0, allocsize);
168 for (i = 0; i < qsize; i++) { 168 for (i = 0; i < qsize; i++) {
169 struct virtio_blk_req *vr = &sc->sc_reqs[i]; 169 struct virtio_blk_req *vr = &sc->sc_reqs[i];
170 r = bus_dmamap_create(sc->sc_virtio->sc_dmat, 170 r = bus_dmamap_create(sc->sc_virtio->sc_dmat,
171 offsetof(struct virtio_blk_req, vr_bp), 171 offsetof(struct virtio_blk_req, vr_bp),
172 1, 172 1,
173 offsetof(struct virtio_blk_req, vr_bp), 173 offsetof(struct virtio_blk_req, vr_bp),
174 0, 174 0,
175 BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW, 175 BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW,
176 &vr->vr_cmdsts); 176 &vr->vr_cmdsts);
177 if (r != 0) { 177 if (r != 0) {
178 aprint_error_dev(sc->sc_dev, 178 aprint_error_dev(sc->sc_dev,
179 "command dmamap creation failed, " 179 "command dmamap creation failed, "
180 "error code %d\n", r); 180 "error code %d\n", r);
181 goto err_reqs; 181 goto err_reqs;
182 } 182 }
183 r = bus_dmamap_load(sc->sc_virtio->sc_dmat, vr->vr_cmdsts, 183 r = bus_dmamap_load(sc->sc_virtio->sc_dmat, vr->vr_cmdsts,
184 &vr->vr_hdr, 184 &vr->vr_hdr,
185 offsetof(struct virtio_blk_req, vr_bp), 185 offsetof(struct virtio_blk_req, vr_bp),
186 NULL, BUS_DMA_NOWAIT); 186 NULL, BUS_DMA_NOWAIT);
187 if (r != 0) { 187 if (r != 0) {
188 aprint_error_dev(sc->sc_dev, 188 aprint_error_dev(sc->sc_dev,
189 "command dmamap load failed, " 189 "command dmamap load failed, "
190 "error code %d\n", r); 190 "error code %d\n", r);
191 goto err_reqs; 191 goto err_reqs;
192 } 192 }
193 r = bus_dmamap_create(sc->sc_virtio->sc_dmat, 193 r = bus_dmamap_create(sc->sc_virtio->sc_dmat,
194 ld->sc_maxxfer, 194 ld->sc_maxxfer,
195 (ld->sc_maxxfer / NBPG) + 2, 195 (ld->sc_maxxfer / NBPG) + 2,
196 ld->sc_maxxfer, 196 ld->sc_maxxfer,
197 0, 197 0,
198 BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW, 198 BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW,
199 &vr->vr_payload); 199 &vr->vr_payload);
200 if (r != 0) { 200 if (r != 0) {
201 aprint_error_dev(sc->sc_dev, 201 aprint_error_dev(sc->sc_dev,
202 "payload dmamap creation failed, " 202 "payload dmamap creation failed, "
203 "error code %d\n", r); 203 "error code %d\n", r);
204 goto err_reqs; 204 goto err_reqs;
205 } 205 }
206 } 206 }
207 return 0; 207 return 0;
208 208
209err_reqs: 209err_reqs:
210 for (i = 0; i < qsize; i++) { 210 for (i = 0; i < qsize; i++) {
211 struct virtio_blk_req *vr = &sc->sc_reqs[i]; 211 struct virtio_blk_req *vr = &sc->sc_reqs[i];
212 if (vr->vr_cmdsts) { 212 if (vr->vr_cmdsts) {
213 bus_dmamap_destroy(sc->sc_virtio->sc_dmat, 213 bus_dmamap_destroy(sc->sc_virtio->sc_dmat,
214 vr->vr_cmdsts); 214 vr->vr_cmdsts);
215 vr->vr_cmdsts = 0; 215 vr->vr_cmdsts = 0;
216 } 216 }
217 if (vr->vr_payload) { 217 if (vr->vr_payload) {
218 bus_dmamap_destroy(sc->sc_virtio->sc_dmat, 218 bus_dmamap_destroy(sc->sc_virtio->sc_dmat,
219 vr->vr_payload); 219 vr->vr_payload);
220 vr->vr_payload = 0; 220 vr->vr_payload = 0;
221 } 221 }
222 } 222 }
223 bus_dmamem_unmap(sc->sc_virtio->sc_dmat, sc->sc_reqs, allocsize); 223 bus_dmamem_unmap(sc->sc_virtio->sc_dmat, sc->sc_reqs, allocsize);
224err_dmamem_alloc: 224err_dmamem_alloc:
225 bus_dmamem_free(sc->sc_virtio->sc_dmat, &sc->sc_reqs_segs[0], 1); 225 bus_dmamem_free(sc->sc_virtio->sc_dmat, &sc->sc_reqs_segs[0], 1);
226err_none: 226err_none:
227 return -1; 227 return -1;
228} 228}
229 229
230static void 230static void
231ld_virtio_attach(device_t parent, device_t self, void *aux) 231ld_virtio_attach(device_t parent, device_t self, void *aux)
232{ 232{
233 struct ld_virtio_softc *sc = device_private(self); 233 struct ld_virtio_softc *sc = device_private(self);
234 struct ld_softc *ld = &sc->sc_ld; 234 struct ld_softc *ld = &sc->sc_ld;
235 struct virtio_softc *vsc = device_private(parent); 235 struct virtio_softc *vsc = device_private(parent);
236 uint32_t features; 236 uint32_t features;
237 int qsize, maxxfersize; 237 int qsize, maxxfersize;
238 238
239 if (vsc->sc_child != NULL) { 239 if (vsc->sc_child != NULL) {
240 aprint_normal(": child already attached for %s; " 240 aprint_normal(": child already attached for %s; "
241 "something wrong...\n", 241 "something wrong...\n",
242 device_xname(parent)); 242 device_xname(parent));
243 return; 243 return;
244 } 244 }
245 aprint_normal("\n"); 245 aprint_normal("\n");
246 aprint_naive("\n"); 246 aprint_naive("\n");
247 247
248 sc->sc_dev = self; 248 sc->sc_dev = self;
249 sc->sc_virtio = vsc; 249 sc->sc_virtio = vsc;
250 250
251 vsc->sc_child = self; 251 vsc->sc_child = self;
252 vsc->sc_ipl = IPL_BIO; 252 vsc->sc_ipl = IPL_BIO;
253 vsc->sc_vqs = &sc->sc_vq[0]; 253 vsc->sc_vqs = &sc->sc_vq[0];
254 vsc->sc_nvqs = 1; 254 vsc->sc_nvqs = 1;
255 vsc->sc_config_change = 0; 255 vsc->sc_config_change = 0;
256 vsc->sc_intrhand = virtio_vq_intr; 256 vsc->sc_intrhand = virtio_vq_intr;
257 257
258 features = virtio_negotiate_features(vsc, 258 features = virtio_negotiate_features(vsc,
259 (VIRTIO_BLK_F_SIZE_MAX | 259 (VIRTIO_BLK_F_SIZE_MAX |
260 VIRTIO_BLK_F_SEG_MAX | 260 VIRTIO_BLK_F_SEG_MAX |
261 VIRTIO_BLK_F_GEOMETRY | 261 VIRTIO_BLK_F_GEOMETRY |
262 VIRTIO_BLK_F_RO | 262 VIRTIO_BLK_F_RO |
263 VIRTIO_BLK_F_BLK_SIZE)); 263 VIRTIO_BLK_F_BLK_SIZE));
264 if (features & VIRTIO_BLK_F_RO) 264 if (features & VIRTIO_BLK_F_RO)
265 sc->sc_readonly = 1; 265 sc->sc_readonly = 1;
266 else 266 else
267 sc->sc_readonly = 0; 267 sc->sc_readonly = 0;
268 268
269 ld->sc_secsize = 512; 269 ld->sc_secsize = 512;
270 if (features & VIRTIO_BLK_F_BLK_SIZE) { 270 if (features & VIRTIO_BLK_F_BLK_SIZE) {
271 ld->sc_secsize = virtio_read_device_config_4(vsc, 271 ld->sc_secsize = virtio_read_device_config_4(vsc,
272 VIRTIO_BLK_CONFIG_BLK_SIZE); 272 VIRTIO_BLK_CONFIG_BLK_SIZE);
273 } 273 }
274 maxxfersize = MAXPHYS; 274 maxxfersize = MAXPHYS;
 275#if 0 /* At least genfs_io assumes maxxfer == MAXPHYS. */
275 if (features & VIRTIO_BLK_F_SEG_MAX) { 276 if (features & VIRTIO_BLK_F_SEG_MAX) {
276 maxxfersize = virtio_read_device_config_4(vsc, 277 maxxfersize = virtio_read_device_config_4(vsc,
277 VIRTIO_BLK_CONFIG_SEG_MAX) 278 VIRTIO_BLK_CONFIG_SEG_MAX)
278 * ld->sc_secsize; 279 * ld->sc_secsize;
279 if (maxxfersize > MAXPHYS) 280 if (maxxfersize > MAXPHYS)
280 maxxfersize = MAXPHYS; 281 maxxfersize = MAXPHYS;
281 } 282 }
 283#endif
282 284
283 if (virtio_alloc_vq(vsc, &sc->sc_vq[0], 0, 285 if (virtio_alloc_vq(vsc, &sc->sc_vq[0], 0,
284 maxxfersize, maxxfersize / NBPG + 2, 286 maxxfersize, maxxfersize / NBPG + 2,
285 "I/O request") != 0) { 287 "I/O request") != 0) {
286 goto err; 288 goto err;
287 } 289 }
288 qsize = sc->sc_vq[0].vq_num; 290 qsize = sc->sc_vq[0].vq_num;
289 sc->sc_vq[0].vq_done = ld_virtio_vq_done; 291 sc->sc_vq[0].vq_done = ld_virtio_vq_done;
290 292
291 ld->sc_dv = self; 293 ld->sc_dv = self;
292 ld->sc_secperunit = virtio_read_device_config_8(vsc, 294 ld->sc_secperunit = virtio_read_device_config_8(vsc,
293 VIRTIO_BLK_CONFIG_CAPACITY); 295 VIRTIO_BLK_CONFIG_CAPACITY);
294 ld->sc_maxxfer = maxxfersize; 296 ld->sc_maxxfer = maxxfersize;
295 if (features & VIRTIO_BLK_F_GEOMETRY) { 297 if (features & VIRTIO_BLK_F_GEOMETRY) {
296 ld->sc_ncylinders = virtio_read_device_config_2(vsc, 298 ld->sc_ncylinders = virtio_read_device_config_2(vsc,
297 VIRTIO_BLK_CONFIG_GEOMETRY_C); 299 VIRTIO_BLK_CONFIG_GEOMETRY_C);
298 ld->sc_nheads = virtio_read_device_config_1(vsc, 300 ld->sc_nheads = virtio_read_device_config_1(vsc,
299 VIRTIO_BLK_CONFIG_GEOMETRY_H); 301 VIRTIO_BLK_CONFIG_GEOMETRY_H);
300 ld->sc_nsectors = virtio_read_device_config_1(vsc, 302 ld->sc_nsectors = virtio_read_device_config_1(vsc,
301 VIRTIO_BLK_CONFIG_GEOMETRY_S); 303 VIRTIO_BLK_CONFIG_GEOMETRY_S);
302 } 304 }
303 ld->sc_maxqueuecnt = qsize; 305 ld->sc_maxqueuecnt = qsize;
304 306
305 if (ld_virtio_alloc_reqs(sc, qsize) < 0) 307 if (ld_virtio_alloc_reqs(sc, qsize) < 0)
306 goto err; 308 goto err;
307 309
308 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_BIO); 310 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_BIO);
309 311
310 ld->sc_dump = ld_virtio_dump; 312 ld->sc_dump = ld_virtio_dump;
311 ld->sc_flush = NULL; 313 ld->sc_flush = NULL;
312 ld->sc_start = ld_virtio_start; 314 ld->sc_start = ld_virtio_start;
313 315
314 ld->sc_flags = LDF_ENABLED; 316 ld->sc_flags = LDF_ENABLED;
315 ldattach(ld); 317 ldattach(ld);
316 318
317 return; 319 return;
318 320
319err: 321err:
320 vsc->sc_child = (void*)1; 322 vsc->sc_child = (void*)1;
321 return; 323 return;
322} 324}
323 325
324static int 326static int
325ld_virtio_start(struct ld_softc *ld, struct buf *bp) 327ld_virtio_start(struct ld_softc *ld, struct buf *bp)
326{ 328{
327 /* splbio */ 329 /* splbio */
328 struct ld_virtio_softc *sc = device_private(ld->sc_dv); 330 struct ld_virtio_softc *sc = device_private(ld->sc_dv);
329 struct virtio_softc *vsc = sc->sc_virtio; 331 struct virtio_softc *vsc = sc->sc_virtio;
330 struct virtqueue *vq = &sc->sc_vq[0]; 332 struct virtqueue *vq = &sc->sc_vq[0];
331 struct virtio_blk_req *vr; 333 struct virtio_blk_req *vr;
332 int r; 334 int r;
333 int isread = (bp->b_flags & B_READ); 335 int isread = (bp->b_flags & B_READ);
334 int slot; 336 int slot;
335 337
336 if (sc->sc_readonly && !isread) 338 if (sc->sc_readonly && !isread)
337 return EIO; 339 return EIO;
338 340
339 r = virtio_enqueue_prep(vsc, vq, &slot); 341 r = virtio_enqueue_prep(vsc, vq, &slot);
340 if (r != 0) 342 if (r != 0)
341 return r; 343 return r;
342 vr = &sc->sc_reqs[slot]; 344 vr = &sc->sc_reqs[slot];
343 r = bus_dmamap_load(vsc->sc_dmat, vr->vr_payload, 345 r = bus_dmamap_load(vsc->sc_dmat, vr->vr_payload,
344 bp->b_data, bp->b_bcount, NULL, 346 bp->b_data, bp->b_bcount, NULL,
345 ((isread?BUS_DMA_READ:BUS_DMA_WRITE) 347 ((isread?BUS_DMA_READ:BUS_DMA_WRITE)
346 |BUS_DMA_NOWAIT)); 348 |BUS_DMA_NOWAIT));
347 if (r != 0) 349 if (r != 0)
348 return r; 350 return r;
349 351
350 r = virtio_enqueue_reserve(vsc, vq, slot, vr->vr_payload->dm_nsegs + 2); 352 r = virtio_enqueue_reserve(vsc, vq, slot, vr->vr_payload->dm_nsegs + 2);
351 if (r != 0) { 353 if (r != 0) {
352 bus_dmamap_unload(vsc->sc_dmat, vr->vr_payload); 354 bus_dmamap_unload(vsc->sc_dmat, vr->vr_payload);
353 return r; 355 return r;
354 } 356 }
355 357
356 vr->vr_bp = bp; 358 vr->vr_bp = bp;
357 vr->vr_hdr.type = isread?VIRTIO_BLK_T_IN:VIRTIO_BLK_T_OUT; 359 vr->vr_hdr.type = isread?VIRTIO_BLK_T_IN:VIRTIO_BLK_T_OUT;
358 vr->vr_hdr.ioprio = 0; 360 vr->vr_hdr.ioprio = 0;
359 vr->vr_hdr.sector = bp->b_rawblkno * sc->sc_ld.sc_secsize / 512; 361 vr->vr_hdr.sector = bp->b_rawblkno * sc->sc_ld.sc_secsize / 512;
360 362
361 bus_dmamap_sync(vsc->sc_dmat, vr->vr_cmdsts, 363 bus_dmamap_sync(vsc->sc_dmat, vr->vr_cmdsts,
362 0, sizeof(struct virtio_blk_req_hdr), 364 0, sizeof(struct virtio_blk_req_hdr),
363 BUS_DMASYNC_PREWRITE); 365 BUS_DMASYNC_PREWRITE);
364 bus_dmamap_sync(vsc->sc_dmat, vr->vr_payload, 366 bus_dmamap_sync(vsc->sc_dmat, vr->vr_payload,
365 0, bp->b_bcount, 367 0, bp->b_bcount,
366 isread?BUS_DMASYNC_PREREAD:BUS_DMASYNC_PREWRITE); 368 isread?BUS_DMASYNC_PREREAD:BUS_DMASYNC_PREWRITE);
367 bus_dmamap_sync(vsc->sc_dmat, vr->vr_cmdsts, 369 bus_dmamap_sync(vsc->sc_dmat, vr->vr_cmdsts,
368 offsetof(struct virtio_blk_req, vr_status), 370 offsetof(struct virtio_blk_req, vr_status),
369 sizeof(uint8_t), 371 sizeof(uint8_t),
370 BUS_DMASYNC_PREREAD); 372 BUS_DMASYNC_PREREAD);
371 373
372 virtio_enqueue_p(vsc, vq, slot, vr->vr_cmdsts, 374 virtio_enqueue_p(vsc, vq, slot, vr->vr_cmdsts,
373 0, sizeof(struct virtio_blk_req_hdr), 375 0, sizeof(struct virtio_blk_req_hdr),
374 true); 376 true);
375 virtio_enqueue(vsc, vq, slot, vr->vr_payload, !isread); 377 virtio_enqueue(vsc, vq, slot, vr->vr_payload, !isread);
376 virtio_enqueue_p(vsc, vq, slot, vr->vr_cmdsts, 378 virtio_enqueue_p(vsc, vq, slot, vr->vr_cmdsts,
377 offsetof(struct virtio_blk_req, vr_status), 379 offsetof(struct virtio_blk_req, vr_status),
378 sizeof(uint8_t), 380 sizeof(uint8_t),
379 false); 381 false);
380 virtio_enqueue_commit(vsc, vq, slot, true); 382 virtio_enqueue_commit(vsc, vq, slot, true);
381 383
382 return 0; 384 return 0;
383} 385}
384 386
385static void 387static void
386ld_virtio_vq_done1(struct ld_virtio_softc *sc, struct virtio_softc *vsc, 388ld_virtio_vq_done1(struct ld_virtio_softc *sc, struct virtio_softc *vsc,
387 struct virtqueue *vq, int slot) 389 struct virtqueue *vq, int slot)
388{ 390{
389 struct virtio_blk_req *vr = &sc->sc_reqs[slot]; 391 struct virtio_blk_req *vr = &sc->sc_reqs[slot];
390 struct buf *bp = vr->vr_bp; 392 struct buf *bp = vr->vr_bp;
391 393
392 bus_dmamap_sync(vsc->sc_dmat, vr->vr_cmdsts, 394 bus_dmamap_sync(vsc->sc_dmat, vr->vr_cmdsts,
393 0, sizeof(struct virtio_blk_req_hdr), 395 0, sizeof(struct virtio_blk_req_hdr),
394 BUS_DMASYNC_POSTWRITE); 396 BUS_DMASYNC_POSTWRITE);
395 bus_dmamap_sync(vsc->sc_dmat, vr->vr_payload, 397 bus_dmamap_sync(vsc->sc_dmat, vr->vr_payload,
396 0, bp->b_bcount, 398 0, bp->b_bcount,
397 (bp->b_flags & B_READ)?BUS_DMASYNC_POSTREAD 399 (bp->b_flags & B_READ)?BUS_DMASYNC_POSTREAD
398 :BUS_DMASYNC_POSTWRITE); 400 :BUS_DMASYNC_POSTWRITE);
399 bus_dmamap_sync(vsc->sc_dmat, vr->vr_cmdsts, 401 bus_dmamap_sync(vsc->sc_dmat, vr->vr_cmdsts,
400 sizeof(struct virtio_blk_req_hdr), sizeof(uint8_t), 402 sizeof(struct virtio_blk_req_hdr), sizeof(uint8_t),
401 BUS_DMASYNC_POSTREAD); 403 BUS_DMASYNC_POSTREAD);
402 404
403 if (vr->vr_status != VIRTIO_BLK_S_OK) { 405 if (vr->vr_status != VIRTIO_BLK_S_OK) {
404 bp->b_error = EIO; 406 bp->b_error = EIO;
405 bp->b_resid = bp->b_bcount; 407 bp->b_resid = bp->b_bcount;
406 } else { 408 } else {
407 bp->b_error = 0; 409 bp->b_error = 0;
408 bp->b_resid = 0; 410 bp->b_resid = 0;
409 } 411 }
410 412
411 virtio_dequeue_commit(vsc, vq, slot); 413 virtio_dequeue_commit(vsc, vq, slot);
412 414
413 lddone(&sc->sc_ld, bp); 415 lddone(&sc->sc_ld, bp);
414} 416}
415 417
416static int 418static int
417ld_virtio_vq_done(struct virtqueue *vq) 419ld_virtio_vq_done(struct virtqueue *vq)
418{ 420{
419 struct virtio_softc *vsc = vq->vq_owner; 421 struct virtio_softc *vsc = vq->vq_owner;
420 struct ld_virtio_softc *sc = device_private(vsc->sc_child); 422 struct ld_virtio_softc *sc = device_private(vsc->sc_child);
421 int r = 0; 423 int r = 0;
422 int slot; 424 int slot;
423 425
424again: 426again:
425 if (virtio_dequeue(vsc, vq, &slot, NULL)) 427 if (virtio_dequeue(vsc, vq, &slot, NULL))
426 return r; 428 return r;
427 r = 1; 429 r = 1;
428 430
429 ld_virtio_vq_done1(sc, vsc, vq, slot); 431 ld_virtio_vq_done1(sc, vsc, vq, slot);
430 goto again; 432 goto again;
431} 433}
432 434
433static int 435static int
434ld_virtio_dump(struct ld_softc *ld, void *data, int blkno, int blkcnt) 436ld_virtio_dump(struct ld_softc *ld, void *data, int blkno, int blkcnt)
435{ 437{
436 struct ld_virtio_softc *sc = device_private(ld->sc_dv); 438 struct ld_virtio_softc *sc = device_private(ld->sc_dv);
437 struct virtio_softc *vsc = sc->sc_virtio; 439 struct virtio_softc *vsc = sc->sc_virtio;
438 struct virtqueue *vq = &sc->sc_vq[0]; 440 struct virtqueue *vq = &sc->sc_vq[0];
439 struct virtio_blk_req *vr; 441 struct virtio_blk_req *vr;
440 int slot, r; 442 int slot, r;
441 443
442 if (sc->sc_readonly) 444 if (sc->sc_readonly)
443 return EIO; 445 return EIO;
444 446
445 r = virtio_enqueue_prep(vsc, vq, &slot); 447 r = virtio_enqueue_prep(vsc, vq, &slot);
446 if (r != 0) { 448 if (r != 0) {
447 if (r == EAGAIN) { /* no free slot; dequeue first */ 449 if (r == EAGAIN) { /* no free slot; dequeue first */
448 delay(100); 450 delay(100);
449 ld_virtio_vq_done(vq); 451 ld_virtio_vq_done(vq);
450 r = virtio_enqueue_prep(vsc, vq, &slot); 452 r = virtio_enqueue_prep(vsc, vq, &slot);
451 if (r != 0) 453 if (r != 0)
452 return r; 454 return r;
453 } 455 }
454 return r; 456 return r;
455 } 457 }
456 vr = &sc->sc_reqs[slot]; 458 vr = &sc->sc_reqs[slot];
457 r = bus_dmamap_load(vsc->sc_dmat, vr->vr_payload, 459 r = bus_dmamap_load(vsc->sc_dmat, vr->vr_payload,
458 data, blkcnt*ld->sc_secsize, NULL, 460 data, blkcnt*ld->sc_secsize, NULL,
459 BUS_DMA_WRITE|BUS_DMA_NOWAIT); 461 BUS_DMA_WRITE|BUS_DMA_NOWAIT);
460 if (r != 0) 462 if (r != 0)
461 return r; 463 return r;
462 464
463 r = virtio_enqueue_reserve(vsc, vq, slot, vr->vr_payload->dm_nsegs + 2); 465 r = virtio_enqueue_reserve(vsc, vq, slot, vr->vr_payload->dm_nsegs + 2);
464 if (r != 0) { 466 if (r != 0) {
465 bus_dmamap_unload(vsc->sc_dmat, vr->vr_payload); 467 bus_dmamap_unload(vsc->sc_dmat, vr->vr_payload);
466 return r; 468 return r;
467 } 469 }
468 470
469 vr->vr_bp = (void*)0xdeadbeef; 471 vr->vr_bp = (void*)0xdeadbeef;
470 vr->vr_hdr.type = VIRTIO_BLK_T_OUT; 472 vr->vr_hdr.type = VIRTIO_BLK_T_OUT;
471 vr->vr_hdr.ioprio = 0; 473 vr->vr_hdr.ioprio = 0;
472 vr->vr_hdr.sector = (daddr_t) blkno * ld->sc_secsize / 512; 474 vr->vr_hdr.sector = (daddr_t) blkno * ld->sc_secsize / 512;
473 475
474 bus_dmamap_sync(vsc->sc_dmat, vr->vr_cmdsts, 476 bus_dmamap_sync(vsc->sc_dmat, vr->vr_cmdsts,
475 0, sizeof(struct virtio_blk_req_hdr), 477 0, sizeof(struct virtio_blk_req_hdr),
476 BUS_DMASYNC_PREWRITE); 478 BUS_DMASYNC_PREWRITE);
477 bus_dmamap_sync(vsc->sc_dmat, vr->vr_payload, 479 bus_dmamap_sync(vsc->sc_dmat, vr->vr_payload,
478 0, blkcnt*ld->sc_secsize, 480 0, blkcnt*ld->sc_secsize,
479 BUS_DMASYNC_PREWRITE); 481 BUS_DMASYNC_PREWRITE);
480 bus_dmamap_sync(vsc->sc_dmat, vr->vr_cmdsts, 482 bus_dmamap_sync(vsc->sc_dmat, vr->vr_cmdsts,
481 offsetof(struct virtio_blk_req, vr_status), 483 offsetof(struct virtio_blk_req, vr_status),
482 sizeof(uint8_t), 484 sizeof(uint8_t),
483 BUS_DMASYNC_PREREAD); 485 BUS_DMASYNC_PREREAD);
484 486
485 virtio_enqueue_p(vsc, vq, slot, vr->vr_cmdsts, 487 virtio_enqueue_p(vsc, vq, slot, vr->vr_cmdsts,
486 0, sizeof(struct virtio_blk_req_hdr), 488 0, sizeof(struct virtio_blk_req_hdr),
487 true); 489 true);
488 virtio_enqueue(vsc, vq, slot, vr->vr_payload, true); 490 virtio_enqueue(vsc, vq, slot, vr->vr_payload, true);
489 virtio_enqueue_p(vsc, vq, slot, vr->vr_cmdsts, 491 virtio_enqueue_p(vsc, vq, slot, vr->vr_cmdsts,
490 offsetof(struct virtio_blk_req, vr_status), 492 offsetof(struct virtio_blk_req, vr_status),
491 sizeof(uint8_t), 493 sizeof(uint8_t),
492 false); 494 false);
493 virtio_enqueue_commit(vsc, vq, slot, true); 495 virtio_enqueue_commit(vsc, vq, slot, true);
494 496
495 for ( ; ; ) { 497 for ( ; ; ) {
496 int dslot; 498 int dslot;
497 499
498 r = virtio_dequeue(vsc, vq, &dslot, NULL); 500 r = virtio_dequeue(vsc, vq, &dslot, NULL);
499 if (r != 0) 501 if (r != 0)
500 continue; 502 continue;
501 if (dslot != slot) { 503 if (dslot != slot) {
502 ld_virtio_vq_done1(sc, vsc, vq, dslot); 504 ld_virtio_vq_done1(sc, vsc, vq, dslot);
503 continue; 505 continue;
504 } else 506 } else
505 break; 507 break;
506 } 508 }
507  509
508 bus_dmamap_sync(vsc->sc_dmat, vr->vr_cmdsts, 510 bus_dmamap_sync(vsc->sc_dmat, vr->vr_cmdsts,
509 0, sizeof(struct virtio_blk_req_hdr), 511 0, sizeof(struct virtio_blk_req_hdr),
510 BUS_DMASYNC_POSTWRITE); 512 BUS_DMASYNC_POSTWRITE);
511 bus_dmamap_sync(vsc->sc_dmat, vr->vr_payload, 513 bus_dmamap_sync(vsc->sc_dmat, vr->vr_payload,
512 0, blkcnt*ld->sc_secsize, 514 0, blkcnt*ld->sc_secsize,
513 BUS_DMASYNC_POSTWRITE); 515 BUS_DMASYNC_POSTWRITE);
514 bus_dmamap_sync(vsc->sc_dmat, vr->vr_cmdsts, 516 bus_dmamap_sync(vsc->sc_dmat, vr->vr_cmdsts,
515 offsetof(struct virtio_blk_req, vr_status), 517 offsetof(struct virtio_blk_req, vr_status),
516 sizeof(uint8_t), 518 sizeof(uint8_t),
517 BUS_DMASYNC_POSTREAD); 519 BUS_DMASYNC_POSTREAD);
518 if (vr->vr_status == VIRTIO_BLK_S_OK) 520 if (vr->vr_status == VIRTIO_BLK_S_OK)
519 r = 0; 521 r = 0;
520 else 522 else
521 r = EIO; 523 r = EIO;
522 virtio_dequeue_commit(vsc, vq, slot); 524 virtio_dequeue_commit(vsc, vq, slot);
523 525
524 return r; 526 return r;
525} 527}
526 528
527static int 529static int
528ld_virtio_detach(device_t self, int flags) 530ld_virtio_detach(device_t self, int flags)
529{ 531{
530 struct ld_virtio_softc *sc = device_private(self); 532 struct ld_virtio_softc *sc = device_private(self);
531 struct ld_softc *ld = &sc->sc_ld; 533 struct ld_softc *ld = &sc->sc_ld;
532 bus_dma_tag_t dmat = sc->sc_virtio->sc_dmat; 534 bus_dma_tag_t dmat = sc->sc_virtio->sc_dmat;
533 int r, i, qsize; 535 int r, i, qsize;
534 536
535 qsize = sc->sc_vq[0].vq_num; 537 qsize = sc->sc_vq[0].vq_num;
536 r = ldbegindetach(ld, flags); 538 r = ldbegindetach(ld, flags);
537 if (r != 0) 539 if (r != 0)
538 return r; 540 return r;
539 virtio_reset(sc->sc_virtio); 541 virtio_reset(sc->sc_virtio);
540 virtio_free_vq(sc->sc_virtio, &sc->sc_vq[0]); 542 virtio_free_vq(sc->sc_virtio, &sc->sc_vq[0]);
541 543
542 for (i = 0; i < qsize; i++) { 544 for (i = 0; i < qsize; i++) {
543 bus_dmamap_destroy(dmat, 545 bus_dmamap_destroy(dmat,
544 sc->sc_reqs[i].vr_cmdsts); 546 sc->sc_reqs[i].vr_cmdsts);
545 bus_dmamap_destroy(dmat, 547 bus_dmamap_destroy(dmat,
546 sc->sc_reqs[i].vr_payload); 548 sc->sc_reqs[i].vr_payload);
547 } 549 }
548 bus_dmamem_unmap(dmat, sc->sc_reqs, 550 bus_dmamem_unmap(dmat, sc->sc_reqs,
549 sizeof(struct virtio_blk_req) * qsize); 551 sizeof(struct virtio_blk_req) * qsize);
550 bus_dmamem_free(dmat, &sc->sc_reqs_segs[0], 1); 552 bus_dmamem_free(dmat, &sc->sc_reqs_segs[0], 1);
551 553
552 ldenddetach(ld); 554 ldenddetach(ld);
553 555
554 return 0; 556 return 0;
555} 557}