Tue Dec 6 17:44:46 2011 UTC ()
Use MIPS_COP_0_OSSCRATCH instead $22


(matt)
diff -r1.1.2.10 -r1.1.2.11 src/sys/arch/mips/rmi/rmixl_subr.S
cvs diff -r1.1.2.10 -r1.1.2.11 src/sys/arch/mips/rmi/rmixl_subr.S (expand / switch to unified diff)

--- src/sys/arch/mips/rmi/rmixl_subr.S 2011/12/03 01:56:56 1.1.2.10
+++ src/sys/arch/mips/rmi/rmixl_subr.S 2011/12/06 17:44:46 1.1.2.11
@@ -159,26 +159,26 @@ NESTED(rmixl_cpu_trampoline, CALLFRAME_S @@ -159,26 +159,26 @@ NESTED(rmixl_cpu_trampoline, CALLFRAME_S
159 REG_L sp, 0*SZREG(s0) /* XXX ta_sp */ 159 REG_L sp, 0*SZREG(s0) /* XXX ta_sp */
160 160
161 /* 161 /*
162 * load our (idle) lwp from trampoline args 162 * load our (idle) lwp from trampoline args
163 * save in t8 reg dedicated as 'mips_curlwp' 163 * save in t8 reg dedicated as 'mips_curlwp'
164 */ 164 */
165 REG_L t8, 1*SZREG(s0) /* XXX ta_lwp */ 165 REG_L t8, 1*SZREG(s0) /* XXX ta_lwp */
166 166
167 /* 167 /*
168 * load our ta_cpuinfo from trampoline args and pass in a1 168 * load our ta_cpuinfo from trampoline args and pass in a1
169 * jump to common mips cpu_trampoline 169 * jump to common mips cpu_trampoline
170 */ 170 */
171 REG_L a1, 2*SZREG(s0) /* XXX ta_cpuinfo */ 171 REG_L a1, 2*SZREG(s0) /* XXX ta_cpuinfo */
172 dmtc0 a1, $22, 0 /* MIPS_COP_0_OSSCRATCH */ 172 dmtc0 a1, MIPS_COP_0_OSSCRATCH, 0
173 PTR_L v1, CPU_INFO_TLB_INFO(a1) 173 PTR_L v1, CPU_INFO_TLB_INFO(a1)
174 PTR_L v1, TI_HWLOCK(v1) 174 PTR_L v1, TI_HWLOCK(v1)
175 PTR_ADDU v1, MTX_LOCK 175 PTR_ADDU v1, MTX_LOCK
176 dmtc0 v1, $22, 2 176 dmtc0 v1, MIPS_COP_0_OSSCRATCH, 2
177 j cpu_trampoline 177 j cpu_trampoline
178 nop 178 nop
179 179
180 /* NOTREACHED */ 180 /* NOTREACHED */
181 181
182END(rmixl_cpu_trampoline) 182END(rmixl_cpu_trampoline)
183 183
184#endif /* MULTIPROCESSOR */ 184#endif /* MULTIPROCESSOR */