Thu Dec 8 08:56:57 2011 UTC ()
sync with main branch


(mrg)
diff -r1.240.6.1 -r1.240.6.1.2.1 src/sys/dev/usb/uhci.c
diff -r1.48 -r1.48.14.1 src/sys/dev/usb/uhcivar.h

cvs diff -r1.240.6.1 -r1.240.6.1.2.1 src/sys/dev/usb/uhci.c (switch to unified diff)

--- src/sys/dev/usb/uhci.c 2011/12/04 13:23:17 1.240.6.1
+++ src/sys/dev/usb/uhci.c 2011/12/08 08:56:57 1.240.6.1.2.1
@@ -1,3850 +1,3924 @@ @@ -1,3850 +1,3924 @@
1/* $NetBSD: uhci.c,v 1.240.6.1 2011/12/04 13:23:17 jmcneill Exp $ */ 1/* $NetBSD: uhci.c,v 1.240.6.1.2.1 2011/12/08 08:56:57 mrg Exp $ */
2/* $FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $ */ 2/* $FreeBSD: src/sys/dev/usb/uhci.c,v 1.33 1999/11/17 22:33:41 n_hibma Exp $ */
3 3
4/* 4/*
5 * Copyright (c) 1998, 2004 The NetBSD Foundation, Inc. 5 * Copyright (c) 1998, 2004, 2011 The NetBSD Foundation, Inc.
6 * All rights reserved. 6 * All rights reserved.
7 * 7 *
8 * This code is derived from software contributed to The NetBSD Foundation 8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Lennart Augustsson (lennart@augustsson.net) at 9 * by Lennart Augustsson (lennart@augustsson.net) at
10 * Carlstedt Research & Technology. 10 * Carlstedt Research & Technology, Jared D. McNeill (jmcneill@invisible.ca)
 11 * and Matthew R. Green.
11 * 12 *
12 * Redistribution and use in source and binary forms, with or without 13 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions 14 * modification, are permitted provided that the following conditions
14 * are met: 15 * are met:
15 * 1. Redistributions of source code must retain the above copyright 16 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer. 17 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright 18 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the 19 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution. 20 * documentation and/or other materials provided with the distribution.
20 * 21 *
21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE. 32 * POSSIBILITY OF SUCH DAMAGE.
32 */ 33 */
33 34
34/* 35/*
35 * USB Universal Host Controller driver. 36 * USB Universal Host Controller driver.
36 * Handles e.g. PIIX3 and PIIX4. 37 * Handles e.g. PIIX3 and PIIX4.
37 * 38 *
38 * UHCI spec: http://www.intel.com/technology/usb/spec.htm 39 * UHCI spec: http://www.intel.com/technology/usb/spec.htm
39 * USB spec: http://www.usb.org/developers/docs/ 40 * USB spec: http://www.usb.org/developers/docs/
40 * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf 41 * PIIXn spec: ftp://download.intel.com/design/intarch/datashts/29055002.pdf
41 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf 42 * ftp://download.intel.com/design/intarch/datashts/29056201.pdf
42 */ 43 */
43 44
44#include <sys/cdefs.h> 45#include <sys/cdefs.h>
45__KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.240.6.1 2011/12/04 13:23:17 jmcneill Exp $"); 46__KERNEL_RCSID(0, "$NetBSD: uhci.c,v 1.240.6.1.2.1 2011/12/08 08:56:57 mrg Exp $");
46 47
47#include "opt_usb.h" 48#include "opt_usb.h"
48 49
49#include <sys/param.h> 50#include <sys/param.h>
50#include <sys/systm.h> 51#include <sys/systm.h>
51#include <sys/kernel.h> 52#include <sys/kernel.h>
52#include <sys/malloc.h> 53#include <sys/kmem.h>
53#include <sys/device.h> 54#include <sys/device.h>
54#include <sys/select.h> 55#include <sys/select.h>
55#include <sys/extent.h> 56#include <sys/extent.h>
56#include <sys/proc.h> 57#include <sys/proc.h>
57#include <sys/queue.h> 58#include <sys/queue.h>
58#include <sys/bus.h> 59#include <sys/bus.h>
59 60
60#include <machine/endian.h> 61#include <machine/endian.h>
61 62
62#include <dev/usb/usb.h> 63#include <dev/usb/usb.h>
63#include <dev/usb/usbdi.h> 64#include <dev/usb/usbdi.h>
64#include <dev/usb/usbdivar.h> 65#include <dev/usb/usbdivar.h>
65#include <dev/usb/usb_mem.h> 66#include <dev/usb/usb_mem.h>
66#include <dev/usb/usb_quirks.h> 67#include <dev/usb/usb_quirks.h>
67 68
68#include <dev/usb/uhcireg.h> 69#include <dev/usb/uhcireg.h>
69#include <dev/usb/uhcivar.h> 70#include <dev/usb/uhcivar.h>
70#include <dev/usb/usbroothub_subr.h> 71#include <dev/usb/usbroothub_subr.h>
71 72
72/* Use bandwidth reclamation for control transfers. Some devices choke on it. */ 73/* Use bandwidth reclamation for control transfers. Some devices choke on it. */
73/*#define UHCI_CTL_LOOP */ 74/*#define UHCI_CTL_LOOP */
74 75
75 76
76 77
77#ifdef UHCI_DEBUG 78#ifdef UHCI_DEBUG
78uhci_softc_t *thesc; 79uhci_softc_t *thesc;
79#define DPRINTF(x) if (uhcidebug) printf x 80#define DPRINTF(x) if (uhcidebug) printf x
80#define DPRINTFN(n,x) if (uhcidebug>(n)) printf x 81#define DPRINTFN(n,x) if (uhcidebug>(n)) printf x
81int uhcidebug = 0; 82int uhcidebug = 0;
82int uhcinoloop = 0; 83int uhcinoloop = 0;
83#else 84#else
84#define DPRINTF(x) 85#define DPRINTF(x)
85#define DPRINTFN(n,x) 86#define DPRINTFN(n,x)
86#endif 87#endif
87 88
88/* 89/*
89 * The UHCI controller is little endian, so on big endian machines 90 * The UHCI controller is little endian, so on big endian machines
90 * the data stored in memory needs to be swapped. 91 * the data stored in memory needs to be swapped.
91 */ 92 */
92 93
93struct uhci_pipe { 94struct uhci_pipe {
94 struct usbd_pipe pipe; 95 struct usbd_pipe pipe;
95 int nexttoggle; 96 int nexttoggle;
96 97
97 u_char aborting; 98 u_char aborting;
98 usbd_xfer_handle abortstart, abortend; 99 usbd_xfer_handle abortstart, abortend;
99 100
100 /* Info needed for different pipe kinds. */ 101 /* Info needed for different pipe kinds. */
101 union { 102 union {
102 /* Control pipe */ 103 /* Control pipe */
103 struct { 104 struct {
104 uhci_soft_qh_t *sqh; 105 uhci_soft_qh_t *sqh;
105 usb_dma_t reqdma; 106 usb_dma_t reqdma;
106 uhci_soft_td_t *setup, *stat; 107 uhci_soft_td_t *setup, *stat;
107 u_int length; 108 u_int length;
108 } ctl; 109 } ctl;
109 /* Interrupt pipe */ 110 /* Interrupt pipe */
110 struct { 111 struct {
111 int npoll; 112 int npoll;
112 int isread; 113 int isread;
113 uhci_soft_qh_t **qhs; 114 uhci_soft_qh_t **qhs;
114 } intr; 115 } intr;
115 /* Bulk pipe */ 116 /* Bulk pipe */
116 struct { 117 struct {
117 uhci_soft_qh_t *sqh; 118 uhci_soft_qh_t *sqh;
118 u_int length; 119 u_int length;
119 int isread; 120 int isread;
120 } bulk; 121 } bulk;
121 /* Iso pipe */ 122 /* Iso pipe */
122 struct iso { 123 struct iso {
123 uhci_soft_td_t **stds; 124 uhci_soft_td_t **stds;
124 int next, inuse; 125 int next, inuse;
125 } iso; 126 } iso;
126 } u; 127 } u;
127}; 128};
128 129
129Static void uhci_globalreset(uhci_softc_t *); 130Static void uhci_globalreset(uhci_softc_t *);
130Static usbd_status uhci_portreset(uhci_softc_t*, int); 131Static usbd_status uhci_portreset(uhci_softc_t*, int);
131Static void uhci_reset(uhci_softc_t *); 132Static void uhci_reset(uhci_softc_t *);
132Static usbd_status uhci_run(uhci_softc_t *, int run); 133Static usbd_status uhci_run(uhci_softc_t *, int run);
133Static uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *); 134Static uhci_soft_td_t *uhci_alloc_std(uhci_softc_t *);
134Static void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *); 135Static void uhci_free_std(uhci_softc_t *, uhci_soft_td_t *);
135Static uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *); 136Static uhci_soft_qh_t *uhci_alloc_sqh(uhci_softc_t *);
136Static void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *); 137Static void uhci_free_sqh(uhci_softc_t *, uhci_soft_qh_t *);
137#if 0 138#if 0
138Static void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *, 139Static void uhci_enter_ctl_q(uhci_softc_t *, uhci_soft_qh_t *,
139 uhci_intr_info_t *); 140 uhci_intr_info_t *);
140Static void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *); 141Static void uhci_exit_ctl_q(uhci_softc_t *, uhci_soft_qh_t *);
141#endif 142#endif
142 143
143Static void uhci_free_std_chain(uhci_softc_t *, 144Static void uhci_free_std_chain(uhci_softc_t *,
144 uhci_soft_td_t *, uhci_soft_td_t *); 145 uhci_soft_td_t *, uhci_soft_td_t *);
145Static usbd_status uhci_alloc_std_chain(struct uhci_pipe *, 146Static usbd_status uhci_alloc_std_chain(struct uhci_pipe *,
146 uhci_softc_t *, int, int, u_int16_t, usb_dma_t *, 147 uhci_softc_t *, int, int, u_int16_t, usb_dma_t *,
147 uhci_soft_td_t **, uhci_soft_td_t **); 148 uhci_soft_td_t **, uhci_soft_td_t **);
148Static void uhci_poll_hub(void *); 149Static void uhci_poll_hub(void *);
149Static void uhci_waitintr(uhci_softc_t *, usbd_xfer_handle); 150Static void uhci_waitintr(uhci_softc_t *, usbd_xfer_handle);
150Static void uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *); 151Static void uhci_check_intr(uhci_softc_t *, uhci_intr_info_t *);
151Static void uhci_idone(uhci_intr_info_t *); 152Static void uhci_idone(uhci_intr_info_t *);
152 153
153Static void uhci_abort_xfer(usbd_xfer_handle, usbd_status status); 154Static void uhci_abort_xfer(usbd_xfer_handle, usbd_status status);
154 155
155Static void uhci_timeout(void *); 156Static void uhci_timeout(void *);
156Static void uhci_timeout_task(void *); 157Static void uhci_timeout_task(void *);
157Static void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 158Static void uhci_add_ls_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
158Static void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *); 159Static void uhci_add_hs_ctrl(uhci_softc_t *, uhci_soft_qh_t *);
159Static void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *); 160Static void uhci_add_bulk(uhci_softc_t *, uhci_soft_qh_t *);
160Static void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 161Static void uhci_remove_ls_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
161Static void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *); 162Static void uhci_remove_hs_ctrl(uhci_softc_t *,uhci_soft_qh_t *);
162Static void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *); 163Static void uhci_remove_bulk(uhci_softc_t *,uhci_soft_qh_t *);
163Static void uhci_add_loop(uhci_softc_t *sc); 164Static void uhci_add_loop(uhci_softc_t *sc);
164Static void uhci_rem_loop(uhci_softc_t *sc); 165Static void uhci_rem_loop(uhci_softc_t *sc);
165 166
166Static usbd_status uhci_setup_isoc(usbd_pipe_handle pipe); 167Static usbd_status uhci_setup_isoc(usbd_pipe_handle pipe);
167Static void uhci_device_isoc_enter(usbd_xfer_handle); 168Static void uhci_device_isoc_enter(usbd_xfer_handle);
168 169
169Static usbd_status uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 170Static usbd_status uhci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
170Static void uhci_freem(struct usbd_bus *, usb_dma_t *); 171Static void uhci_freem(struct usbd_bus *, usb_dma_t *);
171 172
172Static usbd_xfer_handle uhci_allocx(struct usbd_bus *); 173Static usbd_xfer_handle uhci_allocx(struct usbd_bus *);
173Static void uhci_freex(struct usbd_bus *, usbd_xfer_handle); 174Static void uhci_freex(struct usbd_bus *, usbd_xfer_handle);
 175Static void uhci_get_locks(struct usbd_bus *, kmutex_t **,
 176 kmutex_t **);
174 177
175Static usbd_status uhci_device_ctrl_transfer(usbd_xfer_handle); 178Static usbd_status uhci_device_ctrl_transfer(usbd_xfer_handle);
176Static usbd_status uhci_device_ctrl_start(usbd_xfer_handle); 179Static usbd_status uhci_device_ctrl_start(usbd_xfer_handle);
177Static void uhci_device_ctrl_abort(usbd_xfer_handle); 180Static void uhci_device_ctrl_abort(usbd_xfer_handle);
178Static void uhci_device_ctrl_close(usbd_pipe_handle); 181Static void uhci_device_ctrl_close(usbd_pipe_handle);
179Static void uhci_device_ctrl_done(usbd_xfer_handle); 182Static void uhci_device_ctrl_done(usbd_xfer_handle);
180 183
181Static usbd_status uhci_device_intr_transfer(usbd_xfer_handle); 184Static usbd_status uhci_device_intr_transfer(usbd_xfer_handle);
182Static usbd_status uhci_device_intr_start(usbd_xfer_handle); 185Static usbd_status uhci_device_intr_start(usbd_xfer_handle);
183Static void uhci_device_intr_abort(usbd_xfer_handle); 186Static void uhci_device_intr_abort(usbd_xfer_handle);
184Static void uhci_device_intr_close(usbd_pipe_handle); 187Static void uhci_device_intr_close(usbd_pipe_handle);
185Static void uhci_device_intr_done(usbd_xfer_handle); 188Static void uhci_device_intr_done(usbd_xfer_handle);
186 189
187Static usbd_status uhci_device_bulk_transfer(usbd_xfer_handle); 190Static usbd_status uhci_device_bulk_transfer(usbd_xfer_handle);
188Static usbd_status uhci_device_bulk_start(usbd_xfer_handle); 191Static usbd_status uhci_device_bulk_start(usbd_xfer_handle);
189Static void uhci_device_bulk_abort(usbd_xfer_handle); 192Static void uhci_device_bulk_abort(usbd_xfer_handle);
190Static void uhci_device_bulk_close(usbd_pipe_handle); 193Static void uhci_device_bulk_close(usbd_pipe_handle);
191Static void uhci_device_bulk_done(usbd_xfer_handle); 194Static void uhci_device_bulk_done(usbd_xfer_handle);
192 195
193Static usbd_status uhci_device_isoc_transfer(usbd_xfer_handle); 196Static usbd_status uhci_device_isoc_transfer(usbd_xfer_handle);
194Static usbd_status uhci_device_isoc_start(usbd_xfer_handle); 197Static usbd_status uhci_device_isoc_start(usbd_xfer_handle);
195Static void uhci_device_isoc_abort(usbd_xfer_handle); 198Static void uhci_device_isoc_abort(usbd_xfer_handle);
196Static void uhci_device_isoc_close(usbd_pipe_handle); 199Static void uhci_device_isoc_close(usbd_pipe_handle);
197Static void uhci_device_isoc_done(usbd_xfer_handle); 200Static void uhci_device_isoc_done(usbd_xfer_handle);
198 201
199Static usbd_status uhci_root_ctrl_transfer(usbd_xfer_handle); 202Static usbd_status uhci_root_ctrl_transfer(usbd_xfer_handle);
200Static usbd_status uhci_root_ctrl_start(usbd_xfer_handle); 203Static usbd_status uhci_root_ctrl_start(usbd_xfer_handle);
201Static void uhci_root_ctrl_abort(usbd_xfer_handle); 204Static void uhci_root_ctrl_abort(usbd_xfer_handle);
202Static void uhci_root_ctrl_close(usbd_pipe_handle); 205Static void uhci_root_ctrl_close(usbd_pipe_handle);
203Static void uhci_root_ctrl_done(usbd_xfer_handle); 206Static void uhci_root_ctrl_done(usbd_xfer_handle);
204 207
205Static usbd_status uhci_root_intr_transfer(usbd_xfer_handle); 208Static usbd_status uhci_root_intr_transfer(usbd_xfer_handle);
206Static usbd_status uhci_root_intr_start(usbd_xfer_handle); 209Static usbd_status uhci_root_intr_start(usbd_xfer_handle);
207Static void uhci_root_intr_abort(usbd_xfer_handle); 210Static void uhci_root_intr_abort(usbd_xfer_handle);
208Static void uhci_root_intr_close(usbd_pipe_handle); 211Static void uhci_root_intr_close(usbd_pipe_handle);
209Static void uhci_root_intr_done(usbd_xfer_handle); 212Static void uhci_root_intr_done(usbd_xfer_handle);
210 213
211Static usbd_status uhci_open(usbd_pipe_handle); 214Static usbd_status uhci_open(usbd_pipe_handle);
212Static void uhci_poll(struct usbd_bus *); 215Static void uhci_poll(struct usbd_bus *);
213Static void uhci_softintr(void *); 216Static void uhci_softintr(void *);
214 217
215Static usbd_status uhci_device_request(usbd_xfer_handle xfer); 218Static usbd_status uhci_device_request(usbd_xfer_handle xfer);
216 219
217Static void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *); 220Static void uhci_add_intr(uhci_softc_t *, uhci_soft_qh_t *);
218Static void uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *); 221Static void uhci_remove_intr(uhci_softc_t *, uhci_soft_qh_t *);
219Static usbd_status uhci_device_setintr(uhci_softc_t *sc, 222Static usbd_status uhci_device_setintr(uhci_softc_t *sc,
220 struct uhci_pipe *pipe, int ival); 223 struct uhci_pipe *pipe, int ival);
221 224
222Static void uhci_device_clear_toggle(usbd_pipe_handle pipe); 225Static void uhci_device_clear_toggle(usbd_pipe_handle pipe);
223Static void uhci_noop(usbd_pipe_handle pipe); 226Static void uhci_noop(usbd_pipe_handle pipe);
224 227
225static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *, 228static inline uhci_soft_qh_t *uhci_find_prev_qh(uhci_soft_qh_t *,
226 uhci_soft_qh_t *); 229 uhci_soft_qh_t *);
227 230
228#ifdef UHCI_DEBUG 231#ifdef UHCI_DEBUG
229Static void uhci_dump_all(uhci_softc_t *); 232Static void uhci_dump_all(uhci_softc_t *);
230Static void uhci_dumpregs(uhci_softc_t *); 233Static void uhci_dumpregs(uhci_softc_t *);
231Static void uhci_dump_qhs(uhci_soft_qh_t *); 234Static void uhci_dump_qhs(uhci_soft_qh_t *);
232Static void uhci_dump_qh(uhci_soft_qh_t *); 235Static void uhci_dump_qh(uhci_soft_qh_t *);
233Static void uhci_dump_tds(uhci_soft_td_t *); 236Static void uhci_dump_tds(uhci_soft_td_t *);
234Static void uhci_dump_td(uhci_soft_td_t *); 237Static void uhci_dump_td(uhci_soft_td_t *);
235Static void uhci_dump_ii(uhci_intr_info_t *ii); 238Static void uhci_dump_ii(uhci_intr_info_t *ii);
236void uhci_dump(void); 239void uhci_dump(void);
237#endif 240#endif
238 241
239#define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 242#define UBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
240 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 243 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
241#define UWRITE1(sc, r, x) \ 244#define UWRITE1(sc, r, x) \
242 do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \ 245 do { UBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); \
243 } while (/*CONSTCOND*/0) 246 } while (/*CONSTCOND*/0)
244#define UWRITE2(sc, r, x) \ 247#define UWRITE2(sc, r, x) \
245 do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \ 248 do { UBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); \
246 } while (/*CONSTCOND*/0) 249 } while (/*CONSTCOND*/0)
247#define UWRITE4(sc, r, x) \ 250#define UWRITE4(sc, r, x) \
248 do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \ 251 do { UBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); \
249 } while (/*CONSTCOND*/0) 252 } while (/*CONSTCOND*/0)
250static __inline uint8_t 253static __inline uint8_t
251UREAD1(uhci_softc_t *sc, bus_size_t r) 254UREAD1(uhci_softc_t *sc, bus_size_t r)
252{ 255{
253 256
254 UBARR(sc); 257 UBARR(sc);
255 return bus_space_read_1(sc->iot, sc->ioh, r); 258 return bus_space_read_1(sc->iot, sc->ioh, r);
256} 259}
257 260
258static __inline uint16_t 261static __inline uint16_t
259UREAD2(uhci_softc_t *sc, bus_size_t r) 262UREAD2(uhci_softc_t *sc, bus_size_t r)
260{ 263{
261 264
262 UBARR(sc); 265 UBARR(sc);
263 return bus_space_read_2(sc->iot, sc->ioh, r); 266 return bus_space_read_2(sc->iot, sc->ioh, r);
264} 267}
265 268
266static __inline uint32_t 269static __inline uint32_t
267UREAD4(uhci_softc_t *sc, bus_size_t r) 270UREAD4(uhci_softc_t *sc, bus_size_t r)
268{ 271{
269 272
270 UBARR(sc); 273 UBARR(sc);
271 return bus_space_read_4(sc->iot, sc->ioh, r); 274 return bus_space_read_4(sc->iot, sc->ioh, r);
272} 275}
273 276
274#define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd) 277#define UHCICMD(sc, cmd) UWRITE2(sc, UHCI_CMD, cmd)
275#define UHCISTS(sc) UREAD2(sc, UHCI_STS) 278#define UHCISTS(sc) UREAD2(sc, UHCI_STS)
276 279
277#define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */ 280#define UHCI_RESET_TIMEOUT 100 /* ms, reset timeout */
278 281
279#define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK) 282#define UHCI_CURFRAME(sc) (UREAD2(sc, UHCI_FRNUM) & UHCI_FRNUM_MASK)
280 283
281#define UHCI_INTR_ENDPT 1 284#define UHCI_INTR_ENDPT 1
282 285
283const struct usbd_bus_methods uhci_bus_methods = { 286const struct usbd_bus_methods uhci_bus_methods = {
284 uhci_open, 287 .open_pipe = uhci_open,
285 uhci_softintr, 288 .soft_intr = uhci_softintr,
286 uhci_poll, 289 .do_poll = uhci_poll,
287 uhci_allocm, 290 .allocm = uhci_allocm,
288 uhci_freem, 291 .freem = uhci_freem,
289 uhci_allocx, 292 .allocx = uhci_allocx,
290 uhci_freex, 293 .freex = uhci_freex,
291 NULL, /* uhci_get_locks */ 294 .get_locks = uhci_get_locks,
292}; 295};
293 296
294const struct usbd_pipe_methods uhci_root_ctrl_methods = { 297const struct usbd_pipe_methods uhci_root_ctrl_methods = {
295 uhci_root_ctrl_transfer, 298 .transfer = uhci_root_ctrl_transfer,
296 uhci_root_ctrl_start, 299 .start = uhci_root_ctrl_start,
297 uhci_root_ctrl_abort, 300 .abort = uhci_root_ctrl_abort,
298 uhci_root_ctrl_close, 301 .close = uhci_root_ctrl_close,
299 uhci_noop, 302 .cleartoggle = uhci_noop,
300 uhci_root_ctrl_done, 303 .done = uhci_root_ctrl_done,
301}; 304};
302 305
303const struct usbd_pipe_methods uhci_root_intr_methods = { 306const struct usbd_pipe_methods uhci_root_intr_methods = {
304 uhci_root_intr_transfer, 307 .transfer = uhci_root_intr_transfer,
305 uhci_root_intr_start, 308 .start = uhci_root_intr_start,
306 uhci_root_intr_abort, 309 .abort = uhci_root_intr_abort,
307 uhci_root_intr_close, 310 .close = uhci_root_intr_close,
308 uhci_noop, 311 .cleartoggle = uhci_noop,
309 uhci_root_intr_done, 312 .done = uhci_root_intr_done,
310}; 313};
311 314
312const struct usbd_pipe_methods uhci_device_ctrl_methods = { 315const struct usbd_pipe_methods uhci_device_ctrl_methods = {
313 uhci_device_ctrl_transfer, 316 .transfer = uhci_device_ctrl_transfer,
314 uhci_device_ctrl_start, 317 .start = uhci_device_ctrl_start,
315 uhci_device_ctrl_abort, 318 .abort = uhci_device_ctrl_abort,
316 uhci_device_ctrl_close, 319 .close = uhci_device_ctrl_close,
317 uhci_noop, 320 .cleartoggle = uhci_noop,
318 uhci_device_ctrl_done, 321 .done = uhci_device_ctrl_done,
319}; 322};
320 323
321const struct usbd_pipe_methods uhci_device_intr_methods = { 324const struct usbd_pipe_methods uhci_device_intr_methods = {
322 uhci_device_intr_transfer, 325 .transfer = uhci_device_intr_transfer,
323 uhci_device_intr_start, 326 .start = uhci_device_intr_start,
324 uhci_device_intr_abort, 327 .abort = uhci_device_intr_abort,
325 uhci_device_intr_close, 328 .close = uhci_device_intr_close,
326 uhci_device_clear_toggle, 329 .cleartoggle = uhci_device_clear_toggle,
327 uhci_device_intr_done, 330 .done = uhci_device_intr_done,
328}; 331};
329 332
330const struct usbd_pipe_methods uhci_device_bulk_methods = { 333const struct usbd_pipe_methods uhci_device_bulk_methods = {
331 uhci_device_bulk_transfer, 334 .transfer = uhci_device_bulk_transfer,
332 uhci_device_bulk_start, 335 .start = uhci_device_bulk_start,
333 uhci_device_bulk_abort, 336 .abort = uhci_device_bulk_abort,
334 uhci_device_bulk_close, 337 .close = uhci_device_bulk_close,
335 uhci_device_clear_toggle, 338 .cleartoggle = uhci_device_clear_toggle,
336 uhci_device_bulk_done, 339 .done = uhci_device_bulk_done,
337}; 340};
338 341
339const struct usbd_pipe_methods uhci_device_isoc_methods = { 342const struct usbd_pipe_methods uhci_device_isoc_methods = {
340 uhci_device_isoc_transfer, 343 .transfer = uhci_device_isoc_transfer,
341 uhci_device_isoc_start, 344 .start = uhci_device_isoc_start,
342 uhci_device_isoc_abort, 345 .abort = uhci_device_isoc_abort,
343 uhci_device_isoc_close, 346 .close = uhci_device_isoc_close,
344 uhci_noop, 347 .cleartoggle = uhci_noop,
345 uhci_device_isoc_done, 348 .done = uhci_device_isoc_done,
346}; 349};
347 350
348#define uhci_add_intr_info(sc, ii) \ 351#define uhci_add_intr_info(sc, ii) \
349 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list) 352 LIST_INSERT_HEAD(&(sc)->sc_intrhead, (ii), list)
350#define uhci_del_intr_info(ii) \ 353#define uhci_del_intr_info(ii) \
351 do { \ 354 do { \
352 LIST_REMOVE((ii), list); \ 355 LIST_REMOVE((ii), list); \
353 (ii)->list.le_prev = NULL; \ 356 (ii)->list.le_prev = NULL; \
354 } while (0) 357 } while (0)
355#define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL) 358#define uhci_active_intr_info(ii) ((ii)->list.le_prev != NULL)
356 359
357static inline uhci_soft_qh_t * 360static inline uhci_soft_qh_t *
358uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh) 361uhci_find_prev_qh(uhci_soft_qh_t *pqh, uhci_soft_qh_t *sqh)
359{ 362{
360 DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh)); 363 DPRINTFN(15,("uhci_find_prev_qh: pqh=%p sqh=%p\n", pqh, sqh));
361 364
362 for (; pqh->hlink != sqh; pqh = pqh->hlink) { 365 for (; pqh->hlink != sqh; pqh = pqh->hlink) {
363#if defined(DIAGNOSTIC) || defined(UHCI_DEBUG) 366#if defined(DIAGNOSTIC) || defined(UHCI_DEBUG)
364 usb_syncmem(&pqh->dma, 367 usb_syncmem(&pqh->dma,
365 pqh->offs + offsetof(uhci_qh_t, qh_hlink), 368 pqh->offs + offsetof(uhci_qh_t, qh_hlink),
366 sizeof(pqh->qh.qh_hlink), 369 sizeof(pqh->qh.qh_hlink),
367 BUS_DMASYNC_POSTWRITE); 370 BUS_DMASYNC_POSTWRITE);
368 if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) { 371 if (le32toh(pqh->qh.qh_hlink) & UHCI_PTR_T) {
369 printf("uhci_find_prev_qh: QH not found\n"); 372 printf("uhci_find_prev_qh: QH not found\n");
370 return (NULL); 373 return (NULL);
371 } 374 }
372#endif 375#endif
373 } 376 }
374 return (pqh); 377 return (pqh);
375} 378}
376 379
377void 380void
378uhci_globalreset(uhci_softc_t *sc) 381uhci_globalreset(uhci_softc_t *sc)
379{ 382{
380 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */ 383 UHCICMD(sc, UHCI_CMD_GRESET); /* global reset */
381 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */ 384 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); /* wait a little */
382 UHCICMD(sc, 0); /* do nothing */ 385 UHCICMD(sc, 0); /* do nothing */
383} 386}
384 387
385usbd_status 388usbd_status
386uhci_init(uhci_softc_t *sc) 389uhci_init(uhci_softc_t *sc)
387{ 390{
388 usbd_status err; 391 usbd_status err;
389 int i, j; 392 int i, j;
390 uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh; 393 uhci_soft_qh_t *clsqh, *chsqh, *bsqh, *sqh, *lsqh;
391 uhci_soft_td_t *std; 394 uhci_soft_td_t *std;
392 395
393 DPRINTFN(1,("uhci_init: start\n")); 396 DPRINTFN(1,("uhci_init: start\n"));
394 397
395#ifdef UHCI_DEBUG 398#ifdef UHCI_DEBUG
396 thesc = sc; 399 thesc = sc;
397 400
398 if (uhcidebug > 2) 401 if (uhcidebug > 2)
399 uhci_dumpregs(sc); 402 uhci_dumpregs(sc);
400#endif 403#endif
401 404
402 sc->sc_suspend = PWR_RESUME; 405 sc->sc_suspend = PWR_RESUME;
403 406
404 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ 407 UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */
405 uhci_globalreset(sc); /* reset the controller */ 408 uhci_globalreset(sc); /* reset the controller */
406 uhci_reset(sc); 409 uhci_reset(sc);
407 410
408 usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag, 411 usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag,
409 USB_MEM_RESERVE); 412 USB_MEM_RESERVE);
410 413
411 /* Allocate and initialize real frame array. */ 414 /* Allocate and initialize real frame array. */
412 err = usb_allocmem(&sc->sc_bus, 415 err = usb_allocmem(&sc->sc_bus,
413 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 416 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
414 UHCI_FRAMELIST_ALIGN, &sc->sc_dma); 417 UHCI_FRAMELIST_ALIGN, &sc->sc_dma);
415 if (err) 418 if (err)
416 return (err); 419 return (err);
417 sc->sc_pframes = KERNADDR(&sc->sc_dma, 0); 420 sc->sc_pframes = KERNADDR(&sc->sc_dma, 0);
418 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */ 421 UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */
419 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/ 422 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); /* set frame list*/
420 423
421 /* 424 /*
422 * Allocate a TD, inactive, that hangs from the last QH. 425 * Allocate a TD, inactive, that hangs from the last QH.
423 * This is to avoid a bug in the PIIX that makes it run berserk 426 * This is to avoid a bug in the PIIX that makes it run berserk
424 * otherwise. 427 * otherwise.
425 */ 428 */
426 std = uhci_alloc_std(sc); 429 std = uhci_alloc_std(sc);
427 if (std == NULL) 430 if (std == NULL)
428 return (USBD_NOMEM); 431 return (USBD_NOMEM);
429 std->link.std = NULL; 432 std->link.std = NULL;
430 std->td.td_link = htole32(UHCI_PTR_T); 433 std->td.td_link = htole32(UHCI_PTR_T);
431 std->td.td_status = htole32(0); /* inactive */ 434 std->td.td_status = htole32(0); /* inactive */
432 std->td.td_token = htole32(0); 435 std->td.td_token = htole32(0);
433 std->td.td_buffer = htole32(0); 436 std->td.td_buffer = htole32(0);
434 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 437 usb_syncmem(&std->dma, std->offs, sizeof(std->td),
435 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 438 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
436 439
437 /* Allocate the dummy QH marking the end and used for looping the QHs.*/ 440 /* Allocate the dummy QH marking the end and used for looping the QHs.*/
438 lsqh = uhci_alloc_sqh(sc); 441 lsqh = uhci_alloc_sqh(sc);
439 if (lsqh == NULL) 442 if (lsqh == NULL)
440 return (USBD_NOMEM); 443 return (USBD_NOMEM);
441 lsqh->hlink = NULL; 444 lsqh->hlink = NULL;
442 lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */ 445 lsqh->qh.qh_hlink = htole32(UHCI_PTR_T); /* end of QH chain */
443 lsqh->elink = std; 446 lsqh->elink = std;
444 lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD); 447 lsqh->qh.qh_elink = htole32(std->physaddr | UHCI_PTR_TD);
445 sc->sc_last_qh = lsqh; 448 sc->sc_last_qh = lsqh;
446 usb_syncmem(&lsqh->dma, lsqh->offs, sizeof(lsqh->qh), 449 usb_syncmem(&lsqh->dma, lsqh->offs, sizeof(lsqh->qh),
447 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 450 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
448 451
449 /* Allocate the dummy QH where bulk traffic will be queued. */ 452 /* Allocate the dummy QH where bulk traffic will be queued. */
450 bsqh = uhci_alloc_sqh(sc); 453 bsqh = uhci_alloc_sqh(sc);
451 if (bsqh == NULL) 454 if (bsqh == NULL)
452 return (USBD_NOMEM); 455 return (USBD_NOMEM);
453 bsqh->hlink = lsqh; 456 bsqh->hlink = lsqh;
454 bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH); 457 bsqh->qh.qh_hlink = htole32(lsqh->physaddr | UHCI_PTR_QH);
455 bsqh->elink = NULL; 458 bsqh->elink = NULL;
456 bsqh->qh.qh_elink = htole32(UHCI_PTR_T); 459 bsqh->qh.qh_elink = htole32(UHCI_PTR_T);
457 sc->sc_bulk_start = sc->sc_bulk_end = bsqh; 460 sc->sc_bulk_start = sc->sc_bulk_end = bsqh;
458 usb_syncmem(&bsqh->dma, bsqh->offs, sizeof(bsqh->qh), 461 usb_syncmem(&bsqh->dma, bsqh->offs, sizeof(bsqh->qh),
459 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 462 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
460 463
461 /* Allocate dummy QH where high speed control traffic will be queued. */ 464 /* Allocate dummy QH where high speed control traffic will be queued. */
462 chsqh = uhci_alloc_sqh(sc); 465 chsqh = uhci_alloc_sqh(sc);
463 if (chsqh == NULL) 466 if (chsqh == NULL)
464 return (USBD_NOMEM); 467 return (USBD_NOMEM);
465 chsqh->hlink = bsqh; 468 chsqh->hlink = bsqh;
466 chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH); 469 chsqh->qh.qh_hlink = htole32(bsqh->physaddr | UHCI_PTR_QH);
467 chsqh->elink = NULL; 470 chsqh->elink = NULL;
468 chsqh->qh.qh_elink = htole32(UHCI_PTR_T); 471 chsqh->qh.qh_elink = htole32(UHCI_PTR_T);
469 sc->sc_hctl_start = sc->sc_hctl_end = chsqh; 472 sc->sc_hctl_start = sc->sc_hctl_end = chsqh;
470 usb_syncmem(&chsqh->dma, chsqh->offs, sizeof(chsqh->qh), 473 usb_syncmem(&chsqh->dma, chsqh->offs, sizeof(chsqh->qh),
471 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 474 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
472 475
473 /* Allocate dummy QH where control traffic will be queued. */ 476 /* Allocate dummy QH where control traffic will be queued. */
474 clsqh = uhci_alloc_sqh(sc); 477 clsqh = uhci_alloc_sqh(sc);
475 if (clsqh == NULL) 478 if (clsqh == NULL)
476 return (USBD_NOMEM); 479 return (USBD_NOMEM);
477 clsqh->hlink = chsqh; 480 clsqh->hlink = chsqh;
478 clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH); 481 clsqh->qh.qh_hlink = htole32(chsqh->physaddr | UHCI_PTR_QH);
479 clsqh->elink = NULL; 482 clsqh->elink = NULL;
480 clsqh->qh.qh_elink = htole32(UHCI_PTR_T); 483 clsqh->qh.qh_elink = htole32(UHCI_PTR_T);
481 sc->sc_lctl_start = sc->sc_lctl_end = clsqh; 484 sc->sc_lctl_start = sc->sc_lctl_end = clsqh;
482 usb_syncmem(&clsqh->dma, clsqh->offs, sizeof(clsqh->qh), 485 usb_syncmem(&clsqh->dma, clsqh->offs, sizeof(clsqh->qh),
483 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 486 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
484 487
485 /* 488 /*
486 * Make all (virtual) frame list pointers point to the interrupt 489 * Make all (virtual) frame list pointers point to the interrupt
487 * queue heads and the interrupt queue heads at the control 490 * queue heads and the interrupt queue heads at the control
488 * queue head and point the physical frame list to the virtual. 491 * queue head and point the physical frame list to the virtual.
489 */ 492 */
490 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 493 for(i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
491 std = uhci_alloc_std(sc); 494 std = uhci_alloc_std(sc);
492 sqh = uhci_alloc_sqh(sc); 495 sqh = uhci_alloc_sqh(sc);
493 if (std == NULL || sqh == NULL) 496 if (std == NULL || sqh == NULL)
494 return (USBD_NOMEM); 497 return (USBD_NOMEM);
495 std->link.sqh = sqh; 498 std->link.sqh = sqh;
496 std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH); 499 std->td.td_link = htole32(sqh->physaddr | UHCI_PTR_QH);
497 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 500 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
498 std->td.td_token = htole32(0); 501 std->td.td_token = htole32(0);
499 std->td.td_buffer = htole32(0); 502 std->td.td_buffer = htole32(0);
500 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 503 usb_syncmem(&std->dma, std->offs, sizeof(std->td),
501 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 504 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
502 sqh->hlink = clsqh; 505 sqh->hlink = clsqh;
503 sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH); 506 sqh->qh.qh_hlink = htole32(clsqh->physaddr | UHCI_PTR_QH);
504 sqh->elink = NULL; 507 sqh->elink = NULL;
505 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 508 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
506 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 509 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
507 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 510 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
508 sc->sc_vframes[i].htd = std; 511 sc->sc_vframes[i].htd = std;
509 sc->sc_vframes[i].etd = std; 512 sc->sc_vframes[i].etd = std;
510 sc->sc_vframes[i].hqh = sqh; 513 sc->sc_vframes[i].hqh = sqh;
511 sc->sc_vframes[i].eqh = sqh; 514 sc->sc_vframes[i].eqh = sqh;
512 for (j = i; 515 for (j = i;
513 j < UHCI_FRAMELIST_COUNT; 516 j < UHCI_FRAMELIST_COUNT;
514 j += UHCI_VFRAMELIST_COUNT) 517 j += UHCI_VFRAMELIST_COUNT)
515 sc->sc_pframes[j] = htole32(std->physaddr); 518 sc->sc_pframes[j] = htole32(std->physaddr);
516 } 519 }
517 usb_syncmem(&sc->sc_dma, 0, 520 usb_syncmem(&sc->sc_dma, 0,
518 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), 521 UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t),
519 BUS_DMASYNC_PREWRITE); 522 BUS_DMASYNC_PREWRITE);
520 523
521 524
522 LIST_INIT(&sc->sc_intrhead); 525 LIST_INIT(&sc->sc_intrhead);
523 526
524 SIMPLEQ_INIT(&sc->sc_free_xfers); 527 SIMPLEQ_INIT(&sc->sc_free_xfers);
525 528
526 callout_init(&sc->sc_poll_handle, 0); 529 callout_init(&sc->sc_poll_handle, CALLOUT_MPSAFE);
 530
 531 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB);
 532 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_USB);
 533 cv_init(&sc->sc_softwake_cv, "uhciab");
527 534
528 /* Set up the bus struct. */ 535 /* Set up the bus struct. */
529 sc->sc_bus.methods = &uhci_bus_methods; 536 sc->sc_bus.methods = &uhci_bus_methods;
530 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe); 537 sc->sc_bus.pipe_size = sizeof(struct uhci_pipe);
531 538
532 UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */ 539 UHCICMD(sc, UHCI_CMD_MAXP); /* Assume 64 byte packets at frame end */
533 540
534 DPRINTFN(1,("uhci_init: enabling\n")); 541 DPRINTFN(1,("uhci_init: enabling\n"));
535 542
536 err = uhci_run(sc, 1); /* and here we go... */ 543 err = uhci_run(sc, 1); /* and here we go... */
537 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE | 544 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | UHCI_INTR_RIE |
538 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */ 545 UHCI_INTR_IOCE | UHCI_INTR_SPIE); /* enable interrupts */
539 return err; 546 return err;
540} 547}
541 548
542int 549int
543uhci_activate(device_t self, enum devact act) 550uhci_activate(device_t self, enum devact act)
544{ 551{
545 struct uhci_softc *sc = device_private(self); 552 struct uhci_softc *sc = device_private(self);
546 553
547 switch (act) { 554 switch (act) {
548 case DVACT_DEACTIVATE: 555 case DVACT_DEACTIVATE:
549 sc->sc_dying = 1; 556 sc->sc_dying = 1;
550 return 0; 557 return 0;
551 default: 558 default:
552 return EOPNOTSUPP; 559 return EOPNOTSUPP;
553 } 560 }
554} 561}
555 562
556void 563void
557uhci_childdet(device_t self, device_t child) 564uhci_childdet(device_t self, device_t child)
558{ 565{
559 struct uhci_softc *sc = device_private(self); 566 struct uhci_softc *sc = device_private(self);
560 567
561 KASSERT(sc->sc_child == child); 568 KASSERT(sc->sc_child == child);
562 sc->sc_child = NULL; 569 sc->sc_child = NULL;
563} 570}
564 571
565int 572int
566uhci_detach(struct uhci_softc *sc, int flags) 573uhci_detach(struct uhci_softc *sc, int flags)
567{ 574{
568 usbd_xfer_handle xfer; 575 usbd_xfer_handle xfer;
569 int rv = 0; 576 int rv = 0;
570 577
571 if (sc->sc_child != NULL) 578 if (sc->sc_child != NULL)
572 rv = config_detach(sc->sc_child, flags); 579 rv = config_detach(sc->sc_child, flags);
573 580
574 if (rv != 0) 581 if (rv != 0)
575 return (rv); 582 return (rv);
576 583
577 /* Free all xfers associated with this HC. */ 584 /* Free all xfers associated with this HC. */
578 for (;;) { 585 for (;;) {
579 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 586 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
580 if (xfer == NULL) 587 if (xfer == NULL)
581 break; 588 break;
582 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 589 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
583 free(xfer, M_USB); 590 kmem_free(xfer, sizeof(struct uhci_xfer));
584 } 591 }
585 592
586 callout_halt(&sc->sc_poll_handle, NULL); 593 callout_halt(&sc->sc_poll_handle, NULL);
587 callout_destroy(&sc->sc_poll_handle); 594 callout_destroy(&sc->sc_poll_handle);
588 595
 596 cv_destroy(&sc->sc_softwake_cv);
 597
 598 mutex_destroy(&sc->sc_lock);
 599 mutex_destroy(&sc->sc_intr_lock);
 600
589 /* XXX free other data structures XXX */ 601 /* XXX free other data structures XXX */
590 602
591 return (rv); 603 return (rv);
592} 604}
593 605
594usbd_status 606usbd_status
595uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 607uhci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
596{ 608{
597 struct uhci_softc *sc = bus->hci_private; 609 struct uhci_softc *sc = bus->hci_private;
598 usbd_status status; 610 usbd_status status;
599 u_int32_t n; 611 u_int32_t n;
600 612
601 /* 613 /*
602 * XXX 614 * XXX
603 * Since we are allocating a buffer we can assume that we will 615 * Since we are allocating a buffer we can assume that we will
604 * need TDs for it. Since we don't want to allocate those from 616 * need TDs for it. Since we don't want to allocate those from
605 * an interrupt context, we allocate them here and free them again. 617 * an interrupt context, we allocate them here and free them again.
606 * This is no guarantee that we'll get the TDs next time... 618 * This is no guarantee that we'll get the TDs next time...
607 */ 619 */
608 n = size / 8; 620 n = size / 8;
609 if (n > 16) { 621 if (n > 16) {
610 u_int32_t i; 622 u_int32_t i;
611 uhci_soft_td_t **stds; 623 uhci_soft_td_t **stds;
 624
612 DPRINTF(("uhci_allocm: get %d TDs\n", n)); 625 DPRINTF(("uhci_allocm: get %d TDs\n", n));
613 stds = malloc(sizeof(uhci_soft_td_t *) * n, M_TEMP, 626 stds = kmem_alloc(sizeof(uhci_soft_td_t *) * n, KM_SLEEP);
614 M_WAITOK|M_ZERO); 627 if (!stds)
615 for(i=0; i < n; i++) 628 return USBD_NOMEM;
 629 for(i = 0; i < n; i++)
616 stds[i] = uhci_alloc_std(sc); 630 stds[i] = uhci_alloc_std(sc);
617 for(i=0; i < n; i++) 631 for(i = 0; i < n; i++)
618 if (stds[i] != NULL) 632 if (stds[i] != NULL)
619 uhci_free_std(sc, stds[i]); 633 uhci_free_std(sc, stds[i]);
620 free(stds, M_TEMP); 634 kmem_free(stds, sizeof(uhci_soft_td_t *) * n);
621 } 635 }
622 636
623 
624 status = usb_allocmem(&sc->sc_bus, size, 0, dma); 637 status = usb_allocmem(&sc->sc_bus, size, 0, dma);
625 if (status == USBD_NOMEM) 638 if (status == USBD_NOMEM)
626 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size); 639 status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size);
627 return status; 640 return status;
628} 641}
629 642
630void 643void
631uhci_freem(struct usbd_bus *bus, usb_dma_t *dma) 644uhci_freem(struct usbd_bus *bus, usb_dma_t *dma)
632{ 645{
633 if (dma->block->flags & USB_DMA_RESERVE) { 646 if (dma->block->flags & USB_DMA_RESERVE) {
634 usb_reserve_freem(&((struct uhci_softc *)bus)->sc_dma_reserve, 647 usb_reserve_freem(&((struct uhci_softc *)bus)->sc_dma_reserve,
635 dma); 648 dma);
636 return; 649 return;
637 } 650 }
638 usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma); 651 usb_freemem(&((struct uhci_softc *)bus)->sc_bus, dma);
639} 652}
640 653
641usbd_xfer_handle 654usbd_xfer_handle
642uhci_allocx(struct usbd_bus *bus) 655uhci_allocx(struct usbd_bus *bus)
643{ 656{
644 struct uhci_softc *sc = bus->hci_private; 657 struct uhci_softc *sc = bus->hci_private;
645 usbd_xfer_handle xfer; 658 usbd_xfer_handle xfer;
646 659
647 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 660 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
648 if (xfer != NULL) { 661 if (xfer != NULL) {
649 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next); 662 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
650#ifdef DIAGNOSTIC 663#ifdef DIAGNOSTIC
651 if (xfer->busy_free != XFER_FREE) { 664 if (xfer->busy_free != XFER_FREE) {
652 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer, 665 printf("uhci_allocx: xfer=%p not free, 0x%08x\n", xfer,
653 xfer->busy_free); 666 xfer->busy_free);
654 } 667 }
655#endif 668#endif
656 } else { 669 } else {
657 xfer = malloc(sizeof(struct uhci_xfer), M_USB, M_NOWAIT); 670 xfer = kmem_alloc(sizeof(struct uhci_xfer), KM_SLEEP);
658 } 671 }
659 if (xfer != NULL) { 672 if (xfer != NULL) {
660 memset(xfer, 0, sizeof (struct uhci_xfer)); 673 memset(xfer, 0, sizeof (struct uhci_xfer));
661 UXFER(xfer)->iinfo.sc = sc; 674 UXFER(xfer)->iinfo.sc = sc;
662#ifdef DIAGNOSTIC 675#ifdef DIAGNOSTIC
663 UXFER(xfer)->iinfo.isdone = 1; 676 UXFER(xfer)->iinfo.isdone = 1;
664 xfer->busy_free = XFER_BUSY; 677 xfer->busy_free = XFER_BUSY;
665#endif 678#endif
666 } 679 }
667 return (xfer); 680 return (xfer);
668} 681}
669 682
670void 683void
671uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 684uhci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
672{ 685{
673 struct uhci_softc *sc = bus->hci_private; 686 struct uhci_softc *sc = bus->hci_private;
674 687
675#ifdef DIAGNOSTIC 688#ifdef DIAGNOSTIC
676 if (xfer->busy_free != XFER_BUSY) { 689 if (xfer->busy_free != XFER_BUSY) {
677 printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer, 690 printf("uhci_freex: xfer=%p not busy, 0x%08x\n", xfer,
678 xfer->busy_free); 691 xfer->busy_free);
679 } 692 }
680 xfer->busy_free = XFER_FREE; 693 xfer->busy_free = XFER_FREE;
681 if (!UXFER(xfer)->iinfo.isdone) { 694 if (!UXFER(xfer)->iinfo.isdone) {
682 printf("uhci_freex: !isdone\n"); 695 printf("uhci_freex: !isdone\n");
683 } 696 }
684#endif 697#endif
685 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 698 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
686} 699}
687 700
 701Static void
 702uhci_get_locks(struct usbd_bus *bus, kmutex_t **intr, kmutex_t **thread)
 703{
 704 struct uhci_softc *sc = bus->hci_private;
 705
 706 *intr = &sc->sc_intr_lock;
 707 *thread = &sc->sc_lock;
 708}
 709
 710
688/* 711/*
689 * Handle suspend/resume. 712 * Handle suspend/resume.
690 * 713 *
691 * We need to switch to polling mode here, because this routine is 714 * We need to switch to polling mode here, because this routine is
692 * called from an interrupt context. This is all right since we 715 * called from an interrupt context. This is all right since we
693 * are almost suspended anyway. 716 * are almost suspended anyway.
694 */ 717 */
695bool 718bool
696uhci_resume(device_t dv, const pmf_qual_t *qual) 719uhci_resume(device_t dv, const pmf_qual_t *qual)
697{ 720{
698 uhci_softc_t *sc = device_private(dv); 721 uhci_softc_t *sc = device_private(dv);
699 int cmd; 722 int cmd;
700 int s; 
701 723
702 s = splhardusb(); 724 mutex_spin_enter(&sc->sc_intr_lock);
703 725
704 cmd = UREAD2(sc, UHCI_CMD); 726 cmd = UREAD2(sc, UHCI_CMD);
705 sc->sc_bus.use_polling++; 727 sc->sc_bus.use_polling++;
706 UWRITE2(sc, UHCI_INTR, 0); 728 UWRITE2(sc, UHCI_INTR, 0);
707 uhci_globalreset(sc); 729 uhci_globalreset(sc);
708 uhci_reset(sc); 730 uhci_reset(sc);
709 if (cmd & UHCI_CMD_RS) 731 if (cmd & UHCI_CMD_RS)
710 uhci_run(sc, 0); 732 uhci_run(sc, 0);
711 733
712 /* restore saved state */ 734 /* restore saved state */
713 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0)); 735 UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&sc->sc_dma, 0));
714 UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum); 736 UWRITE2(sc, UHCI_FRNUM, sc->sc_saved_frnum);
715 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof); 737 UWRITE1(sc, UHCI_SOF, sc->sc_saved_sof);
716 738
717 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force resume */ 739 UHCICMD(sc, cmd | UHCI_CMD_FGR); /* force resume */
718 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 740 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
719 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */ 741 UHCICMD(sc, cmd & ~UHCI_CMD_EGSM); /* back to normal */
720 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE | 742 UWRITE2(sc, UHCI_INTR, UHCI_INTR_TOCRCIE |
721 UHCI_INTR_RIE | UHCI_INTR_IOCE | UHCI_INTR_SPIE); 743 UHCI_INTR_RIE | UHCI_INTR_IOCE | UHCI_INTR_SPIE);
722 UHCICMD(sc, UHCI_CMD_MAXP); 744 UHCICMD(sc, UHCI_CMD_MAXP);
723 uhci_run(sc, 1); /* and start traffic again */ 745 uhci_run(sc, 1); /* and start traffic again */
724 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 746 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
725 sc->sc_bus.use_polling--; 747 sc->sc_bus.use_polling--;
726 if (sc->sc_intr_xfer != NULL) 748 if (sc->sc_intr_xfer != NULL)
727 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, 749 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub,
728 sc->sc_intr_xfer); 750 sc->sc_intr_xfer);
729#ifdef UHCI_DEBUG 751#ifdef UHCI_DEBUG
730 if (uhcidebug > 2) 752 if (uhcidebug > 2)
731 uhci_dumpregs(sc); 753 uhci_dumpregs(sc);
732#endif 754#endif
733 755
734 sc->sc_suspend = PWR_RESUME; 756 sc->sc_suspend = PWR_RESUME;
735 splx(s); 757 mutex_spin_exit(&sc->sc_intr_lock);
736 758
737 return true; 759 return true;
738} 760}
739 761
740bool 762bool
741uhci_suspend(device_t dv, const pmf_qual_t *qual) 763uhci_suspend(device_t dv, const pmf_qual_t *qual)
742{ 764{
743 uhci_softc_t *sc = device_private(dv); 765 uhci_softc_t *sc = device_private(dv);
744 int cmd; 766 int cmd;
745 int s; 
746 767
747 s = splhardusb(); 768 mutex_spin_enter(&sc->sc_intr_lock);
748 769
749 cmd = UREAD2(sc, UHCI_CMD); 770 cmd = UREAD2(sc, UHCI_CMD);
750 771
751#ifdef UHCI_DEBUG 772#ifdef UHCI_DEBUG
752 if (uhcidebug > 2) 773 if (uhcidebug > 2)
753 uhci_dumpregs(sc); 774 uhci_dumpregs(sc);
754#endif 775#endif
755 if (sc->sc_intr_xfer != NULL) 776 if (sc->sc_intr_xfer != NULL)
756 callout_stop(&sc->sc_poll_handle); 777 callout_stop(&sc->sc_poll_handle);
757 sc->sc_suspend = PWR_SUSPEND; 778 sc->sc_suspend = PWR_SUSPEND;
758 sc->sc_bus.use_polling++; 779 sc->sc_bus.use_polling++;
759 780
760 uhci_run(sc, 0); /* stop the controller */ 781 uhci_run(sc, 0); /* stop the controller */
761 cmd &= ~UHCI_CMD_RS; 782 cmd &= ~UHCI_CMD_RS;
762 783
763 /* save some state if BIOS doesn't */ 784 /* save some state if BIOS doesn't */
764 sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM); 785 sc->sc_saved_frnum = UREAD2(sc, UHCI_FRNUM);
765 sc->sc_saved_sof = UREAD1(sc, UHCI_SOF); 786 sc->sc_saved_sof = UREAD1(sc, UHCI_SOF);
766 787
767 UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */ 788 UWRITE2(sc, UHCI_INTR, 0); /* disable intrs */
768 789
769 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter suspend */ 790 UHCICMD(sc, cmd | UHCI_CMD_EGSM); /* enter suspend */
770 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 791 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
771 sc->sc_bus.use_polling--; 792 sc->sc_bus.use_polling--;
772 793
773 splx(s); 794 mutex_spin_exit(&sc->sc_intr_lock);
774 795
775 return true; 796 return true;
776} 797}
777 798
778#ifdef UHCI_DEBUG 799#ifdef UHCI_DEBUG
779Static void 800Static void
780uhci_dumpregs(uhci_softc_t *sc) 801uhci_dumpregs(uhci_softc_t *sc)
781{ 802{
782 DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, " 803 DPRINTFN(-1,("%s regs: cmd=%04x, sts=%04x, intr=%04x, frnum=%04x, "
783 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n", 804 "flbase=%08x, sof=%04x, portsc1=%04x, portsc2=%04x\n",
784 device_xname(sc->sc_dev), 805 device_xname(sc->sc_dev),
785 UREAD2(sc, UHCI_CMD), 806 UREAD2(sc, UHCI_CMD),
786 UREAD2(sc, UHCI_STS), 807 UREAD2(sc, UHCI_STS),
787 UREAD2(sc, UHCI_INTR), 808 UREAD2(sc, UHCI_INTR),
788 UREAD2(sc, UHCI_FRNUM), 809 UREAD2(sc, UHCI_FRNUM),
789 UREAD4(sc, UHCI_FLBASEADDR), 810 UREAD4(sc, UHCI_FLBASEADDR),
790 UREAD1(sc, UHCI_SOF), 811 UREAD1(sc, UHCI_SOF),
791 UREAD2(sc, UHCI_PORTSC1), 812 UREAD2(sc, UHCI_PORTSC1),
792 UREAD2(sc, UHCI_PORTSC2))); 813 UREAD2(sc, UHCI_PORTSC2)));
793} 814}
794 815
795void 816void
796uhci_dump_td(uhci_soft_td_t *p) 817uhci_dump_td(uhci_soft_td_t *p)
797{ 818{
798 char sbuf[128], sbuf2[128]; 819 char sbuf[128], sbuf2[128];
799 820
800  821
801 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 822 usb_syncmem(&p->dma, p->offs, sizeof(p->td),
802 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 823 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
803 DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx " 824 DPRINTFN(-1,("TD(%p) at %08lx = link=0x%08lx status=0x%08lx "
804 "token=0x%08lx buffer=0x%08lx\n", 825 "token=0x%08lx buffer=0x%08lx\n",
805 p, (long)p->physaddr, 826 p, (long)p->physaddr,
806 (long)le32toh(p->td.td_link), 827 (long)le32toh(p->td.td_link),
807 (long)le32toh(p->td.td_status), 828 (long)le32toh(p->td.td_status),
808 (long)le32toh(p->td.td_token), 829 (long)le32toh(p->td.td_token),
809 (long)le32toh(p->td.td_buffer))); 830 (long)le32toh(p->td.td_buffer)));
810 831
811 snprintb(sbuf, sizeof(sbuf), "\20\1T\2Q\3VF", 832 snprintb(sbuf, sizeof(sbuf), "\20\1T\2Q\3VF",
812 (u_int32_t)le32toh(p->td.td_link)); 833 (u_int32_t)le32toh(p->td.td_link));
813 snprintb(sbuf2, sizeof(sbuf2), 834 snprintb(sbuf2, sizeof(sbuf2),
814 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27" 835 "\20\22BITSTUFF\23CRCTO\24NAK\25BABBLE\26DBUFFER\27"
815 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD", 836 "STALLED\30ACTIVE\31IOC\32ISO\33LS\36SPD",
816 (u_int32_t)le32toh(p->td.td_status)); 837 (u_int32_t)le32toh(p->td.td_status));
817 838
818 DPRINTFN(-1,(" %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d," 839 DPRINTFN(-1,(" %s %s,errcnt=%d,actlen=%d pid=%02x,addr=%d,endpt=%d,"
819 "D=%d,maxlen=%d\n", sbuf, sbuf2, 840 "D=%d,maxlen=%d\n", sbuf, sbuf2,
820 UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)), 841 UHCI_TD_GET_ERRCNT(le32toh(p->td.td_status)),
821 UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)), 842 UHCI_TD_GET_ACTLEN(le32toh(p->td.td_status)),
822 UHCI_TD_GET_PID(le32toh(p->td.td_token)), 843 UHCI_TD_GET_PID(le32toh(p->td.td_token)),
823 UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)), 844 UHCI_TD_GET_DEVADDR(le32toh(p->td.td_token)),
824 UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)), 845 UHCI_TD_GET_ENDPT(le32toh(p->td.td_token)),
825 UHCI_TD_GET_DT(le32toh(p->td.td_token)), 846 UHCI_TD_GET_DT(le32toh(p->td.td_token)),
826 UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token)))); 847 UHCI_TD_GET_MAXLEN(le32toh(p->td.td_token))));
827 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 848 usb_syncmem(&p->dma, p->offs, sizeof(p->td),
828 BUS_DMASYNC_PREREAD); 849 BUS_DMASYNC_PREREAD);
829} 850}
830 851
831void 852void
832uhci_dump_qh(uhci_soft_qh_t *sqh) 853uhci_dump_qh(uhci_soft_qh_t *sqh)
833{ 854{
834 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 855 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
835 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 856 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
836 DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh, 857 DPRINTFN(-1,("QH(%p) at %08x: hlink=%08x elink=%08x\n", sqh,
837 (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink), 858 (int)sqh->physaddr, le32toh(sqh->qh.qh_hlink),
838 le32toh(sqh->qh.qh_elink))); 859 le32toh(sqh->qh.qh_elink)));
839 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD); 860 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD);
840} 861}
841 862
842 863
843#if 1 864#if 1
844void 865void
845uhci_dump(void) 866uhci_dump(void)
846{ 867{
847 uhci_dump_all(thesc); 868 uhci_dump_all(thesc);
848} 869}
849#endif 870#endif
850 871
851void 872void
852uhci_dump_all(uhci_softc_t *sc) 873uhci_dump_all(uhci_softc_t *sc)
853{ 874{
854 uhci_dumpregs(sc); 875 uhci_dumpregs(sc);
855 printf("intrs=%d\n", sc->sc_bus.no_intrs); 876 printf("intrs=%d\n", sc->sc_bus.no_intrs);
856 /*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/ 877 /*printf("framelist[i].link = %08x\n", sc->sc_framelist[0].link);*/
857 uhci_dump_qh(sc->sc_lctl_start); 878 uhci_dump_qh(sc->sc_lctl_start);
858} 879}
859 880
860 881
861void 882void
862uhci_dump_qhs(uhci_soft_qh_t *sqh) 883uhci_dump_qhs(uhci_soft_qh_t *sqh)
863{ 884{
864 uhci_dump_qh(sqh); 885 uhci_dump_qh(sqh);
865 886
866 /* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards 887 /* uhci_dump_qhs displays all the QHs and TDs from the given QH onwards
867 * Traverses sideways first, then down. 888 * Traverses sideways first, then down.
868 * 889 *
869 * QH1 890 * QH1
870 * QH2 891 * QH2
871 * No QH 892 * No QH
872 * TD2.1 893 * TD2.1
873 * TD2.2 894 * TD2.2
874 * TD1.1 895 * TD1.1
875 * etc. 896 * etc.
876 * 897 *
877 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1. 898 * TD2.x being the TDs queued at QH2 and QH1 being referenced from QH1.
878 */ 899 */
879 900
880 901
881 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 902 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
882 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 903 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
883 if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T)) 904 if (sqh->hlink != NULL && !(le32toh(sqh->qh.qh_hlink) & UHCI_PTR_T))
884 uhci_dump_qhs(sqh->hlink); 905 uhci_dump_qhs(sqh->hlink);
885 else 906 else
886 DPRINTF(("No QH\n")); 907 DPRINTF(("No QH\n"));
887 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD); 908 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), BUS_DMASYNC_PREREAD);
888 909
889 if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T)) 910 if (sqh->elink != NULL && !(le32toh(sqh->qh.qh_elink) & UHCI_PTR_T))
890 uhci_dump_tds(sqh->elink); 911 uhci_dump_tds(sqh->elink);
891 else 912 else
892 DPRINTF(("No TD\n")); 913 DPRINTF(("No TD\n"));
893} 914}
894 915
895void 916void
896uhci_dump_tds(uhci_soft_td_t *std) 917uhci_dump_tds(uhci_soft_td_t *std)
897{ 918{
898 uhci_soft_td_t *td; 919 uhci_soft_td_t *td;
899 int stop; 920 int stop;
900 921
901 for(td = std; td != NULL; td = td->link.std) { 922 for(td = std; td != NULL; td = td->link.std) {
902 uhci_dump_td(td); 923 uhci_dump_td(td);
903 924
904 /* Check whether the link pointer in this TD marks 925 /* Check whether the link pointer in this TD marks
905 * the link pointer as end of queue. This avoids 926 * the link pointer as end of queue. This avoids
906 * printing the free list in case the queue/TD has 927 * printing the free list in case the queue/TD has
907 * already been moved there (seatbelt). 928 * already been moved there (seatbelt).
908 */ 929 */
909 usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link), 930 usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link),
910 sizeof(td->td.td_link), 931 sizeof(td->td.td_link),
911 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 932 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
912 stop = (le32toh(td->td.td_link) & UHCI_PTR_T || 933 stop = (le32toh(td->td.td_link) & UHCI_PTR_T ||
913 le32toh(td->td.td_link) == 0); 934 le32toh(td->td.td_link) == 0);
914 usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link), 935 usb_syncmem(&td->dma, td->offs + offsetof(uhci_td_t, td_link),
915 sizeof(td->td.td_link), BUS_DMASYNC_PREREAD); 936 sizeof(td->td.td_link), BUS_DMASYNC_PREREAD);
916 if (stop) 937 if (stop)
917 break; 938 break;
918 } 939 }
919} 940}
920 941
921Static void 942Static void
922uhci_dump_ii(uhci_intr_info_t *ii) 943uhci_dump_ii(uhci_intr_info_t *ii)
923{ 944{
924 usbd_pipe_handle pipe; 945 usbd_pipe_handle pipe;
925 usb_endpoint_descriptor_t *ed; 946 usb_endpoint_descriptor_t *ed;
926 usbd_device_handle dev; 947 usbd_device_handle dev;
927 948
928#ifdef DIAGNOSTIC 949#ifdef DIAGNOSTIC
929#define DONE ii->isdone 950#define DONE ii->isdone
930#else 951#else
931#define DONE 0 952#define DONE 0
932#endif 953#endif
933 if (ii == NULL) { 954 if (ii == NULL) {
934 printf("ii NULL\n"); 955 printf("ii NULL\n");
935 return; 956 return;
936 } 957 }
937 if (ii->xfer == NULL) { 958 if (ii->xfer == NULL) {
938 printf("ii %p: done=%d xfer=NULL\n", 959 printf("ii %p: done=%d xfer=NULL\n",
939 ii, DONE); 960 ii, DONE);
940 return; 961 return;
941 } 962 }
942 pipe = ii->xfer->pipe; 963 pipe = ii->xfer->pipe;
943 if (pipe == NULL) { 964 if (pipe == NULL) {
944 printf("ii %p: done=%d xfer=%p pipe=NULL\n", 965 printf("ii %p: done=%d xfer=%p pipe=NULL\n",
945 ii, DONE, ii->xfer); 966 ii, DONE, ii->xfer);
946 return; 967 return;
947 } 968 }
948 if (pipe->endpoint == NULL) { 969 if (pipe->endpoint == NULL) {
949 printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n", 970 printf("ii %p: done=%d xfer=%p pipe=%p pipe->endpoint=NULL\n",
950 ii, DONE, ii->xfer, pipe); 971 ii, DONE, ii->xfer, pipe);
951 return; 972 return;
952 } 973 }
953 if (pipe->device == NULL) { 974 if (pipe->device == NULL) {
954 printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n", 975 printf("ii %p: done=%d xfer=%p pipe=%p pipe->device=NULL\n",
955 ii, DONE, ii->xfer, pipe); 976 ii, DONE, ii->xfer, pipe);
956 return; 977 return;
957 } 978 }
958 ed = pipe->endpoint->edesc; 979 ed = pipe->endpoint->edesc;
959 dev = pipe->device; 980 dev = pipe->device;
960 printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n", 981 printf("ii %p: done=%d xfer=%p dev=%p vid=0x%04x pid=0x%04x addr=%d pipe=%p ep=0x%02x attr=0x%02x\n",
961 ii, DONE, ii->xfer, dev, 982 ii, DONE, ii->xfer, dev,
962 UGETW(dev->ddesc.idVendor), 983 UGETW(dev->ddesc.idVendor),
963 UGETW(dev->ddesc.idProduct), 984 UGETW(dev->ddesc.idProduct),
964 dev->address, pipe, 985 dev->address, pipe,
965 ed->bEndpointAddress, ed->bmAttributes); 986 ed->bEndpointAddress, ed->bmAttributes);
966#undef DONE 987#undef DONE
967} 988}
968 989
969void uhci_dump_iis(struct uhci_softc *sc); 990void uhci_dump_iis(struct uhci_softc *sc);
970void 991void
971uhci_dump_iis(struct uhci_softc *sc) 992uhci_dump_iis(struct uhci_softc *sc)
972{ 993{
973 uhci_intr_info_t *ii; 994 uhci_intr_info_t *ii;
974 995
975 printf("intr_info list:\n"); 996 printf("intr_info list:\n");
976 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list)) 997 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = LIST_NEXT(ii, list))
977 uhci_dump_ii(ii); 998 uhci_dump_ii(ii);
978} 999}
979 1000
980void iidump(void); 1001void iidump(void);
981void iidump(void) { uhci_dump_iis(thesc); } 1002void iidump(void) { uhci_dump_iis(thesc); }
982 1003
983#endif 1004#endif
984 1005
985/* 1006/*
986 * This routine is executed periodically and simulates interrupts 1007 * This routine is executed periodically and simulates interrupts
987 * from the root controller interrupt pipe for port status change. 1008 * from the root controller interrupt pipe for port status change.
988 */ 1009 */
989void 1010void
990uhci_poll_hub(void *addr) 1011uhci_poll_hub(void *addr)
991{ 1012{
992 usbd_xfer_handle xfer = addr; 1013 usbd_xfer_handle xfer = addr;
993 usbd_pipe_handle pipe = xfer->pipe; 1014 usbd_pipe_handle pipe = xfer->pipe;
994 uhci_softc_t *sc; 1015 uhci_softc_t *sc;
995 int s; 
996 u_char *p; 1016 u_char *p;
997 1017
998 DPRINTFN(20, ("uhci_poll_hub\n")); 1018 DPRINTFN(20, ("uhci_poll_hub\n"));
999 1019
1000 if (__predict_false(pipe->device == NULL || pipe->device->bus == NULL)) 1020 if (__predict_false(pipe->device == NULL || pipe->device->bus == NULL))
1001 return; /* device has detached */ 1021 return; /* device has detached */
1002 sc = pipe->device->bus->hci_private; 1022 sc = pipe->device->bus->hci_private;
1003 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 1023 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
1004 1024
1005 p = KERNADDR(&xfer->dmabuf, 0); 1025 p = KERNADDR(&xfer->dmabuf, 0);
1006 p[0] = 0; 1026 p[0] = 0;
1007 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 1027 if (UREAD2(sc, UHCI_PORTSC1) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
1008 p[0] |= 1<<1; 1028 p[0] |= 1<<1;
1009 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC)) 1029 if (UREAD2(sc, UHCI_PORTSC2) & (UHCI_PORTSC_CSC|UHCI_PORTSC_OCIC))
1010 p[0] |= 1<<2; 1030 p[0] |= 1<<2;
1011 if (p[0] == 0) 1031 if (p[0] == 0)
1012 /* No change, try again in a while */ 1032 /* No change, try again in a while */
1013 return; 1033 return;
1014 1034
1015 xfer->actlen = 1; 1035 xfer->actlen = 1;
1016 xfer->status = USBD_NORMAL_COMPLETION; 1036 xfer->status = USBD_NORMAL_COMPLETION;
1017 s = splusb(); 1037 mutex_enter(&sc->sc_lock);
1018 xfer->device->bus->intr_context++; 1038 xfer->device->bus->intr_context++;
1019 usb_transfer_complete(xfer); 1039 usb_transfer_complete(xfer);
1020 xfer->device->bus->intr_context--; 1040 xfer->device->bus->intr_context--;
1021 splx(s); 1041 mutex_exit(&sc->sc_lock);
1022} 1042}
1023 1043
1024void 1044void
1025uhci_root_intr_done(usbd_xfer_handle xfer) 1045uhci_root_intr_done(usbd_xfer_handle xfer)
1026{ 1046{
1027} 1047}
1028 1048
1029void 1049void
1030uhci_root_ctrl_done(usbd_xfer_handle xfer) 1050uhci_root_ctrl_done(usbd_xfer_handle xfer)
1031{ 1051{
1032} 1052}
1033 1053
1034/* 1054/*
1035 * Let the last QH loop back to the high speed control transfer QH. 1055 * Let the last QH loop back to the high speed control transfer QH.
1036 * This is what intel calls "bandwidth reclamation" and improves 1056 * This is what intel calls "bandwidth reclamation" and improves
1037 * USB performance a lot for some devices. 1057 * USB performance a lot for some devices.
1038 * If we are already looping, just count it. 1058 * If we are already looping, just count it.
1039 */ 1059 */
1040void 1060void
1041uhci_add_loop(uhci_softc_t *sc) { 1061uhci_add_loop(uhci_softc_t *sc) {
1042#ifdef UHCI_DEBUG 1062#ifdef UHCI_DEBUG
1043 if (uhcinoloop) 1063 if (uhcinoloop)
1044 return; 1064 return;
1045#endif 1065#endif
1046 if (++sc->sc_loops == 1) { 1066 if (++sc->sc_loops == 1) {
1047 DPRINTFN(5,("uhci_start_loop: add\n")); 1067 DPRINTFN(5,("uhci_start_loop: add\n"));
1048 /* Note, we don't loop back the soft pointer. */ 1068 /* Note, we don't loop back the soft pointer. */
1049 sc->sc_last_qh->qh.qh_hlink = 1069 sc->sc_last_qh->qh.qh_hlink =
1050 htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH); 1070 htole32(sc->sc_hctl_start->physaddr | UHCI_PTR_QH);
1051 usb_syncmem(&sc->sc_last_qh->dma, 1071 usb_syncmem(&sc->sc_last_qh->dma,
1052 sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink), 1072 sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink),
1053 sizeof(sc->sc_last_qh->qh.qh_hlink), 1073 sizeof(sc->sc_last_qh->qh.qh_hlink),
1054 BUS_DMASYNC_PREWRITE); 1074 BUS_DMASYNC_PREWRITE);
1055 } 1075 }
1056} 1076}
1057 1077
1058void 1078void
1059uhci_rem_loop(uhci_softc_t *sc) { 1079uhci_rem_loop(uhci_softc_t *sc) {
1060#ifdef UHCI_DEBUG 1080#ifdef UHCI_DEBUG
1061 if (uhcinoloop) 1081 if (uhcinoloop)
1062 return; 1082 return;
1063#endif 1083#endif
1064 if (--sc->sc_loops == 0) { 1084 if (--sc->sc_loops == 0) {
1065 DPRINTFN(5,("uhci_end_loop: remove\n")); 1085 DPRINTFN(5,("uhci_end_loop: remove\n"));
1066 sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T); 1086 sc->sc_last_qh->qh.qh_hlink = htole32(UHCI_PTR_T);
1067 usb_syncmem(&sc->sc_last_qh->dma, 1087 usb_syncmem(&sc->sc_last_qh->dma,
1068 sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink), 1088 sc->sc_last_qh->offs + offsetof(uhci_qh_t, qh_hlink),
1069 sizeof(sc->sc_last_qh->qh.qh_hlink), 1089 sizeof(sc->sc_last_qh->qh.qh_hlink),
1070 BUS_DMASYNC_PREWRITE); 1090 BUS_DMASYNC_PREWRITE);
1071 } 1091 }
1072} 1092}
1073 1093
1074/* Add high speed control QH, called at splusb(). */ 1094/* Add high speed control QH, called at splusb(). */
1075void 1095void
1076uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1096uhci_add_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1077{ 1097{
1078 uhci_soft_qh_t *eqh; 1098 uhci_soft_qh_t *eqh;
1079 1099
1080 SPLUSBCHECK; 1100 KASSERT(mutex_owned(&sc->sc_lock));
1081 1101
1082 DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh)); 1102 DPRINTFN(10, ("uhci_add_ctrl: sqh=%p\n", sqh));
1083 eqh = sc->sc_hctl_end; 1103 eqh = sc->sc_hctl_end;
1084 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1104 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
1085 sizeof(eqh->qh.qh_hlink), 1105 sizeof(eqh->qh.qh_hlink),
1086 BUS_DMASYNC_POSTWRITE); 1106 BUS_DMASYNC_POSTWRITE);
1087 sqh->hlink = eqh->hlink; 1107 sqh->hlink = eqh->hlink;
1088 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1108 sqh->qh.qh_hlink = eqh->qh.qh_hlink;
1089 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1109 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
1090 BUS_DMASYNC_PREWRITE); 1110 BUS_DMASYNC_PREWRITE);
1091 eqh->hlink = sqh; 1111 eqh->hlink = sqh;
1092 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1112 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
1093 sc->sc_hctl_end = sqh; 1113 sc->sc_hctl_end = sqh;
1094 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1114 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
1095 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1115 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
1096#ifdef UHCI_CTL_LOOP 1116#ifdef UHCI_CTL_LOOP
1097 uhci_add_loop(sc); 1117 uhci_add_loop(sc);
1098#endif 1118#endif
1099} 1119}
1100 1120
1101/* Remove high speed control QH, called at splusb(). */ 1121/* Remove high speed control QH, called at splusb(). */
1102void 1122void
1103uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1123uhci_remove_hs_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1104{ 1124{
1105 uhci_soft_qh_t *pqh; 1125 uhci_soft_qh_t *pqh;
1106 1126
1107 SPLUSBCHECK; 1127 KASSERT(mutex_owned(&sc->sc_lock));
1108 1128
1109 DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh)); 1129 DPRINTFN(10, ("uhci_remove_hs_ctrl: sqh=%p\n", sqh));
1110#ifdef UHCI_CTL_LOOP 1130#ifdef UHCI_CTL_LOOP
1111 uhci_rem_loop(sc); 1131 uhci_rem_loop(sc);
1112#endif 1132#endif
1113 /* 1133 /*
1114 * The T bit should be set in the elink of the QH so that the HC 1134 * The T bit should be set in the elink of the QH so that the HC
1115 * doesn't follow the pointer. This condition may fail if the 1135 * doesn't follow the pointer. This condition may fail if the
1116 * the transferred packet was short so that the QH still points 1136 * the transferred packet was short so that the QH still points
1117 * at the last used TD. 1137 * at the last used TD.
1118 * In this case we set the T bit and wait a little for the HC 1138 * In this case we set the T bit and wait a little for the HC
1119 * to stop looking at the TD. 1139 * to stop looking at the TD.
1120 * Note that if the TD chain is large enough, the controller 1140 * Note that if the TD chain is large enough, the controller
1121 * may still be looking at the chain at the end of this function. 1141 * may still be looking at the chain at the end of this function.
1122 * uhci_free_std_chain() will make sure the controller stops 1142 * uhci_free_std_chain() will make sure the controller stops
1123 * looking at it quickly, but until then we should not change 1143 * looking at it quickly, but until then we should not change
1124 * sqh->hlink. 1144 * sqh->hlink.
1125 */ 1145 */
1126 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1146 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
1127 sizeof(sqh->qh.qh_elink), 1147 sizeof(sqh->qh.qh_elink),
1128 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1148 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1129 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1149 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
1130 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1150 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
1131 usb_syncmem(&sqh->dma, 1151 usb_syncmem(&sqh->dma,
1132 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1152 sqh->offs + offsetof(uhci_qh_t, qh_elink),
1133 sizeof(sqh->qh.qh_elink), 1153 sizeof(sqh->qh.qh_elink),
1134 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1154 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1135 delay(UHCI_QH_REMOVE_DELAY); 1155 delay(UHCI_QH_REMOVE_DELAY);
1136 } 1156 }
1137 1157
1138 pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh); 1158 pqh = uhci_find_prev_qh(sc->sc_hctl_start, sqh);
1139 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1159 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
1140 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1160 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
1141 pqh->hlink = sqh->hlink; 1161 pqh->hlink = sqh->hlink;
1142 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1162 pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1143 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1163 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
1144 sizeof(pqh->qh.qh_hlink), 1164 sizeof(pqh->qh.qh_hlink),
1145 BUS_DMASYNC_PREWRITE); 1165 BUS_DMASYNC_PREWRITE);
1146 delay(UHCI_QH_REMOVE_DELAY); 1166 delay(UHCI_QH_REMOVE_DELAY);
1147 if (sc->sc_hctl_end == sqh) 1167 if (sc->sc_hctl_end == sqh)
1148 sc->sc_hctl_end = pqh; 1168 sc->sc_hctl_end = pqh;
1149} 1169}
1150 1170
1151/* Add low speed control QH, called at splusb(). */ 1171/* Add low speed control QH, called at splusb(). */
1152void 1172void
1153uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1173uhci_add_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1154{ 1174{
1155 uhci_soft_qh_t *eqh; 1175 uhci_soft_qh_t *eqh;
1156 1176
1157 SPLUSBCHECK; 1177 KASSERT(mutex_owned(&sc->sc_lock));
1158 1178
1159 DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh)); 1179 DPRINTFN(10, ("uhci_add_ls_ctrl: sqh=%p\n", sqh));
1160 eqh = sc->sc_lctl_end; 1180 eqh = sc->sc_lctl_end;
1161 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1181 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
1162 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1182 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
1163 sqh->hlink = eqh->hlink; 1183 sqh->hlink = eqh->hlink;
1164 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1184 sqh->qh.qh_hlink = eqh->qh.qh_hlink;
1165 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1185 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
1166 BUS_DMASYNC_PREWRITE); 1186 BUS_DMASYNC_PREWRITE);
1167 eqh->hlink = sqh; 1187 eqh->hlink = sqh;
1168 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1188 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
1169 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1189 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
1170 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1190 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
1171 sc->sc_lctl_end = sqh; 1191 sc->sc_lctl_end = sqh;
1172} 1192}
1173 1193
1174/* Remove low speed control QH, called at splusb(). */ 1194/* Remove low speed control QH, called at splusb(). */
1175void 1195void
1176uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1196uhci_remove_ls_ctrl(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1177{ 1197{
1178 uhci_soft_qh_t *pqh; 1198 uhci_soft_qh_t *pqh;
1179 1199
1180 SPLUSBCHECK; 1200 KASSERT(mutex_owned(&sc->sc_lock));
1181 1201
1182 DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh)); 1202 DPRINTFN(10, ("uhci_remove_ls_ctrl: sqh=%p\n", sqh));
1183 /* See comment in uhci_remove_hs_ctrl() */ 1203 /* See comment in uhci_remove_hs_ctrl() */
1184 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1204 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
1185 sizeof(sqh->qh.qh_elink), 1205 sizeof(sqh->qh.qh_elink),
1186 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1206 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1187 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1207 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
1188 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1208 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
1189 usb_syncmem(&sqh->dma, 1209 usb_syncmem(&sqh->dma,
1190 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1210 sqh->offs + offsetof(uhci_qh_t, qh_elink),
1191 sizeof(sqh->qh.qh_elink), 1211 sizeof(sqh->qh.qh_elink),
1192 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1212 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1193 delay(UHCI_QH_REMOVE_DELAY); 1213 delay(UHCI_QH_REMOVE_DELAY);
1194 } 1214 }
1195 pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh); 1215 pqh = uhci_find_prev_qh(sc->sc_lctl_start, sqh);
1196 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1216 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
1197 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1217 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
1198 pqh->hlink = sqh->hlink; 1218 pqh->hlink = sqh->hlink;
1199 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1219 pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1200 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1220 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
1201 sizeof(pqh->qh.qh_hlink), 1221 sizeof(pqh->qh.qh_hlink),
1202 BUS_DMASYNC_PREWRITE); 1222 BUS_DMASYNC_PREWRITE);
1203 delay(UHCI_QH_REMOVE_DELAY); 1223 delay(UHCI_QH_REMOVE_DELAY);
1204 if (sc->sc_lctl_end == sqh) 1224 if (sc->sc_lctl_end == sqh)
1205 sc->sc_lctl_end = pqh; 1225 sc->sc_lctl_end = pqh;
1206} 1226}
1207 1227
1208/* Add bulk QH, called at splusb(). */ 1228/* Add bulk QH, called at splusb(). */
1209void 1229void
1210uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1230uhci_add_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1211{ 1231{
1212 uhci_soft_qh_t *eqh; 1232 uhci_soft_qh_t *eqh;
1213 1233
1214 SPLUSBCHECK; 1234 KASSERT(mutex_owned(&sc->sc_lock));
1215 1235
1216 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh)); 1236 DPRINTFN(10, ("uhci_add_bulk: sqh=%p\n", sqh));
1217 eqh = sc->sc_bulk_end; 1237 eqh = sc->sc_bulk_end;
1218 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1238 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
1219 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1239 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
1220 sqh->hlink = eqh->hlink; 1240 sqh->hlink = eqh->hlink;
1221 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 1241 sqh->qh.qh_hlink = eqh->qh.qh_hlink;
1222 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh), 1242 usb_syncmem(&sqh->dma, sqh->offs, sizeof(sqh->qh),
1223 BUS_DMASYNC_PREWRITE); 1243 BUS_DMASYNC_PREWRITE);
1224 eqh->hlink = sqh; 1244 eqh->hlink = sqh;
1225 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 1245 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
1226 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 1246 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
1227 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1247 sizeof(eqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
1228 sc->sc_bulk_end = sqh; 1248 sc->sc_bulk_end = sqh;
1229 uhci_add_loop(sc); 1249 uhci_add_loop(sc);
1230} 1250}
1231 1251
1232/* Remove bulk QH, called at splusb(). */ 1252/* Remove bulk QH, called at splusb(). */
1233void 1253void
1234uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1254uhci_remove_bulk(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1235{ 1255{
1236 uhci_soft_qh_t *pqh; 1256 uhci_soft_qh_t *pqh;
1237 1257
1238 SPLUSBCHECK; 1258 KASSERT(mutex_owned(&sc->sc_lock));
1239 1259
1240 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh)); 1260 DPRINTFN(10, ("uhci_remove_bulk: sqh=%p\n", sqh));
1241 uhci_rem_loop(sc); 1261 uhci_rem_loop(sc);
1242 /* See comment in uhci_remove_hs_ctrl() */ 1262 /* See comment in uhci_remove_hs_ctrl() */
1243 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 1263 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
1244 sizeof(sqh->qh.qh_elink), 1264 sizeof(sqh->qh.qh_elink),
1245 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1265 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1246 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 1266 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
1247 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 1267 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
1248 usb_syncmem(&sqh->dma, 1268 usb_syncmem(&sqh->dma,
1249 sqh->offs + offsetof(uhci_qh_t, qh_elink), 1269 sqh->offs + offsetof(uhci_qh_t, qh_elink),
1250 sizeof(sqh->qh.qh_elink), 1270 sizeof(sqh->qh.qh_elink),
1251 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1271 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1252 delay(UHCI_QH_REMOVE_DELAY); 1272 delay(UHCI_QH_REMOVE_DELAY);
1253 } 1273 }
1254 pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh); 1274 pqh = uhci_find_prev_qh(sc->sc_bulk_start, sqh);
1255 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 1275 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
1256 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE); 1276 sizeof(sqh->qh.qh_hlink), BUS_DMASYNC_POSTWRITE);
1257 pqh->hlink = sqh->hlink; 1277 pqh->hlink = sqh->hlink;
1258 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 1278 pqh->qh.qh_hlink = sqh->qh.qh_hlink;
1259 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 1279 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
1260 sizeof(pqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE); 1280 sizeof(pqh->qh.qh_hlink), BUS_DMASYNC_PREWRITE);
1261 delay(UHCI_QH_REMOVE_DELAY); 1281 delay(UHCI_QH_REMOVE_DELAY);
1262 if (sc->sc_bulk_end == sqh) 1282 if (sc->sc_bulk_end == sqh)
1263 sc->sc_bulk_end = pqh; 1283 sc->sc_bulk_end = pqh;
1264} 1284}
1265 1285
1266Static int uhci_intr1(uhci_softc_t *); 1286Static int uhci_intr1(uhci_softc_t *);
1267 1287
1268int 1288int
1269uhci_intr(void *arg) 1289uhci_intr(void *arg)
1270{ 1290{
1271 uhci_softc_t *sc = arg; 1291 uhci_softc_t *sc = arg;
 1292 int ret = 0;
 1293
 1294 mutex_spin_enter(&sc->sc_intr_lock);
1272 1295
1273 if (sc->sc_dying || !device_has_power(sc->sc_dev)) 1296 if (sc->sc_dying || !device_has_power(sc->sc_dev))
1274 return (0); 1297 goto done;
1275 1298
1276 if (sc->sc_bus.use_polling || UREAD2(sc, UHCI_INTR) == 0) { 1299 if (sc->sc_bus.use_polling || UREAD2(sc, UHCI_INTR) == 0) {
1277#ifdef DIAGNOSTIC 1300#ifdef DIAGNOSTIC
1278 DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n")); 1301 DPRINTFN(16, ("uhci_intr: ignored interrupt while polling\n"));
1279#endif 1302#endif
1280 return (0); 1303 goto done;
1281 } 1304 }
1282 1305
1283 return (uhci_intr1(sc)); 1306 ret = uhci_intr1(sc);
 1307
 1308 done:
 1309 mutex_spin_exit(&sc->sc_intr_lock);
 1310 return ret;
1284} 1311}
1285 1312
1286int 1313int
1287uhci_intr1(uhci_softc_t *sc) 1314uhci_intr1(uhci_softc_t *sc)
1288{ 1315{
1289 int status; 1316 int status;
1290 int ack; 1317 int ack;
1291 1318
1292#ifdef UHCI_DEBUG 1319#ifdef UHCI_DEBUG
1293 if (uhcidebug > 15) { 1320 if (uhcidebug > 15) {
1294 DPRINTF(("%s: uhci_intr1\n", device_xname(sc->sc_dev))); 1321 DPRINTF(("%s: uhci_intr1\n", device_xname(sc->sc_dev)));
1295 uhci_dumpregs(sc); 1322 uhci_dumpregs(sc);
1296 } 1323 }
1297#endif 1324#endif
1298 1325
 1326 KASSERT(mutex_owned(&sc->sc_intr_lock));
 1327
1299 status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS; 1328 status = UREAD2(sc, UHCI_STS) & UHCI_STS_ALLINTRS;
1300 if (status == 0) /* The interrupt was not for us. */ 1329 if (status == 0) /* The interrupt was not for us. */
1301 return (0); 1330 return (0);
1302 1331
1303 if (sc->sc_suspend != PWR_RESUME) { 1332 if (sc->sc_suspend != PWR_RESUME) {
1304#ifdef DIAGNOSTIC 1333#ifdef DIAGNOSTIC
1305 printf("%s: interrupt while not operating ignored\n", 1334 printf("%s: interrupt while not operating ignored\n",
1306 device_xname(sc->sc_dev)); 1335 device_xname(sc->sc_dev));
1307#endif 1336#endif
1308 UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */ 1337 UWRITE2(sc, UHCI_STS, status); /* acknowledge the ints */
1309 return (0); 1338 return (0);
1310 } 1339 }
1311 1340
1312 ack = 0; 1341 ack = 0;
1313 if (status & UHCI_STS_USBINT) 1342 if (status & UHCI_STS_USBINT)
1314 ack |= UHCI_STS_USBINT; 1343 ack |= UHCI_STS_USBINT;
1315 if (status & UHCI_STS_USBEI) 1344 if (status & UHCI_STS_USBEI)
1316 ack |= UHCI_STS_USBEI; 1345 ack |= UHCI_STS_USBEI;
1317 if (status & UHCI_STS_RD) { 1346 if (status & UHCI_STS_RD) {
1318 ack |= UHCI_STS_RD; 1347 ack |= UHCI_STS_RD;
1319#ifdef UHCI_DEBUG 1348#ifdef UHCI_DEBUG
1320 printf("%s: resume detect\n", device_xname(sc->sc_dev)); 1349 printf("%s: resume detect\n", device_xname(sc->sc_dev));
1321#endif 1350#endif
1322 } 1351 }
1323 if (status & UHCI_STS_HSE) { 1352 if (status & UHCI_STS_HSE) {
1324 ack |= UHCI_STS_HSE; 1353 ack |= UHCI_STS_HSE;
1325 printf("%s: host system error\n", device_xname(sc->sc_dev)); 1354 printf("%s: host system error\n", device_xname(sc->sc_dev));
1326 } 1355 }
1327 if (status & UHCI_STS_HCPE) { 1356 if (status & UHCI_STS_HCPE) {
1328 ack |= UHCI_STS_HCPE; 1357 ack |= UHCI_STS_HCPE;
1329 printf("%s: host controller process error\n", 1358 printf("%s: host controller process error\n",
1330 device_xname(sc->sc_dev)); 1359 device_xname(sc->sc_dev));
1331 } 1360 }
1332 1361
1333 /* When HCHalted=1 and Run/Stop=0 , it is normal */ 1362 /* When HCHalted=1 and Run/Stop=0 , it is normal */
1334 if ((status & UHCI_STS_HCH) && (UREAD2(sc, UHCI_CMD) & UHCI_CMD_RS)) { 1363 if ((status & UHCI_STS_HCH) && (UREAD2(sc, UHCI_CMD) & UHCI_CMD_RS)) {
1335 /* no acknowledge needed */ 1364 /* no acknowledge needed */
1336 if (!sc->sc_dying) { 1365 if (!sc->sc_dying) {
1337 printf("%s: host controller halted\n", 1366 printf("%s: host controller halted\n",
1338 device_xname(sc->sc_dev)); 1367 device_xname(sc->sc_dev));
1339#ifdef UHCI_DEBUG 1368#ifdef UHCI_DEBUG
1340 uhci_dump_all(sc); 1369 uhci_dump_all(sc);
1341#endif 1370#endif
1342 } 1371 }
1343 sc->sc_dying = 1; 1372 sc->sc_dying = 1;
1344 } 1373 }
1345 1374
1346 if (!ack) 1375 if (!ack)
1347 return (0); /* nothing to acknowledge */ 1376 return (0); /* nothing to acknowledge */
1348 UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */ 1377 UWRITE2(sc, UHCI_STS, ack); /* acknowledge the ints */
1349 1378
1350 sc->sc_bus.no_intrs++; 1379 sc->sc_bus.no_intrs++;
1351 usb_schedsoftintr(&sc->sc_bus); 1380 usb_schedsoftintr(&sc->sc_bus);
1352 1381
1353 DPRINTFN(15, ("%s: uhci_intr: exit\n", device_xname(sc->sc_dev))); 1382 DPRINTFN(15, ("%s: uhci_intr: exit\n", device_xname(sc->sc_dev)));
1354 1383
1355 return (1); 1384 return (1);
1356} 1385}
1357 1386
1358void 1387void
1359uhci_softintr(void *v) 1388uhci_softintr(void *v)
1360{ 1389{
1361 struct usbd_bus *bus = v; 1390 struct usbd_bus *bus = v;
1362 uhci_softc_t *sc = bus->hci_private; 1391 uhci_softc_t *sc = bus->hci_private;
1363 uhci_intr_info_t *ii, *nextii; 1392 uhci_intr_info_t *ii, *nextii;
1364 1393
1365 DPRINTFN(10,("%s: uhci_softintr (%d)\n", device_xname(sc->sc_dev), 1394 DPRINTFN(10,("%s: uhci_softintr (%d)\n", device_xname(sc->sc_dev),
1366 sc->sc_bus.intr_context)); 1395 sc->sc_bus.intr_context));
1367 1396
 1397 mutex_enter(&sc->sc_lock);
 1398
1368 sc->sc_bus.intr_context++; 1399 sc->sc_bus.intr_context++;
1369 1400
1370 /* 1401 /*
1371 * Interrupts on UHCI really suck. When the host controller 1402 * Interrupts on UHCI really suck. When the host controller
1372 * interrupts because a transfer is completed there is no 1403 * interrupts because a transfer is completed there is no
1373 * way of knowing which transfer it was. You can scan down 1404 * way of knowing which transfer it was. You can scan down
1374 * the TDs and QHs of the previous frame to limit the search, 1405 * the TDs and QHs of the previous frame to limit the search,
1375 * but that assumes that the interrupt was not delayed by more 1406 * but that assumes that the interrupt was not delayed by more
1376 * than 1 ms, which may not always be true (e.g. after debug 1407 * than 1 ms, which may not always be true (e.g. after debug
1377 * output on a slow console). 1408 * output on a slow console).
1378 * We scan all interrupt descriptors to see if any have 1409 * We scan all interrupt descriptors to see if any have
1379 * completed. 1410 * completed.
1380 */ 1411 */
1381 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) { 1412 for (ii = LIST_FIRST(&sc->sc_intrhead); ii; ii = nextii) {
1382 nextii = LIST_NEXT(ii, list); 1413 nextii = LIST_NEXT(ii, list);
1383 uhci_check_intr(sc, ii); 1414 uhci_check_intr(sc, ii);
1384 } 1415 }
1385 1416
1386#ifdef USB_USE_SOFTINTR 
1387 if (sc->sc_softwake) { 1417 if (sc->sc_softwake) {
1388 sc->sc_softwake = 0; 1418 sc->sc_softwake = 0;
1389 wakeup(&sc->sc_softwake); 1419 cv_broadcast(&sc->sc_softwake_cv);
1390 } 1420 }
1391#endif /* USB_USE_SOFTINTR */ 
1392 1421
1393 sc->sc_bus.intr_context--; 1422 sc->sc_bus.intr_context--;
 1423
 1424 mutex_exit(&sc->sc_lock);
1394} 1425}
1395 1426
1396/* Check for an interrupt. */ 1427/* Check for an interrupt. */
1397void 1428void
1398uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii) 1429uhci_check_intr(uhci_softc_t *sc, uhci_intr_info_t *ii)
1399{ 1430{
1400 uhci_soft_td_t *std, *lstd; 1431 uhci_soft_td_t *std, *lstd;
1401 u_int32_t status; 1432 u_int32_t status;
1402 1433
1403 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii)); 1434 DPRINTFN(15, ("uhci_check_intr: ii=%p\n", ii));
1404#ifdef DIAGNOSTIC 1435#ifdef DIAGNOSTIC
1405 if (ii == NULL) { 1436 if (ii == NULL) {
1406 printf("uhci_check_intr: no ii? %p\n", ii); 1437 printf("uhci_check_intr: no ii? %p\n", ii);
1407 return; 1438 return;
1408 } 1439 }
1409#endif 1440#endif
1410 if (ii->xfer->status == USBD_CANCELLED || 1441 if (ii->xfer->status == USBD_CANCELLED ||
1411 ii->xfer->status == USBD_TIMEOUT) { 1442 ii->xfer->status == USBD_TIMEOUT) {
1412 DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer)); 1443 DPRINTF(("uhci_check_intr: aborted xfer=%p\n", ii->xfer));
1413 return; 1444 return;
1414 } 1445 }
1415 1446
1416 if (ii->stdstart == NULL) 1447 if (ii->stdstart == NULL)
1417 return; 1448 return;
1418 lstd = ii->stdend; 1449 lstd = ii->stdend;
1419#ifdef DIAGNOSTIC 1450#ifdef DIAGNOSTIC
1420 if (lstd == NULL) { 1451 if (lstd == NULL) {
1421 printf("uhci_check_intr: std==0\n"); 1452 printf("uhci_check_intr: std==0\n");
1422 return; 1453 return;
1423 } 1454 }
1424#endif 1455#endif
1425 /* 1456 /*
1426 * If the last TD is still active we need to check whether there 1457 * If the last TD is still active we need to check whether there
1427 * is an error somewhere in the middle, or whether there was a 1458 * is an error somewhere in the middle, or whether there was a
1428 * short packet (SPD and not ACTIVE). 1459 * short packet (SPD and not ACTIVE).
1429 */ 1460 */
1430 usb_syncmem(&lstd->dma, 1461 usb_syncmem(&lstd->dma,
1431 lstd->offs + offsetof(uhci_td_t, td_status), 1462 lstd->offs + offsetof(uhci_td_t, td_status),
1432 sizeof(lstd->td.td_status), 1463 sizeof(lstd->td.td_status),
1433 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1464 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1434 if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) { 1465 if (le32toh(lstd->td.td_status) & UHCI_TD_ACTIVE) {
1435 DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii)); 1466 DPRINTFN(12, ("uhci_check_intr: active ii=%p\n", ii));
1436 for (std = ii->stdstart; std != lstd; std = std->link.std) { 1467 for (std = ii->stdstart; std != lstd; std = std->link.std) {
1437 usb_syncmem(&std->dma, 1468 usb_syncmem(&std->dma,
1438 std->offs + offsetof(uhci_td_t, td_status), 1469 std->offs + offsetof(uhci_td_t, td_status),
1439 sizeof(std->td.td_status), 1470 sizeof(std->td.td_status),
1440 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1471 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1441 status = le32toh(std->td.td_status); 1472 status = le32toh(std->td.td_status);
1442 usb_syncmem(&std->dma, 1473 usb_syncmem(&std->dma,
1443 std->offs + offsetof(uhci_td_t, td_status), 1474 std->offs + offsetof(uhci_td_t, td_status),
1444 sizeof(std->td.td_status), BUS_DMASYNC_PREREAD); 1475 sizeof(std->td.td_status), BUS_DMASYNC_PREREAD);
1445 /* If there's an active TD the xfer isn't done. */ 1476 /* If there's an active TD the xfer isn't done. */
1446 if (status & UHCI_TD_ACTIVE) 1477 if (status & UHCI_TD_ACTIVE)
1447 break; 1478 break;
1448 /* Any kind of error makes the xfer done. */ 1479 /* Any kind of error makes the xfer done. */
1449 if (status & UHCI_TD_STALLED) 1480 if (status & UHCI_TD_STALLED)
1450 goto done; 1481 goto done;
1451 /* We want short packets, and it is short: it's done */ 1482 /* We want short packets, and it is short: it's done */
1452 usb_syncmem(&std->dma, 1483 usb_syncmem(&std->dma,
1453 std->offs + offsetof(uhci_td_t, td_token), 1484 std->offs + offsetof(uhci_td_t, td_token),
1454 sizeof(std->td.td_token), 1485 sizeof(std->td.td_token),
1455 BUS_DMASYNC_POSTWRITE); 1486 BUS_DMASYNC_POSTWRITE);
1456 if ((status & UHCI_TD_SPD) && 1487 if ((status & UHCI_TD_SPD) &&
1457 UHCI_TD_GET_ACTLEN(status) < 1488 UHCI_TD_GET_ACTLEN(status) <
1458 UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token))) 1489 UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)))
1459 goto done; 1490 goto done;
1460 } 1491 }
1461 DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n", 1492 DPRINTFN(12, ("uhci_check_intr: ii=%p std=%p still active\n",
1462 ii, ii->stdstart)); 1493 ii, ii->stdstart));
1463 usb_syncmem(&lstd->dma, 1494 usb_syncmem(&lstd->dma,
1464 lstd->offs + offsetof(uhci_td_t, td_status), 1495 lstd->offs + offsetof(uhci_td_t, td_status),
1465 sizeof(lstd->td.td_status), 1496 sizeof(lstd->td.td_status),
1466 BUS_DMASYNC_PREREAD); 1497 BUS_DMASYNC_PREREAD);
1467 return; 1498 return;
1468 } 1499 }
1469 done: 1500 done:
1470 DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii)); 1501 DPRINTFN(12, ("uhci_check_intr: ii=%p done\n", ii));
1471 callout_stop(&ii->xfer->timeout_handle); 1502 callout_stop(&ii->xfer->timeout_handle);
1472 uhci_idone(ii); 1503 uhci_idone(ii);
1473} 1504}
1474 1505
1475/* Called at splusb() */ 1506/* Called at splusb() */
1476void 1507void
1477uhci_idone(uhci_intr_info_t *ii) 1508uhci_idone(uhci_intr_info_t *ii)
1478{ 1509{
1479 usbd_xfer_handle xfer = ii->xfer; 1510 usbd_xfer_handle xfer = ii->xfer;
1480 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 1511 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1481 uhci_soft_td_t *std; 1512 uhci_soft_td_t *std;
1482 u_int32_t status = 0, nstatus; 1513 u_int32_t status = 0, nstatus;
1483 int actlen; 1514 int actlen;
1484 1515
1485 DPRINTFN(12, ("uhci_idone: ii=%p\n", ii)); 1516 DPRINTFN(12, ("uhci_idone: ii=%p\n", ii));
1486#ifdef DIAGNOSTIC 1517#ifdef DIAGNOSTIC
1487 { 1518 {
 1519 /* XXX SMP? */
1488 int s = splhigh(); 1520 int s = splhigh();
1489 if (ii->isdone) { 1521 if (ii->isdone) {
1490 splx(s); 1522 splx(s);
1491#ifdef UHCI_DEBUG 1523#ifdef UHCI_DEBUG
1492 printf("uhci_idone: ii is done!\n "); 1524 printf("uhci_idone: ii is done!\n ");
1493 uhci_dump_ii(ii); 1525 uhci_dump_ii(ii);
1494#else 1526#else
1495 printf("uhci_idone: ii=%p is done!\n", ii); 1527 printf("uhci_idone: ii=%p is done!\n", ii);
1496#endif 1528#endif
1497 return; 1529 return;
1498 } 1530 }
1499 ii->isdone = 1; 1531 ii->isdone = 1;
1500 splx(s); 1532 splx(s);
1501 } 1533 }
1502#endif 1534#endif
1503 1535
1504 if (xfer->nframes != 0) { 1536 if (xfer->nframes != 0) {
1505 /* Isoc transfer, do things differently. */ 1537 /* Isoc transfer, do things differently. */
1506 uhci_soft_td_t **stds = upipe->u.iso.stds; 1538 uhci_soft_td_t **stds = upipe->u.iso.stds;
1507 int i, n, nframes, len; 1539 int i, n, nframes, len;
1508 1540
1509 DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii)); 1541 DPRINTFN(5,("uhci_idone: ii=%p isoc ready\n", ii));
1510 1542
1511 nframes = xfer->nframes; 1543 nframes = xfer->nframes;
1512 actlen = 0; 1544 actlen = 0;
1513 n = UXFER(xfer)->curframe; 1545 n = UXFER(xfer)->curframe;
1514 for (i = 0; i < nframes; i++) { 1546 for (i = 0; i < nframes; i++) {
1515 std = stds[n]; 1547 std = stds[n];
1516#ifdef UHCI_DEBUG 1548#ifdef UHCI_DEBUG
1517 if (uhcidebug > 5) { 1549 if (uhcidebug > 5) {
1518 DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i)); 1550 DPRINTFN(-1,("uhci_idone: isoc TD %d\n", i));
1519 uhci_dump_td(std); 1551 uhci_dump_td(std);
1520 } 1552 }
1521#endif 1553#endif
1522 if (++n >= UHCI_VFRAMELIST_COUNT) 1554 if (++n >= UHCI_VFRAMELIST_COUNT)
1523 n = 0; 1555 n = 0;
1524 usb_syncmem(&std->dma, 1556 usb_syncmem(&std->dma,
1525 std->offs + offsetof(uhci_td_t, td_status), 1557 std->offs + offsetof(uhci_td_t, td_status),
1526 sizeof(std->td.td_status), 1558 sizeof(std->td.td_status),
1527 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1559 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1528 status = le32toh(std->td.td_status); 1560 status = le32toh(std->td.td_status);
1529 len = UHCI_TD_GET_ACTLEN(status); 1561 len = UHCI_TD_GET_ACTLEN(status);
1530 xfer->frlengths[i] = len; 1562 xfer->frlengths[i] = len;
1531 actlen += len; 1563 actlen += len;
1532 } 1564 }
1533 upipe->u.iso.inuse -= nframes; 1565 upipe->u.iso.inuse -= nframes;
1534 xfer->actlen = actlen; 1566 xfer->actlen = actlen;
1535 xfer->status = USBD_NORMAL_COMPLETION; 1567 xfer->status = USBD_NORMAL_COMPLETION;
1536 goto end; 1568 goto end;
1537 } 1569 }
1538 1570
1539#ifdef UHCI_DEBUG 1571#ifdef UHCI_DEBUG
1540 DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n", 1572 DPRINTFN(10, ("uhci_idone: ii=%p, xfer=%p, pipe=%p ready\n",
1541 ii, xfer, upipe)); 1573 ii, xfer, upipe));
1542 if (uhcidebug > 10) 1574 if (uhcidebug > 10)
1543 uhci_dump_tds(ii->stdstart); 1575 uhci_dump_tds(ii->stdstart);
1544#endif 1576#endif
1545 1577
1546 /* The transfer is done, compute actual length and status. */ 1578 /* The transfer is done, compute actual length and status. */
1547 actlen = 0; 1579 actlen = 0;
1548 for (std = ii->stdstart; std != NULL; std = std->link.std) { 1580 for (std = ii->stdstart; std != NULL; std = std->link.std) {
1549 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 1581 usb_syncmem(&std->dma, std->offs, sizeof(std->td),
1550 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1582 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1551 nstatus = le32toh(std->td.td_status); 1583 nstatus = le32toh(std->td.td_status);
1552 if (nstatus & UHCI_TD_ACTIVE) 1584 if (nstatus & UHCI_TD_ACTIVE)
1553 break; 1585 break;
1554 1586
1555 status = nstatus; 1587 status = nstatus;
1556 if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) != 1588 if (UHCI_TD_GET_PID(le32toh(std->td.td_token)) !=
1557 UHCI_TD_PID_SETUP) 1589 UHCI_TD_PID_SETUP)
1558 actlen += UHCI_TD_GET_ACTLEN(status); 1590 actlen += UHCI_TD_GET_ACTLEN(status);
1559 else { 1591 else {
1560 /* 1592 /*
1561 * UHCI will report CRCTO in addition to a STALL or NAK 1593 * UHCI will report CRCTO in addition to a STALL or NAK
1562 * for a SETUP transaction. See section 3.2.2, "TD 1594 * for a SETUP transaction. See section 3.2.2, "TD
1563 * CONTROL AND STATUS". 1595 * CONTROL AND STATUS".
1564 */ 1596 */
1565 if (status & (UHCI_TD_STALLED | UHCI_TD_NAK)) 1597 if (status & (UHCI_TD_STALLED | UHCI_TD_NAK))
1566 status &= ~UHCI_TD_CRCTO; 1598 status &= ~UHCI_TD_CRCTO;
1567 } 1599 }
1568 } 1600 }
1569 /* If there are left over TDs we need to update the toggle. */ 1601 /* If there are left over TDs we need to update the toggle. */
1570 if (std != NULL) 1602 if (std != NULL)
1571 upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token)); 1603 upipe->nexttoggle = UHCI_TD_GET_DT(le32toh(std->td.td_token));
1572 1604
1573 status &= UHCI_TD_ERROR; 1605 status &= UHCI_TD_ERROR;
1574 DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n", 1606 DPRINTFN(10, ("uhci_idone: actlen=%d, status=0x%x\n",
1575 actlen, status)); 1607 actlen, status));
1576 xfer->actlen = actlen; 1608 xfer->actlen = actlen;
1577 if (status != 0) { 1609 if (status != 0) {
1578#ifdef UHCI_DEBUG 1610#ifdef UHCI_DEBUG
1579 char sbuf[128]; 1611 char sbuf[128];
1580 1612
1581 snprintb(sbuf, sizeof(sbuf), 1613 snprintb(sbuf, sizeof(sbuf),
1582 "\20\22BITSTUFF\23CRCTO\24NAK\25" 1614 "\20\22BITSTUFF\23CRCTO\24NAK\25"
1583 "BABBLE\26DBUFFER\27STALLED\30ACTIVE",(u_int32_t)status); 1615 "BABBLE\26DBUFFER\27STALLED\30ACTIVE",(u_int32_t)status);
1584 1616
1585 DPRINTFN((status == UHCI_TD_STALLED)*10, 1617 DPRINTFN((status == UHCI_TD_STALLED)*10,
1586 ("uhci_idone: error, addr=%d, endpt=0x%02x, " 1618 ("uhci_idone: error, addr=%d, endpt=0x%02x, "
1587 "status 0x%s\n", 1619 "status 0x%s\n",
1588 xfer->pipe->device->address, 1620 xfer->pipe->device->address,
1589 xfer->pipe->endpoint->edesc->bEndpointAddress, 1621 xfer->pipe->endpoint->edesc->bEndpointAddress,
1590 sbuf)); 1622 sbuf));
1591#endif 1623#endif
1592 1624
1593 if (status == UHCI_TD_STALLED) 1625 if (status == UHCI_TD_STALLED)
1594 xfer->status = USBD_STALLED; 1626 xfer->status = USBD_STALLED;
1595 else 1627 else
1596 xfer->status = USBD_IOERROR; /* more info XXX */ 1628 xfer->status = USBD_IOERROR; /* more info XXX */
1597 } else { 1629 } else {
1598 xfer->status = USBD_NORMAL_COMPLETION; 1630 xfer->status = USBD_NORMAL_COMPLETION;
1599 } 1631 }
1600 1632
1601 end: 1633 end:
1602 usb_transfer_complete(xfer); 1634 usb_transfer_complete(xfer);
1603 DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii)); 1635 DPRINTFN(12, ("uhci_idone: ii=%p done\n", ii));
1604} 1636}
1605 1637
1606/* 1638/*
1607 * Called when a request does not complete. 1639 * Called when a request does not complete.
1608 */ 1640 */
1609void 1641void
1610uhci_timeout(void *addr) 1642uhci_timeout(void *addr)
1611{ 1643{
1612 uhci_intr_info_t *ii = addr; 1644 uhci_intr_info_t *ii = addr;
1613 struct uhci_xfer *uxfer = UXFER(ii->xfer); 1645 struct uhci_xfer *uxfer = UXFER(ii->xfer);
1614 struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe; 1646 struct uhci_pipe *upipe = (struct uhci_pipe *)uxfer->xfer.pipe;
1615 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 1647 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private;
1616 1648
1617 DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer)); 1649 DPRINTF(("uhci_timeout: uxfer=%p\n", uxfer));
1618 1650
1619 if (sc->sc_dying) { 1651 if (sc->sc_dying) {
1620 uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT); 1652 uhci_abort_xfer(&uxfer->xfer, USBD_TIMEOUT);
1621 return; 1653 return;
1622 } 1654 }
1623 1655
1624 /* Execute the abort in a process context. */ 1656 /* Execute the abort in a process context. */
1625 usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer); 1657 usb_init_task(&uxfer->abort_task, uhci_timeout_task, ii->xfer);
1626 usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task, 1658 usb_add_task(uxfer->xfer.pipe->device, &uxfer->abort_task,
1627 USB_TASKQ_HC); 1659 USB_TASKQ_HC);
1628} 1660}
1629 1661
1630void 1662void
1631uhci_timeout_task(void *addr) 1663uhci_timeout_task(void *addr)
1632{ 1664{
1633 usbd_xfer_handle xfer = addr; 1665 usbd_xfer_handle xfer = addr;
1634 int s; 
1635 1666
1636 DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer)); 1667 DPRINTF(("uhci_timeout_task: xfer=%p\n", xfer));
1637 1668
1638 s = splusb(); 
1639 uhci_abort_xfer(xfer, USBD_TIMEOUT); 1669 uhci_abort_xfer(xfer, USBD_TIMEOUT);
1640 splx(s); 
1641} 1670}
1642 1671
1643/* 1672/*
1644 * Wait here until controller claims to have an interrupt. 1673 * Wait here until controller claims to have an interrupt.
1645 * Then call uhci_intr and return. Use timeout to avoid waiting 1674 * Then call uhci_intr and return. Use timeout to avoid waiting
1646 * too long. 1675 * too long.
1647 * Only used during boot when interrupts are not enabled yet. 1676 * Only used during boot when interrupts are not enabled yet.
1648 */ 1677 */
1649void 1678void
1650uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer) 1679uhci_waitintr(uhci_softc_t *sc, usbd_xfer_handle xfer)
1651{ 1680{
1652 int timo = xfer->timeout; 1681 int timo = xfer->timeout;
1653 uhci_intr_info_t *ii; 1682 uhci_intr_info_t *ii;
1654 1683
 1684 mutex_enter(&sc->sc_lock);
 1685
1655 DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo)); 1686 DPRINTFN(10,("uhci_waitintr: timeout = %dms\n", timo));
1656 1687
1657 xfer->status = USBD_IN_PROGRESS; 1688 xfer->status = USBD_IN_PROGRESS;
1658 for (; timo >= 0; timo--) { 1689 for (; timo >= 0; timo--) {
1659 usb_delay_ms(&sc->sc_bus, 1); 1690 usb_delay_ms(&sc->sc_bus, 1);
1660 DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS))); 1691 DPRINTFN(20,("uhci_waitintr: 0x%04x\n", UREAD2(sc, UHCI_STS)));
1661 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) { 1692 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
 1693 mutex_spin_enter(&sc->sc_intr_lock);
1662 uhci_intr1(sc); 1694 uhci_intr1(sc);
 1695 mutex_spin_exit(&sc->sc_intr_lock);
1663 if (xfer->status != USBD_IN_PROGRESS) 1696 if (xfer->status != USBD_IN_PROGRESS)
1664 return; 1697 goto done;
1665 } 1698 }
1666 } 1699 }
1667 1700
1668 /* Timeout */ 1701 /* Timeout */
1669 DPRINTF(("uhci_waitintr: timeout\n")); 1702 DPRINTF(("uhci_waitintr: timeout\n"));
1670 for (ii = LIST_FIRST(&sc->sc_intrhead); 1703 for (ii = LIST_FIRST(&sc->sc_intrhead);
1671 ii != NULL && ii->xfer != xfer; 1704 ii != NULL && ii->xfer != xfer;
1672 ii = LIST_NEXT(ii, list)) 1705 ii = LIST_NEXT(ii, list))
1673 ; 1706 ;
1674#ifdef DIAGNOSTIC 1707#ifdef DIAGNOSTIC
1675 if (ii == NULL) 1708 if (ii == NULL)
1676 panic("uhci_waitintr: lost intr_info"); 1709 panic("uhci_waitintr: lost intr_info");
1677#endif 1710#endif
1678 uhci_idone(ii); 1711 uhci_idone(ii);
 1712
 1713done:
 1714 mutex_exit(&sc->sc_lock);
1679} 1715}
1680 1716
1681void 1717void
1682uhci_poll(struct usbd_bus *bus) 1718uhci_poll(struct usbd_bus *bus)
1683{ 1719{
1684 uhci_softc_t *sc = bus->hci_private; 1720 uhci_softc_t *sc = bus->hci_private;
1685 1721
1686 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) 1722 if (UREAD2(sc, UHCI_STS) & UHCI_STS_USBINT) {
 1723 mutex_spin_enter(&sc->sc_intr_lock);
1687 uhci_intr1(sc); 1724 uhci_intr1(sc);
 1725 mutex_spin_exit(&sc->sc_intr_lock);
 1726 }
1688} 1727}
1689 1728
1690void 1729void
1691uhci_reset(uhci_softc_t *sc) 1730uhci_reset(uhci_softc_t *sc)
1692{ 1731{
1693 int n; 1732 int n;
1694 1733
1695 UHCICMD(sc, UHCI_CMD_HCRESET); 1734 UHCICMD(sc, UHCI_CMD_HCRESET);
1696 /* The reset bit goes low when the controller is done. */ 1735 /* The reset bit goes low when the controller is done. */
1697 for (n = 0; n < UHCI_RESET_TIMEOUT && 1736 for (n = 0; n < UHCI_RESET_TIMEOUT &&
1698 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++) 1737 (UREAD2(sc, UHCI_CMD) & UHCI_CMD_HCRESET); n++)
1699 usb_delay_ms(&sc->sc_bus, 1); 1738 usb_delay_ms(&sc->sc_bus, 1);
1700 if (n >= UHCI_RESET_TIMEOUT) 1739 if (n >= UHCI_RESET_TIMEOUT)
1701 printf("%s: controller did not reset\n", 1740 printf("%s: controller did not reset\n",
1702 device_xname(sc->sc_dev)); 1741 device_xname(sc->sc_dev));
1703} 1742}
1704 1743
1705usbd_status 1744usbd_status
1706uhci_run(uhci_softc_t *sc, int run) 1745uhci_run(uhci_softc_t *sc, int run)
1707{ 1746{
1708 int s, n, running; 1747 int n, running;
1709 u_int16_t cmd; 1748 u_int16_t cmd;
1710 1749
1711 run = run != 0; 1750 run = run != 0;
1712 s = splhardusb(); 1751 mutex_spin_enter(&sc->sc_intr_lock);
1713 DPRINTF(("uhci_run: setting run=%d\n", run)); 1752 DPRINTF(("uhci_run: setting run=%d\n", run));
1714 cmd = UREAD2(sc, UHCI_CMD); 1753 cmd = UREAD2(sc, UHCI_CMD);
1715 if (run) 1754 if (run)
1716 cmd |= UHCI_CMD_RS; 1755 cmd |= UHCI_CMD_RS;
1717 else 1756 else
1718 cmd &= ~UHCI_CMD_RS; 1757 cmd &= ~UHCI_CMD_RS;
1719 UHCICMD(sc, cmd); 1758 UHCICMD(sc, cmd);
1720 for(n = 0; n < 10; n++) { 1759 for(n = 0; n < 10; n++) {
1721 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH); 1760 running = !(UREAD2(sc, UHCI_STS) & UHCI_STS_HCH);
1722 /* return when we've entered the state we want */ 1761 /* return when we've entered the state we want */
1723 if (run == running) { 1762 if (run == running) {
1724 splx(s); 1763 mutex_spin_exit(&sc->sc_intr_lock);
1725 DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n", 1764 DPRINTF(("uhci_run: done cmd=0x%x sts=0x%x\n",
1726 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS))); 1765 UREAD2(sc, UHCI_CMD), UREAD2(sc, UHCI_STS)));
1727 return (USBD_NORMAL_COMPLETION); 1766 return (USBD_NORMAL_COMPLETION);
1728 } 1767 }
1729 usb_delay_ms(&sc->sc_bus, 1); 1768 usb_delay_ms(&sc->sc_bus, 1);
1730 } 1769 }
1731 splx(s); 1770 mutex_spin_exit(&sc->sc_intr_lock);
1732 printf("%s: cannot %s\n", device_xname(sc->sc_dev), 1771 printf("%s: cannot %s\n", device_xname(sc->sc_dev),
1733 run ? "start" : "stop"); 1772 run ? "start" : "stop");
1734 return (USBD_IOERROR); 1773 return (USBD_IOERROR);
1735} 1774}
1736 1775
1737/* 1776/*
1738 * Memory management routines. 1777 * Memory management routines.
1739 * uhci_alloc_std allocates TDs 1778 * uhci_alloc_std allocates TDs
1740 * uhci_alloc_sqh allocates QHs 1779 * uhci_alloc_sqh allocates QHs
1741 * These two routines do their own free list management, 1780 * These two routines do their own free list management,
1742 * partly for speed, partly because allocating DMAable memory 1781 * partly for speed, partly because allocating DMAable memory
1743 * has page size granularaity so much memory would be wasted if 1782 * has page size granularaity so much memory would be wasted if
1744 * only one TD/QH (32 bytes) was placed in each allocated chunk. 1783 * only one TD/QH (32 bytes) was placed in each allocated chunk.
1745 */ 1784 */
1746 1785
1747uhci_soft_td_t * 1786uhci_soft_td_t *
1748uhci_alloc_std(uhci_softc_t *sc) 1787uhci_alloc_std(uhci_softc_t *sc)
1749{ 1788{
1750 uhci_soft_td_t *std; 1789 uhci_soft_td_t *std;
1751 usbd_status err; 1790 usbd_status err;
1752 int i, offs; 1791 int i, offs;
1753 usb_dma_t dma; 1792 usb_dma_t dma;
1754 1793
1755 if (sc->sc_freetds == NULL) { 1794 if (sc->sc_freetds == NULL) {
1756 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n")); 1795 DPRINTFN(2,("uhci_alloc_std: allocating chunk\n"));
1757 err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK, 1796 err = usb_allocmem(&sc->sc_bus, UHCI_STD_SIZE * UHCI_STD_CHUNK,
1758 UHCI_TD_ALIGN, &dma); 1797 UHCI_TD_ALIGN, &dma);
1759 if (err) 1798 if (err)
1760 return (0); 1799 return (0);
1761 for(i = 0; i < UHCI_STD_CHUNK; i++) { 1800 for (i = 0; i < UHCI_STD_CHUNK; i++) {
1762 offs = i * UHCI_STD_SIZE; 1801 offs = i * UHCI_STD_SIZE;
1763 std = KERNADDR(&dma, offs); 1802 std = KERNADDR(&dma, offs);
1764 std->physaddr = DMAADDR(&dma, offs); 1803 std->physaddr = DMAADDR(&dma, offs);
1765 std->dma = dma; 1804 std->dma = dma;
1766 std->offs = offs; 1805 std->offs = offs;
1767 std->link.std = sc->sc_freetds; 1806 std->link.std = sc->sc_freetds;
1768 sc->sc_freetds = std; 1807 sc->sc_freetds = std;
1769 } 1808 }
1770 } 1809 }
1771 std = sc->sc_freetds; 1810 std = sc->sc_freetds;
1772 sc->sc_freetds = std->link.std; 1811 sc->sc_freetds = std->link.std;
1773 memset(&std->td, 0, sizeof(uhci_td_t)); 1812 memset(&std->td, 0, sizeof(uhci_td_t));
1774 return std; 1813 return std;
1775} 1814}
1776 1815
1777void 1816void
1778uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std) 1817uhci_free_std(uhci_softc_t *sc, uhci_soft_td_t *std)
1779{ 1818{
1780#ifdef DIAGNOSTIC 1819#ifdef DIAGNOSTIC
1781#define TD_IS_FREE 0x12345678 1820#define TD_IS_FREE 0x12345678
1782 if (le32toh(std->td.td_token) == TD_IS_FREE) { 1821 if (le32toh(std->td.td_token) == TD_IS_FREE) {
1783 printf("uhci_free_std: freeing free TD %p\n", std); 1822 printf("uhci_free_std: freeing free TD %p\n", std);
1784 return; 1823 return;
1785 } 1824 }
1786 std->td.td_token = htole32(TD_IS_FREE); 1825 std->td.td_token = htole32(TD_IS_FREE);
1787#endif 1826#endif
1788 std->link.std = sc->sc_freetds; 1827 std->link.std = sc->sc_freetds;
1789 sc->sc_freetds = std; 1828 sc->sc_freetds = std;
1790} 1829}
1791 1830
1792uhci_soft_qh_t * 1831uhci_soft_qh_t *
1793uhci_alloc_sqh(uhci_softc_t *sc) 1832uhci_alloc_sqh(uhci_softc_t *sc)
1794{ 1833{
1795 uhci_soft_qh_t *sqh; 1834 uhci_soft_qh_t *sqh;
1796 usbd_status err; 1835 usbd_status err;
1797 int i, offs; 1836 int i, offs;
1798 usb_dma_t dma; 1837 usb_dma_t dma;
1799 1838
1800 if (sc->sc_freeqhs == NULL) { 1839 if (sc->sc_freeqhs == NULL) {
1801 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n")); 1840 DPRINTFN(2, ("uhci_alloc_sqh: allocating chunk\n"));
1802 err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK, 1841 err = usb_allocmem(&sc->sc_bus, UHCI_SQH_SIZE * UHCI_SQH_CHUNK,
1803 UHCI_QH_ALIGN, &dma); 1842 UHCI_QH_ALIGN, &dma);
1804 if (err) 1843 if (err)
1805 return (0); 1844 return (0);
1806 for(i = 0; i < UHCI_SQH_CHUNK; i++) { 1845 for(i = 0; i < UHCI_SQH_CHUNK; i++) {
1807 offs = i * UHCI_SQH_SIZE; 1846 offs = i * UHCI_SQH_SIZE;
1808 sqh = KERNADDR(&dma, offs); 1847 sqh = KERNADDR(&dma, offs);
1809 sqh->physaddr = DMAADDR(&dma, offs); 1848 sqh->physaddr = DMAADDR(&dma, offs);
1810 sqh->dma = dma; 1849 sqh->dma = dma;
1811 sqh->offs = offs; 1850 sqh->offs = offs;
1812 sqh->hlink = sc->sc_freeqhs; 1851 sqh->hlink = sc->sc_freeqhs;
1813 sc->sc_freeqhs = sqh; 1852 sc->sc_freeqhs = sqh;
1814 } 1853 }
1815 } 1854 }
1816 sqh = sc->sc_freeqhs; 1855 sqh = sc->sc_freeqhs;
1817 sc->sc_freeqhs = sqh->hlink; 1856 sc->sc_freeqhs = sqh->hlink;
1818 memset(&sqh->qh, 0, sizeof(uhci_qh_t)); 1857 memset(&sqh->qh, 0, sizeof(uhci_qh_t));
1819 return (sqh); 1858 return (sqh);
1820} 1859}
1821 1860
1822void 1861void
1823uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 1862uhci_free_sqh(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
1824{ 1863{
1825 sqh->hlink = sc->sc_freeqhs; 1864 sqh->hlink = sc->sc_freeqhs;
1826 sc->sc_freeqhs = sqh; 1865 sc->sc_freeqhs = sqh;
1827} 1866}
1828 1867
1829void 1868void
1830uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std, 1869uhci_free_std_chain(uhci_softc_t *sc, uhci_soft_td_t *std,
1831 uhci_soft_td_t *stdend) 1870 uhci_soft_td_t *stdend)
1832{ 1871{
1833 uhci_soft_td_t *p; 1872 uhci_soft_td_t *p;
1834 1873
1835 /* 1874 /*
1836 * to avoid race condition with the controller which may be looking 1875 * to avoid race condition with the controller which may be looking
1837 * at this chain, we need to first invalidate all links, and 1876 * at this chain, we need to first invalidate all links, and
1838 * then wait for the controller to move to another queue 1877 * then wait for the controller to move to another queue
1839 */ 1878 */
1840 for (p = std; p != stdend; p = p->link.std) { 1879 for (p = std; p != stdend; p = p->link.std) {
1841 usb_syncmem(&p->dma, 1880 usb_syncmem(&p->dma,
1842 p->offs + offsetof(uhci_td_t, td_link), 1881 p->offs + offsetof(uhci_td_t, td_link),
1843 sizeof(p->td.td_link), 1882 sizeof(p->td.td_link),
1844 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 1883 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1845 if ((p->td.td_link & UHCI_PTR_T) == 0) { 1884 if ((p->td.td_link & UHCI_PTR_T) == 0) {
1846 p->td.td_link = UHCI_PTR_T; 1885 p->td.td_link = UHCI_PTR_T;
1847 usb_syncmem(&p->dma, 1886 usb_syncmem(&p->dma,
1848 p->offs + offsetof(uhci_td_t, td_link), 1887 p->offs + offsetof(uhci_td_t, td_link),
1849 sizeof(p->td.td_link), 1888 sizeof(p->td.td_link),
1850 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1889 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1851 } 1890 }
1852 } 1891 }
1853 delay(UHCI_QH_REMOVE_DELAY); 1892 delay(UHCI_QH_REMOVE_DELAY);
1854 1893
1855 for (; std != stdend; std = p) { 1894 for (; std != stdend; std = p) {
1856 p = std->link.std; 1895 p = std->link.std;
1857 uhci_free_std(sc, std); 1896 uhci_free_std(sc, std);
1858 } 1897 }
1859} 1898}
1860 1899
1861usbd_status 1900usbd_status
1862uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len, 1901uhci_alloc_std_chain(struct uhci_pipe *upipe, uhci_softc_t *sc, int len,
1863 int rd, u_int16_t flags, usb_dma_t *dma, 1902 int rd, u_int16_t flags, usb_dma_t *dma,
1864 uhci_soft_td_t **sp, uhci_soft_td_t **ep) 1903 uhci_soft_td_t **sp, uhci_soft_td_t **ep)
1865{ 1904{
1866 uhci_soft_td_t *p, *lastp; 1905 uhci_soft_td_t *p, *lastp;
1867 uhci_physaddr_t lastlink; 1906 uhci_physaddr_t lastlink;
1868 int i, ntd, l, tog, maxp; 1907 int i, ntd, l, tog, maxp;
1869 u_int32_t status; 1908 u_int32_t status;
1870 int addr = upipe->pipe.device->address; 1909 int addr = upipe->pipe.device->address;
1871 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 1910 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1872 1911
1873 DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d " 1912 DPRINTFN(8, ("uhci_alloc_std_chain: addr=%d endpt=%d len=%d speed=%d "
1874 "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len, 1913 "flags=0x%x\n", addr, UE_GET_ADDR(endpt), len,
1875 upipe->pipe.device->speed, flags)); 1914 upipe->pipe.device->speed, flags));
 1915
 1916 KASSERT(mutex_owned(&sc->sc_lock));
 1917
1876 maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize); 1918 maxp = UGETW(upipe->pipe.endpoint->edesc->wMaxPacketSize);
1877 if (maxp == 0) { 1919 if (maxp == 0) {
1878 printf("uhci_alloc_std_chain: maxp=0\n"); 1920 printf("uhci_alloc_std_chain: maxp=0\n");
1879 return (USBD_INVAL); 1921 return (USBD_INVAL);
1880 } 1922 }
1881 ntd = (len + maxp - 1) / maxp; 1923 ntd = (len + maxp - 1) / maxp;
1882 if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0) 1924 if ((flags & USBD_FORCE_SHORT_XFER) && len % maxp == 0)
1883 ntd++; 1925 ntd++;
1884 DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd)); 1926 DPRINTFN(10, ("uhci_alloc_std_chain: maxp=%d ntd=%d\n", maxp, ntd));
1885 if (ntd == 0) { 1927 if (ntd == 0) {
1886 *sp = *ep = 0; 1928 *sp = *ep = 0;
1887 DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n")); 1929 DPRINTFN(-1,("uhci_alloc_std_chain: ntd=0\n"));
1888 return (USBD_NORMAL_COMPLETION); 1930 return (USBD_NORMAL_COMPLETION);
1889 } 1931 }
1890 tog = upipe->nexttoggle; 1932 tog = upipe->nexttoggle;
1891 if (ntd % 2 == 0) 1933 if (ntd % 2 == 0)
1892 tog ^= 1; 1934 tog ^= 1;
1893 upipe->nexttoggle = tog ^ 1; 1935 upipe->nexttoggle = tog ^ 1;
1894 lastp = NULL; 1936 lastp = NULL;
1895 lastlink = UHCI_PTR_T; 1937 lastlink = UHCI_PTR_T;
1896 ntd--; 1938 ntd--;
1897 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE); 1939 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(3) | UHCI_TD_ACTIVE);
1898 if (upipe->pipe.device->speed == USB_SPEED_LOW) 1940 if (upipe->pipe.device->speed == USB_SPEED_LOW)
1899 status |= UHCI_TD_LS; 1941 status |= UHCI_TD_LS;
1900 if (flags & USBD_SHORT_XFER_OK) 1942 if (flags & USBD_SHORT_XFER_OK)
1901 status |= UHCI_TD_SPD; 1943 status |= UHCI_TD_SPD;
1902 usb_syncmem(dma, 0, len, 1944 usb_syncmem(dma, 0, len,
1903 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 1945 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
1904 for (i = ntd; i >= 0; i--) { 1946 for (i = ntd; i >= 0; i--) {
1905 p = uhci_alloc_std(sc); 1947 p = uhci_alloc_std(sc);
1906 if (p == NULL) { 1948 if (p == NULL) {
1907 KASSERT(lastp != NULL); 1949 KASSERT(lastp != NULL);
1908 uhci_free_std_chain(sc, lastp, NULL); 1950 uhci_free_std_chain(sc, lastp, NULL);
1909 return (USBD_NOMEM); 1951 return (USBD_NOMEM);
1910 } 1952 }
1911 p->link.std = lastp; 1953 p->link.std = lastp;
1912 p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD); 1954 p->td.td_link = htole32(lastlink | UHCI_PTR_VF | UHCI_PTR_TD);
1913 lastp = p; 1955 lastp = p;
1914 lastlink = p->physaddr; 1956 lastlink = p->physaddr;
1915 p->td.td_status = htole32(status); 1957 p->td.td_status = htole32(status);
1916 if (i == ntd) { 1958 if (i == ntd) {
1917 /* last TD */ 1959 /* last TD */
1918 l = len % maxp; 1960 l = len % maxp;
1919 if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER)) 1961 if (l == 0 && !(flags & USBD_FORCE_SHORT_XFER))
1920 l = maxp; 1962 l = maxp;
1921 *ep = p; 1963 *ep = p;
1922 } else 1964 } else
1923 l = maxp; 1965 l = maxp;
1924 p->td.td_token = 1966 p->td.td_token =
1925 htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) : 1967 htole32(rd ? UHCI_TD_IN (l, endpt, addr, tog) :
1926 UHCI_TD_OUT(l, endpt, addr, tog)); 1968 UHCI_TD_OUT(l, endpt, addr, tog));
1927 p->td.td_buffer = htole32(DMAADDR(dma, i * maxp)); 1969 p->td.td_buffer = htole32(DMAADDR(dma, i * maxp));
1928 usb_syncmem(&p->dma, p->offs, sizeof(p->td), 1970 usb_syncmem(&p->dma, p->offs, sizeof(p->td),
1929 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 1971 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1930 tog ^= 1; 1972 tog ^= 1;
1931 } 1973 }
1932 *sp = lastp; 1974 *sp = lastp;
1933 DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n", 1975 DPRINTFN(10, ("uhci_alloc_std_chain: nexttog=%d\n",
1934 upipe->nexttoggle)); 1976 upipe->nexttoggle));
1935 return (USBD_NORMAL_COMPLETION); 1977 return (USBD_NORMAL_COMPLETION);
1936} 1978}
1937 1979
1938void 1980void
1939uhci_device_clear_toggle(usbd_pipe_handle pipe) 1981uhci_device_clear_toggle(usbd_pipe_handle pipe)
1940{ 1982{
1941 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 1983 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
1942 upipe->nexttoggle = 0; 1984 upipe->nexttoggle = 0;
1943} 1985}
1944 1986
1945void 1987void
1946uhci_noop(usbd_pipe_handle pipe) 1988uhci_noop(usbd_pipe_handle pipe)
1947{ 1989{
1948} 1990}
1949 1991
1950usbd_status 1992usbd_status
1951uhci_device_bulk_transfer(usbd_xfer_handle xfer) 1993uhci_device_bulk_transfer(usbd_xfer_handle xfer)
1952{ 1994{
 1995 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
1953 usbd_status err; 1996 usbd_status err;
1954 1997
1955 /* Insert last in queue. */ 1998 /* Insert last in queue. */
 1999 mutex_enter(&sc->sc_lock);
1956 err = usb_insert_transfer(xfer); 2000 err = usb_insert_transfer(xfer);
 2001 mutex_exit(&sc->sc_lock);
1957 if (err) 2002 if (err)
1958 return (err); 2003 return (err);
1959 2004
1960 /* 2005 /*
1961 * Pipe isn't running (otherwise err would be USBD_INPROG), 2006 * Pipe isn't running (otherwise err would be USBD_INPROG),
1962 * so start it first. 2007 * so start it first.
1963 */ 2008 */
1964 return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2009 return (uhci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1965} 2010}
1966 2011
1967usbd_status 2012usbd_status
1968uhci_device_bulk_start(usbd_xfer_handle xfer) 2013uhci_device_bulk_start(usbd_xfer_handle xfer)
1969{ 2014{
1970 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2015 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
1971 usbd_device_handle dev = upipe->pipe.device; 2016 usbd_device_handle dev = upipe->pipe.device;
1972 uhci_softc_t *sc = dev->bus->hci_private; 2017 uhci_softc_t *sc = dev->bus->hci_private;
1973 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2018 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
1974 uhci_soft_td_t *data, *dataend; 2019 uhci_soft_td_t *data, *dataend;
1975 uhci_soft_qh_t *sqh; 2020 uhci_soft_qh_t *sqh;
1976 usbd_status err; 2021 usbd_status err;
1977 int len, isread, endpt; 2022 int len, isread, endpt;
1978 int s; 
1979 2023
1980 DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n", 2024 DPRINTFN(3, ("uhci_device_bulk_start: xfer=%p len=%d flags=%d ii=%p\n",
1981 xfer, xfer->length, xfer->flags, ii)); 2025 xfer, xfer->length, xfer->flags, ii));
1982 2026
1983 if (sc->sc_dying) 2027 if (sc->sc_dying)
1984 return (USBD_IOERROR); 2028 return (USBD_IOERROR);
1985 2029
1986#ifdef DIAGNOSTIC 2030#ifdef DIAGNOSTIC
1987 if (xfer->rqflags & URQ_REQUEST) 2031 if (xfer->rqflags & URQ_REQUEST)
1988 panic("uhci_device_bulk_transfer: a request"); 2032 panic("uhci_device_bulk_transfer: a request");
1989#endif 2033#endif
1990 2034
 2035 mutex_enter(&sc->sc_lock);
 2036
1991 len = xfer->length; 2037 len = xfer->length;
1992 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2038 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
1993 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2039 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
1994 sqh = upipe->u.bulk.sqh; 2040 sqh = upipe->u.bulk.sqh;
1995 2041
1996 upipe->u.bulk.isread = isread; 2042 upipe->u.bulk.isread = isread;
1997 upipe->u.bulk.length = len; 2043 upipe->u.bulk.length = len;
1998 2044
1999 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 2045 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
2000 &xfer->dmabuf, &data, &dataend); 2046 &xfer->dmabuf, &data, &dataend);
2001 if (err) 2047 if (err) {
 2048 mutex_exit(&sc->sc_lock);
2002 return (err); 2049 return (err);
 2050 }
2003 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2051 dataend->td.td_status |= htole32(UHCI_TD_IOC);
2004 usb_syncmem(&dataend->dma, 2052 usb_syncmem(&dataend->dma,
2005 dataend->offs + offsetof(uhci_td_t, td_status), 2053 dataend->offs + offsetof(uhci_td_t, td_status),
2006 sizeof(dataend->td.td_status), 2054 sizeof(dataend->td.td_status),
2007 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2055 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2008 2056
2009 2057
2010#ifdef UHCI_DEBUG 2058#ifdef UHCI_DEBUG
2011 if (uhcidebug > 8) { 2059 if (uhcidebug > 8) {
2012 DPRINTF(("uhci_device_bulk_transfer: data(1)\n")); 2060 DPRINTF(("uhci_device_bulk_transfer: data(1)\n"));
2013 uhci_dump_tds(data); 2061 uhci_dump_tds(data);
2014 } 2062 }
2015#endif 2063#endif
2016 2064
2017 /* Set up interrupt info. */ 2065 /* Set up interrupt info. */
2018 ii->xfer = xfer; 2066 ii->xfer = xfer;
2019 ii->stdstart = data; 2067 ii->stdstart = data;
2020 ii->stdend = dataend; 2068 ii->stdend = dataend;
2021#ifdef DIAGNOSTIC 2069#ifdef DIAGNOSTIC
2022 if (!ii->isdone) { 2070 if (!ii->isdone) {
2023 printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii); 2071 printf("uhci_device_bulk_transfer: not done, ii=%p\n", ii);
2024 } 2072 }
2025 ii->isdone = 0; 2073 ii->isdone = 0;
2026#endif 2074#endif
2027 2075
2028 sqh->elink = data; 2076 sqh->elink = data;
2029 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2077 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
2030 /* uhci_add_bulk() will do usb_syncmem(sqh) */ 2078 /* uhci_add_bulk() will do usb_syncmem(sqh) */
2031 2079
2032 s = splusb(); 
2033 uhci_add_bulk(sc, sqh); 2080 uhci_add_bulk(sc, sqh);
2034 uhci_add_intr_info(sc, ii); 2081 uhci_add_intr_info(sc, ii);
2035 2082
2036 if (xfer->timeout && !sc->sc_bus.use_polling) { 2083 if (xfer->timeout && !sc->sc_bus.use_polling) {
2037 callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout), 2084 callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout),
2038 uhci_timeout, ii); 2085 uhci_timeout, ii);
2039 } 2086 }
2040 xfer->status = USBD_IN_PROGRESS; 2087 xfer->status = USBD_IN_PROGRESS;
2041 splx(s); 
2042 2088
2043#ifdef UHCI_DEBUG 2089#ifdef UHCI_DEBUG
2044 if (uhcidebug > 10) { 2090 if (uhcidebug > 10) {
2045 DPRINTF(("uhci_device_bulk_transfer: data(2)\n")); 2091 DPRINTF(("uhci_device_bulk_transfer: data(2)\n"));
2046 uhci_dump_tds(data); 2092 uhci_dump_tds(data);
2047 } 2093 }
2048#endif 2094#endif
2049 2095
2050 if (sc->sc_bus.use_polling) 2096 if (sc->sc_bus.use_polling)
2051 uhci_waitintr(sc, xfer); 2097 uhci_waitintr(sc, xfer);
2052 2098
 2099 mutex_exit(&sc->sc_lock);
2053 return (USBD_IN_PROGRESS); 2100 return (USBD_IN_PROGRESS);
2054} 2101}
2055 2102
2056/* Abort a device bulk request. */ 2103/* Abort a device bulk request. */
2057void 2104void
2058uhci_device_bulk_abort(usbd_xfer_handle xfer) 2105uhci_device_bulk_abort(usbd_xfer_handle xfer)
2059{ 2106{
2060 DPRINTF(("uhci_device_bulk_abort:\n")); 2107 DPRINTF(("uhci_device_bulk_abort:\n"));
2061 uhci_abort_xfer(xfer, USBD_CANCELLED); 2108 uhci_abort_xfer(xfer, USBD_CANCELLED);
2062} 2109}
2063 2110
2064/* 2111/*
2065 * Abort a device request. 2112 * Abort a device request.
2066 * If this routine is called at splusb() it guarantees that the request 2113 * If this routine is called at splusb() it guarantees that the request
2067 * will be removed from the hardware scheduling and that the callback 2114 * will be removed from the hardware scheduling and that the callback
2068 * for it will be called with USBD_CANCELLED status. 2115 * for it will be called with USBD_CANCELLED status.
2069 * It's impossible to guarantee that the requested transfer will not 2116 * It's impossible to guarantee that the requested transfer will not
2070 * have happened since the hardware runs concurrently. 2117 * have happened since the hardware runs concurrently.
2071 * If the transaction has already happened we rely on the ordinary 2118 * If the transaction has already happened we rely on the ordinary
2072 * interrupt processing to process it. 2119 * interrupt processing to process it.
2073 */ 2120 */
2074void 2121void
2075uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2122uhci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2076{ 2123{
2077 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2124 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2078 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2125 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2079 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 2126 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private;
2080 uhci_soft_td_t *std; 2127 uhci_soft_td_t *std;
2081 int s; 
2082 int wake; 2128 int wake;
2083 2129
2084 DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status)); 2130 DPRINTFN(1,("uhci_abort_xfer: xfer=%p, status=%d\n", xfer, status));
2085 2131
2086 if (sc->sc_dying) { 2132 if (sc->sc_dying) {
2087 /* If we're dying, just do the software part. */ 2133 /* If we're dying, just do the software part. */
2088 s = splusb(); 2134 mutex_enter(&sc->sc_lock);
2089 xfer->status = status; /* make software ignore it */ 2135 xfer->status = status; /* make software ignore it */
2090 callout_stop(&xfer->timeout_handle); 2136 callout_stop(&xfer->timeout_handle);
2091 usb_transfer_complete(xfer); 2137 usb_transfer_complete(xfer);
2092 splx(s); 2138 mutex_exit(&sc->sc_lock);
2093 return; 2139 return;
2094 } 2140 }
2095 2141
2096 if (xfer->device->bus->intr_context || !curproc) 2142 if (xfer->device->bus->intr_context || !curproc)
2097 panic("uhci_abort_xfer: not in process context"); 2143 panic("uhci_abort_xfer: not in process context");
2098 2144
 2145 mutex_enter(&sc->sc_lock);
 2146
2099 /* 2147 /*
2100 * If an abort is already in progress then just wait for it to 2148 * If an abort is already in progress then just wait for it to
2101 * complete and return. 2149 * complete and return.
2102 */ 2150 */
2103 if (xfer->hcflags & UXFER_ABORTING) { 2151 if (xfer->hcflags & UXFER_ABORTING) {
2104 DPRINTFN(2, ("uhci_abort_xfer: already aborting\n")); 2152 DPRINTFN(2, ("uhci_abort_xfer: already aborting\n"));
2105#ifdef DIAGNOSTIC 2153#ifdef DIAGNOSTIC
2106 if (status == USBD_TIMEOUT) 2154 if (status == USBD_TIMEOUT)
2107 printf("uhci_abort_xfer: TIMEOUT while aborting\n"); 2155 printf("uhci_abort_xfer: TIMEOUT while aborting\n");
2108#endif 2156#endif
2109 /* Override the status which might be USBD_TIMEOUT. */ 2157 /* Override the status which might be USBD_TIMEOUT. */
2110 xfer->status = status; 2158 xfer->status = status;
2111 DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n")); 2159 DPRINTFN(2, ("uhci_abort_xfer: waiting for abort to finish\n"));
2112 xfer->hcflags |= UXFER_ABORTWAIT; 2160 xfer->hcflags |= UXFER_ABORTWAIT;
2113 while (xfer->hcflags & UXFER_ABORTING) 2161 while (xfer->hcflags & UXFER_ABORTING)
2114 tsleep(&xfer->hcflags, PZERO, "uhciaw", 0); 2162 cv_wait(&xfer->hccv, &sc->sc_lock);
2115 return; 2163 goto done;
2116 } 2164 }
2117 xfer->hcflags |= UXFER_ABORTING; 2165 xfer->hcflags |= UXFER_ABORTING;
2118 2166
2119 /* 2167 /*
2120 * Step 1: Make interrupt routine and hardware ignore xfer. 2168 * Step 1: Make interrupt routine and hardware ignore xfer.
2121 */ 2169 */
2122 s = splusb(); 
2123 xfer->status = status; /* make software ignore it */ 2170 xfer->status = status; /* make software ignore it */
2124 callout_stop(&xfer->timeout_handle); 2171 callout_stop(&xfer->timeout_handle);
2125 DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii)); 2172 DPRINTFN(1,("uhci_abort_xfer: stop ii=%p\n", ii));
2126 for (std = ii->stdstart; std != NULL; std = std->link.std) { 2173 for (std = ii->stdstart; std != NULL; std = std->link.std) {
2127 usb_syncmem(&std->dma, 2174 usb_syncmem(&std->dma,
2128 std->offs + offsetof(uhci_td_t, td_status), 2175 std->offs + offsetof(uhci_td_t, td_status),
2129 sizeof(std->td.td_status), 2176 sizeof(std->td.td_status),
2130 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2177 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2131 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2178 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
2132 usb_syncmem(&std->dma, 2179 usb_syncmem(&std->dma,
2133 std->offs + offsetof(uhci_td_t, td_status), 2180 std->offs + offsetof(uhci_td_t, td_status),
2134 sizeof(std->td.td_status), 2181 sizeof(std->td.td_status),
2135 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2182 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2136 } 2183 }
2137 splx(s); 
2138 2184
2139 /* 2185 /*
2140 * Step 2: Wait until we know hardware has finished any possible 2186 * Step 2: Wait until we know hardware has finished any possible
2141 * use of the xfer. Also make sure the soft interrupt routine 2187 * use of the xfer. Also make sure the soft interrupt routine
2142 * has run. 2188 * has run.
2143 */ 2189 */
2144 usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */ 2190 usb_delay_ms(upipe->pipe.device->bus, 2); /* Hardware finishes in 1ms */
2145 s = splusb(); 
2146#ifdef USB_USE_SOFTINTR 
2147 sc->sc_softwake = 1; 2191 sc->sc_softwake = 1;
2148#endif /* USB_USE_SOFTINTR */ 
2149 usb_schedsoftintr(&sc->sc_bus); 2192 usb_schedsoftintr(&sc->sc_bus);
2150#ifdef USB_USE_SOFTINTR 2193 DPRINTFN(1,("uhci_abort_xfer: cv_wait\n"));
2151 DPRINTFN(1,("uhci_abort_xfer: tsleep\n")); 2194 cv_wait(&sc->sc_softwake_cv, &sc->sc_lock);
2152 tsleep(&sc->sc_softwake, PZERO, "uhciab", 0); 
2153#endif /* USB_USE_SOFTINTR */ 
2154 splx(s); 
2155 2195
2156 /* 2196 /*
2157 * Step 3: Execute callback. 2197 * Step 3: Execute callback.
2158 */ 2198 */
2159 DPRINTFN(1,("uhci_abort_xfer: callback\n")); 2199 DPRINTFN(1,("uhci_abort_xfer: callback\n"));
2160 s = splusb(); 
2161#ifdef DIAGNOSTIC 2200#ifdef DIAGNOSTIC
2162 ii->isdone = 1; 2201 ii->isdone = 1;
2163#endif 2202#endif
2164 wake = xfer->hcflags & UXFER_ABORTWAIT; 2203 wake = xfer->hcflags & UXFER_ABORTWAIT;
2165 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT); 2204 xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
2166 usb_transfer_complete(xfer); 2205 usb_transfer_complete(xfer);
2167 if (wake) 2206 if (wake)
2168 wakeup(&xfer->hcflags); 2207 cv_broadcast(&xfer->hccv);
2169 splx(s); 2208done:
 2209 mutex_exit(&sc->sc_lock);
2170} 2210}
2171 2211
2172/* Close a device bulk pipe. */ 2212/* Close a device bulk pipe. */
2173void 2213void
2174uhci_device_bulk_close(usbd_pipe_handle pipe) 2214uhci_device_bulk_close(usbd_pipe_handle pipe)
2175{ 2215{
2176 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2216 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2177 usbd_device_handle dev = upipe->pipe.device; 2217 usbd_device_handle dev = upipe->pipe.device;
2178 uhci_softc_t *sc = dev->bus->hci_private; 2218 uhci_softc_t *sc = dev->bus->hci_private;
2179 2219
2180 uhci_free_sqh(sc, upipe->u.bulk.sqh); 2220 uhci_free_sqh(sc, upipe->u.bulk.sqh);
2181 2221
2182 pipe->endpoint->datatoggle = upipe->nexttoggle; 2222 pipe->endpoint->datatoggle = upipe->nexttoggle;
2183} 2223}
2184 2224
2185usbd_status 2225usbd_status
2186uhci_device_ctrl_transfer(usbd_xfer_handle xfer) 2226uhci_device_ctrl_transfer(usbd_xfer_handle xfer)
2187{ 2227{
 2228 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2188 usbd_status err; 2229 usbd_status err;
2189 2230
2190 /* Insert last in queue. */ 2231 /* Insert last in queue. */
 2232 mutex_enter(&sc->sc_lock);
2191 err = usb_insert_transfer(xfer); 2233 err = usb_insert_transfer(xfer);
 2234 mutex_exit(&sc->sc_lock);
2192 if (err) 2235 if (err)
2193 return (err); 2236 return (err);
2194 2237
2195 /* 2238 /*
2196 * Pipe isn't running (otherwise err would be USBD_INPROG), 2239 * Pipe isn't running (otherwise err would be USBD_INPROG),
2197 * so start it first. 2240 * so start it first.
2198 */ 2241 */
2199 return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2242 return (uhci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2200} 2243}
2201 2244
2202usbd_status 2245usbd_status
2203uhci_device_ctrl_start(usbd_xfer_handle xfer) 2246uhci_device_ctrl_start(usbd_xfer_handle xfer)
2204{ 2247{
2205 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 2248 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2206 usbd_status err; 2249 usbd_status err;
2207 2250
2208 if (sc->sc_dying) 2251 if (sc->sc_dying)
2209 return (USBD_IOERROR); 2252 return (USBD_IOERROR);
2210 2253
2211#ifdef DIAGNOSTIC 2254#ifdef DIAGNOSTIC
2212 if (!(xfer->rqflags & URQ_REQUEST)) 2255 if (!(xfer->rqflags & URQ_REQUEST))
2213 panic("uhci_device_ctrl_transfer: not a request"); 2256 panic("uhci_device_ctrl_transfer: not a request");
2214#endif 2257#endif
2215 2258
 2259 mutex_enter(&sc->sc_lock);
2216 err = uhci_device_request(xfer); 2260 err = uhci_device_request(xfer);
 2261 mutex_exit(&sc->sc_lock);
2217 if (err) 2262 if (err)
2218 return (err); 2263 return (err);
2219 2264
2220 if (sc->sc_bus.use_polling) 2265 if (sc->sc_bus.use_polling)
2221 uhci_waitintr(sc, xfer); 2266 uhci_waitintr(sc, xfer);
2222 return (USBD_IN_PROGRESS); 2267 return (USBD_IN_PROGRESS);
2223} 2268}
2224 2269
2225usbd_status 2270usbd_status
2226uhci_device_intr_transfer(usbd_xfer_handle xfer) 2271uhci_device_intr_transfer(usbd_xfer_handle xfer)
2227{ 2272{
 2273 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2228 usbd_status err; 2274 usbd_status err;
2229 2275
2230 /* Insert last in queue. */ 2276 /* Insert last in queue. */
 2277 mutex_enter(&sc->sc_lock);
2231 err = usb_insert_transfer(xfer); 2278 err = usb_insert_transfer(xfer);
 2279 mutex_exit(&sc->sc_lock);
2232 if (err) 2280 if (err)
2233 return (err); 2281 return (err);
2234 2282
2235 /* 2283 /*
2236 * Pipe isn't running (otherwise err would be USBD_INPROG), 2284 * Pipe isn't running (otherwise err would be USBD_INPROG),
2237 * so start it first. 2285 * so start it first.
2238 */ 2286 */
2239 return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2287 return (uhci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2240} 2288}
2241 2289
2242usbd_status 2290usbd_status
2243uhci_device_intr_start(usbd_xfer_handle xfer) 2291uhci_device_intr_start(usbd_xfer_handle xfer)
2244{ 2292{
2245 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2293 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2246 usbd_device_handle dev = upipe->pipe.device; 2294 usbd_device_handle dev = upipe->pipe.device;
2247 uhci_softc_t *sc = dev->bus->hci_private; 2295 uhci_softc_t *sc = dev->bus->hci_private;
2248 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2296 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2249 uhci_soft_td_t *data, *dataend; 2297 uhci_soft_td_t *data, *dataend;
2250 uhci_soft_qh_t *sqh; 2298 uhci_soft_qh_t *sqh;
2251 usbd_status err; 2299 usbd_status err;
2252 int isread, endpt; 2300 int isread, endpt;
2253 int i, s; 2301 int i;
2254 2302
2255 if (sc->sc_dying) 2303 if (sc->sc_dying)
2256 return (USBD_IOERROR); 2304 return (USBD_IOERROR);
2257 2305
2258 DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n", 2306 DPRINTFN(3,("uhci_device_intr_transfer: xfer=%p len=%d flags=%d\n",
2259 xfer, xfer->length, xfer->flags)); 2307 xfer, xfer->length, xfer->flags));
2260 2308
2261#ifdef DIAGNOSTIC 2309#ifdef DIAGNOSTIC
2262 if (xfer->rqflags & URQ_REQUEST) 2310 if (xfer->rqflags & URQ_REQUEST)
2263 panic("uhci_device_intr_transfer: a request"); 2311 panic("uhci_device_intr_transfer: a request");
2264#endif 2312#endif
2265 2313
2266 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2314 endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2267 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2315 isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2268 2316
2269 upipe->u.intr.isread = isread; 2317 upipe->u.intr.isread = isread;
2270 2318
2271 err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread, 2319 err = uhci_alloc_std_chain(upipe, sc, xfer->length, isread,
2272 xfer->flags, &xfer->dmabuf, &data, 2320 xfer->flags, &xfer->dmabuf, &data,
2273 &dataend); 2321 &dataend);
2274 if (err) 2322 if (err)
2275 return (err); 2323 return (err);
2276 dataend->td.td_status |= htole32(UHCI_TD_IOC); 2324 dataend->td.td_status |= htole32(UHCI_TD_IOC);
2277 usb_syncmem(&dataend->dma, 2325 usb_syncmem(&dataend->dma,
2278 dataend->offs + offsetof(uhci_td_t, td_status), 2326 dataend->offs + offsetof(uhci_td_t, td_status),
2279 sizeof(dataend->td.td_status), 2327 sizeof(dataend->td.td_status),
2280 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2328 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2281 2329
2282#ifdef UHCI_DEBUG 2330#ifdef UHCI_DEBUG
2283 if (uhcidebug > 10) { 2331 if (uhcidebug > 10) {
2284 DPRINTF(("uhci_device_intr_transfer: data(1)\n")); 2332 DPRINTF(("uhci_device_intr_transfer: data(1)\n"));
2285 uhci_dump_tds(data); 2333 uhci_dump_tds(data);
2286 uhci_dump_qh(upipe->u.intr.qhs[0]); 2334 uhci_dump_qh(upipe->u.intr.qhs[0]);
2287 } 2335 }
2288#endif 2336#endif
2289 2337
2290 s = splusb(); 2338 mutex_enter(&sc->sc_lock);
2291 /* Set up interrupt info. */ 2339 /* Set up interrupt info. */
2292 ii->xfer = xfer; 2340 ii->xfer = xfer;
2293 ii->stdstart = data; 2341 ii->stdstart = data;
2294 ii->stdend = dataend; 2342 ii->stdend = dataend;
2295#ifdef DIAGNOSTIC 2343#ifdef DIAGNOSTIC
2296 if (!ii->isdone) { 2344 if (!ii->isdone) {
2297 printf("uhci_device_intr_transfer: not done, ii=%p\n", ii); 2345 printf("uhci_device_intr_transfer: not done, ii=%p\n", ii);
2298 } 2346 }
2299 ii->isdone = 0; 2347 ii->isdone = 0;
2300#endif 2348#endif
2301 2349
2302 DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n", 2350 DPRINTFN(10,("uhci_device_intr_transfer: qhs[0]=%p\n",
2303 upipe->u.intr.qhs[0])); 2351 upipe->u.intr.qhs[0]));
2304 for (i = 0; i < upipe->u.intr.npoll; i++) { 2352 for (i = 0; i < upipe->u.intr.npoll; i++) {
2305 sqh = upipe->u.intr.qhs[i]; 2353 sqh = upipe->u.intr.qhs[i];
2306 sqh->elink = data; 2354 sqh->elink = data;
2307 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 2355 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
2308 usb_syncmem(&sqh->dma, 2356 usb_syncmem(&sqh->dma,
2309 sqh->offs + offsetof(uhci_qh_t, qh_elink), 2357 sqh->offs + offsetof(uhci_qh_t, qh_elink),
2310 sizeof(sqh->qh.qh_elink), 2358 sizeof(sqh->qh.qh_elink),
2311 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2359 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2312 } 2360 }
2313 uhci_add_intr_info(sc, ii); 2361 uhci_add_intr_info(sc, ii);
2314 xfer->status = USBD_IN_PROGRESS; 2362 xfer->status = USBD_IN_PROGRESS;
2315 splx(s); 2363 mutex_exit(&sc->sc_lock);
2316 2364
2317#ifdef UHCI_DEBUG 2365#ifdef UHCI_DEBUG
2318 if (uhcidebug > 10) { 2366 if (uhcidebug > 10) {
2319 DPRINTF(("uhci_device_intr_transfer: data(2)\n")); 2367 DPRINTF(("uhci_device_intr_transfer: data(2)\n"));
2320 uhci_dump_tds(data); 2368 uhci_dump_tds(data);
2321 uhci_dump_qh(upipe->u.intr.qhs[0]); 2369 uhci_dump_qh(upipe->u.intr.qhs[0]);
2322 } 2370 }
2323#endif 2371#endif
2324 2372
2325 return (USBD_IN_PROGRESS); 2373 return (USBD_IN_PROGRESS);
2326} 2374}
2327 2375
2328/* Abort a device control request. */ 2376/* Abort a device control request. */
2329void 2377void
2330uhci_device_ctrl_abort(usbd_xfer_handle xfer) 2378uhci_device_ctrl_abort(usbd_xfer_handle xfer)
2331{ 2379{
2332 DPRINTF(("uhci_device_ctrl_abort:\n")); 2380 DPRINTF(("uhci_device_ctrl_abort:\n"));
2333 uhci_abort_xfer(xfer, USBD_CANCELLED); 2381 uhci_abort_xfer(xfer, USBD_CANCELLED);
2334} 2382}
2335 2383
2336/* Close a device control pipe. */ 2384/* Close a device control pipe. */
2337void 2385void
2338uhci_device_ctrl_close(usbd_pipe_handle pipe) 2386uhci_device_ctrl_close(usbd_pipe_handle pipe)
2339{ 2387{
2340} 2388}
2341 2389
2342/* Abort a device interrupt request. */ 2390/* Abort a device interrupt request. */
2343void 2391void
2344uhci_device_intr_abort(usbd_xfer_handle xfer) 2392uhci_device_intr_abort(usbd_xfer_handle xfer)
2345{ 2393{
2346 DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer)); 2394 DPRINTFN(1,("uhci_device_intr_abort: xfer=%p\n", xfer));
2347 if (xfer->pipe->intrxfer == xfer) { 2395 if (xfer->pipe->intrxfer == xfer) {
2348 DPRINTFN(1,("uhci_device_intr_abort: remove\n")); 2396 DPRINTFN(1,("uhci_device_intr_abort: remove\n"));
2349 xfer->pipe->intrxfer = NULL; 2397 xfer->pipe->intrxfer = NULL;
2350 } 2398 }
2351 uhci_abort_xfer(xfer, USBD_CANCELLED); 2399 uhci_abort_xfer(xfer, USBD_CANCELLED);
2352} 2400}
2353 2401
2354/* Close a device interrupt pipe. */ 2402/* Close a device interrupt pipe. */
2355void 2403void
2356uhci_device_intr_close(usbd_pipe_handle pipe) 2404uhci_device_intr_close(usbd_pipe_handle pipe)
2357{ 2405{
2358 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2406 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2359 uhci_softc_t *sc = pipe->device->bus->hci_private; 2407 uhci_softc_t *sc = pipe->device->bus->hci_private;
2360 int i, npoll; 2408 int i, npoll;
2361 int s; 
2362 2409
2363 /* Unlink descriptors from controller data structures. */ 2410 /* Unlink descriptors from controller data structures. */
2364 npoll = upipe->u.intr.npoll; 2411 npoll = upipe->u.intr.npoll;
2365 s = splusb(); 2412 mutex_enter(&sc->sc_lock);
2366 for (i = 0; i < npoll; i++) 2413 for (i = 0; i < npoll; i++)
2367 uhci_remove_intr(sc, upipe->u.intr.qhs[i]); 2414 uhci_remove_intr(sc, upipe->u.intr.qhs[i]);
2368 splx(s); 2415 mutex_exit(&sc->sc_lock);
2369 2416
2370 /* 2417 /*
2371 * We now have to wait for any activity on the physical 2418 * We now have to wait for any activity on the physical
2372 * descriptors to stop. 2419 * descriptors to stop.
2373 */ 2420 */
2374 usb_delay_ms(&sc->sc_bus, 2); 2421 usb_delay_ms(&sc->sc_bus, 2);
2375 2422
2376 for(i = 0; i < npoll; i++) 2423 for(i = 0; i < npoll; i++)
2377 uhci_free_sqh(sc, upipe->u.intr.qhs[i]); 2424 uhci_free_sqh(sc, upipe->u.intr.qhs[i]);
2378 free(upipe->u.intr.qhs, M_USBHC); 2425 kmem_free(upipe->u.intr.qhs, npoll * sizeof(uhci_soft_qh_t *));
2379 2426
2380 /* XXX free other resources */ 2427 /* XXX free other resources */
2381} 2428}
2382 2429
2383usbd_status 2430usbd_status
2384uhci_device_request(usbd_xfer_handle xfer) 2431uhci_device_request(usbd_xfer_handle xfer)
2385{ 2432{
2386 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2433 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2387 usb_device_request_t *req = &xfer->request; 2434 usb_device_request_t *req = &xfer->request;
2388 usbd_device_handle dev = upipe->pipe.device; 2435 usbd_device_handle dev = upipe->pipe.device;
2389 uhci_softc_t *sc = dev->bus->hci_private; 2436 uhci_softc_t *sc = dev->bus->hci_private;
2390 int addr = dev->address; 2437 int addr = dev->address;
2391 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2438 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2392 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2439 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2393 uhci_soft_td_t *setup, *data, *stat, *next, *dataend; 2440 uhci_soft_td_t *setup, *data, *stat, *next, *dataend;
2394 uhci_soft_qh_t *sqh; 2441 uhci_soft_qh_t *sqh;
2395 int len; 2442 int len;
2396 u_int32_t ls; 2443 u_int32_t ls;
2397 usbd_status err; 2444 usbd_status err;
2398 int isread; 2445 int isread;
2399 int s; 2446
 2447 KASSERT(mutex_owned(&sc->sc_lock));
2400 2448
2401 DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, " 2449 DPRINTFN(3,("uhci_device_control type=0x%02x, request=0x%02x, "
2402 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 2450 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
2403 req->bmRequestType, req->bRequest, UGETW(req->wValue), 2451 req->bmRequestType, req->bRequest, UGETW(req->wValue),
2404 UGETW(req->wIndex), UGETW(req->wLength), 2452 UGETW(req->wIndex), UGETW(req->wLength),
2405 addr, endpt)); 2453 addr, endpt));
2406 2454
2407 ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0; 2455 ls = dev->speed == USB_SPEED_LOW ? UHCI_TD_LS : 0;
2408 isread = req->bmRequestType & UT_READ; 2456 isread = req->bmRequestType & UT_READ;
2409 len = UGETW(req->wLength); 2457 len = UGETW(req->wLength);
2410 2458
2411 setup = upipe->u.ctl.setup; 2459 setup = upipe->u.ctl.setup;
2412 stat = upipe->u.ctl.stat; 2460 stat = upipe->u.ctl.stat;
2413 sqh = upipe->u.ctl.sqh; 2461 sqh = upipe->u.ctl.sqh;
2414 2462
2415 /* Set up data transaction */ 2463 /* Set up data transaction */
2416 if (len != 0) { 2464 if (len != 0) {
2417 upipe->nexttoggle = 1; 2465 upipe->nexttoggle = 1;
2418 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags, 2466 err = uhci_alloc_std_chain(upipe, sc, len, isread, xfer->flags,
2419 &xfer->dmabuf, &data, &dataend); 2467 &xfer->dmabuf, &data, &dataend);
2420 if (err) 2468 if (err)
2421 return (err); 2469 return (err);
2422 next = data; 2470 next = data;
2423 dataend->link.std = stat; 2471 dataend->link.std = stat;
2424 dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2472 dataend->td.td_link = htole32(stat->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
2425 usb_syncmem(&dataend->dma, 2473 usb_syncmem(&dataend->dma,
2426 dataend->offs + offsetof(uhci_td_t, td_link), 2474 dataend->offs + offsetof(uhci_td_t, td_link),
2427 sizeof(dataend->td.td_link), 2475 sizeof(dataend->td.td_link),
2428 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2476 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2429 } else { 2477 } else {
2430 next = stat; 2478 next = stat;
2431 } 2479 }
2432 upipe->u.ctl.length = len; 2480 upipe->u.ctl.length = len;
2433 2481
2434 memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req); 2482 memcpy(KERNADDR(&upipe->u.ctl.reqdma, 0), req, sizeof *req);
2435 usb_syncmem(&upipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE); 2483 usb_syncmem(&upipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE);
2436 2484
2437 setup->link.std = next; 2485 setup->link.std = next;
2438 setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD); 2486 setup->td.td_link = htole32(next->physaddr | UHCI_PTR_VF | UHCI_PTR_TD);
2439 setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2487 setup->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
2440 UHCI_TD_ACTIVE); 2488 UHCI_TD_ACTIVE);
2441 setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr)); 2489 setup->td.td_token = htole32(UHCI_TD_SETUP(sizeof *req, endpt, addr));
2442 setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0)); 2490 setup->td.td_buffer = htole32(DMAADDR(&upipe->u.ctl.reqdma, 0));
2443 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td), 2491 usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td),
2444 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2492 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2445 2493
2446 stat->link.std = NULL; 2494 stat->link.std = NULL;
2447 stat->td.td_link = htole32(UHCI_PTR_T); 2495 stat->td.td_link = htole32(UHCI_PTR_T);
2448 stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls | 2496 stat->td.td_status = htole32(UHCI_TD_SET_ERRCNT(3) | ls |
2449 UHCI_TD_ACTIVE | UHCI_TD_IOC); 2497 UHCI_TD_ACTIVE | UHCI_TD_IOC);
2450 stat->td.td_token = 2498 stat->td.td_token =
2451 htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) : 2499 htole32(isread ? UHCI_TD_OUT(0, endpt, addr, 1) :
2452 UHCI_TD_IN (0, endpt, addr, 1)); 2500 UHCI_TD_IN (0, endpt, addr, 1));
2453 stat->td.td_buffer = htole32(0); 2501 stat->td.td_buffer = htole32(0);
2454 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td), 2502 usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td),
2455 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2503 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2456 2504
2457#ifdef UHCI_DEBUG 2505#ifdef UHCI_DEBUG
2458 if (uhcidebug > 10) { 2506 if (uhcidebug > 10) {
2459 DPRINTF(("uhci_device_request: before transfer\n")); 2507 DPRINTF(("uhci_device_request: before transfer\n"));
2460 uhci_dump_tds(setup); 2508 uhci_dump_tds(setup);
2461 } 2509 }
2462#endif 2510#endif
2463 2511
2464 /* Set up interrupt info. */ 2512 /* Set up interrupt info. */
2465 ii->xfer = xfer; 2513 ii->xfer = xfer;
2466 ii->stdstart = setup; 2514 ii->stdstart = setup;
2467 ii->stdend = stat; 2515 ii->stdend = stat;
2468#ifdef DIAGNOSTIC 2516#ifdef DIAGNOSTIC
2469 if (!ii->isdone) { 2517 if (!ii->isdone) {
2470 printf("uhci_device_request: not done, ii=%p\n", ii); 2518 printf("uhci_device_request: not done, ii=%p\n", ii);
2471 } 2519 }
2472 ii->isdone = 0; 2520 ii->isdone = 0;
2473#endif 2521#endif
2474 2522
2475 sqh->elink = setup; 2523 sqh->elink = setup;
2476 sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD); 2524 sqh->qh.qh_elink = htole32(setup->physaddr | UHCI_PTR_TD);
2477 /* uhci_add_?s_ctrl() will do usb_syncmem(sqh) */ 2525 /* uhci_add_?s_ctrl() will do usb_syncmem(sqh) */
2478 2526
2479 s = splusb(); 
2480 if (dev->speed == USB_SPEED_LOW) 2527 if (dev->speed == USB_SPEED_LOW)
2481 uhci_add_ls_ctrl(sc, sqh); 2528 uhci_add_ls_ctrl(sc, sqh);
2482 else 2529 else
2483 uhci_add_hs_ctrl(sc, sqh); 2530 uhci_add_hs_ctrl(sc, sqh);
2484 uhci_add_intr_info(sc, ii); 2531 uhci_add_intr_info(sc, ii);
2485#ifdef UHCI_DEBUG 2532#ifdef UHCI_DEBUG
2486 if (uhcidebug > 12) { 2533 if (uhcidebug > 12) {
2487 uhci_soft_td_t *std; 2534 uhci_soft_td_t *std;
2488 uhci_soft_qh_t *xqh; 2535 uhci_soft_qh_t *xqh;
2489 uhci_soft_qh_t *sxqh; 2536 uhci_soft_qh_t *sxqh;
2490 int maxqh = 0; 2537 int maxqh = 0;
2491 uhci_physaddr_t link; 2538 uhci_physaddr_t link;
2492 DPRINTF(("uhci_enter_ctl_q: follow from [0]\n")); 2539 DPRINTF(("uhci_enter_ctl_q: follow from [0]\n"));
2493 for (std = sc->sc_vframes[0].htd, link = 0; 2540 for (std = sc->sc_vframes[0].htd, link = 0;
2494 (link & UHCI_PTR_QH) == 0; 2541 (link & UHCI_PTR_QH) == 0;
2495 std = std->link.std) { 2542 std = std->link.std) {
2496 link = le32toh(std->td.td_link); 2543 link = le32toh(std->td.td_link);
2497 uhci_dump_td(std); 2544 uhci_dump_td(std);
2498 } 2545 }
2499 sxqh = (uhci_soft_qh_t *)std; 2546 sxqh = (uhci_soft_qh_t *)std;
2500 uhci_dump_qh(sxqh); 2547 uhci_dump_qh(sxqh);
2501 for (xqh = sxqh; 2548 for (xqh = sxqh;
2502 xqh != NULL; 2549 xqh != NULL;
2503 xqh = (maxqh++ == 5 || xqh->hlink == sxqh || 2550 xqh = (maxqh++ == 5 || xqh->hlink == sxqh ||
2504 xqh->hlink == xqh ? NULL : xqh->hlink)) { 2551 xqh->hlink == xqh ? NULL : xqh->hlink)) {
2505 uhci_dump_qh(xqh); 2552 uhci_dump_qh(xqh);
2506 } 2553 }
2507 DPRINTF(("Enqueued QH:\n")); 2554 DPRINTF(("Enqueued QH:\n"));
2508 uhci_dump_qh(sqh); 2555 uhci_dump_qh(sqh);
2509 uhci_dump_tds(sqh->elink); 2556 uhci_dump_tds(sqh->elink);
2510 } 2557 }
2511#endif 2558#endif
2512 if (xfer->timeout && !sc->sc_bus.use_polling) { 2559 if (xfer->timeout && !sc->sc_bus.use_polling) {
2513 callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout), 2560 callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout),
2514 uhci_timeout, ii); 2561 uhci_timeout, ii);
2515 } 2562 }
2516 xfer->status = USBD_IN_PROGRESS; 2563 xfer->status = USBD_IN_PROGRESS;
2517 splx(s); 
2518 2564
2519 return (USBD_NORMAL_COMPLETION); 2565 return (USBD_NORMAL_COMPLETION);
2520} 2566}
2521 2567
2522usbd_status 2568usbd_status
2523uhci_device_isoc_transfer(usbd_xfer_handle xfer) 2569uhci_device_isoc_transfer(usbd_xfer_handle xfer)
2524{ 2570{
 2571 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2525 usbd_status err; 2572 usbd_status err;
2526 2573
2527 DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer)); 2574 DPRINTFN(5,("uhci_device_isoc_transfer: xfer=%p\n", xfer));
2528 2575
2529 /* Put it on our queue, */ 2576 /* Put it on our queue, */
 2577 mutex_enter(&sc->sc_lock);
2530 err = usb_insert_transfer(xfer); 2578 err = usb_insert_transfer(xfer);
 2579 mutex_exit(&sc->sc_lock);
2531 2580
2532 /* bail out on error, */ 2581 /* bail out on error, */
2533 if (err && err != USBD_IN_PROGRESS) 2582 if (err && err != USBD_IN_PROGRESS)
2534 return (err); 2583 return (err);
2535 2584
2536 /* XXX should check inuse here */ 2585 /* XXX should check inuse here */
2537 2586
2538 /* insert into schedule, */ 2587 /* insert into schedule, */
2539 uhci_device_isoc_enter(xfer); 2588 uhci_device_isoc_enter(xfer);
2540 2589
2541 /* and start if the pipe wasn't running */ 2590 /* and start if the pipe wasn't running */
2542 if (!err) 2591 if (!err)
2543 uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 2592 uhci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
2544 2593
2545 return (err); 2594 return (err);
2546} 2595}
2547 2596
2548void 2597void
2549uhci_device_isoc_enter(usbd_xfer_handle xfer) 2598uhci_device_isoc_enter(usbd_xfer_handle xfer)
2550{ 2599{
2551 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2600 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2552 usbd_device_handle dev = upipe->pipe.device; 2601 usbd_device_handle dev = upipe->pipe.device;
2553 uhci_softc_t *sc = dev->bus->hci_private; 2602 uhci_softc_t *sc = dev->bus->hci_private;
2554 struct iso *iso = &upipe->u.iso; 2603 struct iso *iso = &upipe->u.iso;
2555 uhci_soft_td_t *std; 2604 uhci_soft_td_t *std;
2556 u_int32_t buf, len, status, offs; 2605 u_int32_t buf, len, status, offs;
2557 int s, i, next, nframes; 2606 int i, next, nframes;
2558 int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN; 2607 int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN;
2559 2608
2560 DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p " 2609 DPRINTFN(5,("uhci_device_isoc_enter: used=%d next=%d xfer=%p "
2561 "nframes=%d\n", 2610 "nframes=%d\n",
2562 iso->inuse, iso->next, xfer, xfer->nframes)); 2611 iso->inuse, iso->next, xfer, xfer->nframes));
2563 2612
2564 if (sc->sc_dying) 2613 if (sc->sc_dying)
2565 return; 2614 return;
2566 2615
2567 if (xfer->status == USBD_IN_PROGRESS) { 2616 if (xfer->status == USBD_IN_PROGRESS) {
2568 /* This request has already been entered into the frame list */ 2617 /* This request has already been entered into the frame list */
2569 printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer); 2618 printf("uhci_device_isoc_enter: xfer=%p in frame list\n", xfer);
2570 /* XXX */ 2619 /* XXX */
2571 } 2620 }
2572 2621
2573#ifdef DIAGNOSTIC 2622#ifdef DIAGNOSTIC
2574 if (iso->inuse >= UHCI_VFRAMELIST_COUNT) 2623 if (iso->inuse >= UHCI_VFRAMELIST_COUNT)
2575 printf("uhci_device_isoc_enter: overflow!\n"); 2624 printf("uhci_device_isoc_enter: overflow!\n");
2576#endif 2625#endif
2577 2626
2578 next = iso->next; 2627 next = iso->next;
2579 if (next == -1) { 2628 if (next == -1) {
2580 /* Not in use yet, schedule it a few frames ahead. */ 2629 /* Not in use yet, schedule it a few frames ahead. */
2581 next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT; 2630 next = (UREAD2(sc, UHCI_FRNUM) + 3) % UHCI_VFRAMELIST_COUNT;
2582 DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next)); 2631 DPRINTFN(2,("uhci_device_isoc_enter: start next=%d\n", next));
2583 } 2632 }
2584 2633
2585 xfer->status = USBD_IN_PROGRESS; 2634 xfer->status = USBD_IN_PROGRESS;
2586 UXFER(xfer)->curframe = next; 2635 UXFER(xfer)->curframe = next;
2587 2636
2588 buf = DMAADDR(&xfer->dmabuf, 0); 2637 buf = DMAADDR(&xfer->dmabuf, 0);
2589 offs = 0; 2638 offs = 0;
2590 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) | 2639 status = UHCI_TD_ZERO_ACTLEN(UHCI_TD_SET_ERRCNT(0) |
2591 UHCI_TD_ACTIVE | 2640 UHCI_TD_ACTIVE |
2592 UHCI_TD_IOS); 2641 UHCI_TD_IOS);
2593 nframes = xfer->nframes; 2642 nframes = xfer->nframes;
2594 s = splusb(); 2643 mutex_enter(&sc->sc_lock);
2595 for (i = 0; i < nframes; i++) { 2644 for (i = 0; i < nframes; i++) {
2596 std = iso->stds[next]; 2645 std = iso->stds[next];
2597 if (++next >= UHCI_VFRAMELIST_COUNT) 2646 if (++next >= UHCI_VFRAMELIST_COUNT)
2598 next = 0; 2647 next = 0;
2599 len = xfer->frlengths[i]; 2648 len = xfer->frlengths[i];
2600 std->td.td_buffer = htole32(buf); 2649 std->td.td_buffer = htole32(buf);
2601 usb_syncmem(&xfer->dmabuf, offs, len,  2650 usb_syncmem(&xfer->dmabuf, offs, len,
2602 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 2651 rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
2603 if (i == nframes - 1) 2652 if (i == nframes - 1)
2604 status |= UHCI_TD_IOC; 2653 status |= UHCI_TD_IOC;
2605 std->td.td_status = htole32(status); 2654 std->td.td_status = htole32(status);
2606 std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK); 2655 std->td.td_token &= htole32(~UHCI_TD_MAXLEN_MASK);
2607 std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len)); 2656 std->td.td_token |= htole32(UHCI_TD_SET_MAXLEN(len));
2608 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2657 usb_syncmem(&std->dma, std->offs, sizeof(std->td),
2609 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2658 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2610#ifdef UHCI_DEBUG 2659#ifdef UHCI_DEBUG
2611 if (uhcidebug > 5) { 2660 if (uhcidebug > 5) {
2612 DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i)); 2661 DPRINTFN(5,("uhci_device_isoc_enter: TD %d\n", i));
2613 uhci_dump_td(std); 2662 uhci_dump_td(std);
2614 } 2663 }
2615#endif 2664#endif
2616 buf += len; 2665 buf += len;
2617 offs += len; 2666 offs += len;
2618 } 2667 }
2619 iso->next = next; 2668 iso->next = next;
2620 iso->inuse += xfer->nframes; 2669 iso->inuse += xfer->nframes;
2621 2670
2622 splx(s); 2671 mutex_exit(&sc->sc_lock);
2623} 2672}
2624 2673
2625usbd_status 2674usbd_status
2626uhci_device_isoc_start(usbd_xfer_handle xfer) 2675uhci_device_isoc_start(usbd_xfer_handle xfer)
2627{ 2676{
2628 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2677 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2629 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private; 2678 uhci_softc_t *sc = upipe->pipe.device->bus->hci_private;
2630 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2679 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2631 uhci_soft_td_t *end; 2680 uhci_soft_td_t *end;
2632 int s, i; 2681 int i;
2633 2682
2634 DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer)); 2683 DPRINTFN(5,("uhci_device_isoc_start: xfer=%p\n", xfer));
2635 2684
2636 if (sc->sc_dying) 2685 mutex_enter(&sc->sc_lock);
 2686
 2687 if (sc->sc_dying) {
 2688 mutex_exit(&sc->sc_lock);
2637 return (USBD_IOERROR); 2689 return (USBD_IOERROR);
 2690 }
2638 2691
2639#ifdef DIAGNOSTIC 2692#ifdef DIAGNOSTIC
2640 if (xfer->status != USBD_IN_PROGRESS) 2693 if (xfer->status != USBD_IN_PROGRESS)
2641 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 2694 printf("uhci_device_isoc_start: not in progress %p\n", xfer);
2642#endif 2695#endif
2643 2696
2644 /* Find the last TD */ 2697 /* Find the last TD */
2645 i = UXFER(xfer)->curframe + xfer->nframes; 2698 i = UXFER(xfer)->curframe + xfer->nframes;
2646 if (i >= UHCI_VFRAMELIST_COUNT) 2699 if (i >= UHCI_VFRAMELIST_COUNT)
2647 i -= UHCI_VFRAMELIST_COUNT; 2700 i -= UHCI_VFRAMELIST_COUNT;
2648 end = upipe->u.iso.stds[i]; 2701 end = upipe->u.iso.stds[i];
2649 2702
2650#ifdef DIAGNOSTIC 2703#ifdef DIAGNOSTIC
2651 if (end == NULL) { 2704 if (end == NULL) {
2652 printf("uhci_device_isoc_start: end == NULL\n"); 2705 printf("uhci_device_isoc_start: end == NULL\n");
2653 return (USBD_INVAL); 2706 return (USBD_INVAL);
2654 } 2707 }
2655#endif 2708#endif
2656 2709
2657 s = splusb(); 
2658 
2659 /* Set up interrupt info. */ 2710 /* Set up interrupt info. */
2660 ii->xfer = xfer; 2711 ii->xfer = xfer;
2661 ii->stdstart = end; 2712 ii->stdstart = end;
2662 ii->stdend = end; 2713 ii->stdend = end;
2663#ifdef DIAGNOSTIC 2714#ifdef DIAGNOSTIC
2664 if (!ii->isdone) 2715 if (!ii->isdone)
2665 printf("uhci_device_isoc_start: not done, ii=%p\n", ii); 2716 printf("uhci_device_isoc_start: not done, ii=%p\n", ii);
2666 ii->isdone = 0; 2717 ii->isdone = 0;
2667#endif 2718#endif
2668 uhci_add_intr_info(sc, ii); 2719 uhci_add_intr_info(sc, ii);
2669 2720
2670 splx(s); 2721 mutex_exit(&sc->sc_lock);
2671 2722
2672 return (USBD_IN_PROGRESS); 2723 return (USBD_IN_PROGRESS);
2673} 2724}
2674 2725
2675void 2726void
2676uhci_device_isoc_abort(usbd_xfer_handle xfer) 2727uhci_device_isoc_abort(usbd_xfer_handle xfer)
2677{ 2728{
 2729 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2678 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2730 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2679 uhci_soft_td_t **stds = upipe->u.iso.stds; 2731 uhci_soft_td_t **stds = upipe->u.iso.stds;
2680 uhci_soft_td_t *std; 2732 uhci_soft_td_t *std;
2681 int i, n, s, nframes, maxlen, len; 2733 int i, n, nframes, maxlen, len;
2682 2734
2683 s = splusb(); 2735 mutex_enter(&sc->sc_lock);
2684 2736
2685 /* Transfer is already done. */ 2737 /* Transfer is already done. */
2686 if (xfer->status != USBD_NOT_STARTED && 2738 if (xfer->status != USBD_NOT_STARTED &&
2687 xfer->status != USBD_IN_PROGRESS) { 2739 xfer->status != USBD_IN_PROGRESS) {
2688 splx(s); 2740 mutex_exit(&sc->sc_lock);
2689 return; 2741 return;
2690 } 2742 }
2691 2743
2692 /* Give xfer the requested abort code. */ 2744 /* Give xfer the requested abort code. */
2693 xfer->status = USBD_CANCELLED; 2745 xfer->status = USBD_CANCELLED;
2694 2746
2695 /* make hardware ignore it, */ 2747 /* make hardware ignore it, */
2696 nframes = xfer->nframes; 2748 nframes = xfer->nframes;
2697 n = UXFER(xfer)->curframe; 2749 n = UXFER(xfer)->curframe;
2698 maxlen = 0; 2750 maxlen = 0;
2699 for (i = 0; i < nframes; i++) { 2751 for (i = 0; i < nframes; i++) {
2700 std = stds[n]; 2752 std = stds[n];
2701 usb_syncmem(&std->dma, 2753 usb_syncmem(&std->dma,
2702 std->offs + offsetof(uhci_td_t, td_status), 2754 std->offs + offsetof(uhci_td_t, td_status),
2703 sizeof(std->td.td_status), 2755 sizeof(std->td.td_status),
2704 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2756 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2705 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC)); 2757 std->td.td_status &= htole32(~(UHCI_TD_ACTIVE | UHCI_TD_IOC));
2706 usb_syncmem(&std->dma, 2758 usb_syncmem(&std->dma,
2707 std->offs + offsetof(uhci_td_t, td_status), 2759 std->offs + offsetof(uhci_td_t, td_status),
2708 sizeof(std->td.td_status), 2760 sizeof(std->td.td_status),
2709 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2761 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2710 usb_syncmem(&std->dma, 2762 usb_syncmem(&std->dma,
2711 std->offs + offsetof(uhci_td_t, td_token), 2763 std->offs + offsetof(uhci_td_t, td_token),
2712 sizeof(std->td.td_token), 2764 sizeof(std->td.td_token),
2713 BUS_DMASYNC_POSTWRITE); 2765 BUS_DMASYNC_POSTWRITE);
2714 len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token)); 2766 len = UHCI_TD_GET_MAXLEN(le32toh(std->td.td_token));
2715 if (len > maxlen) 2767 if (len > maxlen)
2716 maxlen = len; 2768 maxlen = len;
2717 if (++n >= UHCI_VFRAMELIST_COUNT) 2769 if (++n >= UHCI_VFRAMELIST_COUNT)
2718 n = 0; 2770 n = 0;
2719 } 2771 }
2720 2772
2721 /* and wait until we are sure the hardware has finished. */ 2773 /* and wait until we are sure the hardware has finished. */
2722 delay(maxlen); 2774 delay(maxlen);
2723 2775
2724#ifdef DIAGNOSTIC 2776#ifdef DIAGNOSTIC
2725 UXFER(xfer)->iinfo.isdone = 1; 2777 UXFER(xfer)->iinfo.isdone = 1;
2726#endif 2778#endif
2727 /* Run callback and remove from interrupt list. */ 2779 /* Run callback and remove from interrupt list. */
2728 usb_transfer_complete(xfer); 2780 usb_transfer_complete(xfer);
2729 2781
2730 splx(s); 2782 mutex_exit(&sc->sc_lock);
2731} 2783}
2732 2784
2733void 2785void
2734uhci_device_isoc_close(usbd_pipe_handle pipe) 2786uhci_device_isoc_close(usbd_pipe_handle pipe)
2735{ 2787{
2736 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2788 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2737 usbd_device_handle dev = upipe->pipe.device; 2789 usbd_device_handle dev = upipe->pipe.device;
2738 uhci_softc_t *sc = dev->bus->hci_private; 2790 uhci_softc_t *sc = dev->bus->hci_private;
2739 uhci_soft_td_t *std, *vstd; 2791 uhci_soft_td_t *std, *vstd;
2740 struct iso *iso; 2792 struct iso *iso;
2741 int i, s; 2793 int i;
2742 2794
2743 /* 2795 /*
2744 * Make sure all TDs are marked as inactive. 2796 * Make sure all TDs are marked as inactive.
2745 * Wait for completion. 2797 * Wait for completion.
2746 * Unschedule. 2798 * Unschedule.
2747 * Deallocate. 2799 * Deallocate.
2748 */ 2800 */
2749 iso = &upipe->u.iso; 2801 iso = &upipe->u.iso;
2750 2802
 2803 mutex_enter(&sc->sc_lock);
2751 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2804 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2752 std = iso->stds[i]; 2805 std = iso->stds[i];
2753 usb_syncmem(&std->dma, 2806 usb_syncmem(&std->dma,
2754 std->offs + offsetof(uhci_td_t, td_status), 2807 std->offs + offsetof(uhci_td_t, td_status),
2755 sizeof(std->td.td_status), 2808 sizeof(std->td.td_status),
2756 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2809 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2757 std->td.td_status &= htole32(~UHCI_TD_ACTIVE); 2810 std->td.td_status &= htole32(~UHCI_TD_ACTIVE);
2758 usb_syncmem(&std->dma, 2811 usb_syncmem(&std->dma,
2759 std->offs + offsetof(uhci_td_t, td_status), 2812 std->offs + offsetof(uhci_td_t, td_status),
2760 sizeof(std->td.td_status), 2813 sizeof(std->td.td_status),
2761 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2814 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2762 } 2815 }
2763 usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */ 2816 usb_delay_ms(&sc->sc_bus, 2); /* wait for completion */
2764 2817
2765 s = splusb(); 
2766 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2818 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2767 std = iso->stds[i]; 2819 std = iso->stds[i];
2768 for (vstd = sc->sc_vframes[i].htd; 2820 for (vstd = sc->sc_vframes[i].htd;
2769 vstd != NULL && vstd->link.std != std; 2821 vstd != NULL && vstd->link.std != std;
2770 vstd = vstd->link.std) 2822 vstd = vstd->link.std)
2771 ; 2823 ;
2772 if (vstd == NULL) { 2824 if (vstd == NULL) {
2773 /*panic*/ 2825 /*panic*/
2774 printf("uhci_device_isoc_close: %p not found\n", std); 2826 printf("uhci_device_isoc_close: %p not found\n", std);
2775 splx(s); 2827 mutex_exit(&sc->sc_lock);
2776 return; 2828 return;
2777 } 2829 }
2778 vstd->link = std->link; 2830 vstd->link = std->link;
2779 usb_syncmem(&std->dma, 2831 usb_syncmem(&std->dma,
2780 std->offs + offsetof(uhci_td_t, td_link), 2832 std->offs + offsetof(uhci_td_t, td_link),
2781 sizeof(std->td.td_link), 2833 sizeof(std->td.td_link),
2782 BUS_DMASYNC_POSTWRITE); 2834 BUS_DMASYNC_POSTWRITE);
2783 vstd->td.td_link = std->td.td_link; 2835 vstd->td.td_link = std->td.td_link;
2784 usb_syncmem(&vstd->dma, 2836 usb_syncmem(&vstd->dma,
2785 vstd->offs + offsetof(uhci_td_t, td_link), 2837 vstd->offs + offsetof(uhci_td_t, td_link),
2786 sizeof(vstd->td.td_link), 2838 sizeof(vstd->td.td_link),
2787 BUS_DMASYNC_PREWRITE); 2839 BUS_DMASYNC_PREWRITE);
2788 uhci_free_std(sc, std); 2840 uhci_free_std(sc, std);
2789 } 2841 }
2790 splx(s); 2842 mutex_exit(&sc->sc_lock);
2791 2843
2792 free(iso->stds, M_USBHC); 2844 kmem_free(iso->stds, UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *));
2793} 2845}
2794 2846
2795usbd_status 2847usbd_status
2796uhci_setup_isoc(usbd_pipe_handle pipe) 2848uhci_setup_isoc(usbd_pipe_handle pipe)
2797{ 2849{
2798 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 2850 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
2799 usbd_device_handle dev = upipe->pipe.device; 2851 usbd_device_handle dev = upipe->pipe.device;
2800 uhci_softc_t *sc = dev->bus->hci_private; 2852 uhci_softc_t *sc = dev->bus->hci_private;
2801 int addr = upipe->pipe.device->address; 2853 int addr = upipe->pipe.device->address;
2802 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress; 2854 int endpt = upipe->pipe.endpoint->edesc->bEndpointAddress;
2803 int rd = UE_GET_DIR(endpt) == UE_DIR_IN; 2855 int rd = UE_GET_DIR(endpt) == UE_DIR_IN;
2804 uhci_soft_td_t *std, *vstd; 2856 uhci_soft_td_t *std, *vstd;
2805 u_int32_t token; 2857 u_int32_t token;
2806 struct iso *iso; 2858 struct iso *iso;
2807 int i, s; 2859 int i;
2808 2860
2809 iso = &upipe->u.iso; 2861 iso = &upipe->u.iso;
2810 iso->stds = malloc(UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *), 2862 iso->stds = kmem_alloc(UHCI_VFRAMELIST_COUNT *
2811 M_USBHC, M_WAITOK); 2863 sizeof (uhci_soft_td_t *),
 2864 KM_SLEEP);
 2865 if (iso->stds == NULL)
 2866 return USBD_NOMEM;
2812 2867
2813 token = rd ? UHCI_TD_IN (0, endpt, addr, 0) : 2868 token = rd ? UHCI_TD_IN (0, endpt, addr, 0) :
2814 UHCI_TD_OUT(0, endpt, addr, 0); 2869 UHCI_TD_OUT(0, endpt, addr, 0);
2815 2870
 2871 mutex_enter(&sc->sc_lock);
 2872
2816 /* Allocate the TDs and mark as inactive; */ 2873 /* Allocate the TDs and mark as inactive; */
2817 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2874 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2818 std = uhci_alloc_std(sc); 2875 std = uhci_alloc_std(sc);
2819 if (std == 0) 2876 if (std == 0)
2820 goto bad; 2877 goto bad;
2821 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */ 2878 std->td.td_status = htole32(UHCI_TD_IOS); /* iso, inactive */
2822 std->td.td_token = htole32(token); 2879 std->td.td_token = htole32(token);
2823 usb_syncmem(&std->dma, std->offs, sizeof(std->td), 2880 usb_syncmem(&std->dma, std->offs, sizeof(std->td),
2824 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2881 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2825 iso->stds[i] = std; 2882 iso->stds[i] = std;
2826 } 2883 }
2827 2884
2828 /* Insert TDs into schedule. */ 2885 /* Insert TDs into schedule. */
2829 s = splusb(); 
2830 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) { 2886 for (i = 0; i < UHCI_VFRAMELIST_COUNT; i++) {
2831 std = iso->stds[i]; 2887 std = iso->stds[i];
2832 vstd = sc->sc_vframes[i].htd; 2888 vstd = sc->sc_vframes[i].htd;
2833 usb_syncmem(&vstd->dma, 2889 usb_syncmem(&vstd->dma,
2834 vstd->offs + offsetof(uhci_td_t, td_link), 2890 vstd->offs + offsetof(uhci_td_t, td_link),
2835 sizeof(vstd->td.td_link), 2891 sizeof(vstd->td.td_link),
2836 BUS_DMASYNC_POSTWRITE); 2892 BUS_DMASYNC_POSTWRITE);
2837 std->link = vstd->link; 2893 std->link = vstd->link;
2838 std->td.td_link = vstd->td.td_link; 2894 std->td.td_link = vstd->td.td_link;
2839 usb_syncmem(&std->dma, 2895 usb_syncmem(&std->dma,
2840 std->offs + offsetof(uhci_td_t, td_link), 2896 std->offs + offsetof(uhci_td_t, td_link),
2841 sizeof(std->td.td_link), 2897 sizeof(std->td.td_link),
2842 BUS_DMASYNC_PREWRITE); 2898 BUS_DMASYNC_PREWRITE);
2843 vstd->link.std = std; 2899 vstd->link.std = std;
2844 vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD); 2900 vstd->td.td_link = htole32(std->physaddr | UHCI_PTR_TD);
2845 usb_syncmem(&vstd->dma, 2901 usb_syncmem(&vstd->dma,
2846 vstd->offs + offsetof(uhci_td_t, td_link), 2902 vstd->offs + offsetof(uhci_td_t, td_link),
2847 sizeof(vstd->td.td_link), 2903 sizeof(vstd->td.td_link),
2848 BUS_DMASYNC_PREWRITE); 2904 BUS_DMASYNC_PREWRITE);
2849 } 2905 }
2850 splx(s); 2906 mutex_exit(&sc->sc_lock);
2851 2907
2852 iso->next = -1; 2908 iso->next = -1;
2853 iso->inuse = 0; 2909 iso->inuse = 0;
2854 2910
2855 return (USBD_NORMAL_COMPLETION); 2911 return (USBD_NORMAL_COMPLETION);
2856 2912
2857 bad: 2913 bad:
2858 while (--i >= 0) 2914 while (--i >= 0)
2859 uhci_free_std(sc, iso->stds[i]); 2915 uhci_free_std(sc, iso->stds[i]);
2860 free(iso->stds, M_USBHC); 2916 mutex_exit(&sc->sc_lock);
 2917 kmem_free(iso->stds, UHCI_VFRAMELIST_COUNT * sizeof (uhci_soft_td_t *));
2861 return (USBD_NOMEM); 2918 return (USBD_NOMEM);
2862} 2919}
2863 2920
2864void 2921void
2865uhci_device_isoc_done(usbd_xfer_handle xfer) 2922uhci_device_isoc_done(usbd_xfer_handle xfer)
2866{ 2923{
2867 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2924 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2868 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2925 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2869 int i, offs; 2926 int i, offs;
2870 int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN; 2927 int rd = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN;
2871 2928
2872 2929
2873 DPRINTFN(4, ("uhci_isoc_done: length=%d, busy_free=0x%08x\n", 2930 DPRINTFN(4, ("uhci_isoc_done: length=%d, busy_free=0x%08x\n",
2874 xfer->actlen, xfer->busy_free)); 2931 xfer->actlen, xfer->busy_free));
2875 2932
2876 if (ii->xfer != xfer) 2933 if (ii->xfer != xfer)
2877 /* Not on interrupt list, ignore it. */ 2934 /* Not on interrupt list, ignore it. */
2878 return; 2935 return;
2879 2936
2880 if (!uhci_active_intr_info(ii)) 2937 if (!uhci_active_intr_info(ii))
2881 return; 2938 return;
2882 2939
2883#ifdef DIAGNOSTIC 2940#ifdef DIAGNOSTIC
2884 if (ii->stdend == NULL) { 2941 if (ii->stdend == NULL) {
2885 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer); 2942 printf("uhci_device_isoc_done: xfer=%p stdend==NULL\n", xfer);
2886#ifdef UHCI_DEBUG 2943#ifdef UHCI_DEBUG
2887 uhci_dump_ii(ii); 2944 uhci_dump_ii(ii);
2888#endif 2945#endif
2889 return; 2946 return;
2890 } 2947 }
2891#endif 2948#endif
2892 2949
2893 /* Turn off the interrupt since it is active even if the TD is not. */ 2950 /* Turn off the interrupt since it is active even if the TD is not. */
2894 usb_syncmem(&ii->stdend->dma, 2951 usb_syncmem(&ii->stdend->dma,
2895 ii->stdend->offs + offsetof(uhci_td_t, td_status), 2952 ii->stdend->offs + offsetof(uhci_td_t, td_status),
2896 sizeof(ii->stdend->td.td_status), 2953 sizeof(ii->stdend->td.td_status),
2897 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 2954 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2898 ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC); 2955 ii->stdend->td.td_status &= htole32(~UHCI_TD_IOC);
2899 usb_syncmem(&ii->stdend->dma, 2956 usb_syncmem(&ii->stdend->dma,
2900 ii->stdend->offs + offsetof(uhci_td_t, td_status), 2957 ii->stdend->offs + offsetof(uhci_td_t, td_status),
2901 sizeof(ii->stdend->td.td_status), 2958 sizeof(ii->stdend->td.td_status),
2902 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2959 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2903 2960
2904 uhci_del_intr_info(ii); /* remove from active list */ 2961 uhci_del_intr_info(ii); /* remove from active list */
2905 2962
2906 offs = 0; 2963 offs = 0;
2907 for (i = 0; i < xfer->nframes; i++) { 2964 for (i = 0; i < xfer->nframes; i++) {
2908 usb_syncmem(&xfer->dmabuf, offs, xfer->frlengths[i], 2965 usb_syncmem(&xfer->dmabuf, offs, xfer->frlengths[i],
2909 rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 2966 rd ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
2910 offs += xfer->frlengths[i]; 2967 offs += xfer->frlengths[i];
2911 } 2968 }
2912} 2969}
2913 2970
2914void 2971void
2915uhci_device_intr_done(usbd_xfer_handle xfer) 2972uhci_device_intr_done(usbd_xfer_handle xfer)
2916{ 2973{
2917 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 2974 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2918 uhci_softc_t *sc = ii->sc; 2975 uhci_softc_t *sc = ii->sc;
2919 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 2976 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2920 uhci_soft_qh_t *sqh; 2977 uhci_soft_qh_t *sqh;
2921 int i, npoll, isread; 2978 int i, npoll, isread;
2922 2979
2923 DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen)); 2980 DPRINTFN(5, ("uhci_device_intr_done: length=%d\n", xfer->actlen));
2924 2981
 2982 KASSERT(mutex_owned(&sc->sc_lock));
 2983
2925 npoll = upipe->u.intr.npoll; 2984 npoll = upipe->u.intr.npoll;
2926 for(i = 0; i < npoll; i++) { 2985 for(i = 0; i < npoll; i++) {
2927 sqh = upipe->u.intr.qhs[i]; 2986 sqh = upipe->u.intr.qhs[i];
2928 sqh->elink = NULL; 2987 sqh->elink = NULL;
2929 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 2988 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
2930 usb_syncmem(&sqh->dma, 2989 usb_syncmem(&sqh->dma,
2931 sqh->offs + offsetof(uhci_qh_t, qh_elink), 2990 sqh->offs + offsetof(uhci_qh_t, qh_elink),
2932 sizeof(sqh->qh.qh_elink), 2991 sizeof(sqh->qh.qh_elink),
2933 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 2992 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2934 } 2993 }
2935 uhci_free_std_chain(sc, ii->stdstart, NULL); 2994 uhci_free_std_chain(sc, ii->stdstart, NULL);
2936 2995
2937 isread = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN; 2996 isread = UE_GET_DIR(upipe->pipe.endpoint->edesc->bEndpointAddress) == UE_DIR_IN;
2938 usb_syncmem(&xfer->dmabuf, 0, xfer->length,  2997 usb_syncmem(&xfer->dmabuf, 0, xfer->length,
2939 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 2998 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
2940 2999
2941 /* XXX Wasteful. */ 3000 /* XXX Wasteful. */
2942 if (xfer->pipe->repeat) { 3001 if (xfer->pipe->repeat) {
2943 uhci_soft_td_t *data, *dataend; 3002 uhci_soft_td_t *data, *dataend;
2944 3003
2945 DPRINTFN(5,("uhci_device_intr_done: requeing\n")); 3004 DPRINTFN(5,("uhci_device_intr_done: requeing\n"));
2946 3005
2947 /* This alloc cannot fail since we freed the chain above. */ 3006 /* This alloc cannot fail since we freed the chain above. */
2948 uhci_alloc_std_chain(upipe, sc, xfer->length, 3007 uhci_alloc_std_chain(upipe, sc, xfer->length,
2949 upipe->u.intr.isread, xfer->flags, 3008 upipe->u.intr.isread, xfer->flags,
2950 &xfer->dmabuf, &data, &dataend); 3009 &xfer->dmabuf, &data, &dataend);
2951 dataend->td.td_status |= htole32(UHCI_TD_IOC); 3010 dataend->td.td_status |= htole32(UHCI_TD_IOC);
2952 usb_syncmem(&dataend->dma, 3011 usb_syncmem(&dataend->dma,
2953 dataend->offs + offsetof(uhci_td_t, td_status), 3012 dataend->offs + offsetof(uhci_td_t, td_status),
2954 sizeof(dataend->td.td_status), 3013 sizeof(dataend->td.td_status),
2955 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3014 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2956 3015
2957#ifdef UHCI_DEBUG 3016#ifdef UHCI_DEBUG
2958 if (uhcidebug > 10) { 3017 if (uhcidebug > 10) {
2959 DPRINTF(("uhci_device_intr_done: data(1)\n")); 3018 DPRINTF(("uhci_device_intr_done: data(1)\n"));
2960 uhci_dump_tds(data); 3019 uhci_dump_tds(data);
2961 uhci_dump_qh(upipe->u.intr.qhs[0]); 3020 uhci_dump_qh(upipe->u.intr.qhs[0]);
2962 } 3021 }
2963#endif 3022#endif
2964 3023
2965 ii->stdstart = data; 3024 ii->stdstart = data;
2966 ii->stdend = dataend; 3025 ii->stdend = dataend;
2967#ifdef DIAGNOSTIC 3026#ifdef DIAGNOSTIC
2968 if (!ii->isdone) { 3027 if (!ii->isdone) {
2969 printf("uhci_device_intr_done: not done, ii=%p\n", ii); 3028 printf("uhci_device_intr_done: not done, ii=%p\n", ii);
2970 } 3029 }
2971 ii->isdone = 0; 3030 ii->isdone = 0;
2972#endif 3031#endif
2973 for (i = 0; i < npoll; i++) { 3032 for (i = 0; i < npoll; i++) {
2974 sqh = upipe->u.intr.qhs[i]; 3033 sqh = upipe->u.intr.qhs[i];
2975 sqh->elink = data; 3034 sqh->elink = data;
2976 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD); 3035 sqh->qh.qh_elink = htole32(data->physaddr | UHCI_PTR_TD);
2977 usb_syncmem(&sqh->dma, 3036 usb_syncmem(&sqh->dma,
2978 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3037 sqh->offs + offsetof(uhci_qh_t, qh_elink),
2979 sizeof(sqh->qh.qh_elink), 3038 sizeof(sqh->qh.qh_elink),
2980 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3039 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2981 } 3040 }
2982 xfer->status = USBD_IN_PROGRESS; 3041 xfer->status = USBD_IN_PROGRESS;
2983 /* The ii is already on the examined list, just leave it. */ 3042 /* The ii is already on the examined list, just leave it. */
2984 } else { 3043 } else {
2985 DPRINTFN(5,("uhci_device_intr_done: removing\n")); 3044 DPRINTFN(5,("uhci_device_intr_done: removing\n"));
2986 if (uhci_active_intr_info(ii)) 3045 if (uhci_active_intr_info(ii))
2987 uhci_del_intr_info(ii); 3046 uhci_del_intr_info(ii);
2988 } 3047 }
2989} 3048}
2990 3049
2991/* Deallocate request data structures */ 3050/* Deallocate request data structures */
2992void 3051void
2993uhci_device_ctrl_done(usbd_xfer_handle xfer) 3052uhci_device_ctrl_done(usbd_xfer_handle xfer)
2994{ 3053{
2995 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3054 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
2996 uhci_softc_t *sc = ii->sc; 3055 uhci_softc_t *sc = ii->sc;
2997 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 3056 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
2998 int len = UGETW(xfer->request.wLength); 3057 int len = UGETW(xfer->request.wLength);
2999 int isread = (xfer->request.bmRequestType & UT_READ); 3058 int isread = (xfer->request.bmRequestType & UT_READ);
3000 3059
 3060 KASSERT(mutex_owned(&sc->sc_lock));
 3061
3001#ifdef DIAGNOSTIC 3062#ifdef DIAGNOSTIC
3002 if (!(xfer->rqflags & URQ_REQUEST)) 3063 if (!(xfer->rqflags & URQ_REQUEST))
3003 panic("uhci_device_ctrl_done: not a request"); 3064 panic("uhci_device_ctrl_done: not a request");
3004#endif 3065#endif
3005 3066
3006 if (!uhci_active_intr_info(ii)) 3067 if (!uhci_active_intr_info(ii))
3007 return; 3068 return;
3008 3069
3009 uhci_del_intr_info(ii); /* remove from active list */ 3070 uhci_del_intr_info(ii); /* remove from active list */
3010 3071
3011 if (upipe->pipe.device->speed == USB_SPEED_LOW) 3072 if (upipe->pipe.device->speed == USB_SPEED_LOW)
3012 uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh); 3073 uhci_remove_ls_ctrl(sc, upipe->u.ctl.sqh);
3013 else 3074 else
3014 uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh); 3075 uhci_remove_hs_ctrl(sc, upipe->u.ctl.sqh);
3015 3076
3016 if (upipe->u.ctl.length != 0) 3077 if (upipe->u.ctl.length != 0)
3017 uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend); 3078 uhci_free_std_chain(sc, ii->stdstart->link.std, ii->stdend);
3018 3079
3019 if (len) { 3080 if (len) {
3020 usb_syncmem(&xfer->dmabuf, 0, len,  3081 usb_syncmem(&xfer->dmabuf, 0, len,
3021 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 3082 isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
3022 } 3083 }
3023 usb_syncmem(&upipe->u.ctl.reqdma, 0, 3084 usb_syncmem(&upipe->u.ctl.reqdma, 0,
3024 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE); 3085 sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE);
3025 3086
3026 DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen)); 3087 DPRINTFN(5, ("uhci_device_ctrl_done: length=%d\n", xfer->actlen));
3027} 3088}
3028 3089
3029/* Deallocate request data structures */ 3090/* Deallocate request data structures */
3030void 3091void
3031uhci_device_bulk_done(usbd_xfer_handle xfer) 3092uhci_device_bulk_done(usbd_xfer_handle xfer)
3032{ 3093{
3033 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo; 3094 uhci_intr_info_t *ii = &UXFER(xfer)->iinfo;
3034 uhci_softc_t *sc = ii->sc; 3095 uhci_softc_t *sc = ii->sc;
3035 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe; 3096 struct uhci_pipe *upipe = (struct uhci_pipe *)xfer->pipe;
3036 3097
3037 DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n", 3098 DPRINTFN(5,("uhci_device_bulk_done: xfer=%p ii=%p sc=%p upipe=%p\n",
3038 xfer, ii, sc, upipe)); 3099 xfer, ii, sc, upipe));
3039 3100
 3101 KASSERT(mutex_owned(&sc->sc_lock));
 3102
3040 if (!uhci_active_intr_info(ii)) 3103 if (!uhci_active_intr_info(ii))
3041 return; 3104 return;
3042 3105
3043 uhci_del_intr_info(ii); /* remove from active list */ 3106 uhci_del_intr_info(ii); /* remove from active list */
3044 3107
3045 uhci_remove_bulk(sc, upipe->u.bulk.sqh); 3108 uhci_remove_bulk(sc, upipe->u.bulk.sqh);
3046 3109
3047 uhci_free_std_chain(sc, ii->stdstart, NULL); 3110 uhci_free_std_chain(sc, ii->stdstart, NULL);
3048 3111
3049 DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen)); 3112 DPRINTFN(5, ("uhci_device_bulk_done: length=%d\n", xfer->actlen));
3050} 3113}
3051 3114
3052/* Add interrupt QH, called with vflock. */ 3115/* Add interrupt QH, called with vflock. */
3053void 3116void
3054uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 3117uhci_add_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
3055{ 3118{
3056 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 3119 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
3057 uhci_soft_qh_t *eqh; 3120 uhci_soft_qh_t *eqh;
3058 3121
3059 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 3122 DPRINTFN(4, ("uhci_add_intr: n=%d sqh=%p\n", sqh->pos, sqh));
3060 3123
3061 eqh = vf->eqh; 3124 eqh = vf->eqh;
3062 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 3125 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
3063 sizeof(eqh->qh.qh_hlink), 3126 sizeof(eqh->qh.qh_hlink),
3064 BUS_DMASYNC_POSTWRITE); 3127 BUS_DMASYNC_POSTWRITE);
3065 sqh->hlink = eqh->hlink; 3128 sqh->hlink = eqh->hlink;
3066 sqh->qh.qh_hlink = eqh->qh.qh_hlink; 3129 sqh->qh.qh_hlink = eqh->qh.qh_hlink;
3067 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 3130 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
3068 sizeof(sqh->qh.qh_hlink), 3131 sizeof(sqh->qh.qh_hlink),
3069 BUS_DMASYNC_PREWRITE); 3132 BUS_DMASYNC_PREWRITE);
3070 eqh->hlink = sqh; 3133 eqh->hlink = sqh;
3071 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH); 3134 eqh->qh.qh_hlink = htole32(sqh->physaddr | UHCI_PTR_QH);
3072 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink), 3135 usb_syncmem(&eqh->dma, eqh->offs + offsetof(uhci_qh_t, qh_hlink),
3073 sizeof(eqh->qh.qh_hlink), 3136 sizeof(eqh->qh.qh_hlink),
3074 BUS_DMASYNC_PREWRITE); 3137 BUS_DMASYNC_PREWRITE);
3075 vf->eqh = sqh; 3138 vf->eqh = sqh;
3076 vf->bandwidth++; 3139 vf->bandwidth++;
3077} 3140}
3078 3141
3079/* Remove interrupt QH. */ 3142/* Remove interrupt QH. */
3080void 3143void
3081uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh) 3144uhci_remove_intr(uhci_softc_t *sc, uhci_soft_qh_t *sqh)
3082{ 3145{
3083 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos]; 3146 struct uhci_vframe *vf = &sc->sc_vframes[sqh->pos];
3084 uhci_soft_qh_t *pqh; 3147 uhci_soft_qh_t *pqh;
3085 3148
3086 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh)); 3149 DPRINTFN(4, ("uhci_remove_intr: n=%d sqh=%p\n", sqh->pos, sqh));
3087 3150
3088 /* See comment in uhci_remove_ctrl() */ 3151 /* See comment in uhci_remove_ctrl() */
3089 3152
3090 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink), 3153 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_elink),
3091 sizeof(sqh->qh.qh_elink), 3154 sizeof(sqh->qh.qh_elink),
3092 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3155 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3093 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) { 3156 if (!(sqh->qh.qh_elink & htole32(UHCI_PTR_T))) {
3094 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3157 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
3095 usb_syncmem(&sqh->dma, 3158 usb_syncmem(&sqh->dma,
3096 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3159 sqh->offs + offsetof(uhci_qh_t, qh_elink),
3097 sizeof(sqh->qh.qh_elink), 3160 sizeof(sqh->qh.qh_elink),
3098 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3161 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3099 delay(UHCI_QH_REMOVE_DELAY); 3162 delay(UHCI_QH_REMOVE_DELAY);
3100 } 3163 }
3101 3164
3102 pqh = uhci_find_prev_qh(vf->hqh, sqh); 3165 pqh = uhci_find_prev_qh(vf->hqh, sqh);
3103 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink), 3166 usb_syncmem(&sqh->dma, sqh->offs + offsetof(uhci_qh_t, qh_hlink),
3104 sizeof(sqh->qh.qh_hlink), 3167 sizeof(sqh->qh.qh_hlink),
3105 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 3168 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3106 pqh->hlink = sqh->hlink; 3169 pqh->hlink = sqh->hlink;
3107 pqh->qh.qh_hlink = sqh->qh.qh_hlink; 3170 pqh->qh.qh_hlink = sqh->qh.qh_hlink;
3108 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink), 3171 usb_syncmem(&pqh->dma, pqh->offs + offsetof(uhci_qh_t, qh_hlink),
3109 sizeof(pqh->qh.qh_hlink), 3172 sizeof(pqh->qh.qh_hlink),
3110 BUS_DMASYNC_PREWRITE); 3173 BUS_DMASYNC_PREWRITE);
3111 delay(UHCI_QH_REMOVE_DELAY); 3174 delay(UHCI_QH_REMOVE_DELAY);
3112 if (vf->eqh == sqh) 3175 if (vf->eqh == sqh)
3113 vf->eqh = pqh; 3176 vf->eqh = pqh;
3114 vf->bandwidth--; 3177 vf->bandwidth--;
3115} 3178}
3116 3179
3117usbd_status 3180usbd_status
3118uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival) 3181uhci_device_setintr(uhci_softc_t *sc, struct uhci_pipe *upipe, int ival)
3119{ 3182{
3120 uhci_soft_qh_t *sqh; 3183 uhci_soft_qh_t *sqh;
3121 int i, npoll, s; 3184 int i, npoll;
3122 u_int bestbw, bw, bestoffs, offs; 3185 u_int bestbw, bw, bestoffs, offs;
3123 3186
3124 DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe)); 3187 DPRINTFN(2, ("uhci_device_setintr: pipe=%p\n", upipe));
3125 if (ival == 0) { 3188 if (ival == 0) {
3126 printf("uhci_device_setintr: 0 interval\n"); 3189 printf("uhci_device_setintr: 0 interval\n");
3127 return (USBD_INVAL); 3190 return (USBD_INVAL);
3128 } 3191 }
3129 3192
3130 if (ival > UHCI_VFRAMELIST_COUNT) 3193 if (ival > UHCI_VFRAMELIST_COUNT)
3131 ival = UHCI_VFRAMELIST_COUNT; 3194 ival = UHCI_VFRAMELIST_COUNT;
3132 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival; 3195 npoll = (UHCI_VFRAMELIST_COUNT + ival - 1) / ival;
3133 DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll)); 3196 DPRINTFN(2, ("uhci_device_setintr: ival=%d npoll=%d\n", ival, npoll));
3134 3197
3135 upipe->u.intr.npoll = npoll; 3198 upipe->u.intr.npoll = npoll;
3136 upipe->u.intr.qhs = 3199 upipe->u.intr.qhs =
3137 malloc(npoll * sizeof(uhci_soft_qh_t *), M_USBHC, M_WAITOK); 3200 kmem_alloc(npoll * sizeof(uhci_soft_qh_t *), KM_SLEEP);
 3201 if (upipe->u.intr.qhs == NULL)
 3202 return USBD_NOMEM;
3138 3203
3139 /* 3204 /*
3140 * Figure out which offset in the schedule that has most 3205 * Figure out which offset in the schedule that has most
3141 * bandwidth left over. 3206 * bandwidth left over.
3142 */ 3207 */
3143#define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1)) 3208#define MOD(i) ((i) & (UHCI_VFRAMELIST_COUNT-1))
3144 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) { 3209 for (bestoffs = offs = 0, bestbw = ~0; offs < ival; offs++) {
3145 for (bw = i = 0; i < npoll; i++) 3210 for (bw = i = 0; i < npoll; i++)
3146 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth; 3211 bw += sc->sc_vframes[MOD(i * ival + offs)].bandwidth;
3147 if (bw < bestbw) { 3212 if (bw < bestbw) {
3148 bestbw = bw; 3213 bestbw = bw;
3149 bestoffs = offs; 3214 bestoffs = offs;
3150 } 3215 }
3151 } 3216 }
3152 DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs)); 3217 DPRINTFN(1, ("uhci_device_setintr: bw=%d offs=%d\n", bestbw, bestoffs));
3153 3218
 3219 mutex_enter(&sc->sc_lock);
3154 for(i = 0; i < npoll; i++) { 3220 for(i = 0; i < npoll; i++) {
3155 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc); 3221 upipe->u.intr.qhs[i] = sqh = uhci_alloc_sqh(sc);
3156 sqh->elink = NULL; 3222 sqh->elink = NULL;
3157 sqh->qh.qh_elink = htole32(UHCI_PTR_T); 3223 sqh->qh.qh_elink = htole32(UHCI_PTR_T);
3158 usb_syncmem(&sqh->dma, 3224 usb_syncmem(&sqh->dma,
3159 sqh->offs + offsetof(uhci_qh_t, qh_elink), 3225 sqh->offs + offsetof(uhci_qh_t, qh_elink),
3160 sizeof(sqh->qh.qh_elink), 3226 sizeof(sqh->qh.qh_elink),
3161 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 3227 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3162 sqh->pos = MOD(i * ival + bestoffs); 3228 sqh->pos = MOD(i * ival + bestoffs);
3163 } 3229 }
3164#undef MOD 3230#undef MOD
3165 3231
3166 s = splusb(); 
3167 /* Enter QHs into the controller data structures. */ 3232 /* Enter QHs into the controller data structures. */
3168 for(i = 0; i < npoll; i++) 3233 for(i = 0; i < npoll; i++)
3169 uhci_add_intr(sc, upipe->u.intr.qhs[i]); 3234 uhci_add_intr(sc, upipe->u.intr.qhs[i]);
3170 splx(s); 3235 mutex_exit(&sc->sc_lock);
3171 3236
3172 DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe)); 3237 DPRINTFN(5, ("uhci_device_setintr: returns %p\n", upipe));
3173 return (USBD_NORMAL_COMPLETION); 3238 return (USBD_NORMAL_COMPLETION);
3174} 3239}
3175 3240
3176/* Open a new pipe. */ 3241/* Open a new pipe. */
3177usbd_status 3242usbd_status
3178uhci_open(usbd_pipe_handle pipe) 3243uhci_open(usbd_pipe_handle pipe)
3179{ 3244{
3180 uhci_softc_t *sc = pipe->device->bus->hci_private; 3245 uhci_softc_t *sc = pipe->device->bus->hci_private;
3181 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe; 3246 struct uhci_pipe *upipe = (struct uhci_pipe *)pipe;
3182 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 3247 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
3183 usbd_status err; 3248 usbd_status err = USBD_NOMEM;
3184 int ival; 3249 int ival;
3185 3250
3186 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 3251 DPRINTFN(1, ("uhci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
3187 pipe, pipe->device->address, 3252 pipe, pipe->device->address,
3188 ed->bEndpointAddress, sc->sc_addr)); 3253 ed->bEndpointAddress, sc->sc_addr));
3189 3254
 3255 if (sc->sc_dying)
 3256 return USBD_IOERROR;
 3257
3190 upipe->aborting = 0; 3258 upipe->aborting = 0;
3191 /* toggle state needed for bulk endpoints */ 3259 /* toggle state needed for bulk endpoints */
3192 upipe->nexttoggle = pipe->endpoint->datatoggle; 3260 upipe->nexttoggle = pipe->endpoint->datatoggle;
3193 3261
3194 if (pipe->device->address == sc->sc_addr) { 3262 if (pipe->device->address == sc->sc_addr) {
3195 switch (ed->bEndpointAddress) { 3263 switch (ed->bEndpointAddress) {
3196 case USB_CONTROL_ENDPOINT: 3264 case USB_CONTROL_ENDPOINT:
3197 pipe->methods = &uhci_root_ctrl_methods; 3265 pipe->methods = &uhci_root_ctrl_methods;
3198 break; 3266 break;
3199 case UE_DIR_IN | UHCI_INTR_ENDPT: 3267 case UE_DIR_IN | UHCI_INTR_ENDPT:
3200 pipe->methods = &uhci_root_intr_methods; 3268 pipe->methods = &uhci_root_intr_methods;
3201 break; 3269 break;
3202 default: 3270 default:
3203 return (USBD_INVAL); 3271 return (USBD_INVAL);
3204 } 3272 }
3205 } else { 3273 } else {
3206 switch (ed->bmAttributes & UE_XFERTYPE) { 3274 switch (ed->bmAttributes & UE_XFERTYPE) {
3207 case UE_CONTROL: 3275 case UE_CONTROL:
3208 pipe->methods = &uhci_device_ctrl_methods; 3276 pipe->methods = &uhci_device_ctrl_methods;
3209 upipe->u.ctl.sqh = uhci_alloc_sqh(sc); 3277 upipe->u.ctl.sqh = uhci_alloc_sqh(sc);
3210 if (upipe->u.ctl.sqh == NULL) 3278 if (upipe->u.ctl.sqh == NULL)
3211 goto bad; 3279 goto bad;
3212 upipe->u.ctl.setup = uhci_alloc_std(sc); 3280 upipe->u.ctl.setup = uhci_alloc_std(sc);
3213 if (upipe->u.ctl.setup == NULL) { 3281 if (upipe->u.ctl.setup == NULL) {
3214 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3282 uhci_free_sqh(sc, upipe->u.ctl.sqh);
3215 goto bad; 3283 goto bad;
3216 } 3284 }
3217 upipe->u.ctl.stat = uhci_alloc_std(sc); 3285 upipe->u.ctl.stat = uhci_alloc_std(sc);
3218 if (upipe->u.ctl.stat == NULL) { 3286 if (upipe->u.ctl.stat == NULL) {
3219 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3287 uhci_free_sqh(sc, upipe->u.ctl.sqh);
3220 uhci_free_std(sc, upipe->u.ctl.setup); 3288 uhci_free_std(sc, upipe->u.ctl.setup);
3221 goto bad; 3289 goto bad;
3222 } 3290 }
3223 err = usb_allocmem(&sc->sc_bus, 3291 err = usb_allocmem(&sc->sc_bus,
3224 sizeof(usb_device_request_t), 3292 sizeof(usb_device_request_t),
3225 0, &upipe->u.ctl.reqdma); 3293 0, &upipe->u.ctl.reqdma);
3226 if (err) { 3294 if (err) {
3227 uhci_free_sqh(sc, upipe->u.ctl.sqh); 3295 uhci_free_sqh(sc, upipe->u.ctl.sqh);
3228 uhci_free_std(sc, upipe->u.ctl.setup); 3296 uhci_free_std(sc, upipe->u.ctl.setup);
3229 uhci_free_std(sc, upipe->u.ctl.stat); 3297 uhci_free_std(sc, upipe->u.ctl.stat);
3230 goto bad; 3298 goto bad;
3231 } 3299 }
3232 break; 3300 break;
3233 case UE_INTERRUPT: 3301 case UE_INTERRUPT:
3234 pipe->methods = &uhci_device_intr_methods; 3302 pipe->methods = &uhci_device_intr_methods;
3235 ival = pipe->interval; 3303 ival = pipe->interval;
3236 if (ival == USBD_DEFAULT_INTERVAL) 3304 if (ival == USBD_DEFAULT_INTERVAL)
3237 ival = ed->bInterval; 3305 ival = ed->bInterval;
3238 return (uhci_device_setintr(sc, upipe, ival)); 3306 return (uhci_device_setintr(sc, upipe, ival));
3239 case UE_ISOCHRONOUS: 3307 case UE_ISOCHRONOUS:
3240 pipe->methods = &uhci_device_isoc_methods; 3308 pipe->methods = &uhci_device_isoc_methods;
3241 return (uhci_setup_isoc(pipe)); 3309 return (uhci_setup_isoc(pipe));
3242 case UE_BULK: 3310 case UE_BULK:
3243 pipe->methods = &uhci_device_bulk_methods; 3311 pipe->methods = &uhci_device_bulk_methods;
3244 upipe->u.bulk.sqh = uhci_alloc_sqh(sc); 3312 upipe->u.bulk.sqh = uhci_alloc_sqh(sc);
3245 if (upipe->u.bulk.sqh == NULL) 3313 if (upipe->u.bulk.sqh == NULL)
3246 goto bad; 3314 goto bad;
3247 break; 3315 break;
3248 } 3316 }
3249 } 3317 }
3250 return (USBD_NORMAL_COMPLETION); 3318 return (USBD_NORMAL_COMPLETION);
3251 3319
3252 bad: 3320 bad:
3253 return (USBD_NOMEM); 3321 return USBD_NOMEM;
3254} 3322}
3255 3323
3256/* 3324/*
3257 * Data structures and routines to emulate the root hub. 3325 * Data structures and routines to emulate the root hub.
3258 */ 3326 */
3259usb_device_descriptor_t uhci_devd = { 3327usb_device_descriptor_t uhci_devd = {
3260 USB_DEVICE_DESCRIPTOR_SIZE, 3328 USB_DEVICE_DESCRIPTOR_SIZE,
3261 UDESC_DEVICE, /* type */ 3329 UDESC_DEVICE, /* type */
3262 {0x00, 0x01}, /* USB version */ 3330 {0x00, 0x01}, /* USB version */
3263 UDCLASS_HUB, /* class */ 3331 UDCLASS_HUB, /* class */
3264 UDSUBCLASS_HUB, /* subclass */ 3332 UDSUBCLASS_HUB, /* subclass */
3265 UDPROTO_FSHUB, /* protocol */ 3333 UDPROTO_FSHUB, /* protocol */
3266 64, /* max packet */ 3334 64, /* max packet */
3267 {0},{0},{0x00,0x01}, /* device id */ 3335 {0},{0},{0x00,0x01}, /* device id */
3268 1,2,0, /* string indicies */ 3336 1,2,0, /* string indicies */
3269 1 /* # of configurations */ 3337 1 /* # of configurations */
3270}; 3338};
3271 3339
3272const usb_config_descriptor_t uhci_confd = { 3340const usb_config_descriptor_t uhci_confd = {
3273 USB_CONFIG_DESCRIPTOR_SIZE, 3341 USB_CONFIG_DESCRIPTOR_SIZE,
3274 UDESC_CONFIG, 3342 UDESC_CONFIG,
3275 {USB_CONFIG_DESCRIPTOR_SIZE + 3343 {USB_CONFIG_DESCRIPTOR_SIZE +
3276 USB_INTERFACE_DESCRIPTOR_SIZE + 3344 USB_INTERFACE_DESCRIPTOR_SIZE +
3277 USB_ENDPOINT_DESCRIPTOR_SIZE}, 3345 USB_ENDPOINT_DESCRIPTOR_SIZE},
3278 1, 3346 1,
3279 1, 3347 1,
3280 0, 3348 0,
3281 UC_ATTR_MBO | UC_SELF_POWERED, 3349 UC_ATTR_MBO | UC_SELF_POWERED,
3282 0 /* max power */ 3350 0 /* max power */
3283}; 3351};
3284 3352
3285const usb_interface_descriptor_t uhci_ifcd = { 3353const usb_interface_descriptor_t uhci_ifcd = {
3286 USB_INTERFACE_DESCRIPTOR_SIZE, 3354 USB_INTERFACE_DESCRIPTOR_SIZE,
3287 UDESC_INTERFACE, 3355 UDESC_INTERFACE,
3288 0, 3356 0,
3289 0, 3357 0,
3290 1, 3358 1,
3291 UICLASS_HUB, 3359 UICLASS_HUB,
3292 UISUBCLASS_HUB, 3360 UISUBCLASS_HUB,
3293 UIPROTO_FSHUB, 3361 UIPROTO_FSHUB,
3294 0 3362 0
3295}; 3363};
3296 3364
3297const usb_endpoint_descriptor_t uhci_endpd = { 3365const usb_endpoint_descriptor_t uhci_endpd = {
3298 USB_ENDPOINT_DESCRIPTOR_SIZE, 3366 USB_ENDPOINT_DESCRIPTOR_SIZE,
3299 UDESC_ENDPOINT, 3367 UDESC_ENDPOINT,
3300 UE_DIR_IN | UHCI_INTR_ENDPT, 3368 UE_DIR_IN | UHCI_INTR_ENDPT,
3301 UE_INTERRUPT, 3369 UE_INTERRUPT,
3302 {8}, 3370 {8},
3303 255 3371 255
3304}; 3372};
3305 3373
3306const usb_hub_descriptor_t uhci_hubd_piix = { 3374const usb_hub_descriptor_t uhci_hubd_piix = {
3307 USB_HUB_DESCRIPTOR_SIZE, 3375 USB_HUB_DESCRIPTOR_SIZE,
3308 UDESC_HUB, 3376 UDESC_HUB,
3309 2, 3377 2,
3310 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 }, 3378 { UHD_PWR_NO_SWITCH | UHD_OC_INDIVIDUAL, 0 },
3311 50, /* power on to power good */ 3379 50, /* power on to power good */
3312 0, 3380 0,
3313 { 0x00 }, /* both ports are removable */ 3381 { 0x00 }, /* both ports are removable */
3314 { 0 }, 3382 { 0 },
3315}; 3383};
3316 3384
3317/* 3385/*
3318 * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also 3386 * The USB hub protocol requires that SET_FEATURE(PORT_RESET) also
3319 * enables the port, and also states that SET_FEATURE(PORT_ENABLE) 3387 * enables the port, and also states that SET_FEATURE(PORT_ENABLE)
3320 * should not be used by the USB subsystem. As we cannot issue a 3388 * should not be used by the USB subsystem. As we cannot issue a
3321 * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port 3389 * SET_FEATURE(PORT_ENABLE) externally, we must ensure that the port
3322 * will be enabled as part of the reset. 3390 * will be enabled as part of the reset.
3323 * 3391 *
3324 * On the VT83C572, the port cannot be successfully enabled until the 3392 * On the VT83C572, the port cannot be successfully enabled until the
3325 * outstanding "port enable change" and "connection status change" 3393 * outstanding "port enable change" and "connection status change"
3326 * events have been reset. 3394 * events have been reset.
3327 */ 3395 */
3328Static usbd_status 3396Static usbd_status
3329uhci_portreset(uhci_softc_t *sc, int index) 3397uhci_portreset(uhci_softc_t *sc, int index)
3330{ 3398{
3331 int lim, port, x; 3399 int lim, port, x;
3332 3400
3333 if (index == 1) 3401 if (index == 1)
3334 port = UHCI_PORTSC1; 3402 port = UHCI_PORTSC1;
3335 else if (index == 2) 3403 else if (index == 2)
3336 port = UHCI_PORTSC2; 3404 port = UHCI_PORTSC2;
3337 else 3405 else
3338 return (USBD_IOERROR); 3406 return (USBD_IOERROR);
3339 3407
3340 x = URWMASK(UREAD2(sc, port)); 3408 x = URWMASK(UREAD2(sc, port));
3341 UWRITE2(sc, port, x | UHCI_PORTSC_PR); 3409 UWRITE2(sc, port, x | UHCI_PORTSC_PR);
3342 3410
3343 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY); 3411 usb_delay_ms(&sc->sc_bus, USB_PORT_ROOT_RESET_DELAY);
3344 3412
3345 DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n", 3413 DPRINTFN(3,("uhci port %d reset, status0 = 0x%04x\n",
3346 index, UREAD2(sc, port))); 3414 index, UREAD2(sc, port)));
3347 3415
3348 x = URWMASK(UREAD2(sc, port)); 3416 x = URWMASK(UREAD2(sc, port));
3349 UWRITE2(sc, port, x & ~(UHCI_PORTSC_PR | UHCI_PORTSC_SUSP)); 3417 UWRITE2(sc, port, x & ~(UHCI_PORTSC_PR | UHCI_PORTSC_SUSP));
3350 3418
3351 delay(100); 3419 delay(100);
3352 3420
3353 DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n", 3421 DPRINTFN(3,("uhci port %d reset, status1 = 0x%04x\n",
3354 index, UREAD2(sc, port))); 3422 index, UREAD2(sc, port)));
3355 3423
3356 x = URWMASK(UREAD2(sc, port)); 3424 x = URWMASK(UREAD2(sc, port));
3357 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3425 UWRITE2(sc, port, x | UHCI_PORTSC_PE);
3358 3426
3359 for (lim = 10; --lim > 0;) { 3427 for (lim = 10; --lim > 0;) {
3360 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY); 3428 usb_delay_ms(&sc->sc_bus, USB_PORT_RESET_DELAY);
3361 3429
3362 x = UREAD2(sc, port); 3430 x = UREAD2(sc, port);
3363 3431
3364 DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n", 3432 DPRINTFN(3,("uhci port %d iteration %u, status = 0x%04x\n",
3365 index, lim, x)); 3433 index, lim, x));
3366 3434
3367 if (!(x & UHCI_PORTSC_CCS)) { 3435 if (!(x & UHCI_PORTSC_CCS)) {
3368 /* 3436 /*
3369 * No device is connected (or was disconnected 3437 * No device is connected (or was disconnected
3370 * during reset). Consider the port reset. 3438 * during reset). Consider the port reset.
3371 * The delay must be long enough to ensure on 3439 * The delay must be long enough to ensure on
3372 * the initial iteration that the device 3440 * the initial iteration that the device
3373 * connection will have been registered. 50ms 3441 * connection will have been registered. 50ms
3374 * appears to be sufficient, but 20ms is not. 3442 * appears to be sufficient, but 20ms is not.
3375 */ 3443 */
3376 DPRINTFN(3,("uhci port %d loop %u, device detached\n", 3444 DPRINTFN(3,("uhci port %d loop %u, device detached\n",
3377 index, lim)); 3445 index, lim));
3378 break; 3446 break;
3379 } 3447 }
3380 3448
3381 if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) { 3449 if (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)) {
3382 /* 3450 /*
3383 * Port enabled changed and/or connection 3451 * Port enabled changed and/or connection
3384 * status changed were set. Reset either or 3452 * status changed were set. Reset either or
3385 * both raised flags (by writing a 1 to that 3453 * both raised flags (by writing a 1 to that
3386 * bit), and wait again for state to settle. 3454 * bit), and wait again for state to settle.
3387 */ 3455 */
3388 UWRITE2(sc, port, URWMASK(x) | 3456 UWRITE2(sc, port, URWMASK(x) |
3389 (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC))); 3457 (x & (UHCI_PORTSC_POEDC | UHCI_PORTSC_CSC)));
3390 continue; 3458 continue;
3391 } 3459 }
3392 3460
3393 if (x & UHCI_PORTSC_PE) 3461 if (x & UHCI_PORTSC_PE)
3394 /* Port is enabled */ 3462 /* Port is enabled */
3395 break; 3463 break;
3396 3464
3397 UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE); 3465 UWRITE2(sc, port, URWMASK(x) | UHCI_PORTSC_PE);
3398 } 3466 }
3399 3467
3400 DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n", 3468 DPRINTFN(3,("uhci port %d reset, status2 = 0x%04x\n",
3401 index, UREAD2(sc, port))); 3469 index, UREAD2(sc, port)));
3402 3470
3403 if (lim <= 0) { 3471 if (lim <= 0) {
3404 DPRINTFN(1,("uhci port %d reset timed out\n", index)); 3472 DPRINTFN(1,("uhci port %d reset timed out\n", index));
3405 return (USBD_TIMEOUT); 3473 return (USBD_TIMEOUT);
3406 } 3474 }
3407 3475
3408 sc->sc_isreset = 1; 3476 sc->sc_isreset = 1;
3409 return (USBD_NORMAL_COMPLETION); 3477 return (USBD_NORMAL_COMPLETION);
3410} 3478}
3411 3479
3412/* 3480/*
3413 * Simulate a hardware hub by handling all the necessary requests. 3481 * Simulate a hardware hub by handling all the necessary requests.
3414 */ 3482 */
3415usbd_status 3483usbd_status
3416uhci_root_ctrl_transfer(usbd_xfer_handle xfer) 3484uhci_root_ctrl_transfer(usbd_xfer_handle xfer)
3417{ 3485{
 3486 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
3418 usbd_status err; 3487 usbd_status err;
3419 3488
3420 /* Insert last in queue. */ 3489 /* Insert last in queue. */
 3490 mutex_enter(&sc->sc_lock);
3421 err = usb_insert_transfer(xfer); 3491 err = usb_insert_transfer(xfer);
 3492 mutex_exit(&sc->sc_lock);
3422 if (err) 3493 if (err)
3423 return (err); 3494 return (err);
3424 3495
3425 /* 3496 /*
3426 * Pipe isn't running (otherwise err would be USBD_INPROG), 3497 * Pipe isn't running (otherwise err would be USBD_INPROG),
3427 * so start it first. 3498 * so start it first.
3428 */ 3499 */
3429 return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3500 return (uhci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3430} 3501}
3431 3502
3432usbd_status 3503usbd_status
3433uhci_root_ctrl_start(usbd_xfer_handle xfer) 3504uhci_root_ctrl_start(usbd_xfer_handle xfer)
3434{ 3505{
3435 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3506 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
3436 usb_device_request_t *req; 3507 usb_device_request_t *req;
3437 void *buf = NULL; 3508 void *buf = NULL;
3438 int port, x; 3509 int port, x;
3439 int s, len, value, index, status, change, l, totlen = 0; 3510 int len, value, index, status, change, l, totlen = 0;
3440 usb_port_status_t ps; 3511 usb_port_status_t ps;
3441 usbd_status err; 3512 usbd_status err;
3442 3513
3443 if (sc->sc_dying) 3514 if (sc->sc_dying)
3444 return (USBD_IOERROR); 3515 return (USBD_IOERROR);
3445 3516
3446#ifdef DIAGNOSTIC 3517#ifdef DIAGNOSTIC
3447 if (!(xfer->rqflags & URQ_REQUEST)) 3518 if (!(xfer->rqflags & URQ_REQUEST))
3448 panic("uhci_root_ctrl_transfer: not a request"); 3519 panic("uhci_root_ctrl_transfer: not a request");
3449#endif 3520#endif
3450 req = &xfer->request; 3521 req = &xfer->request;
3451 3522
3452 DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n", 3523 DPRINTFN(2,("uhci_root_ctrl_control type=0x%02x request=%02x\n",
3453 req->bmRequestType, req->bRequest)); 3524 req->bmRequestType, req->bRequest));
3454 3525
3455 len = UGETW(req->wLength); 3526 len = UGETW(req->wLength);
3456 value = UGETW(req->wValue); 3527 value = UGETW(req->wValue);
3457 index = UGETW(req->wIndex); 3528 index = UGETW(req->wIndex);
3458 3529
3459 if (len != 0) 3530 if (len != 0)
3460 buf = KERNADDR(&xfer->dmabuf, 0); 3531 buf = KERNADDR(&xfer->dmabuf, 0);
3461 3532
3462#define C(x,y) ((x) | ((y) << 8)) 3533#define C(x,y) ((x) | ((y) << 8))
3463 switch(C(req->bRequest, req->bmRequestType)) { 3534 switch(C(req->bRequest, req->bmRequestType)) {
3464 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 3535 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
3465 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 3536 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
3466 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 3537 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
3467 /* 3538 /*
3468 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 3539 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
3469 * for the integrated root hub. 3540 * for the integrated root hub.
3470 */ 3541 */
3471 break; 3542 break;
3472 case C(UR_GET_CONFIG, UT_READ_DEVICE): 3543 case C(UR_GET_CONFIG, UT_READ_DEVICE):
3473 if (len > 0) { 3544 if (len > 0) {
3474 *(u_int8_t *)buf = sc->sc_conf; 3545 *(u_int8_t *)buf = sc->sc_conf;
3475 totlen = 1; 3546 totlen = 1;
3476 } 3547 }
3477 break; 3548 break;
3478 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 3549 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
3479 DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value)); 3550 DPRINTFN(2,("uhci_root_ctrl_control wValue=0x%04x\n", value));
3480 if (len == 0) 3551 if (len == 0)
3481 break; 3552 break;
3482 switch(value >> 8) { 3553 switch(value >> 8) {
3483 case UDESC_DEVICE: 3554 case UDESC_DEVICE:
3484 if ((value & 0xff) != 0) { 3555 if ((value & 0xff) != 0) {
3485 err = USBD_IOERROR; 3556 err = USBD_IOERROR;
3486 goto ret; 3557 goto ret;
3487 } 3558 }
3488 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 3559 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
3489 USETW(uhci_devd.idVendor, sc->sc_id_vendor); 3560 USETW(uhci_devd.idVendor, sc->sc_id_vendor);
3490 memcpy(buf, &uhci_devd, l); 3561 memcpy(buf, &uhci_devd, l);
3491 break; 3562 break;
3492 case UDESC_CONFIG: 3563 case UDESC_CONFIG:
3493 if ((value & 0xff) != 0) { 3564 if ((value & 0xff) != 0) {
3494 err = USBD_IOERROR; 3565 err = USBD_IOERROR;
3495 goto ret; 3566 goto ret;
3496 } 3567 }
3497 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 3568 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
3498 memcpy(buf, &uhci_confd, l); 3569 memcpy(buf, &uhci_confd, l);
3499 buf = (char *)buf + l; 3570 buf = (char *)buf + l;
3500 len -= l; 3571 len -= l;
3501 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 3572 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
3502 totlen += l; 3573 totlen += l;
3503 memcpy(buf, &uhci_ifcd, l); 3574 memcpy(buf, &uhci_ifcd, l);
3504 buf = (char *)buf + l; 3575 buf = (char *)buf + l;
3505 len -= l; 3576 len -= l;
3506 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 3577 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
3507 totlen += l; 3578 totlen += l;
3508 memcpy(buf, &uhci_endpd, l); 3579 memcpy(buf, &uhci_endpd, l);
3509 break; 3580 break;
3510 case UDESC_STRING: 3581 case UDESC_STRING:
3511#define sd ((usb_string_descriptor_t *)buf) 3582#define sd ((usb_string_descriptor_t *)buf)
3512 switch (value & 0xff) { 3583 switch (value & 0xff) {
3513 case 0: /* Language table */ 3584 case 0: /* Language table */
3514 totlen = usb_makelangtbl(sd, len); 3585 totlen = usb_makelangtbl(sd, len);
3515 break; 3586 break;
3516 case 1: /* Vendor */ 3587 case 1: /* Vendor */
3517 totlen = usb_makestrdesc(sd, len, 3588 totlen = usb_makestrdesc(sd, len,
3518 sc->sc_vendor); 3589 sc->sc_vendor);
3519 break; 3590 break;
3520 case 2: /* Product */ 3591 case 2: /* Product */
3521 totlen = usb_makestrdesc(sd, len, 3592 totlen = usb_makestrdesc(sd, len,
3522 "UHCI root hub"); 3593 "UHCI root hub");
3523 break; 3594 break;
3524 } 3595 }
3525#undef sd 3596#undef sd
3526 break; 3597 break;
3527 default: 3598 default:
3528 err = USBD_IOERROR; 3599 err = USBD_IOERROR;
3529 goto ret; 3600 goto ret;
3530 } 3601 }
3531 break; 3602 break;
3532 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 3603 case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
3533 if (len > 0) { 3604 if (len > 0) {
3534 *(u_int8_t *)buf = 0; 3605 *(u_int8_t *)buf = 0;
3535 totlen = 1; 3606 totlen = 1;
3536 } 3607 }
3537 break; 3608 break;
3538 case C(UR_GET_STATUS, UT_READ_DEVICE): 3609 case C(UR_GET_STATUS, UT_READ_DEVICE):
3539 if (len > 1) { 3610 if (len > 1) {
3540 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 3611 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
3541 totlen = 2; 3612 totlen = 2;
3542 } 3613 }
3543 break; 3614 break;
3544 case C(UR_GET_STATUS, UT_READ_INTERFACE): 3615 case C(UR_GET_STATUS, UT_READ_INTERFACE):
3545 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 3616 case C(UR_GET_STATUS, UT_READ_ENDPOINT):
3546 if (len > 1) { 3617 if (len > 1) {
3547 USETW(((usb_status_t *)buf)->wStatus, 0); 3618 USETW(((usb_status_t *)buf)->wStatus, 0);
3548 totlen = 2; 3619 totlen = 2;
3549 } 3620 }
3550 break; 3621 break;
3551 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 3622 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
3552 if (value >= USB_MAX_DEVICES) { 3623 if (value >= USB_MAX_DEVICES) {
3553 err = USBD_IOERROR; 3624 err = USBD_IOERROR;
3554 goto ret; 3625 goto ret;
3555 } 3626 }
3556 sc->sc_addr = value; 3627 sc->sc_addr = value;
3557 break; 3628 break;
3558 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 3629 case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
3559 if (value != 0 && value != 1) { 3630 if (value != 0 && value != 1) {
3560 err = USBD_IOERROR; 3631 err = USBD_IOERROR;
3561 goto ret; 3632 goto ret;
3562 } 3633 }
3563 sc->sc_conf = value; 3634 sc->sc_conf = value;
3564 break; 3635 break;
3565 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 3636 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
3566 break; 3637 break;
3567 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 3638 case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
3568 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 3639 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
3569 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 3640 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
3570 err = USBD_IOERROR; 3641 err = USBD_IOERROR;
3571 goto ret; 3642 goto ret;
3572 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 3643 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
3573 break; 3644 break;
3574 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 3645 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
3575 break; 3646 break;
3576 /* Hub requests */ 3647 /* Hub requests */
3577 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 3648 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
3578 break; 3649 break;
3579 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 3650 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
3580 DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 3651 DPRINTFN(3, ("uhci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
3581 "port=%d feature=%d\n", 3652 "port=%d feature=%d\n",
3582 index, value)); 3653 index, value));
3583 if (index == 1) 3654 if (index == 1)
3584 port = UHCI_PORTSC1; 3655 port = UHCI_PORTSC1;
3585 else if (index == 2) 3656 else if (index == 2)
3586 port = UHCI_PORTSC2; 3657 port = UHCI_PORTSC2;
3587 else { 3658 else {
3588 err = USBD_IOERROR; 3659 err = USBD_IOERROR;
3589 goto ret; 3660 goto ret;
3590 } 3661 }
3591 switch(value) { 3662 switch(value) {
3592 case UHF_PORT_ENABLE: 3663 case UHF_PORT_ENABLE:
3593 x = URWMASK(UREAD2(sc, port)); 3664 x = URWMASK(UREAD2(sc, port));
3594 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE); 3665 UWRITE2(sc, port, x & ~UHCI_PORTSC_PE);
3595 break; 3666 break;
3596 case UHF_PORT_SUSPEND: 3667 case UHF_PORT_SUSPEND:
3597 x = URWMASK(UREAD2(sc, port)); 3668 x = URWMASK(UREAD2(sc, port));
3598 if (!(x & UHCI_PORTSC_SUSP)) /* not suspended */ 3669 if (!(x & UHCI_PORTSC_SUSP)) /* not suspended */
3599 break; 3670 break;
3600 UWRITE2(sc, port, x | UHCI_PORTSC_RD); 3671 UWRITE2(sc, port, x | UHCI_PORTSC_RD);
3601 /* see USB2 spec ch. 7.1.7.7 */ 3672 /* see USB2 spec ch. 7.1.7.7 */
3602 usb_delay_ms(&sc->sc_bus, 20); 3673 usb_delay_ms(&sc->sc_bus, 20);
3603 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP); 3674 UWRITE2(sc, port, x & ~UHCI_PORTSC_SUSP);
3604 /* 10ms resume delay must be provided by caller */ 3675 /* 10ms resume delay must be provided by caller */
3605 break; 3676 break;
3606 case UHF_PORT_RESET: 3677 case UHF_PORT_RESET:
3607 x = URWMASK(UREAD2(sc, port)); 3678 x = URWMASK(UREAD2(sc, port));
3608 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR); 3679 UWRITE2(sc, port, x & ~UHCI_PORTSC_PR);
3609 break; 3680 break;
3610 case UHF_C_PORT_CONNECTION: 3681 case UHF_C_PORT_CONNECTION:
3611 x = URWMASK(UREAD2(sc, port)); 3682 x = URWMASK(UREAD2(sc, port));
3612 UWRITE2(sc, port, x | UHCI_PORTSC_CSC); 3683 UWRITE2(sc, port, x | UHCI_PORTSC_CSC);
3613 break; 3684 break;
3614 case UHF_C_PORT_ENABLE: 3685 case UHF_C_PORT_ENABLE:
3615 x = URWMASK(UREAD2(sc, port)); 3686 x = URWMASK(UREAD2(sc, port));
3616 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC); 3687 UWRITE2(sc, port, x | UHCI_PORTSC_POEDC);
3617 break; 3688 break;
3618 case UHF_C_PORT_OVER_CURRENT: 3689 case UHF_C_PORT_OVER_CURRENT:
3619 x = URWMASK(UREAD2(sc, port)); 3690 x = URWMASK(UREAD2(sc, port));
3620 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC); 3691 UWRITE2(sc, port, x | UHCI_PORTSC_OCIC);
3621 break; 3692 break;
3622 case UHF_C_PORT_RESET: 3693 case UHF_C_PORT_RESET:
3623 sc->sc_isreset = 0; 3694 sc->sc_isreset = 0;
3624 err = USBD_NORMAL_COMPLETION; 3695 err = USBD_NORMAL_COMPLETION;
3625 goto ret; 3696 goto ret;
3626 case UHF_PORT_CONNECTION: 3697 case UHF_PORT_CONNECTION:
3627 case UHF_PORT_OVER_CURRENT: 3698 case UHF_PORT_OVER_CURRENT:
3628 case UHF_PORT_POWER: 3699 case UHF_PORT_POWER:
3629 case UHF_PORT_LOW_SPEED: 3700 case UHF_PORT_LOW_SPEED:
3630 case UHF_C_PORT_SUSPEND: 3701 case UHF_C_PORT_SUSPEND:
3631 default: 3702 default:
3632 err = USBD_IOERROR; 3703 err = USBD_IOERROR;
3633 goto ret; 3704 goto ret;
3634 } 3705 }
3635 break; 3706 break;
3636 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER): 3707 case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
3637 if (index == 1) 3708 if (index == 1)
3638 port = UHCI_PORTSC1; 3709 port = UHCI_PORTSC1;
3639 else if (index == 2) 3710 else if (index == 2)
3640 port = UHCI_PORTSC2; 3711 port = UHCI_PORTSC2;
3641 else { 3712 else {
3642 err = USBD_IOERROR; 3713 err = USBD_IOERROR;
3643 goto ret; 3714 goto ret;
3644 } 3715 }
3645 if (len > 0) { 3716 if (len > 0) {
3646 *(u_int8_t *)buf = 3717 *(u_int8_t *)buf =
3647 (UREAD2(sc, port) & UHCI_PORTSC_LS) >> 3718 (UREAD2(sc, port) & UHCI_PORTSC_LS) >>
3648 UHCI_PORTSC_LS_SHIFT; 3719 UHCI_PORTSC_LS_SHIFT;
3649 totlen = 1; 3720 totlen = 1;
3650 } 3721 }
3651 break; 3722 break;
3652 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 3723 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
3653 if (len == 0) 3724 if (len == 0)
3654 break; 3725 break;
3655 if ((value & 0xff) != 0) { 3726 if ((value & 0xff) != 0) {
3656 err = USBD_IOERROR; 3727 err = USBD_IOERROR;
3657 goto ret; 3728 goto ret;
3658 } 3729 }
3659 l = min(len, USB_HUB_DESCRIPTOR_SIZE); 3730 l = min(len, USB_HUB_DESCRIPTOR_SIZE);
3660 totlen = l; 3731 totlen = l;
3661 memcpy(buf, &uhci_hubd_piix, l); 3732 memcpy(buf, &uhci_hubd_piix, l);
3662 break; 3733 break;
3663 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 3734 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
3664 if (len != 4) { 3735 if (len != 4) {
3665 err = USBD_IOERROR; 3736 err = USBD_IOERROR;
3666 goto ret; 3737 goto ret;
3667 } 3738 }
3668 memset(buf, 0, len); 3739 memset(buf, 0, len);
3669 totlen = len; 3740 totlen = len;
3670 break; 3741 break;
3671 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 3742 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
3672 if (index == 1) 3743 if (index == 1)
3673 port = UHCI_PORTSC1; 3744 port = UHCI_PORTSC1;
3674 else if (index == 2) 3745 else if (index == 2)
3675 port = UHCI_PORTSC2; 3746 port = UHCI_PORTSC2;
3676 else { 3747 else {
3677 err = USBD_IOERROR; 3748 err = USBD_IOERROR;
3678 goto ret; 3749 goto ret;
3679 } 3750 }
3680 if (len != 4) { 3751 if (len != 4) {
3681 err = USBD_IOERROR; 3752 err = USBD_IOERROR;
3682 goto ret; 3753 goto ret;
3683 } 3754 }
3684 x = UREAD2(sc, port); 3755 x = UREAD2(sc, port);
3685 status = change = 0; 3756 status = change = 0;
3686 if (x & UHCI_PORTSC_CCS) 3757 if (x & UHCI_PORTSC_CCS)
3687 status |= UPS_CURRENT_CONNECT_STATUS; 3758 status |= UPS_CURRENT_CONNECT_STATUS;
3688 if (x & UHCI_PORTSC_CSC) 3759 if (x & UHCI_PORTSC_CSC)
3689 change |= UPS_C_CONNECT_STATUS; 3760 change |= UPS_C_CONNECT_STATUS;
3690 if (x & UHCI_PORTSC_PE) 3761 if (x & UHCI_PORTSC_PE)
3691 status |= UPS_PORT_ENABLED; 3762 status |= UPS_PORT_ENABLED;
3692 if (x & UHCI_PORTSC_POEDC) 3763 if (x & UHCI_PORTSC_POEDC)
3693 change |= UPS_C_PORT_ENABLED; 3764 change |= UPS_C_PORT_ENABLED;
3694 if (x & UHCI_PORTSC_OCI) 3765 if (x & UHCI_PORTSC_OCI)
3695 status |= UPS_OVERCURRENT_INDICATOR; 3766 status |= UPS_OVERCURRENT_INDICATOR;
3696 if (x & UHCI_PORTSC_OCIC) 3767 if (x & UHCI_PORTSC_OCIC)
3697 change |= UPS_C_OVERCURRENT_INDICATOR; 3768 change |= UPS_C_OVERCURRENT_INDICATOR;
3698 if (x & UHCI_PORTSC_SUSP) 3769 if (x & UHCI_PORTSC_SUSP)
3699 status |= UPS_SUSPEND; 3770 status |= UPS_SUSPEND;
3700 if (x & UHCI_PORTSC_LSDA) 3771 if (x & UHCI_PORTSC_LSDA)
3701 status |= UPS_LOW_SPEED; 3772 status |= UPS_LOW_SPEED;
3702 status |= UPS_PORT_POWER; 3773 status |= UPS_PORT_POWER;
3703 if (sc->sc_isreset) 3774 if (sc->sc_isreset)
3704 change |= UPS_C_PORT_RESET; 3775 change |= UPS_C_PORT_RESET;
3705 USETW(ps.wPortStatus, status); 3776 USETW(ps.wPortStatus, status);
3706 USETW(ps.wPortChange, change); 3777 USETW(ps.wPortChange, change);
3707 l = min(len, sizeof ps); 3778 l = min(len, sizeof ps);
3708 memcpy(buf, &ps, l); 3779 memcpy(buf, &ps, l);
3709 totlen = l; 3780 totlen = l;
3710 break; 3781 break;
3711 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 3782 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
3712 err = USBD_IOERROR; 3783 err = USBD_IOERROR;
3713 goto ret; 3784 goto ret;
3714 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 3785 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
3715 break; 3786 break;
3716 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 3787 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
3717 if (index == 1) 3788 if (index == 1)
3718 port = UHCI_PORTSC1; 3789 port = UHCI_PORTSC1;
3719 else if (index == 2) 3790 else if (index == 2)
3720 port = UHCI_PORTSC2; 3791 port = UHCI_PORTSC2;
3721 else { 3792 else {
3722 err = USBD_IOERROR; 3793 err = USBD_IOERROR;
3723 goto ret; 3794 goto ret;
3724 } 3795 }
3725 switch(value) { 3796 switch(value) {
3726 case UHF_PORT_ENABLE: 3797 case UHF_PORT_ENABLE:
3727 x = URWMASK(UREAD2(sc, port)); 3798 x = URWMASK(UREAD2(sc, port));
3728 UWRITE2(sc, port, x | UHCI_PORTSC_PE); 3799 UWRITE2(sc, port, x | UHCI_PORTSC_PE);
3729 break; 3800 break;
3730 case UHF_PORT_SUSPEND: 3801 case UHF_PORT_SUSPEND:
3731 x = URWMASK(UREAD2(sc, port)); 3802 x = URWMASK(UREAD2(sc, port));
3732 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP); 3803 UWRITE2(sc, port, x | UHCI_PORTSC_SUSP);
3733 break; 3804 break;
3734 case UHF_PORT_RESET: 3805 case UHF_PORT_RESET:
3735 err = uhci_portreset(sc, index); 3806 err = uhci_portreset(sc, index);
3736 goto ret; 3807 goto ret;
3737 case UHF_PORT_POWER: 3808 case UHF_PORT_POWER:
3738 /* Pretend we turned on power */ 3809 /* Pretend we turned on power */
3739 err = USBD_NORMAL_COMPLETION; 3810 err = USBD_NORMAL_COMPLETION;
3740 goto ret; 3811 goto ret;
3741 case UHF_C_PORT_CONNECTION: 3812 case UHF_C_PORT_CONNECTION:
3742 case UHF_C_PORT_ENABLE: 3813 case UHF_C_PORT_ENABLE:
3743 case UHF_C_PORT_OVER_CURRENT: 3814 case UHF_C_PORT_OVER_CURRENT:
3744 case UHF_PORT_CONNECTION: 3815 case UHF_PORT_CONNECTION:
3745 case UHF_PORT_OVER_CURRENT: 3816 case UHF_PORT_OVER_CURRENT:
3746 case UHF_PORT_LOW_SPEED: 3817 case UHF_PORT_LOW_SPEED:
3747 case UHF_C_PORT_SUSPEND: 3818 case UHF_C_PORT_SUSPEND:
3748 case UHF_C_PORT_RESET: 3819 case UHF_C_PORT_RESET:
3749 default: 3820 default:
3750 err = USBD_IOERROR; 3821 err = USBD_IOERROR;
3751 goto ret; 3822 goto ret;
3752 } 3823 }
3753 break; 3824 break;
3754 default: 3825 default:
3755 err = USBD_IOERROR; 3826 err = USBD_IOERROR;
3756 goto ret; 3827 goto ret;
3757 } 3828 }
3758 xfer->actlen = totlen; 3829 xfer->actlen = totlen;
3759 err = USBD_NORMAL_COMPLETION; 3830 err = USBD_NORMAL_COMPLETION;
3760 ret: 3831 ret:
3761 xfer->status = err; 3832 xfer->status = err;
3762 s = splusb(); 3833 mutex_enter(&sc->sc_lock);
3763 usb_transfer_complete(xfer); 3834 usb_transfer_complete(xfer);
3764 splx(s); 3835 mutex_exit(&sc->sc_lock);
3765 return (USBD_IN_PROGRESS); 3836 return (USBD_IN_PROGRESS);
3766} 3837}
3767 3838
3768/* Abort a root control request. */ 3839/* Abort a root control request. */
3769void 3840void
3770uhci_root_ctrl_abort(usbd_xfer_handle xfer) 3841uhci_root_ctrl_abort(usbd_xfer_handle xfer)
3771{ 3842{
3772 /* Nothing to do, all transfers are synchronous. */ 3843 /* Nothing to do, all transfers are synchronous. */
3773} 3844}
3774 3845
3775/* Close the root pipe. */ 3846/* Close the root pipe. */
3776void 3847void
3777uhci_root_ctrl_close(usbd_pipe_handle pipe) 3848uhci_root_ctrl_close(usbd_pipe_handle pipe)
3778{ 3849{
3779 DPRINTF(("uhci_root_ctrl_close\n")); 3850 DPRINTF(("uhci_root_ctrl_close\n"));
3780} 3851}
3781 3852
3782/* Abort a root interrupt request. */ 3853/* Abort a root interrupt request. */
3783void 3854void
3784uhci_root_intr_abort(usbd_xfer_handle xfer) 3855uhci_root_intr_abort(usbd_xfer_handle xfer)
3785{ 3856{
3786 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private; 3857 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
3787 3858
3788 callout_stop(&sc->sc_poll_handle); 3859 callout_stop(&sc->sc_poll_handle);
3789 sc->sc_intr_xfer = NULL; 3860 sc->sc_intr_xfer = NULL;
3790 3861
3791 if (xfer->pipe->intrxfer == xfer) { 3862 if (xfer->pipe->intrxfer == xfer) {
3792 DPRINTF(("uhci_root_intr_abort: remove\n")); 3863 DPRINTF(("uhci_root_intr_abort: remove\n"));
3793 xfer->pipe->intrxfer = 0; 3864 xfer->pipe->intrxfer = 0;
3794 } 3865 }
3795 xfer->status = USBD_CANCELLED; 3866 xfer->status = USBD_CANCELLED;
3796#ifdef DIAGNOSTIC 3867#ifdef DIAGNOSTIC
3797 UXFER(xfer)->iinfo.isdone = 1; 3868 UXFER(xfer)->iinfo.isdone = 1;
3798#endif 3869#endif
3799 usb_transfer_complete(xfer); 3870 usb_transfer_complete(xfer);
3800} 3871}
3801 3872
3802usbd_status 3873usbd_status
3803uhci_root_intr_transfer(usbd_xfer_handle xfer) 3874uhci_root_intr_transfer(usbd_xfer_handle xfer)
3804{ 3875{
 3876 uhci_softc_t *sc = xfer->pipe->device->bus->hci_private;
3805 usbd_status err; 3877 usbd_status err;
3806 3878
3807 /* Insert last in queue. */ 3879 /* Insert last in queue. */
 3880 mutex_enter(&sc->sc_lock);
3808 err = usb_insert_transfer(xfer); 3881 err = usb_insert_transfer(xfer);
 3882 mutex_exit(&sc->sc_lock);
3809 if (err) 3883 if (err)
3810 return (err); 3884 return (err);
3811 3885
3812 /* 3886 /*
3813 * Pipe isn't running (otherwise err would be USBD_INPROG), 3887 * Pipe isn't running (otherwise err would be USBD_INPROG),
3814 * start first 3888 * start first
3815 */ 3889 */
3816 return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 3890 return (uhci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3817} 3891}
3818 3892
3819/* Start a transfer on the root interrupt pipe */ 3893/* Start a transfer on the root interrupt pipe */
3820usbd_status 3894usbd_status
3821uhci_root_intr_start(usbd_xfer_handle xfer) 3895uhci_root_intr_start(usbd_xfer_handle xfer)
3822{ 3896{
3823 usbd_pipe_handle pipe = xfer->pipe; 3897 usbd_pipe_handle pipe = xfer->pipe;
3824 uhci_softc_t *sc = pipe->device->bus->hci_private; 3898 uhci_softc_t *sc = pipe->device->bus->hci_private;
3825 unsigned int ival; 3899 unsigned int ival;
3826 3900
3827 DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n", 3901 DPRINTFN(3, ("uhci_root_intr_start: xfer=%p len=%d flags=%d\n",
3828 xfer, xfer->length, xfer->flags)); 3902 xfer, xfer->length, xfer->flags));
3829 3903
3830 if (sc->sc_dying) 3904 if (sc->sc_dying)
3831 return (USBD_IOERROR); 3905 return (USBD_IOERROR);
3832 3906
3833 /* XXX temporary variable needed to avoid gcc3 warning */ 3907 /* XXX temporary variable needed to avoid gcc3 warning */
3834 ival = xfer->pipe->endpoint->edesc->bInterval; 3908 ival = xfer->pipe->endpoint->edesc->bInterval;
3835 sc->sc_ival = mstohz(ival); 3909 sc->sc_ival = mstohz(ival);
3836 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer); 3910 callout_reset(&sc->sc_poll_handle, sc->sc_ival, uhci_poll_hub, xfer);
3837 sc->sc_intr_xfer = xfer; 3911 sc->sc_intr_xfer = xfer;
3838 return (USBD_IN_PROGRESS); 3912 return (USBD_IN_PROGRESS);
3839} 3913}
3840 3914
3841/* Close the root interrupt pipe. */ 3915/* Close the root interrupt pipe. */
3842void 3916void
3843uhci_root_intr_close(usbd_pipe_handle pipe) 3917uhci_root_intr_close(usbd_pipe_handle pipe)
3844{ 3918{
3845 uhci_softc_t *sc = pipe->device->bus->hci_private; 3919 uhci_softc_t *sc = pipe->device->bus->hci_private;
3846 3920
3847 callout_stop(&sc->sc_poll_handle); 3921 callout_stop(&sc->sc_poll_handle);
3848 sc->sc_intr_xfer = NULL; 3922 sc->sc_intr_xfer = NULL;
3849 DPRINTF(("uhci_root_intr_close\n")); 3923 DPRINTF(("uhci_root_intr_close\n"));
3850} 3924}

cvs diff -r1.48 -r1.48.14.1 src/sys/dev/usb/uhcivar.h (switch to unified diff)

--- src/sys/dev/usb/uhcivar.h 2010/11/03 22:34:23 1.48
+++ src/sys/dev/usb/uhcivar.h 2011/12/08 08:56:57 1.48.14.1
@@ -1,195 +1,199 @@ @@ -1,195 +1,199 @@
1/* $NetBSD: uhcivar.h,v 1.48 2010/11/03 22:34:23 dyoung Exp $ */ 1/* $NetBSD: uhcivar.h,v 1.48.14.1 2011/12/08 08:56:57 mrg Exp $ */
2/* $FreeBSD: src/sys/dev/usb/uhcivar.h,v 1.14 1999/11/17 22:33:42 n_hibma Exp $ */ 2/* $FreeBSD: src/sys/dev/usb/uhcivar.h,v 1.14 1999/11/17 22:33:42 n_hibma Exp $ */
3 3
4/* 4/*
5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * Copyright (c) 1998 The NetBSD Foundation, Inc.
6 * All rights reserved. 6 * All rights reserved.
7 * 7 *
8 * This code is derived from software contributed to The NetBSD Foundation 8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Lennart Augustsson (lennart@augustsson.net) at 9 * by Lennart Augustsson (lennart@augustsson.net) at
10 * Carlstedt Research & Technology. 10 * Carlstedt Research & Technology.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions 13 * modification, are permitted provided that the following conditions
14 * are met: 14 * are met:
15 * 1. Redistributions of source code must retain the above copyright 15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer. 16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright 17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the 18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution. 19 * documentation and/or other materials provided with the distribution.
20 * 20 *
21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE. 31 * POSSIBILITY OF SUCH DAMAGE.
32 */ 32 */
33 33
34/* 34/*
35 * To avoid having 1024 TDs for each isochronous transfer we introduce 35 * To avoid having 1024 TDs for each isochronous transfer we introduce
36 * a virtual frame list. Every UHCI_VFRAMELIST_COUNT entries in the real 36 * a virtual frame list. Every UHCI_VFRAMELIST_COUNT entries in the real
37 * frame list points to a non-active TD. These, in turn, form the 37 * frame list points to a non-active TD. These, in turn, form the
38 * starts of the virtual frame list. This also has the advantage that it 38 * starts of the virtual frame list. This also has the advantage that it
39 * simplifies linking in/out of TDs/QHs in the schedule. 39 * simplifies linking in/out of TDs/QHs in the schedule.
40 * Furthermore, initially each of the inactive TDs point to an inactive 40 * Furthermore, initially each of the inactive TDs point to an inactive
41 * QH that forms the start of the interrupt traffic for that slot. 41 * QH that forms the start of the interrupt traffic for that slot.
42 * Each of these QHs point to the same QH that is the start of control 42 * Each of these QHs point to the same QH that is the start of control
43 * traffic. This QH points at another QH which is the start of the 43 * traffic. This QH points at another QH which is the start of the
44 * bulk traffic. 44 * bulk traffic.
45 * 45 *
46 * UHCI_VFRAMELIST_COUNT should be a power of 2 and <= UHCI_FRAMELIST_COUNT. 46 * UHCI_VFRAMELIST_COUNT should be a power of 2 and <= UHCI_FRAMELIST_COUNT.
47 */ 47 */
48#define UHCI_VFRAMELIST_COUNT 128 48#define UHCI_VFRAMELIST_COUNT 128
49 49
50typedef struct uhci_soft_qh uhci_soft_qh_t; 50typedef struct uhci_soft_qh uhci_soft_qh_t;
51typedef struct uhci_soft_td uhci_soft_td_t; 51typedef struct uhci_soft_td uhci_soft_td_t;
52 52
53typedef union { 53typedef union {
54 struct uhci_soft_qh *sqh; 54 struct uhci_soft_qh *sqh;
55 struct uhci_soft_td *std; 55 struct uhci_soft_td *std;
56} uhci_soft_td_qh_t; 56} uhci_soft_td_qh_t;
57 57
58/* 58/*
59 * An interrupt info struct contains the information needed to 59 * An interrupt info struct contains the information needed to
60 * execute a requested routine when the controller generates an 60 * execute a requested routine when the controller generates an
61 * interrupt. Since we cannot know which transfer generated 61 * interrupt. Since we cannot know which transfer generated
62 * the interrupt all structs are linked together so they can be 62 * the interrupt all structs are linked together so they can be
63 * searched at interrupt time. 63 * searched at interrupt time.
64 */ 64 */
65typedef struct uhci_intr_info { 65typedef struct uhci_intr_info {
66 struct uhci_softc *sc; 66 struct uhci_softc *sc;
67 usbd_xfer_handle xfer; 67 usbd_xfer_handle xfer;
68 uhci_soft_td_t *stdstart; 68 uhci_soft_td_t *stdstart;
69 uhci_soft_td_t *stdend; 69 uhci_soft_td_t *stdend;
70 LIST_ENTRY(uhci_intr_info) list; 70 LIST_ENTRY(uhci_intr_info) list;
71 int isdone; /* used only when DIAGNOSTIC is defined */ 71 int isdone; /* used only when DIAGNOSTIC is defined */
72} uhci_intr_info_t; 72} uhci_intr_info_t;
73 73
74struct uhci_xfer { 74struct uhci_xfer {
75 struct usbd_xfer xfer; 75 struct usbd_xfer xfer;
76 uhci_intr_info_t iinfo; 76 uhci_intr_info_t iinfo;
77 struct usb_task abort_task; 77 struct usb_task abort_task;
78 int curframe; 78 int curframe;
79}; 79};
80 80
81#define UXFER(xfer) ((struct uhci_xfer *)(xfer)) 81#define UXFER(xfer) ((struct uhci_xfer *)(xfer))
82 82
83/* 83/*
84 * Extra information that we need for a TD. 84 * Extra information that we need for a TD.
85 */ 85 */
86struct uhci_soft_td { 86struct uhci_soft_td {
87 uhci_td_t td; /* The real TD, must be first */ 87 uhci_td_t td; /* The real TD, must be first */
88 uhci_soft_td_qh_t link; /* soft version of the td_link field */ 88 uhci_soft_td_qh_t link; /* soft version of the td_link field */
89 uhci_physaddr_t physaddr; /* TD's physical address. */ 89 uhci_physaddr_t physaddr; /* TD's physical address. */
90 usb_dma_t dma; /* TD's DMA infos */ 90 usb_dma_t dma; /* TD's DMA infos */
91 int offs; /* TD's offset in usb_dma_t */ 91 int offs; /* TD's offset in usb_dma_t */
92}; 92};
93/* 93/*
94 * Make the size such that it is a multiple of UHCI_TD_ALIGN. This way 94 * Make the size such that it is a multiple of UHCI_TD_ALIGN. This way
95 * we can pack a number of soft TD together and have the real TD well 95 * we can pack a number of soft TD together and have the real TD well
96 * aligned. 96 * aligned.
97 * NOTE: Minimum size is 32 bytes. 97 * NOTE: Minimum size is 32 bytes.
98 */ 98 */
99#define UHCI_STD_SIZE ((sizeof (struct uhci_soft_td) + UHCI_TD_ALIGN - 1) / UHCI_TD_ALIGN * UHCI_TD_ALIGN) 99#define UHCI_STD_SIZE ((sizeof (struct uhci_soft_td) + UHCI_TD_ALIGN - 1) / UHCI_TD_ALIGN * UHCI_TD_ALIGN)
100#define UHCI_STD_CHUNK 128 /*(PAGE_SIZE / UHCI_TD_SIZE)*/ 100#define UHCI_STD_CHUNK 128 /*(PAGE_SIZE / UHCI_TD_SIZE)*/
101 101
102/* 102/*
103 * Extra information that we need for a QH. 103 * Extra information that we need for a QH.
104 */ 104 */
105struct uhci_soft_qh { 105struct uhci_soft_qh {
106 uhci_qh_t qh; /* The real QH, must be first */ 106 uhci_qh_t qh; /* The real QH, must be first */
107 uhci_soft_qh_t *hlink; /* soft version of qh_hlink */ 107 uhci_soft_qh_t *hlink; /* soft version of qh_hlink */
108 uhci_soft_td_t *elink; /* soft version of qh_elink */ 108 uhci_soft_td_t *elink; /* soft version of qh_elink */
109 uhci_physaddr_t physaddr; /* QH's physical address. */ 109 uhci_physaddr_t physaddr; /* QH's physical address. */
110 int pos; /* Timeslot position */ 110 int pos; /* Timeslot position */
111 usb_dma_t dma; /* QH's DMA infos */ 111 usb_dma_t dma; /* QH's DMA infos */
112 int offs; /* QH's offset in usb_dma_t */ 112 int offs; /* QH's offset in usb_dma_t */
113}; 113};
114/* See comment about UHCI_STD_SIZE. */ 114/* See comment about UHCI_STD_SIZE. */
115#define UHCI_SQH_SIZE ((sizeof (struct uhci_soft_qh) + UHCI_QH_ALIGN - 1) / UHCI_QH_ALIGN * UHCI_QH_ALIGN) 115#define UHCI_SQH_SIZE ((sizeof (struct uhci_soft_qh) + UHCI_QH_ALIGN - 1) / UHCI_QH_ALIGN * UHCI_QH_ALIGN)
116#define UHCI_SQH_CHUNK 128 /*(PAGE_SIZE / UHCI_QH_SIZE)*/ 116#define UHCI_SQH_CHUNK 128 /*(PAGE_SIZE / UHCI_QH_SIZE)*/
117 117
118/* 118/*
119 * Information about an entry in the virtual frame list. 119 * Information about an entry in the virtual frame list.
120 */ 120 */
121struct uhci_vframe { 121struct uhci_vframe {
122 uhci_soft_td_t *htd; /* pointer to dummy TD */ 122 uhci_soft_td_t *htd; /* pointer to dummy TD */
123 uhci_soft_td_t *etd; /* pointer to last TD */ 123 uhci_soft_td_t *etd; /* pointer to last TD */
124 uhci_soft_qh_t *hqh; /* pointer to dummy QH */ 124 uhci_soft_qh_t *hqh; /* pointer to dummy QH */
125 uhci_soft_qh_t *eqh; /* pointer to last QH */ 125 uhci_soft_qh_t *eqh; /* pointer to last QH */
126 u_int bandwidth; /* max bandwidth used by this frame */ 126 u_int bandwidth; /* max bandwidth used by this frame */
127}; 127};
128 128
129typedef struct uhci_softc { 129typedef struct uhci_softc {
130 device_t sc_dev; 130 device_t sc_dev;
131 struct usbd_bus sc_bus; 131 struct usbd_bus sc_bus;
132 bus_space_tag_t iot; 132 bus_space_tag_t iot;
133 bus_space_handle_t ioh; 133 bus_space_handle_t ioh;
134 bus_size_t sc_size; 134 bus_size_t sc_size;
135 135
 136 kmutex_t sc_lock;
 137 kmutex_t sc_intr_lock;
 138 kcondvar_t sc_softwake_cv;
 139
136 uhci_physaddr_t *sc_pframes; 140 uhci_physaddr_t *sc_pframes;
137 usb_dma_t sc_dma; 141 usb_dma_t sc_dma;
138 struct uhci_vframe sc_vframes[UHCI_VFRAMELIST_COUNT]; 142 struct uhci_vframe sc_vframes[UHCI_VFRAMELIST_COUNT];
139 143
140 uhci_soft_qh_t *sc_lctl_start; /* dummy QH for low speed control */ 144 uhci_soft_qh_t *sc_lctl_start; /* dummy QH for low speed control */
141 uhci_soft_qh_t *sc_lctl_end; /* last control QH */ 145 uhci_soft_qh_t *sc_lctl_end; /* last control QH */
142 uhci_soft_qh_t *sc_hctl_start; /* dummy QH for high speed control */ 146 uhci_soft_qh_t *sc_hctl_start; /* dummy QH for high speed control */
143 uhci_soft_qh_t *sc_hctl_end; /* last control QH */ 147 uhci_soft_qh_t *sc_hctl_end; /* last control QH */
144 uhci_soft_qh_t *sc_bulk_start; /* dummy QH for bulk */ 148 uhci_soft_qh_t *sc_bulk_start; /* dummy QH for bulk */
145 uhci_soft_qh_t *sc_bulk_end; /* last bulk transfer */ 149 uhci_soft_qh_t *sc_bulk_end; /* last bulk transfer */
146 uhci_soft_qh_t *sc_last_qh; /* dummy QH at the end */ 150 uhci_soft_qh_t *sc_last_qh; /* dummy QH at the end */
147 u_int32_t sc_loops; /* number of QHs that wants looping */ 151 u_int32_t sc_loops; /* number of QHs that wants looping */
148 152
149 uhci_soft_td_t *sc_freetds; /* TD free list */ 153 uhci_soft_td_t *sc_freetds; /* TD free list */
150 uhci_soft_qh_t *sc_freeqhs; /* QH free list */ 154 uhci_soft_qh_t *sc_freeqhs; /* QH free list */
151 155
152 SIMPLEQ_HEAD(, usbd_xfer) sc_free_xfers; /* free xfers */ 156 SIMPLEQ_HEAD(, usbd_xfer) sc_free_xfers; /* free xfers */
153 157
154 u_int8_t sc_addr; /* device address */ 158 u_int8_t sc_addr; /* device address */
155 u_int8_t sc_conf; /* device configuration */ 159 u_int8_t sc_conf; /* device configuration */
156 160
157 u_int8_t sc_saved_sof; 161 u_int8_t sc_saved_sof;
158 u_int16_t sc_saved_frnum; 162 u_int16_t sc_saved_frnum;
159 163
160#ifdef USB_USE_SOFTINTR 164#ifdef USB_USE_SOFTINTR
161 char sc_softwake; 165 char sc_softwake;
162#endif /* USB_USE_SOFTINTR */ 166#endif /* USB_USE_SOFTINTR */
163 167
164 char sc_isreset; 168 char sc_isreset;
165 char sc_suspend; 169 char sc_suspend;
166 char sc_dying; 170 char sc_dying;
167 171
168 LIST_HEAD(, uhci_intr_info) sc_intrhead; 172 LIST_HEAD(, uhci_intr_info) sc_intrhead;
169 173
170 /* Info for the root hub interrupt "pipe". */ 174 /* Info for the root hub interrupt "pipe". */
171 int sc_ival; /* time between root hub intrs */ 175 int sc_ival; /* time between root hub intrs */
172 usbd_xfer_handle sc_intr_xfer; /* root hub interrupt transfer */ 176 usbd_xfer_handle sc_intr_xfer; /* root hub interrupt transfer */
173 struct callout sc_poll_handle; 177 struct callout sc_poll_handle;
174 178
175 char sc_vendor[32]; /* vendor string for root hub */ 179 char sc_vendor[32]; /* vendor string for root hub */
176 int sc_id_vendor; /* vendor ID for root hub */ 180 int sc_id_vendor; /* vendor ID for root hub */
177 181
178#if defined(__NetBSD__) || defined(__OpenBSD__) 182#if defined(__NetBSD__) || defined(__OpenBSD__)
179 device_t sc_child; /* /dev/usb# device */ 183 device_t sc_child; /* /dev/usb# device */
180#endif 184#endif
181#ifdef __NetBSD__ 185#ifdef __NetBSD__
182 struct usb_dma_reserve sc_dma_reserve; 186 struct usb_dma_reserve sc_dma_reserve;
183#endif 187#endif
184} uhci_softc_t; 188} uhci_softc_t;
185 189
186usbd_status uhci_init(uhci_softc_t *); 190usbd_status uhci_init(uhci_softc_t *);
187int uhci_intr(void *); 191int uhci_intr(void *);
188#if defined(__NetBSD__) || defined(__OpenBSD__) 192#if defined(__NetBSD__) || defined(__OpenBSD__)
189int uhci_detach(uhci_softc_t *, int); 193int uhci_detach(uhci_softc_t *, int);
190void uhci_childdet(device_t, device_t); 194void uhci_childdet(device_t, device_t);
191int uhci_activate(device_t, enum devact); 195int uhci_activate(device_t, enum devact);
192bool uhci_resume(device_t, const pmf_qual_t *); 196bool uhci_resume(device_t, const pmf_qual_t *);
193bool uhci_suspend(device_t, const pmf_qual_t *); 197bool uhci_suspend(device_t, const pmf_qual_t *);
194#endif 198#endif
195 199