 @@ -1,14 +1,14 @@
-/*	$NetBSD: hppa_machdep.c,v 1.25 2011/02/24 08:59:22 skrll Exp $	*/
+/*	$NetBSD: hppa_machdep.c,v 1.26 2011/12/08 21:00:49 skrll Exp $	*/
 /*-
  * Copyright (c) 1997 The NetBSD Foundation, Inc.
  * All rights reserved.
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
  * 1. Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
  * 2. Redistributions in binary form must reproduce the above copyright
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
 @@ -17,27 +17,27 @@
  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: hppa_machdep.c,v 1.25 2011/02/24 08:59:22 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: hppa_machdep.c,v 1.26 2011/12/08 21:00:49 skrll Exp $");
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/sa.h>
 #include <sys/lwp.h>
 #include <sys/savar.h>
 #include <sys/proc.h>
 #include <sys/ras.h>
 #include <sys/cpu.h>
 #include <sys/kernel.h>
 #include <uvm/uvm_extern.h>
 @@ -191,27 +191,27 @@ cpu_getmcontext(struct lwp *l, mcontext_
 	gr[_REG_CR27] = tf->tf_cr27;
 #if 0
 	gr[_REG_CR26] = tf->tf_cr26;
 #endif
 	ras_pc = (__greg_t)ras_lookup(l->l_proc,
 	    (void *)(gr[_REG_PCOQH] & ~HPPA_PC_PRIV_MASK));
 	if (ras_pc != -1) {
 		ras_pc |= HPPA_PC_PRIV_USER;
 		gr[_REG_PCOQH] = ras_pc;
 		gr[_REG_PCOQT] = ras_pc + 4;
+	}
-	*flags |= _UC_CPU;
+	*flags |= _UC_CPU | _UC_TLSBASE;
 	if (l->l_md.md_flags & 0) {
 		return;
+	}
 	hppa_fpu_flush(l);
 	memcpy(&mcp->__fpregs, pcb->pcb_fpregs, sizeof(mcp->__fpregs));
 	*flags |= _UC_FPU;
+}
 int
 cpu_setmcontext(struct lwp *l, const mcontext_t *mcp, unsigned int flags)
+{
 @@ -293,39 +293,43 @@ cpu_setmcontext(struct lwp *l, const mco
 		tf->tf_iioq_tail = gr[_REG_PCOQT];
 		if (tf->tf_iioq_head >= 0xc0000020) {
 			tf->tf_iioq_head &= ~HPPA_PC_PRIV_MASK;
 		} else {
 			tf->tf_iioq_head |= HPPA_PC_PRIV_USER;
+		}
 		if (tf->tf_iioq_tail >= 0xc0000020) {
 			tf->tf_iioq_tail &= ~HPPA_PC_PRIV_MASK;
 		} else {
 			tf->tf_iioq_tail |= HPPA_PC_PRIV_USER;
+		}
 		lwp_setprivate(l, (void *)(uintptr_t)gr[_REG_CR27]);
 		tf->tf_cr27	= gr[_REG_CR27];
 #if 0
 		tf->tf_sr0	= gr[_REG_SR0];
 		tf->tf_sr1	= gr[_REG_SR1];
 		tf->tf_sr2	= gr[_REG_SR2];
 		tf->tf_sr3	= gr[_REG_SR3];
 		tf->tf_sr4	= gr[_REG_SR4];
 		tf->tf_cr26	= gr[_REG_CR26];
 #endif
+	}
 	/* Restore the private thread context */
 	if (flags & _UC_TLSBASE) {
 		lwp_setprivate(l, (void *)(uintptr_t)gr[_REG_CR27]);
 		tf->tf_cr27	= gr[_REG_CR27];
+	}
 	/* Restore the floating point registers */
 	if ((flags & _UC_FPU) != 0) {
 		struct pcb *pcb = lwp_getpcb(l);
 		hppa_fpu_flush(l);
 		memcpy(pcb->pcb_fpregs, &mcp->__fpregs, sizeof(mcp->__fpregs));
+	}
 	mutex_enter(p->p_lock);
 	if (flags & _UC_SETSTACK)
 		l->l_sigstk.ss_flags |= SS_ONSTACK;
 	if (flags & _UC_CLRSTACK)
 		l->l_sigstk.ss_flags &= ~SS_ONSTACK;
 	mutex_exit(p->p_lock);

 @@ -1,14 +1,14 @@
-/*	$NetBSD: mcontext.h,v 1.6 2011/02/25 14:07:12 joerg Exp $	*/
+/*	$NetBSD: mcontext.h,v 1.7 2011/12/08 21:00:50 skrll Exp $	*/
 #ifndef _HPPA_MCONTEXT_H_
 #define	_HPPA_MCONTEXT_H_
 /*
  * General register state
  */
 #define	_NGREG		44
 #define	_REG_PSW	0
 #define	_REG_RP		2
 #define	_REG_R19	19
 #define	_REG_ARG0	26
 @@ -63,15 +63,16 @@ __lwp_getprivate_fast(void)
 	register void *__tmp;
 	__asm volatile("mfctl\t27 /* CR_TLS */, %0" : "=r" (__tmp));
 	return __tmp;
+}
 #endif /* !__ASSEMBLER__ */
 #define	_OFFSETOF_UC_GREGS 40
 #define	_UC_SETSTACK	0x00010000
 #define	_UC_CLRSTACK	0x00020000
 #define	_UC_TLSBASE	0x00040000
 #endif /* _HPPA_MCONTEXT_H_ */