 @@ -1,14 +1,14 @@
-/*	$NetBSD: db_disasm.c,v 1.13 2012/01/16 09:01:35 skrll Exp $	*/
+/*	$NetBSD: db_disasm.c,v 1.14 2012/01/17 12:08:43 skrll Exp $	*/
 /*	$OpenBSD: db_disasm.c,v 1.9 2000/04/18 20:02:45 mickey Exp $	*/
 /*
  * Copyright (c) 1999,2005 Michael Shalayeff
  * All rights reserved.
+ *
  * Permission to use, copy, modify, and distribute this software for any
  * purpose with or without fee is hereby granted, provided that the above
  * copyright notice and this permission notice appear in all copies.
+ *
  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 @@ -28,27 +28,27 @@
  *  the above copyright notice and this notice appears in all
  *  copies, and that the name of Hewlett-Packard Company not be
  *  used in advertising or publicity pertaining to distribution
  *  of the software without specific, written prior permission.
  *  Hewlett-Packard Company makes no representations about the
  *  suitability of this software for any purpose.
  */
 /*
  * unasm.c -- HP_PA Instruction Printer
  */
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: db_disasm.c,v 1.13 2012/01/16 09:01:35 skrll Exp $");
+__KERNEL_RCSID(0, "$NetBSD: db_disasm.c,v 1.14 2012/01/17 12:08:43 skrll Exp $");
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <machine/db_machdep.h>
 #include <ddb/db_access.h>
 #include <ddb/db_sym.h>
 #include <ddb/db_output.h>
 #include <ddb/db_interface.h>
 /* IMPORTANT NOTE:
  *  All modules using this header may assume that the datatype "int" is a
 @@ -1286,123 +1286,123 @@ iExInit(void)
 /*##################### Functions and Subroutines ##########################*/
 /**************************************/
 /* Miscellaneous Disassembly Routines */
 /**************************************/
 /* Add instructions */
 int
 addDasm(const struct inst *i, OFS ofs, union insn w)
+{
-	db_printf("%s\t%%r%d,%%r%d,%%r%d",addDCond(Cond4(w)),
+	db_printf("%s\t%%r%d, %%r%d, %%r%d",addDCond(Cond4(w)),
 		Rsa(w),Rsb(w),Rtc(w));
 	return (1);
+}
 /* Unit instructions */
 int
 unitDasm(const struct inst *i, OFS ofs, union insn w)
+{
 	db_printf(unitDCond(Cond4(w)));
 	if (Match("dcor") || Match("idcor"))
-		db_printf("\t%%r%d,%%r%d",Rsb(w),Rtc(w));
+		db_printf("\t%%r%d, %%r%d",Rsb(w),Rtc(w));
 	else
-		db_printf("\t%%r%d,%%r%d,%%r%d",Rsa(w),Rsb(w),Rtc(w));
+		db_printf("\t%%r%d, %%r%d, %%r%d",Rsa(w),Rsb(w),Rtc(w));
 	return (1);
+}
 /* Immediate Arithmetic instructions */
 int
 iaDasm(const struct inst *i, OFS ofs, union insn w)
+{
 	if (Match("addi"))
-		db_printf("%s\t%d,%%r%d,%%r%d",
+		db_printf("%s\t%d, %%r%d, %%r%d",
 		    addDCond(Cond4(w)),Im11(w),Rsb(w),Rta(w));
 	else
-		db_printf("%s\t%d,%%r%d,%%r%d",
+		db_printf("%s\t%d, %%r%d, %%r%d",
 		    subDCond(Cond4(w)),Im11(w),Rsb(w),Rta(w));
 	return (1);
+}
 /* Shift double instructions */
 int
 shdDasm(const struct inst *i, OFS ofs, union insn w)
+{
 	if (Match("vshd"))
-		db_printf("%s\t%%r%d,%%r%d,%%r%d",
+		db_printf("%s\t%%r%d, %%r%d, %%r%d",
 		    edDCond(Cond(w)), Rsa(w),Rsb(w),Rtc(w));
 	else
-		db_printf("%s\t%%r%d,%%r%d,%d,%%r%d",
+		db_printf("%s\t%%r%d, %%r%d, %d, %%r%d",
 		    edDCond(Cond(w)),Rsa(w),Rsb(w),31-Imd5(w),Rtc(w));
 	return (1);
+}
 /* Extract instructions */
 int
 extrDasm(const struct inst *i, OFS ofs, union insn w)
+{
-	db_printf("%s\t%%r%d,%d,%d,%%r%d",
+	db_printf("%s\t%%r%d, %d, %d, %%r%d",
 	    edDCond(Cond(w)),Rsb(w),Imd5(w),32 - Rsc(w),Rta(w));
 	return (1);
+}
 /* Variable extract instructions */
 int
 vextrDasm(const struct inst *i, OFS ofs, union insn w)
+{
-	db_printf("%s\t%%r%d,%d,%%r%d",
+	db_printf("%s\t%%r%d, %d, %%r%d",
 	    edDCond(Cond(w)),Rsb(w),32 - Rsc(w),Rta(w));
 	return (1);
+}
 /* Deposit instructions */
 int
 depDasm(const struct inst *i, OFS ofs, union insn w)
+{
-	db_printf("%s\t%%r%d,%d,%d,%%r%d",
+	db_printf("%s\t%%r%d, %d, %d, %%r%d",
 	    edDCond(Cond(w)),Rsa(w),31 - Imd5(w),32 - Rsc(w),Rtb(w));
 	return (1);
+}
 /* Variable deposit instructions */
 int
 vdepDasm(const struct inst *i, OFS ofs, union insn w)
+{
-	db_printf("%s\t%%r%d,%d,%%r%d",
+	db_printf("%s\t%%r%d, %d, %%r%d",
 	    edDCond(Cond(w)),Rsa(w),32 - Rsc(w),Rtb(w));
 	return (1);
+}
 /* Deposit Immediate instructions */
 int
 depiDasm(const struct inst *i, OFS ofs, union insn w)
+{
-	db_printf("%s\t%d,%d,%d,%%r%d",
+	db_printf("%s\t%d, %d, %d, %%r%d",
 	    edDCond(Cond(w)),Ima5(w),31 - Imd5(w),32 - Imc5A(w),Rtb(w));
 	return (1);
+}
 /* Variable Deposit Immediate instructions */
 int
 vdepiDasm(const struct inst *i, OFS ofs, union insn w)
+{
-	db_printf("%s\t%d,%d,%%r%d",edDCond(Cond(w)),Ima5(w),32-Imc5A(w),Rtb(w));
+	db_printf("%s\t%d, %d, %%r%d",edDCond(Cond(w)),Ima5(w),32-Imc5A(w),Rtb(w));
 	return (1);
+}
 /*---------------------------------------------------------------------------
  * conditionType$DisassembleCondition - Return a string which contains the
  *  ascii description of the passed numeric condition.
  *---------------------------------------------------------------------------*/
 const char *
 subDCond(u_int cond)
+{
 	switch(cond) {
 	case EQZ:	return(",=");
 @@ -1507,57 +1507,57 @@ int
 ldDasm(const struct inst *i, OFS ofs, union insn w)
+{
 	int d = Disp(w);
 	char s[2];
 	s[1] = '\0';
 	if (d < 0) {
 		d = -d;
 		s[0] = '-';
 	} else
 		s[0] = '\0';
 	if (Rsb(w) == 0 && Match("ldo")) {
-		db_printf("ldi\t%s%X,%%r%d",s,d,Rta(w));
+		db_printf("ldi\t%s%X, %%r%d",s,d,Rta(w));
 		return (1);
+	}
 	db_printf("%s\t%s%s%X",i->mnem,(d < 2048? "R'":""), s, d);
 	if (Dss(w))
-		db_printf("(%%sr%d,%%r%d),%%r%d",Dss(w),Rsb(w),Rta(w));
+		db_printf("(%%sr%d, %%r%d), %%r%d",Dss(w),Rsb(w),Rta(w));
 	else
-		db_printf("(%%r%d),%%r%d",Rsb(w),Rta(w));
+		db_printf("(%%r%d), %%r%d",Rsb(w),Rta(w));
 	return (1);
+}
 /* Store [modify] instructions */
 int
 stDasm(const struct inst *i, OFS ofs, union insn w)
+{
 	int d = Disp(w);
 	char s[2];
-	db_printf("\t%%r%d,",Rta(w));
+	db_printf("\t%%r%d, ",Rta(w));
 	s[1] = '\0';
 	if (d < 0) {
 		d = -d;
 		s[0] = '-';
 	} else
 		s[0] = '\0';
 	db_printf("%s%s%X", (d < 2048? "R'":""), s, d);
 	if (Dss(w))
-		db_printf("(%%sr%d,%%r%d)",Dss(w),Rsb(w));
+		db_printf("(%%sr%d, %%r%d)",Dss(w),Rsb(w));
 	else
 		db_printf("(%%r%d)",Rsb(w));
 	return (1);
+}
 /* Load indexed instructions */
 int
 ldxDasm(const struct inst *i, OFS ofs, union insn w)
+{
 	const char *p;
 	if (ShortDisp(w)) {
 		db_printf("s");
 @@ -1571,115 +1571,115 @@ ldxDasm(const struct inst *i, OFS ofs, u
 	switch (CacheCtrl(w)) {
 	default:
 	case NOACTION:	p = "";   break;
 	case STACKREF:	p = ",c"; break;
 	case SEQPASS:	p = ",q"; break;
 	case PREFETCH:	p = ",p"; break;
+	}
 	if (ShortDisp(w))
 		db_printf("%s\t%d", p, Ima5(w));
 	else
 		db_printf("%s\t%%r%d", p, Rsa(w));
 	if (Dss(w))
-		db_printf("(%%sr%d,%%r%d),%%r%d",Dss(w),Rsb(w),Rtc(w));
+		db_printf("(%%sr%d, %%r%d), %%r%d",Dss(w),Rsb(w),Rtc(w));
 	else
-		db_printf("(%%r%d),%%r%d",Rsb(w),Rtc(w));
+		db_printf("(%%r%d), %%r%d",Rsb(w),Rtc(w));
 	return (1);
+}
 /* Store short displacement instructions */
 int
 stsDasm(const struct inst *i, OFS ofs, union insn w)
+{
 	const char *p;
 	if (Modify(w))
 		db_printf(",m%s", ModBefore(w)? "b":"a");
 	switch (CacheCtrl(w)) {
 	default:
 	case NOACTION:	p = "";   break;
 	case STACKREF:	p = ",c"; break;
 	case SEQPASS:	p = ",q"; break;
 	case PREFETCH:	p = ",p"; break;
+	}
-	db_printf("%s\t%%r%d,", p, Rta(w));
+	db_printf("%s\t%%r%d, ", p, Rta(w));
 	if (Dss(w))
-		db_printf("%d(%%sr%d,%%r%d)",Imc5(w),Dss(w),Rsb(w));
+		db_printf("%d(%%sr%d, %%r%d)",Imc5(w),Dss(w),Rsb(w));
 	else
 		db_printf("%d(%%r%d)",Imc5(w),Rsb(w));
 	return (1);
+}
 /* Store Bytes Instruction */
 int
 stbysDasm(const struct inst *i, OFS ofs, union insn w)
+{
 	const char *p;
 	db_printf(ModBefore(w)? ",e":",b");
 	if (Modify(w))
 		db_printf(",m");
 	switch (CacheCtrl(w)) {
 	default:
 	case NOACTION:	p = "";   break;
 	case STACKREF:	p = ",f"; break;
 	case SEQPASS:	p = ",r"; break;
 	case PREFETCH:	p = ",z"; break;
+	}
-	db_printf("%s\t%%r%d,", p, Rta(w));
+	db_printf("%s\t%%r%d, ", p, Rta(w));
 	if (Dss(w))
-		db_printf("%d(%%sr%d,%%r%d)",Imc5(w),Dss(w),Rsb(w));
+		db_printf("%d(%%sr%d, %%r%d)",Imc5(w),Dss(w),Rsb(w));
 	else
 		db_printf("%d(%%r%d)",Imc5(w),Rsb(w));
 	return (1);
+}
 /* Long Immediate instructions */
 int
 limmDasm(const struct inst *i, OFS ofs, union insn w)
+{
-	db_printf("\tL'%X,%%r%d", Im21(w), Rtb(w));
+	db_printf("\tL'%X, %%r%d", Im21(w), Rtb(w));
 	return (1);
+}
 /* Branch and Link instruction(s) (Branch, too!!) */
 int
 blDasm(const struct inst *i, OFS ofs, union insn w)
+{
 	OFS tgtofs = ofs + 8 + Bdisp(w);
 	u_int link = Rtb(w);
 	if (link && !Match("gate"))
 		db_printf("l");
 	if (Nu(w))
 		db_printf(",n");
 	db_printf("\t");
 	db_printsym((db_addr_t)tgtofs, DB_STGY_ANY, db_printf);
 	if (link || Match("gate"))
-		db_printf(",%%r%d",link);
+		db_printf(", %%r%d",link);
 	return (1);
+}
 /* Branch Register instruction */
 int
 brDasm(const struct inst *i, OFS ofs, union insn w)
+{
-	db_printf("%s\t%%r%d,%%r%d", Nu(w)?",n":"", Rsa(w), Rtb(w));
+	db_printf("%s\t%%r%d, %%r%d", Nu(w)?",n":"", Rsa(w), Rtb(w));
 	return (1);
+}
 /* Dispatch instructions */
 int
 bvDasm(const struct inst *i, OFS ofs, union insn w)
+{
 	db_printf("%s\t%%r%d(%%r%d)", Nu(w)?",n":"", Rsa(w), Rsb(w));
 	return (1);
+}
 /* Branch External instructions */
 int
 @@ -1687,191 +1687,191 @@ beDasm(const struct inst *i, OFS ofs, un
+{
 	int d = Bdisp(w);
 	const char *p;
 	char s[2];
 	s[1] = '\0';
 	if (d < 0) {
 		d = -d;
 		s[0] = '-';
 	} else
 		s[0] = '\0';
 	p =  Nu(w)? ",n":"";
-	db_printf("%s\tR'%s%X(%%sr%d,%%r%d)", p,
+	db_printf("%s\tR'%s%X(%%sr%d, %%r%d)", p,
 	    s, d, Sr(w), Rsb(w));
 	return (1);
+}
 /* Compare/Add and Branch instructions */
 int
 cbDasm(const struct inst *i, OFS ofs, union insn w)
+{
 	OFS tgtofs = ofs + 8 + Cbdisp(w);
 	if (Match("movb"))
 		db_printf(edDCond(Cond(w)));
 	else if (Match("addb"))
 		db_printf(addDCond(Cond(w) << 1));
 	else
 		db_printf(subDCond(Cond(w) << 1));
-	db_printf("%s\t%%r%d,%%r%d,", Nu(w)?",n":"", Rsa(w), Rsb(w));
+	db_printf("%s\t%%r%d, %%r%d,", Nu(w)?",n":"", Rsa(w), Rsb(w));
 	db_printsym((db_addr_t)tgtofs, DB_STGY_ANY, db_printf);
 	return (1);
+}
 /* Compare/Add and Branch Immediate instructions */
 int
 cbiDasm(const struct inst *i, OFS ofs, union insn w)
+{
 	OFS tgtofs = ofs + 8 + Cbdisp(w);
 	if (Match("movib"))
 		db_printf(edDCond(Cond(w)));
 	else if (Match("addib"))
 		db_printf(addDCond(Cond(w) << 1));
 	else
 		db_printf(subDCond(Cond(w) << 1));
-	db_printf("%s\t%d,%%r%d,", Nu(w)? ",n":"", Ima5(w), Rsb(w));
+	db_printf("%s\t%d, %%r%d, ", Nu(w)? ",n":"", Ima5(w), Rsb(w));
 	db_printsym((db_addr_t)tgtofs, DB_STGY_ANY, db_printf);
 	return (1);
+}
 /* Branch on Bit instructions */
 int
 bbDasm(const struct inst *i, OFS ofs, union insn w)
+{
 	OFS tgtofs = ofs + 8 + Cbdisp(w);
 	const char *p;
 	db_printf(edDCond(Cond(w)));
 	p = Nu(w)? ",n":"";
 	if (Match("bvb"))
-		db_printf("%s\t%%r%d,", p, Rta(w));
+		db_printf("%s\t%%r%d, ", p, Rta(w));
 	else
-		db_printf("%s\t%%r%d,%d,", p, Rsa(w), Imb5(w));
+		db_printf("%s\t%%r%d, %d, ", p, Rsa(w), Imb5(w));
 	db_printsym((db_addr_t)tgtofs, DB_STGY_ANY, db_printf);
 	return (1);
+}
 /* Arithmetic instructions */
 int
 ariDasm(const struct inst *i, OFS ofs, union insn w)
+{
 	if (Match("or") && Rsb(w) == 0 && Cond4(w) == NEV) {
 		if (Rsa(w) == 0 && Rtc(w) == 0)
 			db_printf("nop");
 		else
-			db_printf("copy\t%%r%d,%%r%d",Rsa(w),Rtc(w));
+			db_printf("copy\t%%r%d, %%r%d",Rsa(w),Rtc(w));
 	} else
-		db_printf("%s%s\t%%r%d,%%r%d,%%r%d", i->mnem,
+		db_printf("%s%s\t%%r%d, %%r%d, %%r%d", i->mnem,
 			  subDCond(Cond4(w)), Rsa(w),Rsb(w),Rtc(w));
 	return(1);
+}
 /* System control operations */
 int
 scDasm(const struct inst *i, OFS ofs, union insn w)
+{
 	if (Match("mtctl")) {
 		if (Rtb(w) == 11)
 			db_printf("mtsar\t%%r%d",Rsa(w));
 		else
-			db_printf("mtctl\t%%r%d,%%cr%d",Rsa(w),Rtb(w));
+			db_printf("mtctl\t%%r%d, %%cr%d",Rsa(w),Rtb(w));
 		return (1);
+	}
 	db_printf(i->mnem);
 	if (Match("ssm") || Match("rsm"))
-		db_printf("\t%d,%%r%d",Ima5A(w),Rtc(w));
+		db_printf("\t%d, %%r%d",Ima5A(w),Rtc(w));
 	else if (Match("mtsm")) db_printf("\t%%r%d",Rsa(w));
 	else if (Match("ldprid")) db_printf("\t%%r%d",Rtc(w));
-	else if (Match("mtsp")) db_printf("\t%%r%d,%%sr%d",Rsa(w),Sr(w));
+	else if (Match("mtsp")) db_printf("\t%%r%d, %%sr%d",Rsa(w),Sr(w));
-	else if (Match("mfsp")) db_printf("\t%%sr%d,%%r%d",Sr(w),Rtc(w));
+	else if (Match("mfsp")) db_printf("\t%%sr%d, %%r%d",Sr(w),Rtc(w));
-	else if (Match("mfctl")) db_printf("\t%%cr%d,%%r%d",Rsb(w),Rtc(w));
+	else if (Match("mfctl")) db_printf("\t%%cr%d, %%r%d",Rsb(w),Rtc(w));
 	else if (Match("ldsid")) {
 		if (Dss(w))
-			db_printf("\t(%%sr%d,%%r%d),%%r%d",Dss(w),Rsb(w),Rtc(w));
+			db_printf("\t(%%sr%d, %%r%d), %%r%d",Dss(w),Rsb(w),Rtc(w));
 		else
-			db_printf("\t(%%r%d),%%r%d",Rsb(w),Rtc(w));
+			db_printf("\t(%%r%d), %%r%d",Rsb(w),Rtc(w));
 	} else {
 		db_printf("?????");
 		return (0);
+	}
 	return (1);
+}
 /* Instruction cache/tlb control instructions */
 int
 mmgtDasm(const struct inst *i, OFS ofs, union insn w)
+{
 	if (Match("probe")) {
 		if (ProbeI(w)) {
 			if (Dss(w))
-				db_printf("i\t(%%sr%d,%%r%d),%d,%%r%d",
+				db_printf("i\t(%%sr%d, %%r%d), %d, %%r%d",
 				    Dss(w),Rsb(w),Rsa(w),Rtc(w));
 			else
-				db_printf("i\t(%%r%d),%d,%%r%d",
+				db_printf("i\t(%%r%d), %d, %%r%d",
 				    Rsb(w),Rsa(w),Rtc(w));
 		} else {
 			if (Dss(w))
-				db_printf("\t(%%sr%d,%%r%d),%%r%d,%%r%d",
+				db_printf("\t(%%sr%d, %%r%d), %%r%d, %%r%d",
 				    Dss(w),Rsb(w),Rsa(w),Rtc(w));
 			else
-				db_printf("\t(%%r%d),%%r%d,%%r%d",
+				db_printf("\t(%%r%d), %%r%d, %%r%d",
 				    Rsb(w),Rsa(w),Rtc(w));
+		}
+	}
 	else if (Match("lha") || Match("lpa")) {
 		if (Modify(w))
 			db_printf(",m");
 		if (Dss(w))
-			db_printf("\t%%r%d(%%sr%d,%%r%d),%%r%d",
+			db_printf("\t%%r%d(%%sr%d, %%r%d), %%r%d",
 			    Rsa(w),Dss(w),Rsb(w),Rtc(w));
 		else
-			db_printf("\t%%r%d(%%r%d),%%r%d",Rsa(w),Rsb(w),Rtc(w));
+			db_printf("\t%%r%d(%%r%d), %%r%d",Rsa(w),Rsb(w),Rtc(w));
+	}
 	else if (Match("pdtlb") || Match("pdc") || Match("fdc")) {
 		if (Modify(w)) db_printf(",m");
 		if (Dss(w))
-			db_printf("\t%%r%d(%%sr%d,%%r%d)",Rsa(w),Dss(w),Rsb(w));
+			db_printf("\t%%r%d(%%sr%d, %%r%d)",Rsa(w),Dss(w),Rsb(w));
 		else
 			db_printf("\t%%r%d(%%r%d)",Rsa(w),Rsb(w));
+	}
 	else if (Match("pitlb") || Match("fic")) {
 		if (Modify(w))
 			db_printf(",m");
-		db_printf("\t%%r%d(%%sr%d,%%r%d)",Rsa(w),Sr(w),Rsb(w));
+		db_printf("\t%%r%d(%%sr%d, %%r%d)",Rsa(w),Sr(w),Rsb(w));
+	}
 	else if (Match("idtlb")) {
 		if (Dss(w))
-			db_printf("\t%%r%d,(%%sr%d,%%r%d)",Rsa(w),Dss(w),Rsb(w));
+			db_printf("\t%%r%d, (%%sr%d, %%r%d)",Rsa(w),Dss(w),Rsb(w));
 		else
-			db_printf("\t%%r%d,(%%r%d)",Rsa(w),Rsb(w));
+			db_printf("\t%%r%d, (%%r%d)",Rsa(w),Rsb(w));
+	}
 	else if (Match("iitlb"))
-		db_printf("\t%%r%d,(%%sr%d,%%r%d)",Rsa(w),Sr(w),Rsb(w));
+		db_printf("\t%%r%d, (%%sr%d, %%r%d)",Rsa(w),Sr(w),Rsb(w));
 	else {
 		db_printf("?????");
 		return (0);
+	}
 	return(1);
+}
 /* break instruction */
 int
 brkDasm(const struct inst *i, OFS ofs, union insn w)
+{
-	db_printf("\t%d,%d",Bi1(w),Bi2(w));
+	db_printf("\t%d, %d",Bi1(w),Bi2(w));
 	return (1);
+}
 int
 floatDasm(const struct inst *i, OFS ofs, union insn w)
+{
 	u_int op1, r1, fmt, t;
 	u_int op2, r2, dfmt;
 	const char *p;
 	op1 = CoprExt1(w);
 	op2 = CoprExt2(w);
 	fmt = (op1 >> 2) & 3;		/* get precision of source  */
 @@ -1894,88 +1894,88 @@ floatDasm(const struct inst *i, OFS ofs,
 			r2++;
 		if ((op1 & 1) == 0) {		/* class 2 */
 			/* Opclass 2: 2 sources, no destination */
 			switch((op1 >> 4) & 7) {
 			case 0:
 				p = "cmp";
 				break;
 			default:
 				db_printf(fcoprUndef);
 				return(0);
+			}
 			db_printf("%s,%s",p,fmtStrTbl[fmt]);
-			db_printf(",%s\t%%f%s,%%f%s",
+			db_printf(",%s\t%%f%s, %%f%s",
 			    condStrTbl[op2], ST(r1), ST(r2));
 			return (1);
+		}
 		/*
 		 * get target register (class 3)
 		 */
 		t = (op2 << 1);
 		if ((fmt & 1) == 0 && (Uid(w) & 1))
 			t++;
 		/* Opclass 3: 2 sources, 1 destination */
 		switch((op1 >> 4) & 7) {
 		case 0: p = "add"; break;
 		case 1: p = "sub"; break;
 		case 2: p = (Fpi(w)) ? "mpyi" : "mpy"; break;
 		case 3: p = "div"; break;
 		case 4: p = "rem"; break;
 		default: db_printf(fcoprUndef); return (0);
+		}
 		db_printf("%s,%s", p, fmtStrTbl[fmt]);
-		db_printf("\t%%f%s,%%f%s,%%f%s",ST(r1),ST(r2),ST(t));
+		db_printf("\t%%f%s, %%f%s, %%f%s",ST(r1),ST(r2),ST(t));
 	} else if (op1 & 1) {			/* class 1 */
 		dfmt = (op1 >> 4) & 3;
 #define DT(r) ((dfmt & 1)? fdreg[(r)]:fsreg[(r)])
 		/*
 		 * get target register
 		 */
 		t = (op2 << 1);
 		if ((dfmt & 1) == 0 && (Uid(w) & 1))
 			t++;
 		/* Opclass 1: 1 source, 1 destination conversions */
 		p = &"ff\0\0xf\0\0fx\0\0fxt\0"[((op1) >> 4) & 0x0c];
 #if 0
 		switch((op1 >> 6) & 3) {
 		default:
 		case 0: p = "ff"; break;
 		case 1: p = "xf"; break;
 		case 2: p = "fx"; break;
 		case 3: p = "fxt"; break;
+		}
 #endif
 		db_printf("%s,%s", p, fmtStrTbl[fmt]);
-		db_printf(",%s\t%%f%s,%%f%s",fmtStrTbl[dfmt],ST(r1),DT(t));
+		db_printf(",%s\t%%f%s, %%f%s",fmtStrTbl[dfmt],ST(r1),DT(t));
 	} else {				/* class 0 */
 		/*
 		 * get target register
 		 */
 		t = (op2 << 1);
 		if ((fmt & 1) == 0 && (Uid(w) & 1))
 			t++;
 		/* Opclass 0: 1 source, 1 destination */
 		switch((op1 >> 4) & 7) {
 		case 1: p = "rsqrt"; break;
 		case 2: p = "cpy"; break;
 		case 3: p = "abs"; break;
 		case 4: p = "sqrt"; break;
 		case 5: p = "rnd"; break;
 		default: db_printf(fcoprUndef); return (0);
+		}
 		db_printf("%s,%s",p,fmtStrTbl[fmt]);
-		db_printf("\t%%f%s,%%f%s",ST(r1),ST(t));
+		db_printf("\t%%f%s, %%f%s",ST(r1),ST(t));
+	}
 	return (1);
+}
 int
 fcoprDasm(union insn w, u_int op1, u_int op2)
+{
 	u_int r1, r2, t, fmt, dfmt;
 	const char *p;
 	if (AstNu(w) && op1 == ((1<<4) | 2)) {
 		if (op2 == 0 || op2 == 1 || op2 == 2) {
 			db_printf("ftest");
 @@ -1992,68 +1992,68 @@ fcoprDasm(union insn w, u_int op1, u_int
+	}
 	switch(op1 & 3) {
 	    case 0:
 		/* Opclass 0: 1 source, 1 destination */
 		r1 = (op1 >> 12) & 0x1f; t = op2; fmt = (op1 >> 2) & 3;
 		switch((op1 >> 4) & 7) {
 		case 1: p = "rsqrt"; break;
 		case 2: p = "cpy"; break;
 		case 3: p = "abs"; break;
 		case 4: p = "sqrt"; break;
 		case 5: p = "rnd"; break;
 		default: db_printf(fcoprUndef); return(0);
+		}
-		db_printf("f%s,%s\t%%fr%d,%%fr%d", p, fmtStrTbl[fmt], r1, t);
+		db_printf("f%s,%s\t%%fr%d, %%fr%d", p, fmtStrTbl[fmt], r1, t);
 		break;
 	    case 1:
 		/* Opclass 1: 1 source, 1 destination conversions */
 		r1 = (op1 >> 12) & 0x1f; t = op2;
 		fmt = (op1 >> 2) & 3; dfmt = (op1 >> 4) & 3;
 		p = &"ff\0\0xf\0\0fx\0\0fxt\0"[((op1) >> 4) & 0x0c];
 #if 0
 		switch((op1 >> 6) & 3) {
 		case 0: p = "ff"; break;
 		case 1: p = "xf"; break;
 		case 2: p = "fx"; break;
 		case 3: p = "fxt"; break;
+		}
 #endif
-		db_printf("fcnv%s,%s,%s\t%%fr%d,%%fr%d",
+		db_printf("fcnv%s,%s,%s\t%%fr%d, %%fr%d",
 		    p, fmtStrTbl[fmt], fmtStrTbl[dfmt], r1, t);
 		break;
 	    case 2:
 		/* Opclass 2: 2 sources, no destination */
 		r1 = (op1 >> 12) & 0x1f; r2 = (op1 >> 7) & 0x1f;
 		fmt = (op1 >> 2) & 3;
 		switch((op1 >> 4) & 7) {
 		case 0: p = "fcmp"; break;
 		default: db_printf(fcoprUndef); return (0);
+		}
-		db_printf("%s,%s,%s\t%%fr%d,%%fr%d",
+		db_printf("%s,%s,%s\t%%fr%d, %%fr%d",
 		    p,fmtStrTbl[fmt],condStrTbl[op2],r1,r2);
 		break;
 	    case 3:
 		/* Opclass 3: 2 sources, 1 destination */
 		r1 = (op1 >> 12) & 0x1f; r2 = (op1 >> 7) & 0x1f; t = op2;
 		fmt = (op1 >> 2) & 3;
 		switch((op1 >> 4) & 7) {
 		case 0: p = "add"; break;
 		case 1: p = "sub"; break;
 		case 2: p = "mpy"; break;
 		case 3: p = "div"; break;
 		case 4: p = "rem"; break;
 		default: db_printf(fcoprUndef); return (0);
+		}
-		db_printf("f%s,%s\t%%fr%d,%%fr%d,%%fr%d",
+		db_printf("f%s,%s\t%%fr%d, %%fr%d, %%fr%d",
 		    p, fmtStrTbl[fmt], r1, r2, t);
 		break;
 	    default:
 		    db_printf(fcoprUndef);
 		    return(0);
+	}
 	return (1);
+}
 int
 coprDasm(const struct inst *i, OFS ofs, union insn w)
+{
 	u_int uid = Uid(w);
 @@ -2107,43 +2107,43 @@ coprDasm(const struct inst *i, OFS ofs,
 	if (load) {
 		const char *p;
 		if (dreg)
 			p = fdreg[(Rtc(w)<<1)+(uid&1)];
 		else
 			p = fsreg[(Rtc(w)<<1)+(uid&1)];
 		if (ShortDisp(w))
 			db_printf("\t%d",Ima5(w));
 		else
 			db_printf("\t%%r%d",Rsa(w));
 		if (Dss(w))
-			db_printf("(%%sr%d,%%r%d),%%f%s", Dss(w),Rsb(w), p);
+			db_printf("(%%sr%d, %%r%d), %%f%s", Dss(w),Rsb(w), p);
 		else
-			db_printf("(%%r%d),%%f%s",Rsb(w), p);
+			db_printf("(%%r%d), %%f%s",Rsb(w), p);
 	} else {
 		const char *p;
 		if (dreg)
 			p = fdreg[(Rsc(w)<<1)+(uid&1)];
 		else
 			p = fsreg[(Rsc(w)<<1)+(uid&1)];
 		if (ShortDisp(w))
-			db_printf("\t%%f%s,%d", p, Ima5(w));
+			db_printf("\t%%f%s, %d", p, Ima5(w));
 		else
-			db_printf("\t%%f%s,%%r%d", p, Rta(w));
+			db_printf("\t%%f%s, %%r%d", p, Rta(w));
 		if (Dss(w))
-			db_printf("(%%sr%d,%%r%d)",Dss(w),Rsb(w));
+			db_printf("(%%sr%d, %%r%d)",Dss(w),Rsb(w));
 		else
 			db_printf("(%%r%d)",Rsb(w));
+	}
 	return (1);
+}
 int
 lpkDasm(const struct inst *i, OFS ofs, union insn w)
+{
 	/*
 	 * Floating point STore Quad
 	 * Short or Indexed
 	 */
 @@ -2153,84 +2153,84 @@ lpkDasm(const struct inst *i, OFS ofs, u
 	} else {
 		if (Modify(w))
 			db_printf(",%sm", IndxShft(w)? "s":"");
 		else if (IndxShft(w))
 			db_printf(",s");
+	}
 	switch (CacheCtrl(w)) {
 	case NOACTION:	break;
 	case STACKREF:	db_printf(",c"); break;
 	case SEQPASS:	db_printf(",q"); break;
 	case PREFETCH:	db_printf(",p"); break;
+	}
 	if (ShortDisp(w))
-		db_printf("\t%%fr%d,%d",Rsc(w),Ima5(w));
+		db_printf("\t%%fr%d, %d",Rsc(w),Ima5(w));
 	else
-		db_printf("\t%%fr%d,%%r%d",Rsc(w),Rta(w));
+		db_printf("\t%%fr%d, %%r%d",Rsc(w),Rta(w));
 	if (Dss(w))
-		db_printf("(%%sr%d,%%r%d)",Dss(w),Rsb(w));
+		db_printf("(%%sr%d, %%r%d)",Dss(w),Rsb(w));
 	else
 		db_printf("(%%r%d)",Rsb(w));
 	return (1);
+}
 int
 diagDasm(const struct inst *i, OFS ofs, union insn w)
+{
 	if (0x0b0 == BitfR(w,19,8,_b198))	/* mtcpu */
-		db_printf("mtcpu\t%%r%d,%%dr%d", Rsa(w), Rtb(w));
+		db_printf("mtcpu\t%%r%d, %%dr%d", Rsa(w), Rtb(w));
 	else if (0x0d0 == BitfR(w,19,8,_b198))	/* mfcpu */
-		db_printf("mfcpu\t%%dr%d,%%r%d", Rsb(w), Rta(w));
+		db_printf("mfcpu\t%%dr%d, %%r%d", Rsb(w), Rta(w));
 	else {
 		db_printf(i->mnem);
 		if (Match("diag"))
 			db_printf("\t0x%X",w.w & 0x03ffffff);
 		else {
 			db_printf("?????");
 			return (0);
+		}
+	}
 	return (1);
+}
 int
 fmpysubDasm(const struct inst *i, OFS ofs, union insn w)
+{
 	if (SinglePrec(w))
-		db_printf("SUB,SGL\t%%f%s,%%f%s,%%f%s,%%f%s,%%f%s",
+		db_printf("sub,sgl\t%%f%s, %%f%s, %%f%s, %%f%s, %%f%s",
 		    fsreg[Ms1(w)], fsreg[Ms2(w)], fsreg[Mt(w)],
 		    fsreg[As(w)], fsreg[Ad(w)]);
 	else
-		db_printf("SUB,DBL\t%%f%s,%%f%s,%%f%s,%%f%s,%%f%s",
+		db_printf("sub,dbl\t%%f%s, %%f%s, %%f%s, %%f%s, %%f%s",
 		    fdreg[Ms1(w)], fdreg[Ms2(w)], fdreg[Mt(w)],
 		    fdreg[As(w)], fdreg[Ad(w)]);
 	return (1);
+}
 int
 fmpyaddDasm(const struct inst *i, OFS ofs, union insn w)
+{
 	const char
 		*ms1 = SinglePrec(w) ? fsreg[Ms1(w)] : fdreg[Ms1(w)],
 		*ms2 = SinglePrec(w) ? fsreg[Ms2(w)] : fdreg[Ms2(w)],
 		*mt  = SinglePrec(w) ? fsreg[Mt(w)]  : fdreg[Mt(w)],
 		*as  = SinglePrec(w) ? fsreg[As(w)]  : fdreg[As(w)],
 		*ad  = SinglePrec(w) ? fsreg[Ad(w)]  : fdreg[Ad(w)];
 	if (Rsd(w) == 0)
-		db_printf("\t%%fcfxt,%s,%%f%s,%%f%s,%%f%s",
+		db_printf("\t%%fcfxt, %s, %%f%s, %%f%s, %%f%s",
 		    ((SinglePrec(w)) ? "sgl" : "dbl"), ms1, ms2, mt);
 	else
-		db_printf("add%s\t%%f%s,%%f%s,%%f%s,%%f%s,%%f%s",
+		db_printf("add%s\t%%f%s, %%f%s, %%f%s, %%f%s, %%f%s",
 		    ((SinglePrec(w)) ? "sgl" : "dbl"), ms1, ms2, mt, as, ad);
 	return (1);
+}
 vaddr_t
 db_disasm(vaddr_t loc, bool flag)
+{
 	const struct inst *i;
 	const struct majoropcode *m;
 	u_int ext;
 	union insn instruct;
 	OFS ofs = 0;