Thu Jan 19 17:29:23 2012 UTC ()
Enable interrupts (even though they are not yet used).


(matt)
diff -r1.1.2.2 -r1.1.2.3 src/sys/arch/mips/rmi/rmixl_i2c_pci.c
cvs diff -r1.1.2.2 -r1.1.2.3 src/sys/arch/mips/rmi/Attic/rmixl_i2c_pci.c (expand / switch to unified diff)

--- src/sys/arch/mips/rmi/Attic/rmixl_i2c_pci.c 2011/12/27 19:57:18 1.1.2.2
+++ src/sys/arch/mips/rmi/Attic/rmixl_i2c_pci.c 2012/01/19 17:29:23 1.1.2.3
@@ -19,62 +19,61 @@ @@ -19,62 +19,61 @@
19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 * POSSIBILITY OF SUCH DAMAGE. 27 * POSSIBILITY OF SUCH DAMAGE.
28 */ 28 */
29 29
30#include <sys/cdefs.h> 30#include <sys/cdefs.h>
31 31
32__KERNEL_RCSID(1, "$NetBSD: rmixl_i2c_pci.c,v 1.1.2.2 2011/12/27 19:57:18 matt Exp $"); 32__KERNEL_RCSID(1, "$NetBSD: rmixl_i2c_pci.c,v 1.1.2.3 2012/01/19 17:29:23 matt Exp $");
33 33
34#include <sys/param.h> 34#include <sys/param.h>
35#include <sys/device.h> 35#include <sys/device.h>
36#include <sys/bus.h> 36#include <sys/bus.h>
37 37
38#include <dev/pci/pcireg.h> 38#include <dev/pci/pcireg.h>
39#include <dev/pci/pcivar.h> 39#include <dev/pci/pcivar.h>
40#include <dev/pci/pcidevs.h> 40#include <dev/pci/pcidevs.h>
41 41
42#include <mips/rmi/rmixlreg.h> 42#include <mips/rmi/rmixlreg.h>
43#include <mips/rmi/rmixlvar.h> 43#include <mips/rmi/rmixlvar.h>
44 44
45#include <mips/rmi/rmixl_i2creg.h> 45#include <mips/rmi/rmixl_i2creg.h>
46#include <mips/rmi/rmixl_i2cvar.h> 46#include <mips/rmi/rmixl_i2cvar.h>
47 47
48#include "locators.h" 48#include "locators.h"
49 49
50#ifdef DEBUG 50#ifdef DEBUG
51int xli2c_debug = 0; 51int xli2c_debug = 0;
52#define DPRINTF(x, ...) do { if (xli2c_debug) printf(x, ## __VA_ARGS__); } while (0) 52#define DPRINTF(x, ...) do { if (xli2c_debug) printf(x, ## __VA_ARGS__); } while (0)
53#else 53#else
54#define DPRINTF(x) 54#define DPRINTF(x)
55#endif 55#endif
56 56
57static int xli2c_pci_match(device_t, cfdata_t, void *); 57static int xli2c_pci_match(device_t, cfdata_t, void *);
58static void xli2c_pci_attach(device_t, device_t, void *); 58static void xli2c_pci_attach(device_t, device_t, void *);
59 59
60static int xli2c_acquire_bus(void *, int); 60static int xli2c_acquire_bus(void *, int);
61static void xli2c_release_bus(void *, int); 61static void xli2c_release_bus(void *, int);
62static int xli2c_exec(void *, i2c_op_t, i2c_addr_t, const void *, size_t, 62static int xli2c_exec(void *, i2c_op_t, i2c_addr_t, const void *, size_t,
63 void *, size_t, int); 63 void *, size_t, int);
64#if 0 64
65static int xli2c_intr(void *); 65static int xli2c_intr(void *);
66#endif 66static int xli2c_wait_for_command(struct xli2c_softc *, uint8_t);
67static int xli2c_wait_for_command(struct xli2c_softc *, uint8_t); 
68 67
69static inline uint8_t 68static inline uint8_t
70xli2c_read_status(struct xli2c_softc *sc) 69xli2c_read_status(struct xli2c_softc *sc)
71{ 70{
72 return bus_space_read_4(sc->sc_bst, sc->sc_bsh, RMIXLP_I2C_STATUS); 71 return bus_space_read_4(sc->sc_bst, sc->sc_bsh, RMIXLP_I2C_STATUS);
73} 72}
74 73
75static inline uint8_t 74static inline uint8_t
76xli2c_read_control(struct xli2c_softc *sc) 75xli2c_read_control(struct xli2c_softc *sc)
77{ 76{
78 return bus_space_read_4(sc->sc_bst, sc->sc_bsh, RMIXLP_I2C_CONTROL); 77 return bus_space_read_4(sc->sc_bst, sc->sc_bsh, RMIXLP_I2C_CONTROL);
79} 78}
80 79
@@ -149,38 +148,36 @@ xli2c_pci_attach(device_t parent, device @@ -149,38 +148,36 @@ xli2c_pci_attach(device_t parent, device
149 148
150 mutex_init(&sc->sc_buslock, MUTEX_DEFAULT, IPL_NONE); 149 mutex_init(&sc->sc_buslock, MUTEX_DEFAULT, IPL_NONE);
151 150
152 sc->sc_i2c.ic_acquire_bus = xli2c_acquire_bus, 151 sc->sc_i2c.ic_acquire_bus = xli2c_acquire_bus,
153 sc->sc_i2c.ic_release_bus = xli2c_release_bus, 152 sc->sc_i2c.ic_release_bus = xli2c_release_bus,
154 sc->sc_i2c.ic_exec = xli2c_exec, 153 sc->sc_i2c.ic_exec = xli2c_exec,
155 sc->sc_i2c.ic_cookie = sc; 154 sc->sc_i2c.ic_cookie = sc;
156 155
157 xli2c_write_control(sc, 0); /* reset before changing anything */ 156 xli2c_write_control(sc, 0); /* reset before changing anything */
158 xli2c_write_command(sc, RMIXLP_I2C_COMMAND_IACK); 157 xli2c_write_command(sc, RMIXLP_I2C_COMMAND_IACK);
159 /* MMM MAGIC */ 158 /* MMM MAGIC */
160 xli2c_write_prescale(sc, rmixl_i2c_calc_prescale(133333333, 100000)); 159 xli2c_write_prescale(sc, rmixl_i2c_calc_prescale(133333333, 100000));
161 160
162#if 0 
163 pci_intr_handle_t pcih; 161 pci_intr_handle_t pcih;
164 162
165 pci_intr_map(pa, &pcih); 163 pci_intr_map(pa, &pcih);
166 164
167 if (pci_intr_establish(pa->pa_pc, pcih, IPL_VM, xli2c_intr, sc) == NULL) { 165 if (pci_intr_establish(pa->pa_pc, pcih, IPL_VM, xli2c_intr, sc) == NULL) {
168 aprint_error_dev(self, "failed to establish interrupt\n"); 166 aprint_error_dev(self, "failed to establish interrupt\n");
169 } else { 167 } else {
170 const char * const intrstr = pci_intr_string(pa->pa_pc, pcih); 168 const char * const intrstr = pci_intr_string(pa->pa_pc, pcih);
171 aprint_normal_dev(self, "interrupting at %s\n", intrstr); 169 aprint_normal_dev(self, "interrupting at %s\n", intrstr);
172 } 170 }
173#endif 
174 171
175 memset(&iba, 0, sizeof(iba)); 172 memset(&iba, 0, sizeof(iba));
176 iba.iba_tag = &sc->sc_i2c; 173 iba.iba_tag = &sc->sc_i2c;
177 config_found_ia(self, "i2cbus", &iba, iicbus_print); 174 config_found_ia(self, "i2cbus", &iba, iicbus_print);
178} 175}
179 176
180static int 177static int
181xli2c_acquire_bus(void *v, int flags) 178xli2c_acquire_bus(void *v, int flags)
182{ 179{
183 struct xli2c_softc * const sc = v; 180 struct xli2c_softc * const sc = v;
184 181
185 mutex_enter(&sc->sc_buslock); 182 mutex_enter(&sc->sc_buslock);
186 183
@@ -191,37 +188,35 @@ xli2c_acquire_bus(void *v, int flags) @@ -191,37 +188,35 @@ xli2c_acquire_bus(void *v, int flags)
191} 188}
192 189
193static void 190static void
194xli2c_release_bus(void *v, int flags) 191xli2c_release_bus(void *v, int flags)
195{ 192{
196 struct xli2c_softc * const sc = v; 193 struct xli2c_softc * const sc = v;
197 194
198 /* disable the I2C module */ 195 /* disable the I2C module */
199 xli2c_write_control(sc, 0); 196 xli2c_write_control(sc, 0);
200 197
201 mutex_exit(&sc->sc_buslock); 198 mutex_exit(&sc->sc_buslock);
202} 199}
203 200
204#if 0 
205static int 201static int
206xli2c_intr(void *v) 202xli2c_intr(void *v)
207{ 203{
208 struct xli2c_softc * const sc = v; 204 struct xli2c_softc * const sc = v;
209 205
210 panic("%s(%p) called!", __func__, sc); 206 panic("%s(%p) called!", __func__, sc);
211 207
212 return 0; 208 return 0;
213} 209}
214#endif 
215 210
216/* send a command and busy wait for the byte data transfer to complete */ 211/* send a command and busy wait for the byte data transfer to complete */
217static int 212static int
218xli2c_wait_for_command(struct xli2c_softc *sc, uint8_t command) 213xli2c_wait_for_command(struct xli2c_softc *sc, uint8_t command)
219{ 214{
220 uint32_t status; 215 uint32_t status;
221 int error = 0; 216 int error = 0;
222 u_int timo; 217 u_int timo;
223 218
224 /* 219 /*
225 * Issue the command. 220 * Issue the command.
226 */ 221 */
227 xli2c_write_command(sc, command); 222 xli2c_write_command(sc, command);