| @@ -122,27 +122,27 @@ NESTED(rmixlfw_wakeup_cpu, CALLFRAME_SIZ | | | @@ -122,27 +122,27 @@ NESTED(rmixlfw_wakeup_cpu, CALLFRAME_SIZ |
122 | mtc0 t0, MIPS_COP_0_STATUS | | 122 | mtc0 t0, MIPS_COP_0_STATUS |
123 | REG_L t8, CALLFRAME_SIZ+1*SZREG(sp) | | 123 | REG_L t8, CALLFRAME_SIZ+1*SZREG(sp) |
124 | REG_L gp, CALLFRAME_SIZ+0*SZREG(sp) | | 124 | REG_L gp, CALLFRAME_SIZ+0*SZREG(sp) |
125 | REG_L s0, CALLFRAME_S0(sp) | | 125 | REG_L s0, CALLFRAME_S0(sp) |
126 | REG_L ra, CALLFRAME_RA(sp) | | 126 | REG_L ra, CALLFRAME_RA(sp) |
127 | jr ra | | 127 | jr ra |
128 | PTR_ADDU sp, sp, (CALLFRAME_SIZ+4*SZREG) | | 128 | PTR_ADDU sp, sp, (CALLFRAME_SIZ+4*SZREG) |
129 | END(rmixlfw_wakeup_cpu) | | 129 | END(rmixlfw_wakeup_cpu) |
130 | | | 130 | |
131 | /* | | 131 | /* |
132 | * rmixl_cpu_trampoline - entry point for subordinate (non-#0) CPU wakeup | | 132 | * rmixl_cpu_trampoline - entry point for subordinate (non-#0) CPU wakeup |
133 | */ | | 133 | */ |
134 | NESTED(rmixl_cpu_trampoline, CALLFRAME_SIZ, ra) | | 134 | NESTED(rmixl_cpu_trampoline, CALLFRAME_SIZ, ra) |
135 | #ifdef _LP64 | | 135 | #ifndef __mips_o32 |
136 | /* | | 136 | /* |
137 | * reconstruct trampoline args addr: | | 137 | * reconstruct trampoline args addr: |
138 | * sign-extend 32 bit KSEG0 address in a0 | | 138 | * sign-extend 32 bit KSEG0 address in a0 |
139 | * to make proper 64 bit KSEG0 addr | | 139 | * to make proper 64 bit KSEG0 addr |
140 | */ | | 140 | */ |
141 | sll s0, a0, 0 | | 141 | sll s0, a0, 0 |
142 | li t0, MIPS_SR_KX | | 142 | li t0, MIPS_SR_KX |
143 | #else | | 143 | #else |
144 | li t0, 0 | | 144 | li t0, 0 |
145 | #endif | | 145 | #endif |
146 | | | 146 | |
147 | mtc0 zero, $9, 7 /* disable all in MIPS_COP_0_EIMR */ | | 147 | mtc0 zero, $9, 7 /* disable all in MIPS_COP_0_EIMR */ |
148 | | | 148 | |